diff --git a/bdk/soc/ccplex.c b/bdk/soc/ccplex.c
index e353679..377625d 100644
--- a/bdk/soc/ccplex.c
+++ b/bdk/soc/ccplex.c
@@ -88,12 +88,12 @@ void ccplex_boot_cpu0(u32 entry)
 	// CAR2PMC_CPU_ACK_WIDTH should be set to 0.
 	CLOCK(CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2) &= 0xFFFFF000;
 
-	// Enable CPU rail.
-	pmc_enable_partition(0, 1);
+	// Enable CPU main rail.
+	pmc_enable_partition(POWER_RAIL_CRAIL, ENABLE);
 	// Enable cluster 0 non-CPU rail.
-	pmc_enable_partition(15, 1);
-	// Enable CE0 rail.
-	pmc_enable_partition(14, 1);
+	pmc_enable_partition(POWER_RAIL_C0NC,  ENABLE);
+	// Enable CPU0 rail.
+	pmc_enable_partition(POWER_RAIL_CE0,   ENABLE);
 
 	// Request and wait for RAM repair.
 	FLOW_CTLR(FLOW_CTLR_RAM_REPAIR) = 1;
diff --git a/bdk/soc/pmc.c b/bdk/soc/pmc.c
index 3c1fba4..aa86cb7 100644
--- a/bdk/soc/pmc.c
+++ b/bdk/soc/pmc.c
@@ -76,7 +76,7 @@ void pmc_scratch_lock(pmc_sec_lock_t lock_mask)
 		PMC(APBDEV_PMC_SEC_DISABLE)  |= 0xFF000;    // RW lock: 4-7
 }
 
-int pmc_enable_partition(u32 part, int enable)
+int pmc_enable_partition(pmc_power_rail_t part, u32 enable)
 {
 	u32 part_mask = BIT(part);
 	u32 desired_state = enable << part;
diff --git a/bdk/soc/pmc.h b/bdk/soc/pmc.h
index d8a84e2..42bd869 100644
--- a/bdk/soc/pmc.h
+++ b/bdk/soc/pmc.h
@@ -113,7 +113,41 @@ typedef enum _pmc_sec_lock_t
 	PMC_SEC_LOCK_SE_SRK     = BIT(8),
 } pmc_sec_lock_t;
 
+typedef enum _pmc_power_rail_t
+{
+	POWER_RAIL_CRAIL = 0,
+	POWER_RAIL_3D0   = 1,
+	POWER_RAIL_VENC  = 2,
+	POWER_RAIL_PCIE  = 3,
+	POWER_RAIL_VDEC  = 4,
+	POWER_RAIL_L2C   = 5,
+	POWER_RAIL_MPE   = 6,
+	POWER_RAIL_HEG   = 7,
+	POWER_RAIL_SATA  = 8,
+	POWER_RAIL_CE1   = 9,
+	POWER_RAIL_CE2   = 10,
+	POWER_RAIL_CE3   = 11,
+	POWER_RAIL_CELP  = 12,
+	POWER_RAIL_3D1   = 13,
+	POWER_RAIL_CE0   = 14,
+	POWER_RAIL_C0NC  = 15,
+	POWER_RAIL_C1NC  = 16,
+	POWER_RAIL_SOR   = 17,
+	POWER_RAIL_DIS   = 18,
+	POWER_RAIL_DISB  = 19,
+	POWER_RAIL_XUSBA = 20,
+	POWER_RAIL_XUSBB = 21,
+	POWER_RAIL_XUSBC = 22,
+	POWER_RAIL_VIC   = 23,
+	POWER_RAIL_IRAM  = 24,
+	POWER_RAIL_NVDEC = 25,
+	POWER_RAIL_NVJPG = 26,
+	POWER_RAIL_AUD   = 27,
+	POWER_RAIL_DFD   = 28,
+	POWER_RAIL_VE2   = 29
+} pmc_power_rail_t;
+
 void pmc_scratch_lock(pmc_sec_lock_t lock_mask);
-int  pmc_enable_partition(u32 part, int enable);
+int  pmc_enable_partition(pmc_power_rail_t part, u32 enable);
 
 #endif
diff --git a/bdk/utils/types.h b/bdk/utils/types.h
index ea34cdb..96615ab 100644
--- a/bdk/utils/types.h
+++ b/bdk/utils/types.h
@@ -62,6 +62,9 @@ typedef int bool;
 #define true  1
 #define false 0
 
+#define DISABLE 0
+#define ENABLE  1
+
 #define BOOT_CFG_AUTOBOOT_EN BIT(0)
 #define BOOT_CFG_FROM_LAUNCH BIT(1)
 #define BOOT_CFG_FROM_ID     BIT(2)