From 5ca35aa4fc409e29ae23e00fbf5a0760d379709a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 30 Apr 2020 14:03:57 +0300 Subject: [PATCH] memory map: Repartition RAM based on new needs --- common/memory_map.h | 78 ++++++++++++++++++++++++--------------------- nyx/nyx_gui/start.S | 4 +-- 2 files changed, 44 insertions(+), 38 deletions(-) diff --git a/common/memory_map.h b/common/memory_map.h index 06dd63f..372c7c1 100644 --- a/common/memory_map.h +++ b/common/memory_map.h @@ -28,60 +28,66 @@ /* --- DRAM START --- */ #define DRAM_START 0x80000000 -/* Do not write anything in this area */ -#define NYX_LOAD_ADDR 0x81000000 -#define NYX_SZ_MAX 0x1000000 -/* Stack theoretical max: 220MB */ -#define IPL_STACK_TOP 0x90010000 -#define IPL_HEAP_START 0x90020000 -#define IPL_HEAP_SZ 0x24FE0000 // 592MB. -/* --- Gap: 0xB5000000 - 0xB5FFFFFF --- */ +#define HOS_RSVD 0x1000000 // Do not write anything in this area. -// SDMMC DMA buffers -#define SDXC_BUF_ALIGNED 0xB6000000 -#define MIXD_BUF_ALIGNED 0xB7000000 -#define EMMC_BUF_ALIGNED MIXD_BUF_ALIGNED -#define SDMMC_DMA_BUF_SZ 0x1000000 // 16MB (4MB currently used). -#define SDMMC_UPPER_BUFFER 0xB8000000 -#define SDMMC_UP_BUF_SZ 0x8000000 // 128MB. +#define NYX_LOAD_ADDR 0x81000000 +#define NYX_SZ_MAX 0x1000000 // 16MB +/* --- Gap: 0x82000000 - 0x82FFFFFF --- */ + +/* Stack theoretical max: 33MB */ +#define IPL_STACK_TOP 0x83100000 +#define IPL_HEAP_START 0x84000000 +#define IPL_HEAP_SZ 0x20000000 // 512MB. +/* --- Gap: 1040MB 0xA4000000 - 0xE4FFFFFF --- */ // Virtual disk / Chainloader buffers. -#define RAM_DISK_ADDR 0xC1000000 -#define RAM_DISK_SZ 0x20000000 +#define RAM_DISK_ADDR 0xA4000000 +#define RAM_DISK_SZ 0x41000000 // 1040MB. + //#define DRAM_LIB_ADDR 0xE0000000 /* --- Chnldr: 252MB 0xC03C0000 - 0xCFFFFFFF --- */ //! Only used when chainloading. -/* --- Gap: 464MB 0xD0000000 - 0xECFFFFFF --- */ + +// SDMMC DMA buffers 1 +#define SDMMC_UPPER_BUFFER 0xE5000000 +#define SDMMC_UP_BUF_SZ 0x8000000 // 128MB. // Nyx buffers. #define NYX_STORAGE_ADDR 0xED000000 #define NYX_RES_ADDR 0xEE000000 +#define NYX_RES_SZ 0x1000000 // 16MB. -// Framebuffer addresses. -#define IPL_FB_ADDRESS 0xF0000000 -#define IPL_FB_SZ 0x384000 // 720 x 1280 x 4. -#define LOG_FB_ADDRESS 0xF0400000 -#define LOG_FB_SZ 0x334000 // 1280 x 656 x 4. -#define NYX_FB_ADDRESS 0xF0800000 -#define NYX_FB_SZ 0x384000 // 1280 x 720 x 4. +// SDMMC DMA buffers 2 +#define SDXC_BUF_ALIGNED 0xEF000000 +#define MIXD_BUF_ALIGNED 0xF0000000 +#define EMMC_BUF_ALIGNED MIXD_BUF_ALIGNED +#define SDMMC_DMA_BUF_SZ 0x1000000 // 16MB (4MB currently used). // Nyx LvGL buffers. -#define NYX_LV_VDB_ADR 0xF0C00000 +#define NYX_LV_VDB_ADR 0xF1000000 #define NYX_FB_SZ 0x384000 // 1280 x 720 x 4. -#define NYX_LV_MEM_ADR 0xF1000000 -#define NYX_LV_MEM_SZ 0x8000000 +#define NYX_LV_MEM_ADR 0xF1400000 +#define NYX_LV_MEM_SZ 0x6600000 // 70MB. + +// Framebuffer addresses. +#define IPL_FB_ADDRESS 0xF5A00000 +#define IPL_FB_SZ 0x384000 // 720 x 1280 x 4. +#define LOG_FB_ADDRESS 0xF5E00000 +#define LOG_FB_SZ 0x334000 // 1280 x 656 x 4. +#define NYX_FB_ADDRESS 0xF6200000 +#define NYX_FB2_ADDRESS 0xF6600000 +#define NYX_FB_SZ 0x384000 // 1280 x 720 x 4. + +#define DRAM_MEM_HOLE_ADR 0xF6A00000 +#define DRAM_MEM_HOLE_SZ 0x8140000 +/* --- Hole: 129MB 0xF6A00000 - 0xFEB3FFFF --- */ +#define DRAM_START2 0xFEB40000 // NX BIS driver sector cache. -#define NX_BIS_CACHE_ADDR 0xF9000000 +#define NX_BIS_CACHE_ADDR 0xFEE00000 #define NX_BIS_CACHE_SZ 0x8800 -/* --- Gap: 111MB 0xF9008800 - 0xFFFFFFFF --- */ -// #define EXT_PAYLOAD_ADDR 0xC03C0000 -// #define RCM_PAYLOAD_ADDR (EXT_PAYLOAD_ADDR + ALIGN(PATCHED_RELOC_SZ, 0x10)) -// #define COREBOOT_ADDR (0xD0000000 - 0x100000) - -// NYX // #define EXT_PAYLOAD_ADDR 0xC0000000 // #define RCM_PAYLOAD_ADDR (EXT_PAYLOAD_ADDR + ALIGN(PATCHED_RELOC_SZ, 0x10)) -// #define COREBOOT_ADDR (0xD0000000 - 0x100000) +// #define COREBOOT_ADDR (0xD0000000 - rom_size) #endif diff --git a/nyx/nyx_gui/start.S b/nyx/nyx_gui/start.S index 20ff5cb..0d1eebf 100644 --- a/nyx/nyx_gui/start.S +++ b/nyx/nyx_gui/start.S @@ -60,8 +60,8 @@ _reloc_ipl: BX R3 _real_start: - /* Initially, we place our stack in IRAM but will move it to SDRAM later. */ - LDR SP, =0x90010000 + /* We place our stack in SDRAM. */ + LDR SP, =0x83100000 LDR R0, =__bss_start EOR R1, R1, R1 LDR R2, =__bss_end