From 4dcbaa8c2b99d9cba0197e4662c6228df44d5571 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 30 Apr 2020 14:25:58 +0300 Subject: [PATCH] Update Clocks and Fuses for USB --- bootloader/soc/clock.h | 20 ++++++++++++++++++++ bootloader/soc/fuse.h | 2 ++ nyx/nyx_gui/soc/clock.h | 20 ++++++++++++++++++++ nyx/nyx_gui/soc/fuse.h | 2 ++ 4 files changed, 44 insertions(+) diff --git a/bootloader/soc/clock.h b/bootloader/soc/clock.h index e769b7d..a9b9f9a 100644 --- a/bootloader/soc/clock.h +++ b/bootloader/soc/clock.h @@ -43,6 +43,12 @@ #define CLK_RST_CONTROLLER_PLLM_MISC1 0x98 #define CLK_RST_CONTROLLER_PLLM_MISC2 0x9C #define CLK_RST_CONTROLLER_PLLP_BASE 0xA0 +#define CLK_RST_CONTROLLER_PLLA_BASE 0xB0 +#define CLK_RST_CONTROLLER_PLLA_OUT 0xB4 +#define CLK_RST_CONTROLLER_PLLA_MISC1 0xB8 +#define CLK_RST_CONTROLLER_PLLA_MISC 0xBC +#define CLK_RST_CONTROLLER_PLLU_BASE 0xC0 +#define CLK_RST_CONTROLLER_PLLU_MISC 0xCC #define CLK_RST_CONTROLLER_PLLD_BASE 0xD0 #define CLK_RST_CONTROLLER_PLLD_MISC1 0xD8 #define CLK_RST_CONTROLLER_PLLD_MISC 0xDC @@ -52,6 +58,7 @@ #define CLK_RST_CONTROLLER_PLLE_MISC 0xEC #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRA 0xF8 #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRB 0xFC +#define CLK_RST_CONTROLLER_CLK_SOURCE_I2S2 0x100 #define CLK_RST_CONTROLLER_CLK_SOURCE_PWM 0x110 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C1 0x124 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C5 0x128 @@ -70,6 +77,7 @@ #define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC3 0x1BC #define CLK_RST_CONTROLLER_CLK_SOURCE_UARTD 0x1C0 #define CLK_RST_CONTROLLER_CLK_SOURCE_CSITE 0x1D4 +#define CLK_RST_CONTROLLER_CLK_SOURCE_I2S1 0x1D8 #define CLK_RST_CONTROLLER_CLK_SOURCE_TSEC 0x1F4 #define CLK_RST_CONTROLLER_CLK_OUT_ENB_X 0x280 #define CLK_RST_CONTROLLER_CLK_ENB_X_SET 0x284 @@ -104,20 +112,27 @@ #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD 0x3A4 #define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT 0x3B4 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C4 0x3C4 +#define CLK_RST_CONTROLLER_CLK_SOURCE_EXTPERIPH1 0x3EC #define CLK_RST_CONTROLLER_CLK_SOURCE_SYS 0x400 #define CLK_RST_CONTROLLER_CLK_SOURCE_SOR1 0x410 #define CLK_RST_CONTROLLER_CLK_SOURCE_SE 0x42C +#define CLK_RST_CONTROLLER_RST_DEV_V_SET 0x430 #define CLK_RST_CONTROLLER_RST_DEV_V_CLR 0x434 +#define CLK_RST_CONTROLLER_RST_DEV_W_SET 0x438 +#define CLK_RST_CONTROLLER_RST_DEV_W_CLR 0x43C #define CLK_RST_CONTROLLER_CLK_ENB_V_SET 0x440 #define CLK_RST_CONTROLLER_CLK_ENB_V_CLR 0x444 #define CLK_RST_CONTROLLER_CLK_ENB_W_SET 0x448 #define CLK_RST_CONTROLLER_CLK_ENB_W_CLR 0x44C #define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET 0x450 #define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR 0x454 +#define CLK_RST_CONTROLLER_UTMIP_PLL_CFG0 0x480 +#define CLK_RST_CONTROLLER_UTMIP_PLL_CFG1 0x484 #define CLK_RST_CONTROLLER_UTMIP_PLL_CFG2 0x488 #define CLK_RST_CONTROLLER_PLLE_AUX 0x48C #define CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_I2S0 0x4A0 #define CLK_RST_CONTROLLER_PLLX_MISC_3 0x518 +#define CLK_RST_CONTROLLER_UTMIPLL_HW_PWRDN_CFG0 0x52C #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRE 0x554 #define CLK_RST_CONTROLLER_SPARE_REG0 0x55C #define CLK_RST_CONTROLLER_PLLC4_BASE 0x5A4 @@ -131,6 +146,7 @@ #define CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL 0x66C #define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM 0x694 #define CLK_RST_CONTROLLER_CLK_SOURCE_NVENC 0x6A0 +#define CLK_RST_CONTROLLER_CLK_SOURCE_USB2_HSIC_TRK 0x6CC #define CLK_RST_CONTROLLER_SE_SUPER_CLK_DIVIDER 0x704 #define CLK_RST_CONTROLLER_CLK_SOURCE_UARTAPE 0x710 @@ -141,6 +157,10 @@ #define PLLCX_BASE_REF_DIS (1 << 29) #define PLLCX_BASE_LOCK (1 << 27) +#define PLLA_BASE_IDDQ (1 << 25) +#define PLLA_OUT0_CLKEN (1 << 1) +#define PLLA_OUT0_RSTN_CLR (1 << 0) + #define PLLC_MISC_RESET (1 << 30) #define PLLC_MISC1_IDDQ (1 << 27) #define PLLC_OUT1_CLKEN (1 << 1) diff --git a/bootloader/soc/fuse.h b/bootloader/soc/fuse.h index 9240b04..00ee63c 100644 --- a/bootloader/soc/fuse.h +++ b/bootloader/soc/fuse.h @@ -54,6 +54,7 @@ #define FUSE_PRIVATE_KEY3 0x1B0 #define FUSE_PRIVATE_KEY4 0x1B4 #define FUSE_RESERVED_SW 0x1C0 +#define FUSE_USB_CALIB 0x1F0 #define FUSE_SKU_DIRECT_CONFIG 0x1F4 #define FUSE_OPT_VENDOR_CODE 0x200 #define FUSE_OPT_FAB_CODE 0x204 @@ -63,6 +64,7 @@ #define FUSE_OPT_X_COORDINATE 0x214 #define FUSE_OPT_Y_COORDINATE 0x218 #define FUSE_GPU_IDDQ_CALIB 0x228 +#define FUSE_USB_CALIB_EXT 0x350 /*! Fuse commands. */ #define FUSE_READ 0x1 diff --git a/nyx/nyx_gui/soc/clock.h b/nyx/nyx_gui/soc/clock.h index e769b7d..a9b9f9a 100644 --- a/nyx/nyx_gui/soc/clock.h +++ b/nyx/nyx_gui/soc/clock.h @@ -43,6 +43,12 @@ #define CLK_RST_CONTROLLER_PLLM_MISC1 0x98 #define CLK_RST_CONTROLLER_PLLM_MISC2 0x9C #define CLK_RST_CONTROLLER_PLLP_BASE 0xA0 +#define CLK_RST_CONTROLLER_PLLA_BASE 0xB0 +#define CLK_RST_CONTROLLER_PLLA_OUT 0xB4 +#define CLK_RST_CONTROLLER_PLLA_MISC1 0xB8 +#define CLK_RST_CONTROLLER_PLLA_MISC 0xBC +#define CLK_RST_CONTROLLER_PLLU_BASE 0xC0 +#define CLK_RST_CONTROLLER_PLLU_MISC 0xCC #define CLK_RST_CONTROLLER_PLLD_BASE 0xD0 #define CLK_RST_CONTROLLER_PLLD_MISC1 0xD8 #define CLK_RST_CONTROLLER_PLLD_MISC 0xDC @@ -52,6 +58,7 @@ #define CLK_RST_CONTROLLER_PLLE_MISC 0xEC #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRA 0xF8 #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRB 0xFC +#define CLK_RST_CONTROLLER_CLK_SOURCE_I2S2 0x100 #define CLK_RST_CONTROLLER_CLK_SOURCE_PWM 0x110 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C1 0x124 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C5 0x128 @@ -70,6 +77,7 @@ #define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC3 0x1BC #define CLK_RST_CONTROLLER_CLK_SOURCE_UARTD 0x1C0 #define CLK_RST_CONTROLLER_CLK_SOURCE_CSITE 0x1D4 +#define CLK_RST_CONTROLLER_CLK_SOURCE_I2S1 0x1D8 #define CLK_RST_CONTROLLER_CLK_SOURCE_TSEC 0x1F4 #define CLK_RST_CONTROLLER_CLK_OUT_ENB_X 0x280 #define CLK_RST_CONTROLLER_CLK_ENB_X_SET 0x284 @@ -104,20 +112,27 @@ #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD 0x3A4 #define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT 0x3B4 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C4 0x3C4 +#define CLK_RST_CONTROLLER_CLK_SOURCE_EXTPERIPH1 0x3EC #define CLK_RST_CONTROLLER_CLK_SOURCE_SYS 0x400 #define CLK_RST_CONTROLLER_CLK_SOURCE_SOR1 0x410 #define CLK_RST_CONTROLLER_CLK_SOURCE_SE 0x42C +#define CLK_RST_CONTROLLER_RST_DEV_V_SET 0x430 #define CLK_RST_CONTROLLER_RST_DEV_V_CLR 0x434 +#define CLK_RST_CONTROLLER_RST_DEV_W_SET 0x438 +#define CLK_RST_CONTROLLER_RST_DEV_W_CLR 0x43C #define CLK_RST_CONTROLLER_CLK_ENB_V_SET 0x440 #define CLK_RST_CONTROLLER_CLK_ENB_V_CLR 0x444 #define CLK_RST_CONTROLLER_CLK_ENB_W_SET 0x448 #define CLK_RST_CONTROLLER_CLK_ENB_W_CLR 0x44C #define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET 0x450 #define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR 0x454 +#define CLK_RST_CONTROLLER_UTMIP_PLL_CFG0 0x480 +#define CLK_RST_CONTROLLER_UTMIP_PLL_CFG1 0x484 #define CLK_RST_CONTROLLER_UTMIP_PLL_CFG2 0x488 #define CLK_RST_CONTROLLER_PLLE_AUX 0x48C #define CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_I2S0 0x4A0 #define CLK_RST_CONTROLLER_PLLX_MISC_3 0x518 +#define CLK_RST_CONTROLLER_UTMIPLL_HW_PWRDN_CFG0 0x52C #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRE 0x554 #define CLK_RST_CONTROLLER_SPARE_REG0 0x55C #define CLK_RST_CONTROLLER_PLLC4_BASE 0x5A4 @@ -131,6 +146,7 @@ #define CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL 0x66C #define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM 0x694 #define CLK_RST_CONTROLLER_CLK_SOURCE_NVENC 0x6A0 +#define CLK_RST_CONTROLLER_CLK_SOURCE_USB2_HSIC_TRK 0x6CC #define CLK_RST_CONTROLLER_SE_SUPER_CLK_DIVIDER 0x704 #define CLK_RST_CONTROLLER_CLK_SOURCE_UARTAPE 0x710 @@ -141,6 +157,10 @@ #define PLLCX_BASE_REF_DIS (1 << 29) #define PLLCX_BASE_LOCK (1 << 27) +#define PLLA_BASE_IDDQ (1 << 25) +#define PLLA_OUT0_CLKEN (1 << 1) +#define PLLA_OUT0_RSTN_CLR (1 << 0) + #define PLLC_MISC_RESET (1 << 30) #define PLLC_MISC1_IDDQ (1 << 27) #define PLLC_OUT1_CLKEN (1 << 1) diff --git a/nyx/nyx_gui/soc/fuse.h b/nyx/nyx_gui/soc/fuse.h index 9240b04..00ee63c 100644 --- a/nyx/nyx_gui/soc/fuse.h +++ b/nyx/nyx_gui/soc/fuse.h @@ -54,6 +54,7 @@ #define FUSE_PRIVATE_KEY3 0x1B0 #define FUSE_PRIVATE_KEY4 0x1B4 #define FUSE_RESERVED_SW 0x1C0 +#define FUSE_USB_CALIB 0x1F0 #define FUSE_SKU_DIRECT_CONFIG 0x1F4 #define FUSE_OPT_VENDOR_CODE 0x200 #define FUSE_OPT_FAB_CODE 0x204 @@ -63,6 +64,7 @@ #define FUSE_OPT_X_COORDINATE 0x214 #define FUSE_OPT_Y_COORDINATE 0x218 #define FUSE_GPU_IDDQ_CALIB 0x228 +#define FUSE_USB_CALIB_EXT 0x350 /*! Fuse commands. */ #define FUSE_READ 0x1