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https://github.com/CTCaer/hekate
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bdk: slight refactor
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parent
a1fde0d9b6
commit
4d823d5909
9 changed files with 15 additions and 8 deletions
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2018-2019 CTCaer
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* Copyright (c) 2018-2022 CTCaer
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* under the terms and conditions of the GNU General Public License,
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2018-2019 CTCaer
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* Copyright (c) 2018-2022 CTCaer
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* under the terms and conditions of the GNU General Public License,
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@ -70,8 +70,8 @@
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#define MAX77812_REG_M2_CFG 0x30 // HOS: M2_ILIM - 7.2A/4.8A.
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#define MAX77812_REG_M2_CFG 0x30 // HOS: M2_ILIM - 7.2A/4.8A.
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#define MAX77812_REG_M3_CFG 0x31 // HOS: M3_ILIM - 7.2A/4.8A.
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#define MAX77812_REG_M3_CFG 0x31 // HOS: M3_ILIM - 7.2A/4.8A.
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#define MAX77812_REG_M4_CFG 0x32 // HOS: M4_ILIM - 7.2A/4.8A.
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#define MAX77812_REG_M4_CFG 0x32 // HOS: M4_ILIM - 7.2A/4.8A.
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#define MAX77812_REG_GLB_CFG1 0x33 // HOS: B_SD_SR/B_SS_SR - 5mV/ìs.
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#define MAX77812_REG_GLB_CFG1 0x33 // HOS: B_SD_SR/B_SS_SR - 5mV/us.
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#define MAX77812_REG_GLB_CFG2 0x34 // HOS: B_RD_SR/B_RU_SR - 5mV/ìs
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#define MAX77812_REG_GLB_CFG2 0x34 // HOS: B_RD_SR/B_RU_SR - 5mV/us
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#define MAX77812_REG_GLB_CFG3 0x35
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#define MAX77812_REG_GLB_CFG3 0x35
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/*! Protected area and settings only for MAX77812_ES2_VERSION */
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/*! Protected area and settings only for MAX77812_ES2_VERSION */
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@ -289,6 +289,9 @@ static void _config_regulators(bool tegra_t210)
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max7762x_regulator_enable(REGULATOR_LDO2, false);
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max7762x_regulator_enable(REGULATOR_LDO2, false);
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sd_power_cycle_time_start = get_tmr_ms();
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sd_power_cycle_time_start = get_tmr_ms();
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// Disable LCD DVDD.
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max7762x_regulator_enable(REGULATOR_LDO0, false);
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K);
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K);
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1,
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1,
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MAX77620_ONOFFCNFG1_RSVD | (3 << MAX77620_ONOFFCNFG1_MRT_SHIFT)); // PWR delay for forced shutdown off.
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MAX77620_ONOFFCNFG1_RSVD | (3 << MAX77620_ONOFFCNFG1_MRT_SHIFT)); // PWR delay for forced shutdown off.
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@ -471,6 +474,9 @@ void hw_reinit_workaround(bool coreboot, u32 bl_magic)
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gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_GPIO);
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gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_GPIO);
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display_backlight_brightness(brightness, 0);
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display_backlight_brightness(brightness, 0);
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break;
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break;
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case BL_MAGIC_L4TLDR_SLD:
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// Do not disable backlight at all.
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break;
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default:
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default:
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display_end();
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display_end();
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clock_disable_host1x();
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clock_disable_host1x();
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@ -21,7 +21,7 @@
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#include <utils/types.h>
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#include <utils/types.h>
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#define BL_MAGIC_CRBOOT_SLD 0x30444C53 // SLD0, seamless display type 0.
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#define BL_MAGIC_CRBOOT_SLD 0x30444C53 // SLD0, seamless display type 0.
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#define BL_MAGIC_HEKATF_SLD 0x31444C53 // SLD1, seamless display type 1.
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#define BL_MAGIC_L4TLDR_SLD 0x31444C53 // SLD1, seamless display type 1.
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#define BL_MAGIC_BROKEN_HWI 0xBAADF00D // Broken hwinit.
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#define BL_MAGIC_BROKEN_HWI 0xBAADF00D // Broken hwinit.
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extern u32 hw_rst_status;
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extern u32 hw_rst_status;
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@ -154,6 +154,7 @@
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#define APBDEV_PMC_SECURE_SCRATCH110 0xB10
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#define APBDEV_PMC_SECURE_SCRATCH110 0xB10
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#define APBDEV_PMC_SECURE_SCRATCH112 0xB18
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#define APBDEV_PMC_SECURE_SCRATCH112 0xB18
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#define APBDEV_PMC_SECURE_SCRATCH113 0xB1C
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#define APBDEV_PMC_SECURE_SCRATCH113 0xB1C
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#define APBDEV_PMC_SECURE_SCRATCH114 0xB20
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#define APBDEV_PMC_SECURE_SCRATCH119 0xB34
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#define APBDEV_PMC_SECURE_SCRATCH119 0xB34
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// Only in T210B01.
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// Only in T210B01.
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@ -1172,7 +1172,7 @@ u32 sd_storage_get_ssr_au(sdmmc_storage_t *storage)
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{
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{
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u32 shift = au_size;
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u32 shift = au_size;
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au_size = shift ? 8 : 0;
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au_size = shift ? 8 : 0;
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au_size <<= shift;
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au_size <<= shift;
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}
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}
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else
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else
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{
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{
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@ -1239,7 +1239,7 @@ static void _sdmmc_config_emmc(u32 id, bool t210b01)
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APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) &= 0xF8003FFF;
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APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) &= 0xF8003FFF;
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// Set default pad cfg.
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// Set default pad cfg.
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if (t210b01)
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if (t210b01)
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APB_MISC(APB_MISC_GP_EMMC4_PAD_PUPD_CFGPADCTRL) &= 0xFFBFFFF9; // Unset CMD/CLK/DQS powedown.
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APB_MISC(APB_MISC_GP_EMMC4_PAD_PUPD_CFGPADCTRL) &= 0xFFBFFFF9; // Unset CMD/CLK/DQS weak pull up/down.
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// Enable schmitt trigger.
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// Enable schmitt trigger.
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APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) |= 1;
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APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) |= 1;
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(void)APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL); // Commit write.
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(void)APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL); // Commit write.
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@ -1869,7 +1869,7 @@ int usb_device_gadget_ums(usb_ctxt_t *usbs)
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else
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else
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{
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{
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emmc_initialize(false);
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emmc_initialize(false);
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sdmmc_storage_set_mmc_partition(ums.lun.storage, ums.lun.partition - 1);
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emmc_set_partition(ums.lun.partition - 1);
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ums.lun.sdmmc = &emmc_sdmmc;
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ums.lun.sdmmc = &emmc_sdmmc;
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ums.lun.storage = &emmc_storage;
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ums.lun.storage = &emmc_storage;
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