From 4d53f2138729c262064475d22262caccb726214a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 14 Jan 2020 23:41:15 +0200 Subject: [PATCH] mtc: Clear init magic on chainload Fixes a hang caused when rebooting 2 payload from L4T with old hekate in vendor partition. L4T does not overwrite the nyx storage where the Minerva configuration is stored. This makes new Minerva parse the wrong tables from old hekate and eventually hang the RAM, which causes an exception on BPMP. --- bootloader/soc/hw_init.c | 1 + nyx/nyx_gui/soc/hw_init.c | 1 + 2 files changed, 2 insertions(+) diff --git a/bootloader/soc/hw_init.c b/bootloader/soc/hw_init.c index 40e08a4..808995c 100644 --- a/bootloader/soc/hw_init.c +++ b/bootloader/soc/hw_init.c @@ -317,6 +317,7 @@ void reconfig_hw_workaround(bool extra_reconfig, u32 magic) bpmp_mmu_disable(); bpmp_clk_rate_set(BPMP_CLK_NORMAL); minerva_change_freq(FREQ_204); + nyx_str->mtc_cfg.init_done = 0; // Re-enable clocks to Audio Processing Engine as a workaround to hanging. CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) |= (1 << 10); // Enable AHUB clock. diff --git a/nyx/nyx_gui/soc/hw_init.c b/nyx/nyx_gui/soc/hw_init.c index 5c943f2..7bc3006 100644 --- a/nyx/nyx_gui/soc/hw_init.c +++ b/nyx/nyx_gui/soc/hw_init.c @@ -45,6 +45,7 @@ void reconfig_hw_workaround(bool extra_reconfig, u32 magic) // Flush/disable MMU cache and set DRAM clock to 204MHz. bpmp_mmu_disable(); minerva_change_freq(FREQ_204); + nyx_str->mtc_cfg.init_done = 0; // Re-enable clocks to Audio Processing Engine as a workaround to hanging. CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) |= (1 << 10); // Enable AHUB clock.