diff --git a/bdk/mem/minerva.c b/bdk/mem/minerva.c index 2d0ed2d..7b2275e 100644 --- a/bdk/mem/minerva.c +++ b/bdk/mem/minerva.c @@ -27,10 +27,10 @@ #include #include -#define LA_REGS_OFFSET_T210 0x1284 -#define LA_REGS_OFFSET_T210B01 0xFA4 +#define TABLE_FREQ_KHZ_OFFSET 0x40 +#define TABLE_LA_REGS_T210_OFFSET 0x1284 +#define TABLE_LA_REGS_T210B01_OFFSET 0xFA4 #define LA_SDMMC1_INDEX 6 -#define LA_SDMMC4_INDEX 9 extern volatile nyx_storage_t *nyx_str; @@ -148,10 +148,22 @@ void minerva_change_freq(minerva_freq_t freq) void minerva_sdmmc_la_program(void *table, bool t210b01) { - u32 *la_scale_regs = (u32 *)(table + (t210b01 ? LA_REGS_OFFSET_T210B01 : LA_REGS_OFFSET_T210)); + u32 freq = *(u32 *)(table + TABLE_FREQ_KHZ_OFFSET); + u32 *la_scale_regs = (u32 *)(table + (t210b01 ? TABLE_LA_REGS_T210B01_OFFSET : TABLE_LA_REGS_T210_OFFSET)); - // Promote SDMMC1 latency allowance to SDMMC4 (SD to eMMC). - la_scale_regs[LA_SDMMC1_INDEX] = la_scale_regs[LA_SDMMC4_INDEX]; + // Adjust SDMMC1 latency allowance. + switch (freq) + { + case 204000: + la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 75; + break; + case 408000: + la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 37; + break; + default: + la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 30; + break; + } } void minerva_prep_boot_freq()