From 3f18713f53840e10894ab59c5fdb4bb31df48139 Mon Sep 17 00:00:00 2001 From: Kostas Missos Date: Tue, 26 Jun 2018 19:00:46 +0300 Subject: [PATCH] Add seconds timer + bugfixes --- ipl/bq24193.c | 2 +- ipl/bq24193.h | 2 +- ipl/btn.c | 4 ++-- ipl/clock.h | 1 + ipl/di.c | 4 ++-- ipl/gfx.c | 2 +- ipl/main.c | 12 +++++------- ipl/sdmmc.c | 12 ++++++------ ipl/sdmmc_driver.c | 44 ++++++++++++++++++++++---------------------- ipl/t210.h | 2 ++ ipl/tui.c | 2 ++ ipl/util.c | 9 +++++++-- ipl/util.h | 3 ++- 13 files changed, 54 insertions(+), 45 deletions(-) diff --git a/ipl/bq24193.c b/ipl/bq24193.c index e4b78fb..f33d41f 100644 --- a/ipl/bq24193.c +++ b/ipl/bq24193.c @@ -34,7 +34,7 @@ int bq24193_get_property(enum BQ24193_reg_prop prop, int *value) *value += ((data >> 3) & 1) ? 640 : 0; *value += 3880; break; - case BQ24193_IputCurrentLimit: // Input current limit (mA). + case BQ24193_InputCurrentLimit: // Input current limit (mA). data = i2c_recv_byte(I2C_1, BQ24193_I2C_ADDR, BQ24193_InputSource); data &= BQ24193_INCONFIG_INLIMIT_MASK; switch (data) diff --git a/ipl/bq24193.h b/ipl/bq24193.h index a19c694..2b2c680 100644 --- a/ipl/bq24193.h +++ b/ipl/bq24193.h @@ -101,7 +101,7 @@ enum BQ24193_reg { enum BQ24193_reg_prop { BQ24193_InputVoltageLimit, // REG 0. - BQ24193_IputCurrentLimit, // REG 0. + BQ24193_InputCurrentLimit, // REG 0. BQ24193_SystemMinimumVoltage, // REG 1. BQ24193_FastChargeCurrentLimit, // REG 2. BQ24193_ChargeVoltageLimit, // REG 4. diff --git a/ipl/btn.c b/ipl/btn.c index 1d339e1..0b7b97d 100755 --- a/ipl/btn.c +++ b/ipl/btn.c @@ -60,14 +60,14 @@ u32 btn_wait() u32 btn_wait_timeout(u32 time_ms, u32 mask) { - u32 timeout = get_tmr() + (time_ms * 1000); + u32 timeout = get_tmr_us() + (time_ms * 1000); u32 res = btn_read() & mask; do { if (!(res & mask)) res = btn_read() & mask; - } while (get_tmr() < timeout); + } while (get_tmr_us() < timeout); return res; } diff --git a/ipl/clock.h b/ipl/clock.h index b4d396e..ecf5dc1 100755 --- a/ipl/clock.h +++ b/ipl/clock.h @@ -106,6 +106,7 @@ #define CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIP_CAL 0x66C #define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM 0x694 #define CLK_RST_CONTROLLER_CLK_SOURCE_NVENC 0x6A0 +#define CLK_RST_CONTROLLER_SE_SUPER_CLK_DIVIDER 0x704 /*! Generic clock descriptor. */ typedef struct _clock_t diff --git a/ipl/di.c b/ipl/di.c index d36e9b0..0422adb 100755 --- a/ipl/di.c +++ b/ipl/di.c @@ -216,8 +216,8 @@ void display_color_screen(u32 color) u32 *display_init_framebuffer() { - //Sanitize framebuffer area. Aligned to 4MB. - memset((u32 *)0xC0000000, 0, 0x400000); + //Sanitize framebuffer area. + memset((u32 *)0xC0000000, 0, 0x3C0000); //This configures the framebuffer @ 0xC0000000 with a resolution of 1280x720 (line stride 768). exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_framebuffer, 32); diff --git a/ipl/gfx.c b/ipl/gfx.c index a9a4661..11acdbe 100755 --- a/ipl/gfx.c +++ b/ipl/gfx.c @@ -127,7 +127,7 @@ void gfx_init_ctxt(gfx_ctxt_t *ctxt, u32 *fb, u32 width, u32 height, u32 stride) void gfx_clear_grey(gfx_ctxt_t *ctxt, u8 color) { - memset(ctxt->fb, color, 0x400000); + memset(ctxt->fb, color, 0x3C0000); } void gfx_clear_color(gfx_ctxt_t *ctxt, u32 color) diff --git a/ipl/main.c b/ipl/main.c index 401691c..9462266 100755 --- a/ipl/main.c +++ b/ipl/main.c @@ -142,7 +142,7 @@ int sd_save_to_file(void * buf, u32 size, const char * filename) { FIL fp; u32 res = 0; - res = f_open(&fp, filename, FA_CREATE_ALWAYS | FA_WRITE) != FR_OK; + res = f_open(&fp, filename, FA_CREATE_ALWAYS | FA_WRITE); if (res) { EPRINTFARGS("Error (%d) creating file %s.\n", res, filename); return 1; @@ -880,7 +880,7 @@ int dump_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part) FIL fp; gfx_con_getpos(&gfx_con, &gfx_con.savedx, &gfx_con.savedy); gfx_printf(&gfx_con, "Filename: %s\n\n", outFilename); - res = f_open(&fp, outFilename, FA_CREATE_ALWAYS | FA_WRITE) != FR_OK; + res = f_open(&fp, outFilename, FA_CREATE_ALWAYS | FA_WRITE); if (res) { EPRINTFARGS("Error (%d) creating file %s.\n", res, outFilename); @@ -972,7 +972,7 @@ int dump_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part) gfx_con_setpos(&gfx_con, gfx_con.savedx, gfx_con.savedy); gfx_printf(&gfx_con, "Filename: %s\n\n", outFilename); lbaStartPart = lba_curr; - res = f_open(&fp, outFilename, FA_CREATE_ALWAYS | FA_WRITE) != FR_OK; + res = f_open(&fp, outFilename, FA_CREATE_ALWAYS | FA_WRITE); if (res) { EPRINTFARGS("Error (%d) creating file %s.\n", res, outFilename); @@ -1095,13 +1095,12 @@ static void dump_emmc_selected(dumpType_t dumpType) int i = 0; char sdPath[64]; memcpy(sdPath, "Backup/", 7); - timer = get_tmr(); - // Create Backup/Restore folders, if they do not exist. f_mkdir("Backup"); f_mkdir("Backup/Partitions"); f_mkdir("Backup/Restore"); + timer = get_tmr_s(); if (dumpType & DUMP_BOOT) { static const u32 BOOT_PART_SIZE = 0x400000; @@ -1175,7 +1174,7 @@ static void dump_emmc_selected(dumpType_t dumpType) } gfx_putc(&gfx_con, '\n'); - gfx_printf(&gfx_con, "Time taken: %d seconds.\n", (get_tmr() - timer) / 1000000); + gfx_printf(&gfx_con, "Time taken: %d seconds.\n", get_tmr_s() - timer); sdmmc_storage_end(&storage); if (res && 0) //TODO: Replace with the config check. gfx_printf(&gfx_con, "\n%kFinished and verified!%k\nPress any key...\n",0xFF96FF00, 0xFFCCCCCC); @@ -1444,7 +1443,6 @@ int fix_attributes(char *path, u32 *total) res = fix_attributes(path, total); if (res != FR_OK) break; - } // Clear file or folder path. path[i] = 0; diff --git a/ipl/sdmmc.c b/ipl/sdmmc.c index 7d22347..5956402 100755 --- a/ipl/sdmmc.c +++ b/ipl/sdmmc.c @@ -228,7 +228,7 @@ static int _mmc_storage_get_op_cond_inner(sdmmc_storage_t *storage, u32 *pout, u static int _mmc_storage_get_op_cond(sdmmc_storage_t *storage, u32 power) { - u32 timeout = get_tmr() + 1500000; + u32 timeout = get_tmr_us() + 1500000; while (1) { @@ -241,7 +241,7 @@ static int _mmc_storage_get_op_cond(sdmmc_storage_t *storage, u32 power) storage->has_sector_access = 1; return 1; } - if (get_tmr() > timeout) + if (get_tmr_us() > timeout) break; sleep(1000); } @@ -605,7 +605,7 @@ static int _sd_storage_get_op_cond_once(sdmmc_storage_t *storage, u32 *cond, int static int _sd_storage_get_op_cond(sdmmc_storage_t *storage, int is_version_1, int supports_low_voltage) { - u32 timeout = get_tmr() + 1500000; + u32 timeout = get_tmr_us() + 1500000; while (1) { @@ -633,7 +633,7 @@ static int _sd_storage_get_op_cond(sdmmc_storage_t *storage, int is_version_1, i return 1; } - if (get_tmr() > timeout) + if (get_tmr_us() > timeout) break; sleep(10000); // Needs to be at least 10ms for some SD Cards } @@ -646,7 +646,7 @@ static int _sd_storage_get_rca(sdmmc_storage_t *storage) sdmmc_cmd_t cmdbuf; sdmmc_init_cmd(&cmdbuf, SD_SEND_RELATIVE_ADDR, 0, SDMMC_RSP_TYPE_4, 0); - u32 timeout = get_tmr() + 1500000; + u32 timeout = get_tmr_us() + 1500000; while (1) { @@ -663,7 +663,7 @@ static int _sd_storage_get_rca(sdmmc_storage_t *storage) return 1; } - if (get_tmr() > timeout) + if (get_tmr_us() > timeout) break; sleep(1000); } diff --git a/ipl/sdmmc_driver.c b/ipl/sdmmc_driver.c index d52f00d..409e387 100755 --- a/ipl/sdmmc_driver.c +++ b/ipl/sdmmc_driver.c @@ -161,20 +161,20 @@ static int _sdmmc_wait_type4(sdmmc_t *sdmmc) sdmmc->regs->field_1B0 |= 0x80000000; _sdmmc_get_clkcon(sdmmc); - u32 timeout = get_tmr() + 5000; + u32 timeout = get_tmr_us() + 5000; while (sdmmc->regs->field_1B0 & 0x80000000) { - if (get_tmr() > timeout) + if (get_tmr_us() > timeout) { res = 0; goto out; } } - timeout = get_tmr() + 10000; + timeout = get_tmr_us() + 10000; while (sdmmc->regs->field_1BC & 0x80000000) { - if (get_tmr() > timeout) + if (get_tmr_us() > timeout) { res = 0; goto out; @@ -376,8 +376,8 @@ static void _sdmmc_reset(sdmmc_t *sdmmc) sdmmc->regs->swrst |= TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE | TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE; _sdmmc_get_clkcon(sdmmc); - u32 timeout = get_tmr() + 2000000; - while (sdmmc->regs->swrst << 29 >> 30 && get_tmr() < timeout) + u32 timeout = get_tmr_us() + 2000000; + while (sdmmc->regs->swrst << 29 >> 30 && get_tmr_us() < timeout) ; } @@ -385,9 +385,9 @@ static int _sdmmc_wait_prnsts_type0(sdmmc_t *sdmmc, u32 wait_dat) { _sdmmc_get_clkcon(sdmmc); - u32 timeout = get_tmr() + 2000000; + u32 timeout = get_tmr_us() + 2000000; while(sdmmc->regs->prnsts & 1) //CMD inhibit. - if (get_tmr() > timeout) + if (get_tmr_us() > timeout) { _sdmmc_reset(sdmmc); return 0; @@ -395,9 +395,9 @@ static int _sdmmc_wait_prnsts_type0(sdmmc_t *sdmmc, u32 wait_dat) if (wait_dat) { - timeout = get_tmr() + 2000000; + timeout = get_tmr_us() + 2000000; while (sdmmc->regs->prnsts & 2) //DAT inhibit. - if (get_tmr() > timeout) + if (get_tmr_us() > timeout) { _sdmmc_reset(sdmmc); return 0; @@ -411,9 +411,9 @@ static int _sdmmc_wait_prnsts_type1(sdmmc_t *sdmmc) { _sdmmc_get_clkcon(sdmmc); - u32 timeout = get_tmr() + 2000000; + u32 timeout = get_tmr_us() + 2000000; while (!(sdmmc->regs->prnsts & 0x100000)) //DAT0 line level. - if (get_tmr() > timeout) + if (get_tmr_us() > timeout) { _sdmmc_reset(sdmmc); return 0; @@ -509,8 +509,8 @@ static int _sdmmc_config_tuning_once(sdmmc_t *sdmmc, u32 cmd) sdmmc->regs->clkcon |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE; _sdmmc_get_clkcon(sdmmc); - u32 timeout = get_tmr() + 5000; - while (get_tmr() < timeout) + u32 timeout = get_tmr_us() + 5000; + while (get_tmr_us() < timeout) { if (sdmmc->regs->norintsts & 0x20) { @@ -573,10 +573,10 @@ static int _sdmmc_enable_internal_clock(sdmmc_t *sdmmc) //Enable internal clock and wait till it is stable. sdmmc->regs->clkcon |= TEGRA_MMC_CLKCON_INTERNAL_CLOCK_ENABLE; _sdmmc_get_clkcon(sdmmc); - u32 timeout = get_tmr() + 2000000; + u32 timeout = get_tmr_us() + 2000000; while (!(sdmmc->regs->clkcon & TEGRA_MMC_CLKCON_INTERNAL_CLOCK_STABLE)) { - if (get_tmr() > timeout) + if (get_tmr_us() > timeout) return 0; } @@ -649,10 +649,10 @@ static void _sdmmc_autocal_execute(sdmmc_t *sdmmc, u32 power) _sdmmc_get_clkcon(sdmmc); sleep(1); - u32 timeout = get_tmr() + 10000; + u32 timeout = get_tmr_us() + 10000; while (sdmmc->regs->autocalcfg & 0x80000000) { - if (get_tmr() > timeout) + if (get_tmr_us() > timeout) { //In case autocalibration fails, we load suggested standard values. _sdmmc_pad_config_fallback(sdmmc, power); @@ -710,13 +710,13 @@ static int _sdmmc_wait_request(sdmmc_t *sdmmc) { _sdmmc_get_clkcon(sdmmc); - u32 timeout = get_tmr() + 2000000; + u32 timeout = get_tmr_us() + 2000000; while (1) { int res = _sdmmc_check_mask_interrupt(sdmmc, 0, TEGRA_MMC_NORINTSTS_CMD_COMPLETE); if (res == SDMMC_MASKINT_MASKED) break; - if (res != SDMMC_MASKINT_NOERROR || get_tmr() > timeout) + if (res != SDMMC_MASKINT_NOERROR || get_tmr_us() > timeout) { _sdmmc_reset(sdmmc); return 0; @@ -817,7 +817,7 @@ static int _sdmmc_update_dma(sdmmc_t *sdmmc) do { blkcnt = sdmmc->regs->blkcnt; - u32 timeout = get_tmr() + 1500000; + u32 timeout = get_tmr_us() + 1500000; do { int res = 0; @@ -843,7 +843,7 @@ static int _sdmmc_update_dma(sdmmc_t *sdmmc) _sdmmc_reset(sdmmc); return 0; } - } while (get_tmr() < timeout); + } while (get_tmr_us() < timeout); } while (sdmmc->regs->blkcnt != blkcnt); _sdmmc_reset(sdmmc); diff --git a/ipl/t210.h b/ipl/t210.h index 64cb0e6..615c8af 100755 --- a/ipl/t210.h +++ b/ipl/t210.h @@ -43,6 +43,7 @@ #define APB_MISC_BASE 0x70000000 #define PINMUX_AUX_BASE 0x70003000 #define UART_BASE 0x70006000 +#define RTC_BASE 0x7000E000 #define PMC_BASE 0x7000E400 #define SYSCTR0_BASE 0x7000F000 #define FUSE_BASE 0x7000F800 @@ -78,6 +79,7 @@ #define EXCP_VEC(off) _REG(EXCP_VEC_BASE, off) #define APB_MISC(off) _REG(APB_MISC_BASE, off) #define PINMUX_AUX(off) _REG(PINMUX_AUX_BASE, off) +#define RTC(off) _REG(RTC_BASE, off) #define PMC(off) _REG(PMC_BASE, off) #define SYSCTR0(off) _REG(SYSCTR0_BASE, off) #define FUSE(off) _REG(FUSE_BASE, off) diff --git a/ipl/tui.c b/ipl/tui.c index 0c1843d..1901524 100755 --- a/ipl/tui.c +++ b/ipl/tui.c @@ -30,6 +30,8 @@ extern u8 *Kc_MENU_LOGO; void tui_pbar(gfx_con_t *con, int x, int y, u32 val, u32 fgcol, u32 bgcol) { u32 cx, cy; + if (val > 200) + val = 200; gfx_con_getpos(con, &cx, &cy); diff --git a/ipl/util.c b/ipl/util.c index c89751a..776f142 100755 --- a/ipl/util.c +++ b/ipl/util.c @@ -18,9 +18,14 @@ #include "util.h" #include "t210.h" -u32 get_tmr() +u32 get_tmr_s() { - return TMR(0x10); + return RTC(0x8); //APBDEV_RTC_SECONDS +} + +u32 get_tmr_us() +{ + return TMR(0x10); //TMRUS } void sleep(u32 ticks) diff --git a/ipl/util.h b/ipl/util.h index 64b9567..83dd1bb 100755 --- a/ipl/util.h +++ b/ipl/util.h @@ -29,7 +29,8 @@ typedef struct _cfg_op_t u32 val; } cfg_op_t; -u32 get_tmr(); +u32 get_tmr_us(); +u32 get_tmr_s(); void sleep(u32 ticks); void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops); u32 crc32c(const void *buf, u32 len);