mirror of
https://github.com/CTCaer/hekate
synced 2024-12-22 19:31:12 +00:00
Bugfixes / formating
This commit is contained in:
parent
c99ea77daf
commit
2f43b20124
8 changed files with 81 additions and 27 deletions
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@ -280,7 +280,7 @@ void config_autoboot()
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ments[1].type = MENT_CHGLINE;
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ments[1].type = MENT_CHGLINE;
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ments[2].type = MENT_CHOICE;
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ments[2].type = MENT_DATA;
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if (!h_cfg.autoboot)
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if (!h_cfg.autoboot)
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ments[2].caption = "*Disable";
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ments[2].caption = "*Disable";
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else
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else
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@ -395,7 +395,7 @@ void config_bootdelay()
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ments[1].type = MENT_CHGLINE;
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ments[1].type = MENT_CHGLINE;
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ments[2].type = MENT_CHOICE;
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ments[2].type = MENT_DATA;
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if (h_cfg.bootwait)
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if (h_cfg.bootwait)
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ments[2].caption = " 0 seconds (Bootlogo disabled)";
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ments[2].caption = " 0 seconds (Bootlogo disabled)";
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else
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else
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@ -412,7 +412,7 @@ void config_bootdelay()
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delay_text[i * 32 + 1] = i + '0';
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delay_text[i * 32 + 1] = i + '0';
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memcpy(delay_text + i * 32 + 2, " seconds", 9);
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memcpy(delay_text + i * 32 + 2, " seconds", 9);
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ments[i + 2].type = MENT_CHOICE;
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ments[i + 2].type = MENT_DATA;
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ments[i + 2].caption = delay_text + i * 32;
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ments[i + 2].caption = delay_text + i * 32;
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ments[i + 2].data = &delay_values[i];
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ments[i + 2].data = &delay_values[i];
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}
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}
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@ -455,7 +455,7 @@ void config_customlogo()
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for (u32 j = 0; j < 2; j++)
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for (u32 j = 0; j < 2; j++)
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{
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{
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cb_values[j] = j;
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cb_values[j] = j;
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ments[j + 2].type = MENT_CHOICE;
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ments[j + 2].type = MENT_DATA;
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ments[j + 2].data = &cb_values[j];
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ments[j + 2].data = &cb_values[j];
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}
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}
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@ -514,7 +514,7 @@ void config_verification()
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for (u32 j = 0; j < 3; j++)
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for (u32 j = 0; j < 3; j++)
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{
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{
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vr_values[j] = j;
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vr_values[j] = j;
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ments[j + 2].type = MENT_CHOICE;
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ments[j + 2].type = MENT_DATA;
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ments[j + 2].data = &vr_values[j];
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ments[j + 2].data = &vr_values[j];
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}
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}
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@ -604,7 +604,7 @@ void config_backlight()
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else
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else
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memcpy(bri_text + i * 32 + 1, "100%", 5);
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memcpy(bri_text + i * 32 + 1, "100%", 5);
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ments[i + 1].type = MENT_CHOICE;
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ments[i + 1].type = MENT_DATA;
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ments[i + 1].caption = bri_text + i * 32;
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ments[i + 1].caption = bri_text + i * 32;
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ments[i + 1].data = &bri_values[i];
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ments[i + 1].data = &bri_values[i];
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}
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}
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@ -21,16 +21,17 @@
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typedef struct _hekate_config
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typedef struct _hekate_config
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{
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{
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// Non-volatile config.
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u32 autoboot;
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u32 autoboot;
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u32 autoboot_list;
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u32 autoboot_list;
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u32 bootwait;
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u32 bootwait;
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u32 customlogo;
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u32 customlogo;
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u32 verification;
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u32 verification;
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u32 backlight;
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u32 errors;
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// Global temporary config.
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// Global temporary config.
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int se_keygen_done;
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int se_keygen_done;
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u32 sbar_time_keeping;
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u32 sbar_time_keeping;
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u32 backlight;
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u32 errors;
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} hekate_config;
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} hekate_config;
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typedef enum
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typedef enum
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@ -177,11 +177,17 @@ void *tui_do_menu(gfx_con_t *con, menu_t *menu)
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if (btn & BTN_VOL_DOWN && idx < (cnt - 1))
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if (btn & BTN_VOL_DOWN && idx < (cnt - 1))
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idx++;
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idx++;
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else if (btn & BTN_VOL_DOWN && idx == (cnt - 1))
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else if (btn & BTN_VOL_DOWN && idx == (cnt - 1))
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{
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idx = 0;
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idx = 0;
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prev_idx = -1;
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}
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if (btn & BTN_VOL_UP && idx > 0)
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if (btn & BTN_VOL_UP && idx > 0)
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idx--;
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idx--;
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else if (btn & BTN_VOL_UP && idx == 0)
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else if (btn & BTN_VOL_UP && idx == 0)
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{
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idx = cnt - 1;
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idx = cnt - 1;
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prev_idx = cnt;
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}
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if (btn & BTN_POWER)
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if (btn & BTN_POWER)
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{
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{
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ment_t *ent = &menu->ents[idx];
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ment_t *ent = &menu->ents[idx];
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@ -193,7 +199,7 @@ void *tui_do_menu(gfx_con_t *con, menu_t *menu)
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case MENT_MENU:
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case MENT_MENU:
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return tui_do_menu(con, ent->menu);
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return tui_do_menu(con, ent->menu);
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break;
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break;
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case MENT_CHOICE:
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case MENT_DATA:
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return ent->data;
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return ent->data;
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break;
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break;
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case MENT_BACK:
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case MENT_BACK:
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@ -24,7 +24,7 @@
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#define MENT_END 0
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#define MENT_END 0
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#define MENT_HANDLER 1
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#define MENT_HANDLER 1
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#define MENT_MENU 2
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#define MENT_MENU 2
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#define MENT_CHOICE 3
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#define MENT_DATA 3
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#define MENT_BACK 4
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#define MENT_BACK 4
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#define MENT_CAPTION 5
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#define MENT_CAPTION 5
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#define MENT_CHGLINE 6
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#define MENT_CHGLINE 6
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@ -149,6 +149,36 @@ static void _se_lock()
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gfx_hexdump(&gfx_con, SE_BASE, (void *)SE_BASE, 0x400);*/
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gfx_hexdump(&gfx_con, SE_BASE, (void *)SE_BASE, 0x400);*/
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}
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}
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void _pmc_scratch_lock(u32 kb)
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{
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switch (kb)
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{
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case KB_FIRMWARE_VERSION_100_200:
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case KB_FIRMWARE_VERSION_300:
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case KB_FIRMWARE_VERSION_301:
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PMC(APBDEV_PMC_SEC_DISABLE) = 0x7FFFF3;
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PMC(APBDEV_PMC_SEC_DISABLE2) = 0xFFFFFFFF;
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PMC(APBDEV_PMC_SEC_DISABLE3) = 0xFFAFFFFF;
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PMC(APBDEV_PMC_SEC_DISABLE4) = 0xFFFFFFFF;
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PMC(APBDEV_PMC_SEC_DISABLE5) = 0xFFFFFFFF;
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PMC(APBDEV_PMC_SEC_DISABLE6) = 0xFFFFFFFF;
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PMC(APBDEV_PMC_SEC_DISABLE7) = 0xFFFFFFFF;
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PMC(APBDEV_PMC_SEC_DISABLE8) = 0xFFAAFFFF;
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break;
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case KB_FIRMWARE_VERSION_400:
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case KB_FIRMWARE_VERSION_500:
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case KB_FIRMWARE_VERSION_600:
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default:
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PMC(APBDEV_PMC_SEC_DISABLE2) |= 0x3FCFFFF;
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PMC(APBDEV_PMC_SEC_DISABLE4) |= 0x3F3FFFFF;
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PMC(APBDEV_PMC_SEC_DISABLE5) = 0xFFFFFFFF;
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PMC(APBDEV_PMC_SEC_DISABLE6) |= 0xF3FFC00F;
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PMC(APBDEV_PMC_SEC_DISABLE7) |= 0x3FFFFF;
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PMC(APBDEV_PMC_SEC_DISABLE8) |= 0xFF;
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break;
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}
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}
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int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
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int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
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{
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{
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u8 tmp[0x10];
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u8 tmp[0x10];
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@ -604,9 +634,9 @@ int hos_launch(ini_sec_t *cfg)
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case KB_FIRMWARE_VERSION_300:
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case KB_FIRMWARE_VERSION_300:
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case KB_FIRMWARE_VERSION_301:
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case KB_FIRMWARE_VERSION_301:
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if (ctxt.pkg1_id->kb == KB_FIRMWARE_VERSION_300)
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if (ctxt.pkg1_id->kb == KB_FIRMWARE_VERSION_300)
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PMC(APBDEV_PMC_SECURE_SCRATCH32) = 0xE3; // Warmboot 3.0.0 security check.
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PMC(APBDEV_PMC_SECURE_SCRATCH32) = 0xE3; // Warmboot 3.0.0 PA address id.
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else if (ctxt.pkg1_id->kb == KB_FIRMWARE_VERSION_301)
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else if (ctxt.pkg1_id->kb == KB_FIRMWARE_VERSION_301)
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PMC(APBDEV_PMC_SECURE_SCRATCH32) = 0x104; // Warmboot 3.0.1/.2 security check.
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PMC(APBDEV_PMC_SECURE_SCRATCH32) = 0x104; // Warmboot 3.0.1/.2 PA address id.
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se_key_acc_ctrl(12, 0xFF);
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se_key_acc_ctrl(12, 0xFF);
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se_key_acc_ctrl(13, 0xFF);
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se_key_acc_ctrl(13, 0xFF);
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bootStateDramPkg2 = 2;
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bootStateDramPkg2 = 2;
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@ -664,6 +694,9 @@ int hos_launch(ini_sec_t *cfg)
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mc_config_carveout_finalize();
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mc_config_carveout_finalize();
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_se_lock();
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_se_lock();
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//TODO: pkg1.1 locks PMC scratches, we can do that too at some point. For <4.0.0 after secmon?
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//_pmc_scratch_lock(ctxt.pkg1_id->kb);
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// < 4.0.0 Signals - 0: Nothing ready, 1: BCT ready, 2: DRAM and pkg2 ready, 3: Continue boot.
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// < 4.0.0 Signals - 0: Nothing ready, 1: BCT ready, 2: DRAM and pkg2 ready, 3: Continue boot.
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// >= 4.0.0 Signals - 0: Nothing ready, 1: BCT ready, 2: DRAM ready, 4: pkg2 ready and continue boot.
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// >= 4.0.0 Signals - 0: Nothing ready, 1: BCT ready, 2: DRAM ready, 4: pkg2 ready and continue boot.
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vu32 *mb_in = (vu32 *)0x40002EF8;
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vu32 *mb_in = (vu32 *)0x40002EF8;
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@ -682,16 +715,6 @@ int hos_launch(ini_sec_t *cfg)
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while (!*mb_out)
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while (!*mb_out)
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usleep(1); // This only works when in IRAM or with a trained DRAM.
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usleep(1); // This only works when in IRAM or with a trained DRAM.
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//TODO: pkg1.1 locks PMC scratches, we can do that too at some point.
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/*PMC(0x4) = 0x7FFFF3;
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PMC(0x2C4) = 0xFFFFFFFF;
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PMC(0x2D8) = 0xFFAFFFFF;
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PMC(0x5B0) = 0xFFFFFFFF;
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PMC(0x5B4) = 0xFFFFFFFF;
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PMC(0x5B8) = 0xFFFFFFFF;
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PMC(0x5BC) = 0xFFFFFFFF;
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PMC(0x5C0) = 0xFFAAFFFF;*/
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// Signal pkg2 ready and continue boot.
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// Signal pkg2 ready and continue boot.
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*mb_in = bootStatePkg2Continue;
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*mb_in = bootStatePkg2Continue;
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@ -476,8 +476,9 @@ void reconfig_hw_workaround(bool extra_reconfig, u32 magic)
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{
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{
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CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) |= (1 << 22);
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CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) |= (1 << 22);
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sdmmc_init(&sd_sdmmc, SDMMC_1, SDMMC_POWER_3_3, SDMMC_BUS_WIDTH_1, 5, 0);
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sdmmc_init(&sd_sdmmc, SDMMC_1, SDMMC_POWER_3_3, SDMMC_BUS_WIDTH_1, 5, 0);
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clock_disable_cl_dvfs();
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msleep(500);
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msleep(200);
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}
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}
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}
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}
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@ -1236,7 +1237,7 @@ int dump_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part)
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{
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{
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gfx_con.fntsz = 16;
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gfx_con.fntsz = 16;
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WPRINTF("\n\nThe backup was cancelled!");
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WPRINTF("\n\nThe backup was cancelled!");
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EPRINTF("\nPress any key and try again...\n");
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EPRINTF("\nPress any key...\n");
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msleep(1500);
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msleep(1500);
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free(buf);
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free(buf);
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@ -1891,7 +1892,11 @@ int launch_payload(char *path, bool update)
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*(vu32 *)BOOTLOADER_UPDATED_MAGIC_ADDR = BOOTLOADER_UPDATED_MAGIC;
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*(vu32 *)BOOTLOADER_UPDATED_MAGIC_ADDR = BOOTLOADER_UPDATED_MAGIC;
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}
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}
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else
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else
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{
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free(update_ft);
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return 1;
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return 1;
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}
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free(update_ft);
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free(update_ft);
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}
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}
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sd_unmount();
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sd_unmount();
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@ -2503,6 +2508,8 @@ void toggle_autorcm(bool enable)
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sdmmc_storage_t storage;
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sdmmc_storage_t storage;
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sdmmc_t sdmmc;
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sdmmc_t sdmmc;
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u8 randomXor = 0;
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gfx_clear_partial_grey(&gfx_ctxt, 0x1B, 0, 1256);
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gfx_clear_partial_grey(&gfx_ctxt, 0x1B, 0, 1256);
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gfx_con_setpos(&gfx_con, 0, 0);
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gfx_con_setpos(&gfx_con, 0, 0);
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@ -2520,8 +2527,16 @@ void toggle_autorcm(bool enable)
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{
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{
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sect = (0x200 + (0x4000 * i)) / NX_EMMC_BLOCKSIZE;
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sect = (0x200 + (0x4000 * i)) / NX_EMMC_BLOCKSIZE;
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sdmmc_storage_read(&storage, sect, 1, tempbuf);
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sdmmc_storage_read(&storage, sect, 1, tempbuf);
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if (enable)
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if (enable)
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tempbuf[0x10] ^= get_tmr_us() & 0xFF; // Bricmii style of bricking.
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{
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do
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{
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randomXor = get_tmr_us() & 0xFF; // Bricmii style of bricking.
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} while (!randomXor); // Avoid the lottery.
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tempbuf[0x10] ^= randomXor;
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}
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else
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else
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tempbuf[0x10] = 0xF7;
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tempbuf[0x10] = 0xF7;
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sdmmc_storage_write(&storage, sect, 1, tempbuf);
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sdmmc_storage_write(&storage, sect, 1, tempbuf);
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@ -3004,6 +3019,8 @@ void bootrom_ipatches_info()
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gfx_clear_partial_grey(&gfx_ctxt, 0x1B, 0, 1256);
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gfx_clear_partial_grey(&gfx_ctxt, 0x1B, 0, 1256);
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gfx_con_setpos(&gfx_con, 0, 0);
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gfx_con_setpos(&gfx_con, 0, 0);
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static const u32 BOOTROM_SIZE = 0x18000;
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u32 res = fuse_read_ipatch(ipatch_process);
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u32 res = fuse_read_ipatch(ipatch_process);
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if (res != 0)
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if (res != 0)
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EPRINTFARGS("Failed to read ipatches. Error: %d", res);
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EPRINTFARGS("Failed to read ipatches. Error: %d", res);
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@ -19,6 +19,7 @@
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#define _PMC_H_
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#define _PMC_H_
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/*! PMC registers. */
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/*! PMC registers. */
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#define APBDEV_PMC_SEC_DISABLE 0x4
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#define APBDEV_PMC_PWRGATE_TOGGLE 0x30
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#define APBDEV_PMC_PWRGATE_TOGGLE 0x30
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#define APBDEV_PMC_PWRGATE_STATUS 0x38
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#define APBDEV_PMC_PWRGATE_STATUS 0x38
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#define APBDEV_PMC_NO_IOPOWER 0x44
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#define APBDEV_PMC_NO_IOPOWER 0x44
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@ -35,8 +36,10 @@
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#define APBDEV_PMC_VDDP_SEL 0x1CC
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#define APBDEV_PMC_VDDP_SEL 0x1CC
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#define APBDEV_PMC_SCRATCH49 0x244
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#define APBDEV_PMC_SCRATCH49 0x244
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#define APBDEV_PMC_TSC_MULT 0x2B4
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#define APBDEV_PMC_TSC_MULT 0x2B4
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#define APBDEV_PMC_REG_SHORT 0x2CC
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#define APBDEV_PMC_SEC_DISABLE2 0x2C4
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#define APBDEV_PMC_WEAK_BIAS 0x2C8
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#define APBDEV_PMC_WEAK_BIAS 0x2C8
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#define APBDEV_PMC_REG_SHORT 0x2CC
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#define APBDEV_PMC_SEC_DISABLE3 0x2D8
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#define APBDEV_PMC_SECURE_SCRATCH21 0x334
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#define APBDEV_PMC_SECURE_SCRATCH21 0x334
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#define APBDEV_PMC_SECURE_SCRATCH32 0x360
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#define APBDEV_PMC_SECURE_SCRATCH32 0x360
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#define APBDEV_PMC_SECURE_SCRATCH49 0x3A4
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#define APBDEV_PMC_SECURE_SCRATCH49 0x3A4
|
||||||
|
@ -45,6 +48,11 @@
|
||||||
#define APBDEV_PMC_UTMIP_PAD_CFG1 0x4C4
|
#define APBDEV_PMC_UTMIP_PAD_CFG1 0x4C4
|
||||||
#define APBDEV_PMC_UTMIP_PAD_CFG3 0x4CC
|
#define APBDEV_PMC_UTMIP_PAD_CFG3 0x4CC
|
||||||
#define APBDEV_PMC_DDR_CNTRL 0x4E4
|
#define APBDEV_PMC_DDR_CNTRL 0x4E4
|
||||||
|
#define APBDEV_PMC_SEC_DISABLE4 0x5B0
|
||||||
|
#define APBDEV_PMC_SEC_DISABLE5 0x5B4
|
||||||
|
#define APBDEV_PMC_SEC_DISABLE6 0x5B8
|
||||||
|
#define APBDEV_PMC_SEC_DISABLE7 0x5BC
|
||||||
|
#define APBDEV_PMC_SEC_DISABLE8 0x5C0
|
||||||
#define APBDEV_PMC_SCRATCH188 0x810
|
#define APBDEV_PMC_SCRATCH188 0x810
|
||||||
#define APBDEV_PMC_SCRATCH190 0x818
|
#define APBDEV_PMC_SCRATCH190 0x818
|
||||||
#define APBDEV_PMC_SCRATCH200 0x840
|
#define APBDEV_PMC_SCRATCH200 0x840
|
||||||
|
|
|
@ -19,7 +19,6 @@
|
||||||
|
|
||||||
#include "../utils/types.h"
|
#include "../utils/types.h"
|
||||||
|
|
||||||
#define BOOTROM_SIZE 0x18000
|
|
||||||
#define BOOTROM_BASE 0x100000
|
#define BOOTROM_BASE 0x100000
|
||||||
#define HOST1X_BASE 0x50000000
|
#define HOST1X_BASE 0x50000000
|
||||||
#define BPMP_CACHE_BASE 0x50040000
|
#define BPMP_CACHE_BASE 0x50040000
|
||||||
|
|
Loading…
Reference in a new issue