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https://github.com/CTCaer/hekate
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nyx: add new mircon ram model info
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parent
821ad23341
commit
25a7544010
1 changed files with 10 additions and 10 deletions
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@ -478,7 +478,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn)
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lv_obj_set_width(lb_desc, lv_obj_get_width(desc));
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lv_obj_t *val = lv_cont_create(win, NULL);
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lv_obj_set_size(val, LV_HOR_RES / 11 * 3, LV_VER_RES - (LV_DPI * 11 / 7) - 5);
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lv_obj_set_size(val, LV_HOR_RES / 7 * 2 + LV_DPI / 11, LV_VER_RES - (LV_DPI * 11 / 7) - 5);
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lv_obj_t * lb_val = lv_label_create(val, lb_desc);
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@ -524,7 +524,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn)
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break;
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case LPDDR4_ICOSA_4GB_MICRON_MT53B512M32D2NP_062_WT:
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case LPDDR4_COPPER_4GB_MICRON_MT53B512M32D2NP_062_WT:
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strcpy(dram_man, "Micron MT53B512M32D2NP-062");
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strcpy(dram_man, "Micron MT53B512M32D2NP-062 WT:C");
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break;
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case LPDDR4_ICOSA_6GB_SAMSUNG_K4FHE3D4HM_MGCH:
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strcpy(dram_man, "Samsung K4FHE3D4HM-MGCH 6GB");
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@ -554,9 +554,9 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn)
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case LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLHR_NME:
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strcpy(dram_man, "Hynix H9HCNNNBKMMLHR-NME 4GB");
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break;
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case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WT: // 4266Mbps.
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case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WT: // 4266Mbps.
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strcpy(dram_man, "Micron MT53E512M32D2NP-046 4GB");
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case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTE: // 4266Mbps.
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case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTE: // 4266Mbps.
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strcpy(dram_man, "Micron MT53E512M32D2NP-046 WT:E");
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break;
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// LPDDR4X 4266Mbps
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@ -582,10 +582,10 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn)
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// case LPDDR4X_AULA_8GB_SAMSUNG_1Y_A: // Unused.
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// strcpy(dram_man, "Samsung 1y A 4GB");
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// break;
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case LPDDR4X_IOWA_4GB_MICRON_1Y_A:
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case LPDDR4X_HOAG_4GB_MICRON_1Y_A:
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case LPDDR4X_AULA_4GB_MICRON_1Y_A:
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strcpy(dram_man, "Micron 1y A 4GB");
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case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTF:
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case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTF:
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case LPDDR4X_AULA_4GB_MICRON_MT53E512M32D2NP_046_WTF:
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strcpy(dram_man, "Micron MT53E512M32D2NP-046 WT:F");
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break;
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case LPDDR4X_IOWA_4GB_HYNIX_1Y_A: // Replaced from Copper.
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case LPDDR4X_HOAG_4GB_HYNIX_1Y_A: // Replaced from Copper.
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@ -717,7 +717,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn)
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u32 ranks = EMC(EMC_ADR_CFG) + 1;
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u32 channels = (EMC(EMC_FBIO_CFG7) >> 1) & 3;
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u32 die_channels = ranks * ((channels & 1) + ((channels & 2) >> 1));
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s_printf(txt_buf, "#00DDFF %s SDRAM ##FF8000 (Ch 0 | Ch 1):#\n#FF8000 Vendor:# ", dram_id > 6 ? "LPDDR4X" : "LPDDR4");
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s_printf(txt_buf, "#00DDFF %s SDRAM ##FF8000 (Ch 0 | Ch 1):#\n#FF8000 Vendor:# ", h_cfg.t210b01 ? "LPDDR4X" : "LPDDR4");
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switch (ram_vendor.rank0_ch0)
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{
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case 1:
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