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bdk: minerva: add custom option in table
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6c518435ec
commit
1f30b8deb7
3 changed files with 7 additions and 4 deletions
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@ -171,7 +171,7 @@ void minerva_prep_boot_freq()
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minerva_change_freq(FREQ_800);
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}
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void minerva_prep_boot_l4t(u32 oc_freq)
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void minerva_prep_boot_l4t(u32 oc_freq, u32 opt_custom)
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{
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if (!minerva_cfg)
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return;
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@ -188,6 +188,8 @@ void minerva_prep_boot_l4t(u32 oc_freq)
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memcpy(&mtc_cfg->mtc_table[mtc_cfg->table_entries],
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&mtc_cfg->mtc_table[mtc_cfg->table_entries - 1],
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sizeof(emc_table_t));
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mtc_cfg->mtc_table[mtc_cfg->table_entries].opt_custom = opt_custom;
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mtc_cfg->mtc_table[mtc_cfg->table_entries].rate_khz = oc_freq;
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mtc_cfg->table_entries++;
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}
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@ -63,7 +63,7 @@ u32 minerva_init();
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void minerva_change_freq(minerva_freq_t freq);
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void minerva_sdmmc_la_program(void *table, bool t210b01);
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void minerva_prep_boot_freq();
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void minerva_prep_boot_l4t(u32 oc_freq);
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void minerva_prep_boot_l4t(u32 oc_freq, u32 opt_custom);
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void minerva_periodic_training();
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emc_table_t *minerva_get_mtc_table();
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int minerva_get_mtc_table_entries();
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@ -481,7 +481,8 @@ typedef struct
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u32 rate_khz;
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u32 min_volt;
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u32 gpu_min_volt;
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char clock_src[32];
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char clock_src[28];
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u32 opt_custom;
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u32 clk_src_emc;
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u32 needs_training;
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u32 training_pattern;
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