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rename to bdk/libs/lvgl/lv_misc/lv_anim.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_anim.h b/bdk/libs/lvgl/lv_misc/lv_anim.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_anim.h
rename to bdk/libs/lvgl/lv_misc/lv_anim.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_area.c b/bdk/libs/lvgl/lv_misc/lv_area.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_area.c
rename to bdk/libs/lvgl/lv_misc/lv_area.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_area.h b/bdk/libs/lvgl/lv_misc/lv_area.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_area.h
rename to bdk/libs/lvgl/lv_misc/lv_area.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_circ.c b/bdk/libs/lvgl/lv_misc/lv_circ.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_circ.c
rename to bdk/libs/lvgl/lv_misc/lv_circ.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_circ.h b/bdk/libs/lvgl/lv_misc/lv_circ.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_circ.h
rename to bdk/libs/lvgl/lv_misc/lv_circ.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_color.c b/bdk/libs/lvgl/lv_misc/lv_color.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_color.c
rename to bdk/libs/lvgl/lv_misc/lv_color.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_color.h b/bdk/libs/lvgl/lv_misc/lv_color.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_color.h
rename to bdk/libs/lvgl/lv_misc/lv_color.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_font.c b/bdk/libs/lvgl/lv_misc/lv_font.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_font.c
rename to bdk/libs/lvgl/lv_misc/lv_font.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_font.h b/bdk/libs/lvgl/lv_misc/lv_font.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_font.h
rename to bdk/libs/lvgl/lv_misc/lv_font.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_fs.c b/bdk/libs/lvgl/lv_misc/lv_fs.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_fs.c
rename to bdk/libs/lvgl/lv_misc/lv_fs.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_fs.h b/bdk/libs/lvgl/lv_misc/lv_fs.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_fs.h
rename to bdk/libs/lvgl/lv_misc/lv_fs.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_gc.c b/bdk/libs/lvgl/lv_misc/lv_gc.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_gc.c
rename to bdk/libs/lvgl/lv_misc/lv_gc.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_gc.h b/bdk/libs/lvgl/lv_misc/lv_gc.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_gc.h
rename to bdk/libs/lvgl/lv_misc/lv_gc.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_ll.c b/bdk/libs/lvgl/lv_misc/lv_ll.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_ll.c
rename to bdk/libs/lvgl/lv_misc/lv_ll.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_ll.h b/bdk/libs/lvgl/lv_misc/lv_ll.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_ll.h
rename to bdk/libs/lvgl/lv_misc/lv_ll.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_log.c b/bdk/libs/lvgl/lv_misc/lv_log.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_log.c
rename to bdk/libs/lvgl/lv_misc/lv_log.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_log.h b/bdk/libs/lvgl/lv_misc/lv_log.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_log.h
rename to bdk/libs/lvgl/lv_misc/lv_log.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_math.c b/bdk/libs/lvgl/lv_misc/lv_math.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_math.c
rename to bdk/libs/lvgl/lv_misc/lv_math.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_math.h b/bdk/libs/lvgl/lv_misc/lv_math.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_math.h
rename to bdk/libs/lvgl/lv_misc/lv_math.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_mem.c b/bdk/libs/lvgl/lv_misc/lv_mem.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_mem.c
rename to bdk/libs/lvgl/lv_misc/lv_mem.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_mem.h b/bdk/libs/lvgl/lv_misc/lv_mem.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_mem.h
rename to bdk/libs/lvgl/lv_misc/lv_mem.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_misc.mk b/bdk/libs/lvgl/lv_misc/lv_misc.mk
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_misc.mk
rename to bdk/libs/lvgl/lv_misc/lv_misc.mk
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_symbol_def.h b/bdk/libs/lvgl/lv_misc/lv_symbol_def.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_symbol_def.h
rename to bdk/libs/lvgl/lv_misc/lv_symbol_def.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_task.c b/bdk/libs/lvgl/lv_misc/lv_task.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_task.c
rename to bdk/libs/lvgl/lv_misc/lv_task.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_task.h b/bdk/libs/lvgl/lv_misc/lv_task.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_task.h
rename to bdk/libs/lvgl/lv_misc/lv_task.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_templ.c b/bdk/libs/lvgl/lv_misc/lv_templ.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_templ.c
rename to bdk/libs/lvgl/lv_misc/lv_templ.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_templ.h b/bdk/libs/lvgl/lv_misc/lv_templ.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_templ.h
rename to bdk/libs/lvgl/lv_misc/lv_templ.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_txt.c b/bdk/libs/lvgl/lv_misc/lv_txt.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_txt.c
rename to bdk/libs/lvgl/lv_misc/lv_txt.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_txt.h b/bdk/libs/lvgl/lv_misc/lv_txt.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_txt.h
rename to bdk/libs/lvgl/lv_misc/lv_txt.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_ufs.c b/bdk/libs/lvgl/lv_misc/lv_ufs.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_ufs.c
rename to bdk/libs/lvgl/lv_misc/lv_ufs.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_misc/lv_ufs.h b/bdk/libs/lvgl/lv_misc/lv_ufs.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_misc/lv_ufs.h
rename to bdk/libs/lvgl/lv_misc/lv_ufs.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_arc.c b/bdk/libs/lvgl/lv_objx/lv_arc.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_arc.c
rename to bdk/libs/lvgl/lv_objx/lv_arc.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_arc.h b/bdk/libs/lvgl/lv_objx/lv_arc.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_arc.h
rename to bdk/libs/lvgl/lv_objx/lv_arc.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_bar.c b/bdk/libs/lvgl/lv_objx/lv_bar.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_bar.c
rename to bdk/libs/lvgl/lv_objx/lv_bar.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_bar.h b/bdk/libs/lvgl/lv_objx/lv_bar.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_bar.h
rename to bdk/libs/lvgl/lv_objx/lv_bar.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_btn.c b/bdk/libs/lvgl/lv_objx/lv_btn.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_btn.c
rename to bdk/libs/lvgl/lv_objx/lv_btn.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_btn.h b/bdk/libs/lvgl/lv_objx/lv_btn.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_btn.h
rename to bdk/libs/lvgl/lv_objx/lv_btn.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_btnm.c b/bdk/libs/lvgl/lv_objx/lv_btnm.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_btnm.c
rename to bdk/libs/lvgl/lv_objx/lv_btnm.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_btnm.h b/bdk/libs/lvgl/lv_objx/lv_btnm.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_btnm.h
rename to bdk/libs/lvgl/lv_objx/lv_btnm.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_calendar.c b/bdk/libs/lvgl/lv_objx/lv_calendar.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_calendar.c
rename to bdk/libs/lvgl/lv_objx/lv_calendar.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_calendar.h b/bdk/libs/lvgl/lv_objx/lv_calendar.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_calendar.h
rename to bdk/libs/lvgl/lv_objx/lv_calendar.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_canvas.c b/bdk/libs/lvgl/lv_objx/lv_canvas.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_canvas.c
rename to bdk/libs/lvgl/lv_objx/lv_canvas.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_canvas.h b/bdk/libs/lvgl/lv_objx/lv_canvas.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_canvas.h
rename to bdk/libs/lvgl/lv_objx/lv_canvas.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_cb.c b/bdk/libs/lvgl/lv_objx/lv_cb.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_cb.c
rename to bdk/libs/lvgl/lv_objx/lv_cb.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_cb.h b/bdk/libs/lvgl/lv_objx/lv_cb.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_cb.h
rename to bdk/libs/lvgl/lv_objx/lv_cb.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_chart.c b/bdk/libs/lvgl/lv_objx/lv_chart.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_chart.c
rename to bdk/libs/lvgl/lv_objx/lv_chart.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_chart.h b/bdk/libs/lvgl/lv_objx/lv_chart.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_chart.h
rename to bdk/libs/lvgl/lv_objx/lv_chart.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_cont.c b/bdk/libs/lvgl/lv_objx/lv_cont.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_cont.c
rename to bdk/libs/lvgl/lv_objx/lv_cont.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_cont.h b/bdk/libs/lvgl/lv_objx/lv_cont.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_cont.h
rename to bdk/libs/lvgl/lv_objx/lv_cont.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_ddlist.c b/bdk/libs/lvgl/lv_objx/lv_ddlist.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_ddlist.c
rename to bdk/libs/lvgl/lv_objx/lv_ddlist.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_ddlist.h b/bdk/libs/lvgl/lv_objx/lv_ddlist.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_ddlist.h
rename to bdk/libs/lvgl/lv_objx/lv_ddlist.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_gauge.c b/bdk/libs/lvgl/lv_objx/lv_gauge.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_gauge.c
rename to bdk/libs/lvgl/lv_objx/lv_gauge.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_gauge.h b/bdk/libs/lvgl/lv_objx/lv_gauge.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_gauge.h
rename to bdk/libs/lvgl/lv_objx/lv_gauge.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_img.c b/bdk/libs/lvgl/lv_objx/lv_img.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_img.c
rename to bdk/libs/lvgl/lv_objx/lv_img.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_img.h b/bdk/libs/lvgl/lv_objx/lv_img.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_img.h
rename to bdk/libs/lvgl/lv_objx/lv_img.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_imgbtn.c b/bdk/libs/lvgl/lv_objx/lv_imgbtn.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_imgbtn.c
rename to bdk/libs/lvgl/lv_objx/lv_imgbtn.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_imgbtn.h b/bdk/libs/lvgl/lv_objx/lv_imgbtn.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_imgbtn.h
rename to bdk/libs/lvgl/lv_objx/lv_imgbtn.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_kb.c b/bdk/libs/lvgl/lv_objx/lv_kb.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_kb.c
rename to bdk/libs/lvgl/lv_objx/lv_kb.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_kb.h b/bdk/libs/lvgl/lv_objx/lv_kb.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_kb.h
rename to bdk/libs/lvgl/lv_objx/lv_kb.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_label.c b/bdk/libs/lvgl/lv_objx/lv_label.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_label.c
rename to bdk/libs/lvgl/lv_objx/lv_label.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_label.h b/bdk/libs/lvgl/lv_objx/lv_label.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_label.h
rename to bdk/libs/lvgl/lv_objx/lv_label.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_led.c b/bdk/libs/lvgl/lv_objx/lv_led.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_led.c
rename to bdk/libs/lvgl/lv_objx/lv_led.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_led.h b/bdk/libs/lvgl/lv_objx/lv_led.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_led.h
rename to bdk/libs/lvgl/lv_objx/lv_led.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_line.c b/bdk/libs/lvgl/lv_objx/lv_line.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_line.c
rename to bdk/libs/lvgl/lv_objx/lv_line.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_line.h b/bdk/libs/lvgl/lv_objx/lv_line.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_line.h
rename to bdk/libs/lvgl/lv_objx/lv_line.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_list.c b/bdk/libs/lvgl/lv_objx/lv_list.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_list.c
rename to bdk/libs/lvgl/lv_objx/lv_list.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_list.h b/bdk/libs/lvgl/lv_objx/lv_list.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_list.h
rename to bdk/libs/lvgl/lv_objx/lv_list.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_lmeter.c b/bdk/libs/lvgl/lv_objx/lv_lmeter.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_lmeter.c
rename to bdk/libs/lvgl/lv_objx/lv_lmeter.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_lmeter.h b/bdk/libs/lvgl/lv_objx/lv_lmeter.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_lmeter.h
rename to bdk/libs/lvgl/lv_objx/lv_lmeter.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_mbox.c b/bdk/libs/lvgl/lv_objx/lv_mbox.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_mbox.c
rename to bdk/libs/lvgl/lv_objx/lv_mbox.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_mbox.h b/bdk/libs/lvgl/lv_objx/lv_mbox.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_mbox.h
rename to bdk/libs/lvgl/lv_objx/lv_mbox.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_objx.mk b/bdk/libs/lvgl/lv_objx/lv_objx.mk
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_objx.mk
rename to bdk/libs/lvgl/lv_objx/lv_objx.mk
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_objx_templ.c b/bdk/libs/lvgl/lv_objx/lv_objx_templ.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_objx_templ.c
rename to bdk/libs/lvgl/lv_objx/lv_objx_templ.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_objx_templ.h b/bdk/libs/lvgl/lv_objx/lv_objx_templ.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_objx_templ.h
rename to bdk/libs/lvgl/lv_objx/lv_objx_templ.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_page.c b/bdk/libs/lvgl/lv_objx/lv_page.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_page.c
rename to bdk/libs/lvgl/lv_objx/lv_page.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_page.h b/bdk/libs/lvgl/lv_objx/lv_page.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_page.h
rename to bdk/libs/lvgl/lv_objx/lv_page.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_preload.c b/bdk/libs/lvgl/lv_objx/lv_preload.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_preload.c
rename to bdk/libs/lvgl/lv_objx/lv_preload.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_preload.h b/bdk/libs/lvgl/lv_objx/lv_preload.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_preload.h
rename to bdk/libs/lvgl/lv_objx/lv_preload.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_roller.c b/bdk/libs/lvgl/lv_objx/lv_roller.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_roller.c
rename to bdk/libs/lvgl/lv_objx/lv_roller.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_roller.h b/bdk/libs/lvgl/lv_objx/lv_roller.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_roller.h
rename to bdk/libs/lvgl/lv_objx/lv_roller.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_slider.c b/bdk/libs/lvgl/lv_objx/lv_slider.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_slider.c
rename to bdk/libs/lvgl/lv_objx/lv_slider.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_slider.h b/bdk/libs/lvgl/lv_objx/lv_slider.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_slider.h
rename to bdk/libs/lvgl/lv_objx/lv_slider.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_spinbox.c b/bdk/libs/lvgl/lv_objx/lv_spinbox.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_spinbox.c
rename to bdk/libs/lvgl/lv_objx/lv_spinbox.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_spinbox.h b/bdk/libs/lvgl/lv_objx/lv_spinbox.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_spinbox.h
rename to bdk/libs/lvgl/lv_objx/lv_spinbox.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_sw.c b/bdk/libs/lvgl/lv_objx/lv_sw.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_sw.c
rename to bdk/libs/lvgl/lv_objx/lv_sw.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_sw.h b/bdk/libs/lvgl/lv_objx/lv_sw.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_sw.h
rename to bdk/libs/lvgl/lv_objx/lv_sw.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_ta.c b/bdk/libs/lvgl/lv_objx/lv_ta.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_ta.c
rename to bdk/libs/lvgl/lv_objx/lv_ta.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_ta.h b/bdk/libs/lvgl/lv_objx/lv_ta.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_ta.h
rename to bdk/libs/lvgl/lv_objx/lv_ta.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_table.c b/bdk/libs/lvgl/lv_objx/lv_table.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_table.c
rename to bdk/libs/lvgl/lv_objx/lv_table.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_table.h b/bdk/libs/lvgl/lv_objx/lv_table.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_table.h
rename to bdk/libs/lvgl/lv_objx/lv_table.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_tabview.c b/bdk/libs/lvgl/lv_objx/lv_tabview.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_tabview.c
rename to bdk/libs/lvgl/lv_objx/lv_tabview.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_tabview.h b/bdk/libs/lvgl/lv_objx/lv_tabview.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_tabview.h
rename to bdk/libs/lvgl/lv_objx/lv_tabview.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_tileview.c b/bdk/libs/lvgl/lv_objx/lv_tileview.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_tileview.c
rename to bdk/libs/lvgl/lv_objx/lv_tileview.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_tileview.h b/bdk/libs/lvgl/lv_objx/lv_tileview.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_tileview.h
rename to bdk/libs/lvgl/lv_objx/lv_tileview.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_win.c b/bdk/libs/lvgl/lv_objx/lv_win.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_win.c
rename to bdk/libs/lvgl/lv_objx/lv_win.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_objx/lv_win.h b/bdk/libs/lvgl/lv_objx/lv_win.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_objx/lv_win.h
rename to bdk/libs/lvgl/lv_objx/lv_win.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_themes/lv_theme.c b/bdk/libs/lvgl/lv_themes/lv_theme.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_themes/lv_theme.c
rename to bdk/libs/lvgl/lv_themes/lv_theme.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_themes/lv_theme.h b/bdk/libs/lvgl/lv_themes/lv_theme.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_themes/lv_theme.h
rename to bdk/libs/lvgl/lv_themes/lv_theme.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_themes/lv_theme_hekate.c b/bdk/libs/lvgl/lv_themes/lv_theme_hekate.c
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_themes/lv_theme_hekate.c
rename to bdk/libs/lvgl/lv_themes/lv_theme_hekate.c
diff --git a/nyx/nyx_gui/libs/lvgl/lv_themes/lv_theme_hekate.h b/bdk/libs/lvgl/lv_themes/lv_theme_hekate.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_themes/lv_theme_hekate.h
rename to bdk/libs/lvgl/lv_themes/lv_theme_hekate.h
diff --git a/nyx/nyx_gui/libs/lvgl/lv_themes/lv_themes.mk b/bdk/libs/lvgl/lv_themes/lv_themes.mk
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_themes/lv_themes.mk
rename to bdk/libs/lvgl/lv_themes/lv_themes.mk
diff --git a/nyx/nyx_gui/libs/lvgl/lv_version.h b/bdk/libs/lvgl/lv_version.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lv_version.h
rename to bdk/libs/lvgl/lv_version.h
diff --git a/nyx/nyx_gui/libs/lvgl/lvgl.h b/bdk/libs/lvgl/lvgl.h
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lvgl.h
rename to bdk/libs/lvgl/lvgl.h
diff --git a/nyx/nyx_gui/libs/lvgl/lvgl.mk b/bdk/libs/lvgl/lvgl.mk
similarity index 100%
rename from nyx/nyx_gui/libs/lvgl/lvgl.mk
rename to bdk/libs/lvgl/lvgl.mk
diff --git a/bootloader/mem/emc.h b/bdk/mem/emc.h
similarity index 100%
rename from bootloader/mem/emc.h
rename to bdk/mem/emc.h
diff --git a/bootloader/mem/heap.c b/bdk/mem/heap.c
similarity index 100%
rename from bootloader/mem/heap.c
rename to bdk/mem/heap.c
diff --git a/bootloader/mem/heap.h b/bdk/mem/heap.h
similarity index 100%
rename from bootloader/mem/heap.h
rename to bdk/mem/heap.h
diff --git a/bootloader/mem/mc.c b/bdk/mem/mc.c
similarity index 100%
rename from bootloader/mem/mc.c
rename to bdk/mem/mc.c
diff --git a/bootloader/mem/mc.h b/bdk/mem/mc.h
similarity index 100%
rename from bootloader/mem/mc.h
rename to bdk/mem/mc.h
diff --git a/bootloader/mem/mc_t210.h b/bdk/mem/mc_t210.h
similarity index 100%
rename from bootloader/mem/mc_t210.h
rename to bdk/mem/mc_t210.h
diff --git a/bootloader/mem/minerva.c b/bdk/mem/minerva.c
similarity index 100%
rename from bootloader/mem/minerva.c
rename to bdk/mem/minerva.c
diff --git a/bootloader/mem/minerva.h b/bdk/mem/minerva.h
similarity index 100%
rename from bootloader/mem/minerva.h
rename to bdk/mem/minerva.h
diff --git a/bootloader/mem/mtc_table.h b/bdk/mem/mtc_table.h
similarity index 100%
rename from bootloader/mem/mtc_table.h
rename to bdk/mem/mtc_table.h
diff --git a/bootloader/mem/sdram.c b/bdk/mem/sdram.c
similarity index 100%
rename from bootloader/mem/sdram.c
rename to bdk/mem/sdram.c
diff --git a/bootloader/mem/sdram.h b/bdk/mem/sdram.h
similarity index 100%
rename from bootloader/mem/sdram.h
rename to bdk/mem/sdram.h
diff --git a/bootloader/mem/sdram_config.inl b/bdk/mem/sdram_config.inl
similarity index 100%
rename from bootloader/mem/sdram_config.inl
rename to bdk/mem/sdram_config.inl
diff --git a/bootloader/mem/sdram_config_lz.inl b/bdk/mem/sdram_config_lz.inl
similarity index 100%
rename from bootloader/mem/sdram_config_lz.inl
rename to bdk/mem/sdram_config_lz.inl
diff --git a/bootloader/mem/sdram_lp0.c b/bdk/mem/sdram_lp0.c
similarity index 100%
rename from bootloader/mem/sdram_lp0.c
rename to bdk/mem/sdram_lp0.c
diff --git a/bootloader/mem/sdram_lp0_param_t210.h b/bdk/mem/sdram_lp0_param_t210.h
similarity index 100%
rename from bootloader/mem/sdram_lp0_param_t210.h
rename to bdk/mem/sdram_lp0_param_t210.h
diff --git a/bootloader/mem/sdram_param_t210.h b/bdk/mem/sdram_param_t210.h
similarity index 100%
rename from bootloader/mem/sdram_param_t210.h
rename to bdk/mem/sdram_param_t210.h
diff --git a/bootloader/soc/smmu.c b/bdk/mem/smmu.c
similarity index 100%
rename from bootloader/soc/smmu.c
rename to bdk/mem/smmu.c
diff --git a/bootloader/soc/smmu.h b/bdk/mem/smmu.h
similarity index 100%
rename from bootloader/soc/smmu.h
rename to bdk/mem/smmu.h
diff --git a/common/memory_map.h b/bdk/memory_map.h
similarity index 100%
rename from common/memory_map.h
rename to bdk/memory_map.h
diff --git a/common/common_module.h b/bdk/module.h
similarity index 100%
rename from common/common_module.h
rename to bdk/module.h
diff --git a/bootloader/power/bq24193.c b/bdk/power/bq24193.c
similarity index 100%
rename from bootloader/power/bq24193.c
rename to bdk/power/bq24193.c
diff --git a/bootloader/power/bq24193.h b/bdk/power/bq24193.h
similarity index 100%
rename from bootloader/power/bq24193.h
rename to bdk/power/bq24193.h
diff --git a/bootloader/power/max17050.c b/bdk/power/max17050.c
similarity index 100%
rename from bootloader/power/max17050.c
rename to bdk/power/max17050.c
diff --git a/bootloader/power/max17050.h b/bdk/power/max17050.h
similarity index 100%
rename from bootloader/power/max17050.h
rename to bdk/power/max17050.h
diff --git a/bootloader/power/max77620.h b/bdk/power/max77620.h
similarity index 100%
rename from bootloader/power/max77620.h
rename to bdk/power/max77620.h
diff --git a/bootloader/power/max7762x.c b/bdk/power/max7762x.c
similarity index 100%
rename from bootloader/power/max7762x.c
rename to bdk/power/max7762x.c
diff --git a/bootloader/power/max7762x.h b/bdk/power/max7762x.h
similarity index 100%
rename from bootloader/power/max7762x.h
rename to bdk/power/max7762x.h
diff --git a/nyx/nyx_gui/power/regulator_5v.c b/bdk/power/regulator_5v.c
similarity index 100%
rename from nyx/nyx_gui/power/regulator_5v.c
rename to bdk/power/regulator_5v.c
diff --git a/nyx/nyx_gui/power/regulator_5v.h b/bdk/power/regulator_5v.h
similarity index 100%
rename from nyx/nyx_gui/power/regulator_5v.h
rename to bdk/power/regulator_5v.h
diff --git a/bootloader/rtc/max77620-rtc.c b/bdk/rtc/max77620-rtc.c
similarity index 100%
rename from bootloader/rtc/max77620-rtc.c
rename to bdk/rtc/max77620-rtc.c
diff --git a/bootloader/rtc/max77620-rtc.h b/bdk/rtc/max77620-rtc.h
similarity index 100%
rename from bootloader/rtc/max77620-rtc.h
rename to bdk/rtc/max77620-rtc.h
diff --git a/bootloader/sec/se.c b/bdk/sec/se.c
similarity index 100%
rename from bootloader/sec/se.c
rename to bdk/sec/se.c
diff --git a/bootloader/sec/se.h b/bdk/sec/se.h
similarity index 100%
rename from bootloader/sec/se.h
rename to bdk/sec/se.h
diff --git a/bootloader/sec/se_t210.h b/bdk/sec/se_t210.h
similarity index 100%
rename from bootloader/sec/se_t210.h
rename to bdk/sec/se_t210.h
diff --git a/bootloader/sec/tsec.c b/bdk/sec/tsec.c
similarity index 100%
rename from bootloader/sec/tsec.c
rename to bdk/sec/tsec.c
diff --git a/bootloader/sec/tsec.h b/bdk/sec/tsec.h
similarity index 100%
rename from bootloader/sec/tsec.h
rename to bdk/sec/tsec.h
diff --git a/bootloader/sec/tsec_t210.h b/bdk/sec/tsec_t210.h
similarity index 100%
rename from bootloader/sec/tsec_t210.h
rename to bdk/sec/tsec_t210.h
diff --git a/bootloader/soc/bpmp.c b/bdk/soc/bpmp.c
similarity index 100%
rename from bootloader/soc/bpmp.c
rename to bdk/soc/bpmp.c
diff --git a/bootloader/soc/bpmp.h b/bdk/soc/bpmp.h
similarity index 100%
rename from bootloader/soc/bpmp.h
rename to bdk/soc/bpmp.h
diff --git a/bootloader/soc/ccplex.c b/bdk/soc/ccplex.c
similarity index 100%
rename from bootloader/soc/ccplex.c
rename to bdk/soc/ccplex.c
diff --git a/bootloader/soc/ccplex.h b/bdk/soc/ccplex.h
similarity index 100%
rename from bootloader/soc/ccplex.h
rename to bdk/soc/ccplex.h
diff --git a/bootloader/soc/clock.c b/bdk/soc/clock.c
similarity index 100%
rename from bootloader/soc/clock.c
rename to bdk/soc/clock.c
diff --git a/bootloader/soc/clock.h b/bdk/soc/clock.h
similarity index 100%
rename from bootloader/soc/clock.h
rename to bdk/soc/clock.h
diff --git a/bootloader/soc/fuse.c b/bdk/soc/fuse.c
similarity index 100%
rename from bootloader/soc/fuse.c
rename to bdk/soc/fuse.c
diff --git a/bootloader/soc/fuse.h b/bdk/soc/fuse.h
similarity index 100%
rename from bootloader/soc/fuse.h
rename to bdk/soc/fuse.h
diff --git a/bootloader/soc/gpio.c b/bdk/soc/gpio.c
similarity index 100%
rename from bootloader/soc/gpio.c
rename to bdk/soc/gpio.c
diff --git a/bootloader/soc/gpio.h b/bdk/soc/gpio.h
similarity index 100%
rename from bootloader/soc/gpio.h
rename to bdk/soc/gpio.h
diff --git a/bootloader/soc/hw_init.c b/bdk/soc/hw_init.c
similarity index 100%
rename from bootloader/soc/hw_init.c
rename to bdk/soc/hw_init.c
diff --git a/bootloader/soc/hw_init.h b/bdk/soc/hw_init.h
similarity index 100%
rename from bootloader/soc/hw_init.h
rename to bdk/soc/hw_init.h
diff --git a/bootloader/soc/i2c.c b/bdk/soc/i2c.c
similarity index 100%
rename from bootloader/soc/i2c.c
rename to bdk/soc/i2c.c
diff --git a/bootloader/soc/i2c.h b/bdk/soc/i2c.h
similarity index 100%
rename from bootloader/soc/i2c.h
rename to bdk/soc/i2c.h
diff --git a/bootloader/soc/irq.c b/bdk/soc/irq.c
similarity index 100%
rename from bootloader/soc/irq.c
rename to bdk/soc/irq.c
diff --git a/bootloader/soc/irq.h b/bdk/soc/irq.h
similarity index 100%
rename from bootloader/soc/irq.h
rename to bdk/soc/irq.h
diff --git a/bootloader/soc/kfuse.c b/bdk/soc/kfuse.c
similarity index 100%
rename from bootloader/soc/kfuse.c
rename to bdk/soc/kfuse.c
diff --git a/bootloader/soc/kfuse.h b/bdk/soc/kfuse.h
similarity index 100%
rename from bootloader/soc/kfuse.h
rename to bdk/soc/kfuse.h
diff --git a/bootloader/soc/pinmux.c b/bdk/soc/pinmux.c
similarity index 100%
rename from bootloader/soc/pinmux.c
rename to bdk/soc/pinmux.c
diff --git a/bootloader/soc/pinmux.h b/bdk/soc/pinmux.h
similarity index 100%
rename from bootloader/soc/pinmux.h
rename to bdk/soc/pinmux.h
diff --git a/bootloader/soc/pmc.h b/bdk/soc/pmc.h
similarity index 100%
rename from bootloader/soc/pmc.h
rename to bdk/soc/pmc.h
diff --git a/bootloader/soc/pmc_lp0_t210.h b/bdk/soc/pmc_lp0_t210.h
similarity index 100%
rename from bootloader/soc/pmc_lp0_t210.h
rename to bdk/soc/pmc_lp0_t210.h
diff --git a/bootloader/soc/t210.h b/bdk/soc/t210.h
similarity index 100%
rename from bootloader/soc/t210.h
rename to bdk/soc/t210.h
diff --git a/bootloader/soc/uart.c b/bdk/soc/uart.c
similarity index 100%
rename from bootloader/soc/uart.c
rename to bdk/soc/uart.c
diff --git a/bootloader/soc/uart.h b/bdk/soc/uart.h
similarity index 100%
rename from bootloader/soc/uart.h
rename to bdk/soc/uart.h
diff --git a/bootloader/storage/mbr_gpt.h b/bdk/storage/mbr_gpt.h
similarity index 100%
rename from bootloader/storage/mbr_gpt.h
rename to bdk/storage/mbr_gpt.h
diff --git a/bootloader/storage/mmc.h b/bdk/storage/mmc.h
similarity index 100%
rename from bootloader/storage/mmc.h
rename to bdk/storage/mmc.h
diff --git a/bootloader/storage/nx_sd.h b/bdk/storage/nx_sd.h
similarity index 100%
rename from bootloader/storage/nx_sd.h
rename to bdk/storage/nx_sd.h
diff --git a/nyx/nyx_gui/storage/ramdisk.c b/bdk/storage/ramdisk.c
similarity index 100%
rename from nyx/nyx_gui/storage/ramdisk.c
rename to bdk/storage/ramdisk.c
diff --git a/nyx/nyx_gui/storage/ramdisk.h b/bdk/storage/ramdisk.h
similarity index 100%
rename from nyx/nyx_gui/storage/ramdisk.h
rename to bdk/storage/ramdisk.h
diff --git a/bootloader/storage/sd.h b/bdk/storage/sd.h
similarity index 100%
rename from bootloader/storage/sd.h
rename to bdk/storage/sd.h
diff --git a/bootloader/storage/sdmmc.c b/bdk/storage/sdmmc.c
similarity index 100%
rename from bootloader/storage/sdmmc.c
rename to bdk/storage/sdmmc.c
diff --git a/bootloader/storage/sdmmc.h b/bdk/storage/sdmmc.h
similarity index 100%
rename from bootloader/storage/sdmmc.h
rename to bdk/storage/sdmmc.h
diff --git a/bootloader/storage/sdmmc_driver.c b/bdk/storage/sdmmc_driver.c
similarity index 100%
rename from bootloader/storage/sdmmc_driver.c
rename to bdk/storage/sdmmc_driver.c
diff --git a/bootloader/storage/sdmmc_driver.h b/bdk/storage/sdmmc_driver.h
similarity index 100%
rename from bootloader/storage/sdmmc_driver.h
rename to bdk/storage/sdmmc_driver.h
diff --git a/bootloader/storage/sdmmc_t210.h b/bdk/storage/sdmmc_t210.h
similarity index 100%
rename from bootloader/storage/sdmmc_t210.h
rename to bdk/storage/sdmmc_t210.h
diff --git a/nyx/nyx_gui/thermal/fan.c b/bdk/thermal/fan.c
similarity index 100%
rename from nyx/nyx_gui/thermal/fan.c
rename to bdk/thermal/fan.c
diff --git a/nyx/nyx_gui/thermal/fan.h b/bdk/thermal/fan.h
similarity index 100%
rename from nyx/nyx_gui/thermal/fan.h
rename to bdk/thermal/fan.h
diff --git a/nyx/nyx_gui/thermal/tmp451.c b/bdk/thermal/tmp451.c
similarity index 100%
rename from nyx/nyx_gui/thermal/tmp451.c
rename to bdk/thermal/tmp451.c
diff --git a/nyx/nyx_gui/thermal/tmp451.h b/bdk/thermal/tmp451.h
similarity index 100%
rename from nyx/nyx_gui/thermal/tmp451.h
rename to bdk/thermal/tmp451.h
diff --git a/nyx/nyx_gui/usb/usb_descriptors.h b/bdk/usb/usb_descriptors.h
similarity index 100%
rename from nyx/nyx_gui/usb/usb_descriptors.h
rename to bdk/usb/usb_descriptors.h
diff --git a/nyx/nyx_gui/usb/usb_gadget_hid.c b/bdk/usb/usb_gadget_hid.c
similarity index 100%
rename from nyx/nyx_gui/usb/usb_gadget_hid.c
rename to bdk/usb/usb_gadget_hid.c
diff --git a/nyx/nyx_gui/usb/usb_gadget_ums.c b/bdk/usb/usb_gadget_ums.c
similarity index 100%
rename from nyx/nyx_gui/usb/usb_gadget_ums.c
rename to bdk/usb/usb_gadget_ums.c
diff --git a/nyx/nyx_gui/usb/usb_t210.h b/bdk/usb/usb_t210.h
similarity index 100%
rename from nyx/nyx_gui/usb/usb_t210.h
rename to bdk/usb/usb_t210.h
diff --git a/nyx/nyx_gui/usb/usbd.c b/bdk/usb/usbd.c
similarity index 100%
rename from nyx/nyx_gui/usb/usbd.c
rename to bdk/usb/usbd.c
diff --git a/nyx/nyx_gui/usb/usbd.h b/bdk/usb/usbd.h
similarity index 100%
rename from nyx/nyx_gui/usb/usbd.h
rename to bdk/usb/usbd.h
diff --git a/bootloader/utils/aarch64_util.h b/bdk/utils/aarch64_util.h
similarity index 100%
rename from bootloader/utils/aarch64_util.h
rename to bdk/utils/aarch64_util.h
diff --git a/bootloader/utils/btn.c b/bdk/utils/btn.c
similarity index 100%
rename from bootloader/utils/btn.c
rename to bdk/utils/btn.c
diff --git a/bootloader/utils/btn.h b/bdk/utils/btn.h
similarity index 100%
rename from bootloader/utils/btn.h
rename to bdk/utils/btn.h
diff --git a/bootloader/utils/dirlist.c b/bdk/utils/dirlist.c
similarity index 100%
rename from bootloader/utils/dirlist.c
rename to bdk/utils/dirlist.c
diff --git a/bootloader/utils/dirlist.h b/bdk/utils/dirlist.h
similarity index 100%
rename from bootloader/utils/dirlist.h
rename to bdk/utils/dirlist.h
diff --git a/bootloader/config/ini.c b/bdk/utils/ini.c
similarity index 100%
rename from bootloader/config/ini.c
rename to bdk/utils/ini.c
diff --git a/bootloader/config/ini.h b/bdk/utils/ini.h
similarity index 100%
rename from bootloader/config/ini.h
rename to bdk/utils/ini.h
diff --git a/bootloader/utils/list.h b/bdk/utils/list.h
similarity index 100%
rename from bootloader/utils/list.h
rename to bdk/utils/list.h
diff --git a/nyx/nyx_gui/utils/sprintf.c b/bdk/utils/sprintf.c
similarity index 100%
rename from nyx/nyx_gui/utils/sprintf.c
rename to bdk/utils/sprintf.c
diff --git a/nyx/nyx_gui/utils/sprintf.h b/bdk/utils/sprintf.h
similarity index 100%
rename from nyx/nyx_gui/utils/sprintf.h
rename to bdk/utils/sprintf.h
diff --git a/bootloader/utils/types.h b/bdk/utils/types.h
similarity index 100%
rename from bootloader/utils/types.h
rename to bdk/utils/types.h
diff --git a/bootloader/utils/util.c b/bdk/utils/util.c
similarity index 100%
rename from bootloader/utils/util.c
rename to bdk/utils/util.c
diff --git a/bootloader/utils/util.h b/bdk/utils/util.h
similarity index 100%
rename from bootloader/utils/util.h
rename to bdk/utils/util.h
diff --git a/bootloader/config/config.c b/bootloader/config.c
similarity index 100%
rename from bootloader/config/config.c
rename to bootloader/config.c
diff --git a/bootloader/config/config.h b/bootloader/config.h
similarity index 100%
rename from bootloader/config/config.h
rename to bootloader/config.h
diff --git a/nyx/nyx_gui/config/config.c b/nyx/nyx_gui/config.c
similarity index 100%
rename from nyx/nyx_gui/config/config.c
rename to nyx/nyx_gui/config.c
diff --git a/nyx/nyx_gui/config/config.h b/nyx/nyx_gui/config.h
similarity index 100%
rename from nyx/nyx_gui/config/config.h
rename to nyx/nyx_gui/config.h
diff --git a/nyx/nyx_gui/config/ini.c b/nyx/nyx_gui/config/ini.c
deleted file mode 100644
index b83160c..0000000
--- a/nyx/nyx_gui/config/ini.c
+++ /dev/null
@@ -1,189 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "ini.h"
-#include "../libs/fatfs/ff.h"
-#include "../mem/heap.h"
-#include "../utils/dirlist.h"
-
-static char *_strdup(char *str)
-{
- if (!str)
- return NULL;
-
- // Remove starting space.
- if (str[0] == ' ' && strlen(str))
- str++;
-
- char *res = (char *)malloc(strlen(str) + 1);
- strcpy(res, str);
-
- // Remove trailing space.
- if (strlen(res) && res[strlen(res) - 1] == ' ')
- res[strlen(res) - 1] = 0;
-
- return res;
-}
-
-u32 _find_section_name(char *lbuf, u32 lblen, char schar)
-{
- u32 i;
- // Depends on 'FF_USE_STRFUNC 2' that removes \r.
- for (i = 0; i < lblen && lbuf[i] != schar && lbuf[i] != '\n'; i++)
- ;
- lbuf[i] = 0;
-
- return i;
-}
-
-ini_sec_t *_ini_create_section(link_t *dst, ini_sec_t *csec, char *name, u8 type)
-{
- if (csec)
- list_append(dst, &csec->link);
-
- csec = (ini_sec_t *)calloc(sizeof(ini_sec_t), 1);
- csec->name = _strdup(name);
- csec->type = type;
-
- return csec;
-}
-
-int ini_parse(link_t *dst, char *ini_path, bool is_dir)
-{
- u32 lblen;
- u32 pathlen = strlen(ini_path);
- u32 k = 0;
- char lbuf[512];
- char *filelist = NULL;
- FIL fp;
- ini_sec_t *csec = NULL;
-
- char *filename = (char *)malloc(256);
-
- strcpy(filename, ini_path);
-
- // Get all ini filenames.
- if (is_dir)
- {
- filelist = dirlist(filename, "*.ini", false, false);
- if (!filelist)
- {
- free(filename);
- return 0;
- }
- strcpy(filename + pathlen, "/");
- pathlen++;
- }
-
- do
- {
- // Copy ini filename in path string.
- if (is_dir)
- {
- if (filelist[k * 256])
- {
- strcpy(filename + pathlen, &filelist[k * 256]);
- k++;
- }
- else
- break;
- }
-
- // Open ini.
- if (f_open(&fp, filename, FA_READ) != FR_OK)
- {
- free(filelist);
- free(filename);
-
- return 0;
- }
-
- do
- {
- // Fetch one line.
- lbuf[0] = 0;
- f_gets(lbuf, 512, &fp);
- lblen = strlen(lbuf);
-
- // Remove trailing newline. Depends on 'FF_USE_STRFUNC 2' that removes \r.
- if (lblen && lbuf[lblen - 1] == '\n')
- lbuf[lblen - 1] = 0;
-
- if (lblen > 2 && lbuf[0] == '[') // Create new section.
- {
- _find_section_name(lbuf, lblen, ']');
-
- csec = _ini_create_section(dst, csec, &lbuf[1], INI_CHOICE);
- list_init(&csec->kvs);
- }
- else if (lblen > 1 && lbuf[0] == '{') // Create new caption. Support empty caption '{}'.
- {
- _find_section_name(lbuf, lblen, '}');
-
- csec = _ini_create_section(dst, csec, &lbuf[1], INI_CAPTION);
- csec->color = 0xFF0AB9E6;
- }
- else if (lblen > 2 && lbuf[0] == '#') // Create comment.
- {
- csec = _ini_create_section(dst, csec, &lbuf[1], INI_COMMENT);
- }
- else if (lblen < 2) // Create empty line.
- {
- csec = _ini_create_section(dst, csec, NULL, INI_NEWLINE);
- }
- else if (csec && csec->type == INI_CHOICE) // Extract key/value.
- {
- u32 i = _find_section_name(lbuf, lblen, '=');
-
- ini_kv_t *kv = (ini_kv_t *)calloc(sizeof(ini_kv_t), 1);
- kv->key = _strdup(&lbuf[0]);
- kv->val = _strdup(&lbuf[i + 1]);
- list_append(&csec->kvs, &kv->link);
- }
- } while (!f_eof(&fp));
-
- f_close(&fp);
-
- if (csec)
- {
- list_append(dst, &csec->link);
- if (is_dir)
- csec = NULL;
- }
- } while (is_dir);
-
- free(filename);
- free(filelist);
-
- return 1;
-}
-
-char *ini_check_payload_section(ini_sec_t *cfg)
-{
- if (cfg == NULL)
- return NULL;
-
- LIST_FOREACH_ENTRY(ini_kv_t, kv, &cfg->kvs, link)
- {
- if (!strcmp("payload", kv->key))
- return kv->val;
- }
-
- return NULL;
-}
diff --git a/nyx/nyx_gui/config/ini.h b/nyx/nyx_gui/config/ini.h
deleted file mode 100644
index dffbe86..0000000
--- a/nyx/nyx_gui/config/ini.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _INI_H_
-#define _INI_H_
-
-#include "../utils/types.h"
-#include "../utils/list.h"
-
-#define INI_CHOICE 3
-#define INI_CAPTION 5
-#define INI_CHGLINE 6
-#define INI_NEWLINE 0xFE
-#define INI_COMMENT 0xFF
-
-typedef struct _ini_kv_t
-{
- char *key;
- char *val;
- link_t link;
-} ini_kv_t;
-
-typedef struct _ini_sec_t
-{
- char *name;
- link_t kvs;
- link_t link;
- u32 type;
- u32 color;
-} ini_sec_t;
-
-int ini_parse(link_t *dst, char *ini_path, bool is_dir);
-char *ini_check_payload_section(ini_sec_t *cfg);
-
-#endif
-
diff --git a/nyx/nyx_gui/exception_handlers.S b/nyx/nyx_gui/exception_handlers.S
deleted file mode 100644
index 97d1ec6..0000000
--- a/nyx/nyx_gui/exception_handlers.S
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-/*
- * Armv7tdmi Status register.
- *
- * bit0: Mode 0.
- * bit1: Mode 1.
- * bit2: Mode 2.
- * bit3: Mode 3.
- * bit4: Mode 4.
- * bit5: Thumb state.
- * bit6: FIQ disable.
- * bit7: IRQ disable.
- * bit8-27: Reserved.
- * bit28: Overflow condition.
- * bit29: Carry/Borrow/Extend condition.
- * bit30: Zero condition.
- * bit31: Negative/Less than condition.
- *
- * M[4:0] | Mode | Visible Thumb-state registers | Visible ARM-state registers
- * 10000 | USER | r0–r7, SP, LR, PC, CPSR | r0–r14, PC, CPSR
- * 10001 | FIQ | r0–r7, SP_fiq, LR_fiq, PC, CPSR, SPSR_fiq | r0–r7, r8_fiq–r14_fiq, PC, CPSR, SPSR_fiq
- * 10010 | IRQ | r0–r7, SP_irq, LR_irq, PC, CPSR, SPSR_irq | r0–r12, r13_irq, r14_irq, PC, CPSR, SPSR_irq
- * 10011 | SVC | r0–r7, SP_svc, LR_svc, PC, CPSR, SPSR_svc | r0–r12, r13_svc, r14_svc, PC, CPSR, SPSR_svc
- * 10111 | ABRT | r0–r7, SP_abt, LR_abt, PC, CPSR, SPSR_abt | r0–r12, r13_abt, r14_abt, PC, CPSR, SPSR_abt
- * 11011 | UNDF | r0–r7, SP_und, LR_und, PC, CPSR, SPSR_und | r0–r12, r13_und, r14_und, PC, CPSR, SPSR_und
- * 11111 | SYS | r0–r7, SP, LR, PC, CPSR | r0–r14, PC, CPSR
- */
-
-#define EXCP_EN_ADDR 0x4003FFFC
-#define EXCP_TYPE_ADDR 0x4003FFF8
-#define EXCP_LR_ADDR 0x4003FFF4
-
-#define EXCP_VEC_BASE 0x6000F000
-#define EVP_COP_RESET_VECTOR 0x200
-#define EVP_COP_UNDEF_VECTOR 0x204
-#define EVP_COP_SWI_VECTOR 0x208
-#define EVP_COP_PREFETCH_ABORT_VECTOR 0x20C
-#define EVP_COP_DATA_ABORT_VECTOR 0x210
-#define EVP_COP_RSVD_VECTOR 0x214
-#define EVP_COP_IRQ_VECTOR 0x218
-#define EVP_COP_FIQ_VECTOR 0x21C
-
-#define MODE_USR 0x10
-#define MODE_FIQ 0x11
-#define MODE_IRQ 0x12
-#define MODE_SVC 0x13
-#define MODE_ABT 0x17
-#define MODE_UDF 0x1B
-#define MODE_SYS 0x1F
-#define MODE_MASK 0x1F
-
-#define FIQ 0x40
-#define IRQ 0x80
-
-.section .text._irq_setup
-.arm
-
-.extern ipl_main
-.type ipl_main, %function
-
-.extern svc_handler
-.type svc_handler, %function
-
-.extern irq_handler
-.type irq_handler, %function
-
-.extern fiq_setup
-.type fiq_setup, %function
-
-.extern fiq_handler
-.type fiq_handler, %function
-
-.globl _irq_setup
-.type _irq_setup, %function
-_irq_setup:
- MRS R0, CPSR
- BIC R0, R0, #MODE_MASK /* Clear mode bits */
- ORR R0, R0, #(MODE_SVC | IRQ | FIQ) /* SUPERVISOR mode, IRQ/FIQ disabled */
- MSR CPSR, R0
-
- /* Setup IRQ stack pointer */
- MSR CPSR, #(MODE_IRQ | IRQ | FIQ) /* IRQ mode, IRQ/FIQ disabled */
- LDR SP, =0x40040000
-
- /* Setup SYS stack pointer */
- MSR CPSR, #(MODE_SYS | IRQ | FIQ) /* SYSTEM mode, IRQ/FIQ disabled */
- LDR SP, =0x4003FF00 /* Will be changed later to DRAM */
-
- MOV LR, PC
- BL setup_vectors
- /*BL fiq_setup*/
-
- /* Enable interrupts */
- BL irq_enable_cpu_irq_exceptions
-
- B ipl_main
- B .
-
-_reset:
- LDR R0, =EXCP_EN_ADDR
- LDR R1, =0x30505645 /* EVP0 */
- STR R1, [R0] /* EVP0 in EXCP_EN_ADDR */
- LDR R0, =EXCP_LR_ADDR
- MOV R1, LR
- STR R1, [R0] /* Save LR in EXCP_LR_ADDR */
- LDR R0, =__bss_start
- EOR R1, R1, R1
- LDR R2, =__bss_end
- SUB R2, R2, R0
- BL memset
- B _irq_setup
-
-_reset_handler:
- LDR R0, =EXCP_TYPE_ADDR
- LDR R1, =0x545352 /* RST */
- STR R1, [R0] /* RST in EXCP_TYPE_ADDR */
- B _reset
-
-_undefined_handler:
- LDR R0, =EXCP_TYPE_ADDR
- LDR R1, =0x464455 /* UDF */
- STR R1, [R0] /* UDF in EXCP_TYPE_ADDR */
- B _reset
-
-_prefetch_abort_handler:
- LDR R0, =EXCP_TYPE_ADDR
- LDR R1, =0x54424150 /* PABT */
- STR R1, [R0] /* PABT in EXCP_TYPE_ADDR */
- B _reset
-
-_data_abort_handler:
- LDR R0, =EXCP_TYPE_ADDR
- LDR R1, =0x54424144 /* DABT */
- STR R1, [R0] /* DABT in EXCP_TYPE_ADDR */
- B _reset
-
-.globl irq_enable_cpu_irq_exceptions
-.type irq_enable_cpu_irq_exceptions, %function
-irq_enable_cpu_irq_exceptions:
- MRS R12, CPSR
- BIC R12, R12, #(IRQ | FIQ) /* IRQ/FIQ enabled */
- MSR CPSR, R12
- BX LR
-
-.globl irq_disable_cpu_irq_exceptions
-.type irq_disable_cpu_irq_exceptions, %function
-irq_disable_cpu_irq_exceptions:
- MRS R12, CPSR
- ORR R12, R12, #(IRQ | FIQ) /* IRQ/FIQ disabled */
- MSR CPSR, R12
- BX LR
-
-_irq_handler:
- MOV R13, R0 /* Save R0 in R13_IRQ */
- SUB R0, LR, #4 /* Put return address in R0_SYS */
- MOV LR, R1 /* Save R1 in R14_IRQ (LR) */
- MRS R1, SPSR /* Put the SPSR in R1_SYS */
-
- MSR CPSR_c, #(MODE_SYS | IRQ) /* SYSTEM mode, IRQ disabled */
- STMFD SP!, {R0, R1} /* SPSR and PC */
- STMFD SP!, {R2-R3, R12, LR} /* AAPCS-clobbered registers */
- MOV R0, SP /* Make SP_SYS visible to IRQ mode */
- SUB SP, SP, #8 /* Make room for stacking R0 and R1 */
-
- MSR CPSR_c, #(MODE_IRQ | IRQ) /* IRQ mode, IRQ disabled */
- STMFD R0!, {R13, R14} /* Finish saving the context (R0, R1) */
-
- MSR CPSR_c, #(MODE_SYS | IRQ) /* SYSTEM mode, IRQ disabled */
- LDR R12, =irq_handler
- MOV LR, PC /* Copy the return address to link register */
- BX R12 /* Call the C IRQ handler (ARM/THUMB) */
-
- MSR CPSR_c, #(MODE_SYS | IRQ | FIQ) /* SYSTEM mode, IRQ/FIQ disabled */
- MOV R0, SP /* Make SP_SYS visible to IRQ mode */
- ADD SP, SP, #32 /* Fake unstacking 8 registers from SP_SYS */
-
- MSR CPSR_c, #(MODE_IRQ | IRQ | FIQ) /* IRQ mode, IRQ/FIQ disabled */
- MOV SP, R0 /* Copy SP_SYS to SP_IRQ */
- LDR R0, [SP, #28] /* Load the saved SPSR from the stack */
- MSR SPSR_cxsf, R0 /* Copy it into SPSR_IRQ */
-
- LDMFD SP, {R0-R3, R12, LR}^ /* Unstack all saved USER/SYSTEM registers */
- NOP /* Cant access barked registers immediately */
- LDR LR, [SP, #24] /* Load return address from the SYS stack */
- MOVS PC, LR /* Return restoring CPSR from SPSR */
-
-_fiq_handler:
- BL fiq_handler
-
-setup_vectors:
- /* Setup vectors */
- LDR R0, =EXCP_VEC_BASE
-
- LDR R1, =_reset_handler
- STR R1, [R0, #EVP_COP_RESET_VECTOR]
-
- LDR R1, =_undefined_handler
- STR R1, [R0, #EVP_COP_UNDEF_VECTOR]
-
- LDR R1, =_reset_handler
- STR R1, [R0, #EVP_COP_SWI_VECTOR]
-
- LDR R1, =_prefetch_abort_handler
- STR R1, [R0, #EVP_COP_PREFETCH_ABORT_VECTOR]
-
- LDR R1, =_data_abort_handler
- STR R1, [R0, #EVP_COP_DATA_ABORT_VECTOR]
-
- LDR R1, =_reset_handler
- STR R1, [R0, #EVP_COP_RSVD_VECTOR]
-
- LDR R1, =_irq_handler
- STR R1, [R0, #EVP_COP_IRQ_VECTOR]
-
- LDR R1, =_fiq_handler
- STR R1, [R0, #EVP_COP_FIQ_VECTOR]
-
- BX LR
diff --git a/nyx/nyx_gui/gfx/di.c b/nyx/nyx_gui/gfx/di.c
deleted file mode 100644
index 015df23..0000000
--- a/nyx/nyx_gui/gfx/di.c
+++ /dev/null
@@ -1,447 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "di.h"
-#include "../gfx/gfx.h"
-#include "../power/max77620.h"
-#include "../power/max7762x.h"
-#include "../soc/clock.h"
-#include "../soc/gpio.h"
-#include "../soc/i2c.h"
-#include "../soc/pinmux.h"
-#include "../soc/pmc.h"
-#include "../soc/t210.h"
-#include "../utils/util.h"
-
-#include "di.inl"
-
-extern volatile nyx_storage_t *nyx_str;
-
-static u32 _display_id = 0;
-
-void display_end();
-
-static void _display_dsi_wait(u32 timeout, u32 off, u32 mask)
-{
- u32 end = get_tmr_us() + timeout;
- while (get_tmr_us() < end && DSI(off) & mask)
- ;
- usleep(5);
-}
-
-static void _display_dsi_send_cmd(u8 cmd, u32 param, u32 wait)
-{
- DSI(_DSIREG(DSI_WR_DATA)) = (param << 8) | cmd;
- DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
-
- if (wait)
- usleep(wait);
-}
-
-void display_init()
-{
- // Check if display is already initialized.
- if (CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_SET) & 0x18000000)
- display_end();
-
- // Power on.
- max77620_regulator_set_volt_and_flags(REGULATOR_LDO0, 1200000, MAX77620_POWER_MODE_NORMAL); // Configure to 1.2V.
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO7, MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH | MAX77620_CNFG_GPIO_DRV_PUSHPULL);
-
- // Enable Display Interface specific clocks.
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_CLR) = 0x1010000; // Clear reset DSI, MIPI_CAL.
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = 0x1010000; // Set enable clock DSI, MIPI_CAL.
-
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_CLR) = 0x18000000; // Clear reset DISP1, HOST1X.
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_SET) = 0x18000000; // Set enable clock DISP1, HOST1X.
-
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) = 0x20000; // Set enable clock UART_FST_MIPI_CAL.
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL) = 10; // Set PLLP_OUT3 and div 6 (17MHz).
-
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_SET) = 0x80000; // Set enable clock DSIA_LP.
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_DSIA_LP) = 10; // Set PLLP_OUT and div 6 (68MHz).
-
- // Disable deep power down.
- PMC(APBDEV_PMC_IO_DPD_REQ) = 0x40000000;
- PMC(APBDEV_PMC_IO_DPD2_REQ) = 0x40000000;
-
- // Config LCD and Backlight pins.
- PINMUX_AUX(PINMUX_AUX_NFC_EN) &= ~PINMUX_TRISTATE; // PULL_DOWN
- PINMUX_AUX(PINMUX_AUX_NFC_INT) &= ~PINMUX_TRISTATE; // PULL_DOWN
- PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) &= ~PINMUX_TRISTATE; // PULL_DOWN | 1
- PINMUX_AUX(PINMUX_AUX_LCD_BL_EN) &= ~PINMUX_TRISTATE; // PULL_DOWN
- PINMUX_AUX(PINMUX_AUX_LCD_RST) &= ~PINMUX_TRISTATE; // PULL_DOWN
-
- // Set Backlight +-5V pins mode and direction
- gpio_config(GPIO_PORT_I, GPIO_PIN_0 | GPIO_PIN_1, GPIO_MODE_GPIO);
- gpio_output_enable(GPIO_PORT_I, GPIO_PIN_0 | GPIO_PIN_1, GPIO_OUTPUT_ENABLE);
-
- // Enable Backlight power.
- gpio_write(GPIO_PORT_I, GPIO_PIN_0, GPIO_HIGH); // Backlight +5V enable.
- usleep(10000);
- gpio_write(GPIO_PORT_I, GPIO_PIN_1, GPIO_HIGH); // Backlight -5V enable.
- usleep(10000);
-
- // Configure Backlight pins (PWM, EN, RST).
- gpio_config(GPIO_PORT_V, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2, GPIO_MODE_GPIO);
- gpio_output_enable(GPIO_PORT_V, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2, GPIO_OUTPUT_ENABLE);
- gpio_write(GPIO_PORT_V, GPIO_PIN_1, GPIO_HIGH); // Enable Backlight EN.
-
- // Power up supply regulator for display interface.
- MIPI_CAL(_DSIREG(MIPI_CAL_MIPI_BIAS_PAD_CFG2)) = 0;
-
- // Set DISP1 clock source and parent clock.
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_DISP1) = 0x40000000; // PLLD_OUT.
- u32 plld_div = (3 << 20) | (20 << 11) | 1; // DIVM: 1, DIVN: 20, DIVP: 3. PLLD_OUT: 768 MHz, PLLD_OUT0 (DSI): 96 MHz.
- CLOCK(CLK_RST_CONTROLLER_PLLD_BASE) = PLLCX_BASE_ENABLE | PLLCX_BASE_LOCK | plld_div;
- CLOCK(CLK_RST_CONTROLLER_PLLD_MISC1) = 0x20; // PLLD_SETUP.
- CLOCK(CLK_RST_CONTROLLER_PLLD_MISC) = 0x2D0AAA; // PLLD_ENABLE_CLK.
-
- // Setup display communication interfaces.
- exec_cfg((u32 *)DISPLAY_A_BASE, _display_dc_setup_win_config, 94);
- exec_cfg((u32 *)DSI_BASE, _display_dsi_init_config, 61);
- usleep(10000);
-
- // Enable Backlight Reset.
- gpio_write(GPIO_PORT_V, GPIO_PIN_2, GPIO_HIGH);
- usleep(60000);
-
- // Setups DSI packet configuration and request display id.
- DSI(_DSIREG(DSI_BTA_TIMING)) = 0x50204;
- _display_dsi_send_cmd(MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE, 3, 0);
- _display_dsi_wait(250000, _DSIREG(DSI_TRIGGER), DSI_TRIGGER_HOST | DSI_TRIGGER_VIDEO);
-
- _display_dsi_send_cmd(MIPI_DSI_DCS_READ, MIPI_DCS_GET_DISPLAY_ID, 0);
- _display_dsi_wait(250000, _DSIREG(DSI_TRIGGER), DSI_TRIGGER_HOST | DSI_TRIGGER_VIDEO);
-
- DSI(_DSIREG(DSI_HOST_CONTROL)) = DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_IMM_BTA | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC;
- _display_dsi_wait(150000, _DSIREG(DSI_HOST_CONTROL), DSI_HOST_CONTROL_IMM_BTA);
-
- usleep(5000);
-
- // MIPI_DCS_GET_DISPLAY_ID reply is a long read, size 3 u32.
- for (u32 i = 0; i < 3; i++)
- _display_id = DSI(_DSIREG(DSI_RD_DATA)); // Skip ack and msg type info and get the payload (display id).
-
- // Save raw Display ID to Nyx storage.
- nyx_str->info.disp_id = _display_id;
-
- // Decode Display ID.
- _display_id = ((_display_id >> 8) & 0xFF00) | (_display_id & 0xFF);
-
- if ((_display_id & 0xFF) == PANEL_JDI_XXX062M)
- _display_id = PANEL_JDI_XXX062M;
-
- // Initialize display panel.
- switch (_display_id)
- {
- case PANEL_JDI_XXX062M:
- exec_cfg((u32 *)DSI_BASE, _display_init_config_jdi, 43);
- _display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE, MIPI_DCS_EXIT_SLEEP_MODE, 180000);
- break;
- case PANEL_INL_P062CCA_AZ1:
- case PANEL_AUO_A062TAN01:
- _display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE, MIPI_DCS_EXIT_SLEEP_MODE, 180000);
- DSI(_DSIREG(DSI_WR_DATA)) = 0x439; // MIPI_DSI_DCS_LONG_WRITE: 4 bytes.
- DSI(_DSIREG(DSI_WR_DATA)) = 0x9483FFB9; // Enable extension cmd. (Pass: FF 83 94).
- DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
- usleep(5000);
- DSI(_DSIREG(DSI_WR_DATA)) = 0x739; // MIPI_DSI_DCS_LONG_WRITE: 7 bytes.
- if (_display_id == PANEL_INL_P062CCA_AZ1)
- DSI(_DSIREG(DSI_WR_DATA)) = 0x751548B1; // Set Power control. (Not deep standby, BT5 / XDK, VRH gamma volt adj 53 / x40).
- else
- DSI(_DSIREG(DSI_WR_DATA)) = 0x711148B1; // Set Power control. (Not deep standby, BT1 / XDK, VRH gamma volt adj 49 / x40).
- DSI(_DSIREG(DSI_WR_DATA)) = 0x143209; // (NVRH gamma volt adj 9, Amplifier current small / x30, FS0 freq Fosc/80 / FS1 freq Fosc/32).
- DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
- usleep(5000);
- break;
- case PANEL_INL_P062CCA_AZ2:
- case PANEL_AUO_A062TAN02:
- default: // Allow spare part displays to work.
- _display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE, MIPI_DCS_EXIT_SLEEP_MODE, 120000);
- break;
- }
-
- _display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE, MIPI_DCS_SET_DISPLAY_ON, 20000);
-
- // Configure PLLD for DISP1.
- plld_div = (1 << 20) | (24 << 11) | 1; // DIVM: 1, DIVN: 24, DIVP: 1. PLLD_OUT: 768 MHz, PLLD_OUT0 (DSI): 460.8 MHz.
- CLOCK(CLK_RST_CONTROLLER_PLLD_BASE) = PLLCX_BASE_ENABLE | PLLCX_BASE_LOCK | plld_div;
- CLOCK(CLK_RST_CONTROLLER_PLLD_MISC1) = 0x20;
- CLOCK(CLK_RST_CONTROLLER_PLLD_MISC) = 0x2DFC00; // Use new PLLD_SDM_DIN.
-
- // Finalize DSI configuration.
- exec_cfg((u32 *)DSI_BASE, _display_dsi_packet_config, 21);
- DISPLAY_A(_DIREG(DC_DISP_DISP_CLOCK_CONTROL)) = 4; // PCD1 | div3.
- exec_cfg((u32 *)DSI_BASE, _display_dsi_mode_config, 10);
- usleep(10000);
-
- // Calibrate display communication pads.
- exec_cfg((u32 *)MIPI_CAL_BASE, _display_mipi_pad_cal_config, 6);
- exec_cfg((u32 *)DSI_BASE, _display_dsi_pad_cal_config, 4);
- exec_cfg((u32 *)MIPI_CAL_BASE, _display_mipi_apply_dsi_cal_config, 16);
- usleep(10000);
-
- // Enable video display controller.
- exec_cfg((u32 *)DISPLAY_A_BASE, _display_video_disp_controller_enable_config, 113);
-}
-
-void display_backlight_pwm_init()
-{
- clock_enable_pwm();
-
- PWM(PWM_CONTROLLER_PWM_CSR_0) = PWM_CSR_EN; // Enable PWM and set it to 25KHz PFM.
-
- PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = (PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) & 0xFFFFFFFC) | 1; // PWM clock source.
- gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_SPIO); // Backlight power mode.
-}
-
-void display_backlight(bool enable)
-{
- gpio_write(GPIO_PORT_V, GPIO_PIN_0, enable ? GPIO_HIGH : GPIO_LOW); // Backlight PWM GPIO.
-}
-
-void display_backlight_brightness(u32 brightness, u32 step_delay)
-{
- u32 old_value = (PWM(PWM_CONTROLLER_PWM_CSR_0) >> 16) & 0xFF;
- if (brightness == old_value)
- return;
-
- if (brightness > 255)
- brightness = 255;
-
- if (old_value < brightness)
- {
- for (u32 i = old_value; i < brightness + 1; i++)
- {
- PWM(PWM_CONTROLLER_PWM_CSR_0) = PWM_CSR_EN | (i << 16); // Enable PWM and set it to 25KHz PFM.
- usleep(step_delay);
- }
- }
- else
- {
- for (u32 i = old_value; i > brightness; i--)
- {
- PWM(PWM_CONTROLLER_PWM_CSR_0) = PWM_CSR_EN | (i << 16); // Enable PWM and set it to 25KHz PFM.
- usleep(step_delay);
- }
- }
- if (!brightness)
- PWM(PWM_CONTROLLER_PWM_CSR_0) = 0;
-}
-
-void display_end()
-{
- display_backlight_brightness(0, 1000);
-
- DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = DSI_CMD_PKT_VID_ENABLE;
- DSI(_DSIREG(DSI_WR_DATA)) = 0x2805; // MIPI_DCS_SET_DISPLAY_OFF
-
- DISPLAY_A(_DIREG(DC_CMD_STATE_ACCESS)) = READ_MUX | WRITE_MUX;
- DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 0; // Disable host cmd packet.
-
- // De-initialize video controller.
- exec_cfg((u32 *)DISPLAY_A_BASE, _display_video_disp_controller_disable_config, 17);
- exec_cfg((u32 *)DSI_BASE, _display_dsi_timing_deinit_config, 16);
- usleep(10000);
-
- // De-initialize display panel.
- switch (_display_id)
- {
- case PANEL_JDI_XXX062M:
- exec_cfg((u32 *)DSI_BASE, _display_deinit_config_jdi, 22);
- break;
- case PANEL_AUO_A062TAN01:
- exec_cfg((u32 *)DSI_BASE, _display_deinit_config_auo, 37);
- break;
- case PANEL_INL_P062CCA_AZ2:
- case PANEL_AUO_A062TAN02:
- DSI(_DSIREG(DSI_WR_DATA)) = 0x439; // MIPI_DSI_DCS_LONG_WRITE: 4 bytes.
- DSI(_DSIREG(DSI_WR_DATA)) = 0x9483FFB9; // Enable extension cmd. (Pass: FF 83 94).
- DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
- usleep(5000);
- // Set Power.
- DSI(_DSIREG(DSI_WR_DATA)) = 0xB39; // MIPI_DSI_DCS_LONG_WRITE: 11 bytes.
- if (_display_id == PANEL_INL_P062CCA_AZ2)
- DSI(_DSIREG(DSI_WR_DATA)) = 0x751548B1; // Set Power control. (Not deep standby, BT5 / XDK, VRH gamma volt adj 53 / x40).
- else
- DSI(_DSIREG(DSI_WR_DATA)) = 0x711148B1; // Set Power control. (Not deep standby, BT1 / XDK, VRH gamma volt adj 49 / x40).
- // Set Power control. (NVRH gamma volt adj 9, Amplifier current small / x30, FS0 freq Fosc/80 / FS1 freq Fosc/32, Enter standby / PON / VCOMG).
- DSI(_DSIREG(DSI_WR_DATA)) = 0x71143209;
- DSI(_DSIREG(DSI_WR_DATA)) = 0x114D31; // Set Power control. (Unknown).
- DSI(_DSIREG(DSI_TRIGGER)) = DSI_TRIGGER_HOST;
- usleep(5000);
- break;
- case PANEL_INL_P062CCA_AZ1:
- default:
- break;
- }
-
- _display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE, MIPI_DCS_ENTER_SLEEP_MODE, 50000);
-
- // Disable display and backlight pins.
- gpio_write(GPIO_PORT_V, GPIO_PIN_2, GPIO_LOW); //Backlight Reset disable.
- usleep(10000);
-
- gpio_write(GPIO_PORT_I, GPIO_PIN_1, GPIO_LOW); //Backlight -5V disable.
- usleep(10000);
-
- gpio_write(GPIO_PORT_I, GPIO_PIN_0, GPIO_LOW); //Backlight +5V disable.
- usleep(10000);
-
- // Disable Display Interface specific clocks.
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_SET) = 0x1010000; // Set reset clock DSI, MIPI_CAL.
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_CLR) = 0x1010000; // Clear enable clock DSI, MIPI_CAL.
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = 0x18000000; // Set reset DISP1, HOST1X.
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = 0x18000000; // Clear enable DISP1, HOST1X.
-
- // Power down pads.
- DSI(_DSIREG(DSI_PAD_CONTROL_0)) = DSI_PAD_CONTROL_VS1_PULLDN_CLK | DSI_PAD_CONTROL_VS1_PULLDN(0xF) | DSI_PAD_CONTROL_VS1_PDIO_CLK | DSI_PAD_CONTROL_VS1_PDIO(0xF);
- DSI(_DSIREG(DSI_POWER_CONTROL)) = 0;
-
- // Switch to automatic function mode.
- gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_SPIO); // Backlight PWM.
-
- PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = (PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) & ~PINMUX_TRISTATE) | PINMUX_TRISTATE;
- PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = (PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) & 0xFFFFFFFC)| 1;
-}
-
-void display_color_screen(u32 color)
-{
- exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_one_color, 8);
-
- // Configure display to show single color.
- DISPLAY_A(_DIREG(DC_WIN_AD_WIN_OPTIONS)) = 0;
- DISPLAY_A(_DIREG(DC_WIN_BD_WIN_OPTIONS)) = 0;
- DISPLAY_A(_DIREG(DC_WIN_CD_WIN_OPTIONS)) = 0;
- DISPLAY_A(_DIREG(DC_DISP_BLEND_BACKGROUND_COLOR)) = color;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = (DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) & 0xFFFFFFFE) | GENERAL_ACT_REQ;
- usleep(35000);
-
- display_backlight(true);
-}
-
-u32 *display_init_framebuffer_pitch()
-{
- // Sanitize framebuffer area.
- memset((u32 *)IPL_FB_ADDRESS, 0, 0x3C0000);
-
- // This configures the framebuffer @ IPL_FB_ADDRESS with a resolution of 1280x720 (line stride 720).
- exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_framebuffer_pitch, 32);
- usleep(35000);
-
- return (u32 *)IPL_FB_ADDRESS;
-}
-
-u32 *display_init_framebuffer_pitch_inv()
-{
- // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 1280x720 (line stride 720).
- exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_framebuffer_pitch_inv, 34);
-
- usleep(35000);
-
- return (u32 *)NYX_FB_ADDRESS;
-}
-
-u32 *display_init_framebuffer_block()
-{
- // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 1280x720 (line stride 720).
- exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_framebuffer_block, 34);
-
- usleep(35000);
-
- return (u32 *)NYX_FB_ADDRESS;
-}
-
-u32 *display_init_framebuffer_log()
-{
- // This configures the framebuffer @ LOG_FB_ADDRESS with a resolution of 1280x720 (line stride 720).
- exec_cfg((u32 *)DISPLAY_A_BASE, cfg_display_framebuffer_log, 20);
-
- return (u32 *)LOG_FB_ADDRESS;
-}
-
-void display_activate_console()
-{
- DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_D_SELECT; // Select window C.
- DISPLAY_A(_DIREG(DC_WIN_WIN_OPTIONS)) = WIN_ENABLE; // Enable window DD.
- DISPLAY_A(_DIREG(DC_WIN_POSITION)) = 0xFF80;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ;
-
- for (u32 i = 0xFF80; i < 0x10000; i++)
- {
- DISPLAY_A(_DIREG(DC_WIN_POSITION)) = i & 0xFFFF;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ;
- usleep(1000);
- }
-
- DISPLAY_A(_DIREG(DC_WIN_POSITION)) = 0;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ;
-}
-
-void display_deactivate_console()
-{
- DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_D_SELECT; // Select window C.
-
- for (u32 i = 0xFFFF; i > 0xFF7F; i--)
- {
- DISPLAY_A(_DIREG(DC_WIN_POSITION)) = i & 0xFFFF;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ;
- usleep(500);
- }
-
- DISPLAY_A(_DIREG(DC_WIN_POSITION)) = 0;
- DISPLAY_A(_DIREG(DC_WIN_WIN_OPTIONS)) = 0; // Disable window DD.
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ;
-}
-
-void display_init_cursor(void *crs_fb, u32 size)
-{
- // Setup cursor.
- DISPLAY_A(_DIREG(DC_DISP_CURSOR_START_ADDR)) = CURSOR_CLIPPING(CURSOR_CLIP_WIN_A) | size | ((u32)crs_fb >> 10);
- DISPLAY_A(_DIREG(DC_DISP_BLEND_CURSOR_CONTROL)) =
- CURSOR_BLEND_R8G8B8A8 | CURSOR_BLEND_DST_FACTOR(CURSOR_BLEND_K1) | CURSOR_BLEND_SRC_FACTOR(CURSOR_BLEND_K1) | 0xFF;
-
- DISPLAY_A(_DIREG(DC_DISP_DISP_WIN_OPTIONS)) |= CURSOR_ENABLE;
-
- // Arm and activate changes.
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | CURSOR_UPDATE;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | CURSOR_ACT_REQ;
-}
-
-void display_set_pos_cursor(u32 x, u32 y)
-{
- DISPLAY_A(_DIREG(DC_DISP_CURSOR_POSITION)) = x | (y << 16);
-
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | CURSOR_UPDATE;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | CURSOR_ACT_REQ;
-}
-
-void display_deinit_cursor()
-{
- DISPLAY_A(_DIREG(DC_DISP_BLEND_CURSOR_CONTROL)) = 0;
- DISPLAY_A(_DIREG(DC_DISP_DISP_WIN_OPTIONS)) &= ~CURSOR_ENABLE;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | CURSOR_UPDATE;
- DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | CURSOR_ACT_REQ;
-}
diff --git a/nyx/nyx_gui/gfx/di.h b/nyx/nyx_gui/gfx/di.h
deleted file mode 100644
index 29685c6..0000000
--- a/nyx/nyx_gui/gfx/di.h
+++ /dev/null
@@ -1,540 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _DI_H_
-#define _DI_H_
-
-#include "../../../common/memory_map.h"
-#include "../utils/types.h"
-
-/*! Display registers. */
-#define _DIREG(reg) ((reg) * 4)
-
-// Display controller scratch registers.
-#define DC_D_WINBUF_DD_SCRATCH_REGISTER_0 0xED
-#define DC_D_WINBUF_DD_SCRATCH_REGISTER_1 0xEE
-#define DC_T_WINBUF_TD_SCRATCH_REGISTER_0 0x16D
-#define DC_T_WINBUF_TD_SCRATCH_REGISTER_1 0x16E
-#define DC_COM_SCRATCH_REGISTER_A 0x325
-#define DC_COM_SCRATCH_REGISTER_B 0x326
-#define DC_A_WINBUF_AD_SCRATCH_REGISTER_0 0xBED
-#define DC_A_WINBUF_AD_SCRATCH_REGISTER_1 0xBEE
-#define DC_B_WINBUF_BD_SCRATCH_REGISTER_0 0xDED
-#define DC_B_WINBUF_BD_SCRATCH_REGISTER_1 0xDEE
-#define DC_C_WINBUF_CD_SCRATCH_REGISTER_0 0xFED
-#define DC_C_WINBUF_CD_SCRATCH_REGISTER_1 0xFEE
-
-// DC_CMD non-shadowed command/sync registers.
-#define DC_CMD_GENERAL_INCR_SYNCPT 0x00
-
-#define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x01
-#define SYNCPT_CNTRL_NO_STALL (1 << 8)
-#define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
-
-#define DC_CMD_CONT_SYNCPT_VSYNC 0x28
-#define SYNCPT_VSYNC_ENABLE (1 << 8)
-
-#define DC_CMD_DISPLAY_COMMAND_OPTION0 0x031
-
-#define DC_CMD_DISPLAY_COMMAND 0x32
-#define DISP_CTRL_MODE_STOP (0 << 5)
-#define DISP_CTRL_MODE_C_DISPLAY (1 << 5)
-#define DISP_CTRL_MODE_NC_DISPLAY (2 << 5)
-#define DISP_CTRL_MODE_MASK (3 << 5)
-
-#define DC_CMD_DISPLAY_POWER_CONTROL 0x36
-#define PW0_ENABLE (1 << 0)
-#define PW1_ENABLE (1 << 2)
-#define PW2_ENABLE (1 << 4)
-#define PW3_ENABLE (1 << 6)
-#define PW4_ENABLE (1 << 8)
-#define PM0_ENABLE (1 << 16)
-#define PM1_ENABLE (1 << 18)
-
-#define DC_CMD_INT_STATUS 0x37
-#define DC_CMD_INT_MASK 0x38
-#define DC_CMD_INT_ENABLE 0x39
-
-#define DC_CMD_STATE_ACCESS 0x40
-#define READ_MUX (1 << 0)
-#define WRITE_MUX (1 << 2)
-
-#define DC_CMD_STATE_CONTROL 0x41
-#define GENERAL_ACT_REQ (1 << 0)
-#define WIN_A_ACT_REQ (1 << 1)
-#define WIN_B_ACT_REQ (1 << 2)
-#define WIN_C_ACT_REQ (1 << 3)
-#define WIN_D_ACT_REQ (1 << 4)
-#define CURSOR_ACT_REQ (1 << 7)
-#define GENERAL_UPDATE (1 << 8)
-#define WIN_A_UPDATE (1 << 9)
-#define WIN_B_UPDATE (1 << 10)
-#define WIN_C_UPDATE (1 << 11)
-#define WIN_D_UPDATE (1 << 12)
-#define CURSOR_UPDATE (1 << 15)
-#define NC_HOST_TRIG (1 << 24)
-
-#define DC_CMD_DISPLAY_WINDOW_HEADER 0x42
-#define WINDOW_A_SELECT (1 << 4)
-#define WINDOW_B_SELECT (1 << 5)
-#define WINDOW_C_SELECT (1 << 6)
-#define WINDOW_D_SELECT (1 << 7)
-
-#define DC_CMD_REG_ACT_CONTROL 0x043
-
-// DC_D_WIN_DD window D instance of DC_WIN
-#define DC_D_WIN_DD_WIN_OPTIONS 0x80
-#define DC_D_WIN_DD_COLOR_DEPTH 0x83
-#define DC_D_WIN_DD_POSITION 0x84
-#define DC_D_WIN_DD_SIZE 0x85
-#define DC_D_WIN_DD_LINE_STRIDE 0x8A
-#define DC_D_WIN_DD_BLEND_LAYER_CONTROL 0x96
-#define DC_D_WIN_DD_BLEND_MATCH_SELECT 0x97
-#define DC_D_WIN_DD_BLEND_ALPHA_1BIT 0x99
-
-// DC_D_WINBUF_DD window D instance of DC_WINBUF
-#define DC_D_WINBUF_DD_START_ADDR 0xC0
-#define DC_D_WINBUF_DD_ADDR_H_OFFSET 0xC6
-#define DC_D_WINBUF_DD_ADDR_V_OFFSET 0xC8
-#define DC_D_WINBUF_DD_START_ADDR_HI 0xCD
-#define DC_D_WINBUF_DD_MEMFETCH_CONTROL 0xEB
-
-// DC_T_WIN_TD macro for using DD defines.
-#define _DC_T(reg) ((reg) + 0x80)
-
-// DC_COM non-shadowed registers.
-#define DC_COM_CRC_CONTROL 0x300
-#define DC_COM_PIN_OUTPUT_ENABLE(x) (0x302 + (x))
-#define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x))
-
-#define DC_COM_DSC_TOP_CTL 0x33E
-
-// DC_DISP shadowed registers.
-#define DC_DISP_DISP_WIN_OPTIONS 0x402
-#define HDMI_ENABLE (1 << 30)
-#define DSI_ENABLE (1 << 29)
-#define SOR1_TIMING_CYA (1 << 27)
-#define SOR1_ENABLE (1 << 26)
-#define SOR_ENABLE (1 << 25)
-#define CURSOR_ENABLE (1 << 16)
-
-#define DC_DISP_DISP_MEM_HIGH_PRIORITY 0x403
-#define DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER 0x404
-#define DC_DISP_DISP_TIMING_OPTIONS 0x405
-#define DC_DISP_REF_TO_SYNC 0x406
-#define DC_DISP_SYNC_WIDTH 0x407
-#define DC_DISP_BACK_PORCH 0x408
-#define DC_DISP_ACTIVE 0x409
-#define DC_DISP_FRONT_PORCH 0x40A
-
-#define DC_DISP_DISP_CLOCK_CONTROL 0x42E
-#define PIXEL_CLK_DIVIDER_PCD1 (0 << 8)
-#define PIXEL_CLK_DIVIDER_PCD1H (1 << 8)
-#define PIXEL_CLK_DIVIDER_PCD2 (2 << 8)
-#define PIXEL_CLK_DIVIDER_PCD3 (3 << 8)
-#define PIXEL_CLK_DIVIDER_PCD4 (4 << 8)
-#define PIXEL_CLK_DIVIDER_PCD6 (5 << 8)
-#define PIXEL_CLK_DIVIDER_PCD8 (6 << 8)
-#define PIXEL_CLK_DIVIDER_PCD9 (7 << 8)
-#define PIXEL_CLK_DIVIDER_PCD12 (8 << 8)
-#define PIXEL_CLK_DIVIDER_PCD16 (9 << 8)
-#define PIXEL_CLK_DIVIDER_PCD18 (10 << 8)
-#define PIXEL_CLK_DIVIDER_PCD24 (11 << 8)
-#define PIXEL_CLK_DIVIDER_PCD13 (12 << 8)
-#define SHIFT_CLK_DIVIDER(x) ((x) & 0xff)
-
-#define DC_DISP_DISP_INTERFACE_CONTROL 0x42F
-#define DISP_DATA_FORMAT_DF1P1C (0 << 0)
-#define DISP_DATA_FORMAT_DF1P2C24B (1 << 0)
-#define DISP_DATA_FORMAT_DF1P2C18B (2 << 0)
-#define DISP_DATA_FORMAT_DF1P2C16B (3 << 0)
-#define DISP_DATA_FORMAT_DF2S (4 << 0)
-#define DISP_DATA_FORMAT_DF3S (5 << 0)
-#define DISP_DATA_FORMAT_DFSPI (6 << 0)
-#define DISP_DATA_FORMAT_DF1P3C24B (7 << 0)
-#define DISP_DATA_FORMAT_DF1P3C18B (8 << 0)
-#define DISP_ALIGNMENT_MSB (0 << 8)
-#define DISP_ALIGNMENT_LSB (1 << 8)
-#define DISP_ORDER_RED_BLUE (0 << 9)
-#define DISP_ORDER_BLUE_RED (1 << 9)
-
-#define DC_DISP_DISP_COLOR_CONTROL 0x430
-#define DITHER_CONTROL_MASK (3 << 8)
-#define DITHER_CONTROL_DISABLE (0 << 8)
-#define DITHER_CONTROL_ORDERED (2 << 8)
-#define DITHER_CONTROL_ERRDIFF (3 << 8)
-#define BASE_COLOR_SIZE_MASK (0xf << 0)
-#define BASE_COLOR_SIZE_666 (0 << 0)
-#define BASE_COLOR_SIZE_111 (1 << 0)
-#define BASE_COLOR_SIZE_222 (2 << 0)
-#define BASE_COLOR_SIZE_333 (3 << 0)
-#define BASE_COLOR_SIZE_444 (4 << 0)
-#define BASE_COLOR_SIZE_555 (5 << 0)
-#define BASE_COLOR_SIZE_565 (6 << 0)
-#define BASE_COLOR_SIZE_332 (7 << 0)
-#define BASE_COLOR_SIZE_888 (8 << 0)
-
-#define DC_DISP_SHIFT_CLOCK_OPTIONS 0x431
-#define SC1_H_QUALIFIER_NONE (1 << 16)
-#define SC0_H_QUALIFIER_NONE (1 << 0)
-
-#define DC_DISP_DATA_ENABLE_OPTIONS 0x432
-#define DE_SELECT_ACTIVE_BLANK (0 << 0)
-#define DE_SELECT_ACTIVE (1 << 0)
-#define DE_SELECT_ACTIVE_IS (2 << 0)
-#define DE_CONTROL_ONECLK (0 << 2)
-#define DE_CONTROL_NORMAL (1 << 2)
-#define DE_CONTROL_EARLY_EXT (2 << 2)
-#define DE_CONTROL_EARLY (3 << 2)
-#define DE_CONTROL_ACTIVE_BLANK (4 << 2)
-
-// Cursor configuration registers.
-#define DC_DISP_CURSOR_FOREGROUND 0x43C
-#define DC_DISP_CURSOR_BACKGROUND 0x43D
-#define CURSOR_COLOR(r,g,b) (((r) & 0xFF) | (((g) & 0xFF) << 8) | (((b) & 0xFF) << 16))
-
-#define DC_DISP_CURSOR_START_ADDR 0x43E
-#define CURSOR_CLIPPING(w) ((w) << 28)
-#define CURSOR_CLIP_WIN_A 1
-#define CURSOR_CLIP_WIN_B 2
-#define CURSOR_CLIP_WIN_C 3
-#define CURSOR_SIZE_32 (0 << 24)
-#define CURSOR_SIZE_64 (1 << 24)
-#define CURSOR_SIZE_128 (2 << 24)
-#define CURSOR_SIZE_256 (3 << 24)
-#define DC_DISP_CURSOR_POSITION 0x440
-#define DC_DISP_CURSOR_START_ADDR_HI 0x4EC
-#define DC_DISP_BLEND_CURSOR_CONTROL 0x4F1
-#define CURSOR_BLEND_2BIT (0 << 24)
-#define CURSOR_BLEND_R8G8B8A8 (1 << 24)
-#define CURSOR_BLEND_SRC_FACTOR(n) ((n) << 8)
-#define CURSOR_BLEND_DST_FACTOR(n) ((n) << 16)
-#define CURSOR_BLEND_ZRO 0
-#define CURSOR_BLEND_K1 1
-#define CURSOR_BLEND_NK1 2
-// End of cursor cfg regs.
-
-#define DC_DISP_DC_MCCIF_FIFOCTRL 0x480
-#define DC_DISP_SD_BL_PARAMETERS 0x4D7
-#define DC_DISP_SD_BL_CONTROL 0x4DC
-#define DC_DISP_BLEND_BACKGROUND_COLOR 0x4E4
-
-#define DC_WIN_CSC_YOF 0x611
-#define DC_WIN_CSC_KYRGB 0x612
-#define DC_WIN_CSC_KUR 0x613
-#define DC_WIN_CSC_KVR 0x614
-#define DC_WIN_CSC_KUG 0x615
-#define DC_WIN_CSC_KVG 0x616
-#define DC_WIN_CSC_KUB 0x617
-#define DC_WIN_CSC_KVB 0x618
-#define DC_WIN_AD_WIN_OPTIONS 0xB80
-#define DC_WIN_BD_WIN_OPTIONS 0xD80
-#define DC_WIN_CD_WIN_OPTIONS 0xF80
-
-// The following registers are A/B/C shadows of the 0xB80/0xD80/0xF80 registers (see DISPLAY_WINDOW_HEADER).
-#define DC_WIN_WIN_OPTIONS 0x700
-#define H_DIRECTION (1 << 0)
-#define V_DIRECTION (1 << 2)
-#define SCAN_COLUMN (1 << 4)
-#define COLOR_EXPAND (1 << 6)
-#define CSC_ENABLE (1 << 18)
-#define WIN_ENABLE (1 << 30)
-
-#define DC_WIN_BUFFER_CONTROL 0x702
-#define BUFFER_CONTROL_HOST 0
-#define BUFFER_CONTROL_VI 1
-#define BUFFER_CONTROL_EPP 2
-#define BUFFER_CONTROL_MPEGE 3
-#define BUFFER_CONTROL_SB2D 4
-
-#define DC_WIN_COLOR_DEPTH 0x703
-#define WIN_COLOR_DEPTH_P1 0x0
-#define WIN_COLOR_DEPTH_P2 0x1
-#define WIN_COLOR_DEPTH_P4 0x2
-#define WIN_COLOR_DEPTH_P8 0x3
-#define WIN_COLOR_DEPTH_B4G4R4A4 0x4
-#define WIN_COLOR_DEPTH_B5G5R5A 0x5
-#define WIN_COLOR_DEPTH_B5G6R5 0x6
-#define WIN_COLOR_DEPTH_AB5G5R5 0x7
-#define WIN_COLOR_DEPTH_B8G8R8A8 0xC
-#define WIN_COLOR_DEPTH_R8G8B8A8 0xD
-#define WIN_COLOR_DEPTH_B6x2G6x2R6x2A8 0xE
-#define WIN_COLOR_DEPTH_R6x2G6x2B6x2A8 0xF
-#define WIN_COLOR_DEPTH_YCbCr422 0x10
-#define WIN_COLOR_DEPTH_YUV422 0x11
-#define WIN_COLOR_DEPTH_YCbCr420P 0x12
-#define WIN_COLOR_DEPTH_YUV420P 0x13
-#define WIN_COLOR_DEPTH_YCbCr422P 0x14
-#define WIN_COLOR_DEPTH_YUV422P 0x15
-#define WIN_COLOR_DEPTH_YCbCr422R 0x16
-#define WIN_COLOR_DEPTH_YUV422R 0x17
-#define WIN_COLOR_DEPTH_YCbCr422RA 0x18
-#define WIN_COLOR_DEPTH_YUV422RA 0x19
-
-#define DC_WIN_POSITION 0x704
-#define H_POSITION(x) (((x) & 0xFfff) << 0)
-#define V_POSITION(x) (((x) & 0x1fff) << 16)
-
-#define DC_WIN_SIZE 0x705
-#define H_SIZE(x) (((x) & 0x1fff) << 0)
-#define V_SIZE(x) (((x) & 0x1fff) << 16)
-
-#define DC_WIN_PRESCALED_SIZE 0x706
-#define H_PRESCALED_SIZE(x) (((x) & 0x7fff) << 0)
-#define V_PRESCALED_SIZE(x) (((x) & 0x1fff) << 16)
-
-#define DC_WIN_H_INITIAL_DDA 0x707
-#define DC_WIN_V_INITIAL_DDA 0x708
-
-#define DC_WIN_DDA_INC 0x709
-#define H_DDA_INC(x) (((x) & 0xffff) << 0)
-#define V_DDA_INC(x) (((x) & 0xffff) << 16)
-
-#define DC_WIN_LINE_STRIDE 0x70A
-#define LINE_STRIDE(x) (x)
-#define UV_LINE_STRIDE(x) (((x) & 0xffff) << 16)
-#define DC_WIN_DV_CONTROL 0x70E
-
-#define DC_WINBUF_BLEND_LAYER_CONTROL 0x716
-#define WIN_K1(x) (((x) & 0xff) << 8)
-#define WIN_K2(x) (((x) & 0xff) << 16)
-#define WIN_BLEND_ENABLE (0 << 24)
-#define WIN_BLEND_BYPASS (1 << 24)
-
-#define DC_WINBUF_BLEND_MATCH_SELECT 0x717
-#define WIN_BLEND_FACT_SRC_COLOR_MATCH_SEL_ZERO (0 << 0)
-#define WIN_BLEND_FACT_SRC_COLOR_MATCH_SEL_ONE (1 << 0)
-#define WIN_BLEND_FACT_SRC_COLOR_MATCH_SEL_K1 (2 << 0)
-#define WIN_BLEND_FACT_SRC_COLOR_MATCH_SEL_K1_TIMES_DST (3 << 0)
-#define WIN_BLEND_FACT_SRC_COLOR_MATCH_SEL_NEG_K1_TIMES_DST (4 << 0)
-#define WIN_BLEND_FACT_SRC_COLOR_MATCH_SEL_K1_TIMES_SRC (5 << 0)
-
-#define WIN_BLEND_FACT_DST_COLOR_MATCH_SEL_ZERO (0 << 4)
-#define WIN_BLEND_FACT_DST_COLOR_MATCH_SEL_ONE (1 << 4)
-#define WIN_BLEND_FACT_DST_COLOR_MATCH_SEL_K1 (2 << 4)
-#define WIN_BLEND_FACT_DST_COLOR_MATCH_SEL_K2 (3 << 4)
-#define WIN_BLEND_FACT_DST_COLOR_MATCH_SEL_K1_TIMES_DST (4 << 4)
-#define WIN_BLEND_FACT_DST_COLOR_MATCH_SEL_NEG_K1_TIMES_DST (5 << 4)
-#define WIN_BLEND_FACT_DST_COLOR_MATCH_SEL_NEG_K1_TIMES_SRC (6 << 4)
-#define WIN_BLEND_FACT_DST_COLOR_MATCH_SEL_NEG_K1 (7 << 4)
-
-#define WIN_BLEND_FACT_SRC_ALPHA_MATCH_SEL_ZERO (0 << 8)
-#define WIN_BLEND_FACT_SRC_ALPHA_MATCH_SEL_K1 (1 << 8)
-#define WIN_BLEND_FACT_SRC_ALPHA_MATCH_SEL_K2 (2 << 8)
-
-#define WIN_BLEND_FACT_DST_ALPHA_MATCH_SEL_ZERO (0 << 12)
-#define WIN_BLEND_FACT_DST_ALPHA_MATCH_SEL_ONE (1 << 12)
-#define WIN_BLEND_FACT_DST_ALPHA_MATCH_SEL_NEG_K1_TIMES_SRC (2 << 12)
-#define WIN_BLEND_FACT_DST_ALPHA_MATCH_SEL_K2 (3 << 12)
-
-#define DC_WINBUF_BLEND_ALPHA_1BIT 0x719
-#define WIN_ALPHA_1BIT_WEIGHT0(x) (((x) & 0xff) << 0)
-#define WIN_ALPHA_1BIT_WEIGHT1(x) (((x) & 0xff) << 8)
-
-/*! The following registers are A/B/C shadows of the 0xBC0/0xDC0/0xFC0 registers (see DISPLAY_WINDOW_HEADER). */
-#define DC_WINBUF_START_ADDR 0x800
-#define DC_WINBUF_ADDR_H_OFFSET 0x806
-#define DC_WINBUF_ADDR_V_OFFSET 0x808
-#define DC_WINBUF_SURFACE_KIND 0x80B
-#define PITCH (0 << 0)
-#define TILED (1 << 0)
-#define BLOCK (2 << 0)
-#define BLOCK_HEIGHT(x) (((x) & 0x7) << 4)
-
-/*! Display serial interface registers. */
-#define _DSIREG(reg) ((reg) * 4)
-
-#define DSI_RD_DATA 0x9
-#define DSI_WR_DATA 0xA
-
-#define DSI_POWER_CONTROL 0xB
-#define DSI_POWER_CONTROL_ENABLE 1
-
-#define DSI_INT_ENABLE 0xC
-#define DSI_INT_STATUS 0xD
-#define DSI_INT_MASK 0xE
-
-#define DSI_HOST_CONTROL 0xF
-#define DSI_HOST_CONTROL_FIFO_RESET (1 << 21)
-#define DSI_HOST_CONTROL_CRC_RESET (1 << 20)
-#define DSI_HOST_CONTROL_TX_TRIG_SOL (0 << 12)
-#define DSI_HOST_CONTROL_TX_TRIG_FIFO (1 << 12)
-#define DSI_HOST_CONTROL_TX_TRIG_HOST (2 << 12)
-#define DSI_HOST_CONTROL_RAW (1 << 6)
-#define DSI_HOST_CONTROL_HS (1 << 5)
-#define DSI_HOST_CONTROL_FIFO_SEL (1 << 4)
-#define DSI_HOST_CONTROL_IMM_BTA (1 << 3)
-#define DSI_HOST_CONTROL_PKT_BTA (1 << 2)
-#define DSI_HOST_CONTROL_CS (1 << 1)
-#define DSI_HOST_CONTROL_ECC (1 << 0)
-
-#define DSI_CONTROL 0x10
-#define DSI_CONTROL_HS_CLK_CTRL (1 << 20)
-#define DSI_CONTROL_CHANNEL(c) (((c) & 0x3) << 16)
-#define DSI_CONTROL_FORMAT(f) (((f) & 0x3) << 12)
-#define DSI_CONTROL_TX_TRIG(x) (((x) & 0x3) << 8)
-#define DSI_CONTROL_LANES(n) (((n) & 0x3) << 4)
-#define DSI_CONTROL_DCS_ENABLE (1 << 3)
-#define DSI_CONTROL_SOURCE(s) (((s) & 0x1) << 2)
-#define DSI_CONTROL_VIDEO_ENABLE (1 << 1)
-#define DSI_CONTROL_HOST_ENABLE (1 << 0)
-
-#define DSI_SOL_DELAY 0x11
-#define DSI_MAX_THRESHOLD 0x12
-
-#define DSI_TRIGGER 0x13
-#define DSI_TRIGGER_HOST (1 << 1)
-#define DSI_TRIGGER_VIDEO (1 << 0)
-
-#define DSI_TX_CRC 0x14
-#define DSI_STATUS 0x15
-#define DSI_INIT_SEQ_CONTROL 0x1A
-#define DSI_INIT_SEQ_DATA_0 0x1B
-#define DSI_INIT_SEQ_DATA_1 0x1C
-#define DSI_INIT_SEQ_DATA_2 0x1D
-#define DSI_INIT_SEQ_DATA_3 0x1E
-#define DSI_PKT_SEQ_0_LO 0x23
-#define DSI_PKT_SEQ_0_HI 0x24
-#define DSI_PKT_SEQ_1_LO 0x25
-#define DSI_PKT_SEQ_1_HI 0x26
-#define DSI_PKT_SEQ_2_LO 0x27
-#define DSI_PKT_SEQ_2_HI 0x28
-#define DSI_PKT_SEQ_3_LO 0x29
-#define DSI_PKT_SEQ_3_HI 0x2A
-#define DSI_PKT_SEQ_4_LO 0x2B
-#define DSI_PKT_SEQ_4_HI 0x2C
-#define DSI_PKT_SEQ_5_LO 0x2D
-#define DSI_PKT_SEQ_5_HI 0x2E
-#define DSI_DCS_CMDS 0x33
-#define DSI_PKT_LEN_0_1 0x34
-#define DSI_PKT_LEN_2_3 0x35
-#define DSI_PKT_LEN_4_5 0x36
-#define DSI_PKT_LEN_6_7 0x37
-#define DSI_PHY_TIMING_0 0x3C
-#define DSI_PHY_TIMING_1 0x3D
-#define DSI_PHY_TIMING_2 0x3E
-#define DSI_BTA_TIMING 0x3F
-
-#define DSI_TIMEOUT_0 0x44
-#define DSI_TIMEOUT_LRX(x) (((x) & 0xffff) << 16)
-#define DSI_TIMEOUT_HTX(x) (((x) & 0xffff) << 0)
-
-#define DSI_TIMEOUT_1 0x45
-#define DSI_TIMEOUT_PR(x) (((x) & 0xffff) << 16)
-#define DSI_TIMEOUT_TA(x) (((x) & 0xffff) << 0)
-
-#define DSI_TO_TALLY 0x46
-
-#define DSI_PAD_CONTROL_0 0x4B
-#define DSI_PAD_CONTROL_VS1_PULLDN_CLK (1 << 24)
-#define DSI_PAD_CONTROL_VS1_PULLDN(x) (((x) & 0xf) << 16)
-#define DSI_PAD_CONTROL_VS1_PDIO_CLK (1 << 8)
-#define DSI_PAD_CONTROL_VS1_PDIO(x) (((x) & 0xf) << 0)
-
-#define DSI_PAD_CONTROL_CD 0x4C
-#define DSI_VIDEO_MODE_CONTROL 0x4E
-#define DSI_CMD_PKT_VID_ENABLE 1
-
-#define DSI_PAD_CONTROL_1 0x4F
-#define DSI_PAD_CONTROL_2 0x50
-
-#define DSI_PAD_CONTROL_3 0x51
-#define DSI_PAD_PREEMP_PD_CLK(x) (((x) & 0x3) << 12)
-#define DSI_PAD_PREEMP_PU_CLK(x) (((x) & 0x3) << 8)
-#define DSI_PAD_PREEMP_PD(x) (((x) & 0x3) << 4)
-#define DSI_PAD_PREEMP_PU(x) (((x) & 0x3) << 0)
-
-#define DSI_PAD_CONTROL_4 0x52
-#define DSI_INIT_SEQ_DATA_15 0x5F
-
-/*! MIPI registers. */
-#define MIPI_CAL_MIPI_CAL_CTRL (0x00 / 0x4)
-#define MIPI_CAL_CIL_MIPI_CAL_STATUS (0x08 / 0x4)
-#define MIPI_CAL_CILA_MIPI_CAL_CONFIG (0x14 / 0x4)
-#define MIPI_CAL_CILB_MIPI_CAL_CONFIG (0x18 / 0x4)
-#define MIPI_CAL_CILC_MIPI_CAL_CONFIG (0x1C / 0x4)
-#define MIPI_CAL_CILD_MIPI_CAL_CONFIG (0x20 / 0x4)
-#define MIPI_CAL_CILE_MIPI_CAL_CONFIG (0x24 / 0x4)
-#define MIPI_CAL_CILF_MIPI_CAL_CONFIG (0x28 / 0x4)
-#define MIPI_CAL_DSIA_MIPI_CAL_CONFIG (0x38 / 0x4)
-#define MIPI_CAL_DSIB_MIPI_CAL_CONFIG (0x3C / 0x4)
-#define MIPI_CAL_DSIC_MIPI_CAL_CONFIG (0x40 / 0x4)
-#define MIPI_CAL_DSID_MIPI_CAL_CONFIG (0x44 / 0x4)
-#define MIPI_CAL_MIPI_BIAS_PAD_CFG0 (0x58 / 0x4)
-#define MIPI_CAL_MIPI_BIAS_PAD_CFG1 (0x5C / 0x4)
-#define MIPI_CAL_MIPI_BIAS_PAD_CFG2 (0x60 / 0x4)
-#define MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2 (0x64 / 0x4)
-#define MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2 (0x68 / 0x4)
-#define MIPI_CAL_DSIC_MIPI_CAL_CONFIG_2 (0x70 / 0x4)
-#define MIPI_CAL_DSID_MIPI_CAL_CONFIG_2 (0x74 / 0x4)
-
-/*! MIPI CMDs. */
-#define MIPI_DSI_DCS_SHORT_WRITE 0x05
-#define MIPI_DSI_DCS_READ 0x06
-#define MIPI_DSI_DCS_SHORT_WRITE_PARAM 0x15
-#define MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE 0x37
-#define MIPI_DSI_DCS_LONG_WRITE 0x39
-
-/*! MIPI DCS CMDs. */
-#define MIPI_DCS_GET_DISPLAY_ID 0x04
-#define MIPI_DCS_ENTER_SLEEP_MODE 0x10
-#define MIPI_DCS_EXIT_SLEEP_MODE 0x11
-#define MIPI_DCS_SET_DISPLAY_ON 0x29
-
-/* Switch Panels:
- * [10] 81 [26]: JDI LPM062M326A
- * [10] 96 [09]: JDI LAM062M109A
- * [20] 93 [0F]: InnoLux P062CCA-AZ1 (Rev A1)
- * [20] XX [10]: InnoLux P062CCA-AZ2 [UNCONFIRMED ID]
- * [30] 94 [0F]: AUO A062TAN01 (59.06A33.001)
- * [30] XX [10]: AUO A062TAN02 (59.06A33.002) [UNCONFIRMED ID]
- */
-
-enum
-{
- PANEL_JDI_XXX062M = 0x10,
- PANEL_JDI_LAM062M109A = 0x0910,
- PANEL_JDI_LPM062M326A = 0x2610,
- PANEL_INL_P062CCA_AZ1 = 0x0F20,
- PANEL_AUO_A062TAN01 = 0x0F30,
- PANEL_INL_P062CCA_AZ2 = 0x1020,
- PANEL_AUO_A062TAN02 = 0x1030
-};
-
-void display_init();
-void display_backlight_pwm_init();
-void display_end();
-
-/*! Show one single color on the display. */
-void display_color_screen(u32 color);
-
-/*! Switches screen backlight ON/OFF. */
-void display_backlight(bool enable);
-void display_backlight_brightness(u32 brightness, u32 step_delay);
-
-/*! Init display in full 1280x720 resolution (B8G8R8A8, line stride 768, framebuffer size = 1280*768*4 bytes). */
-u32 *display_init_framebuffer_pitch();
-u32 *display_init_framebuffer_pitch_inv();
-u32 *display_init_framebuffer_block();
-u32 *display_init_framebuffer_log();
-void display_activate_console();
-void display_deactivate_console();
-void display_init_cursor(void *crs_fb, u32 size);
-void display_set_pos_cursor(u32 x, u32 y);
-void display_deinit_cursor();
-
-#endif
diff --git a/nyx/nyx_gui/gfx/di.inl b/nyx/nyx_gui/gfx/di.inl
deleted file mode 100644
index ef3b1b0..0000000
--- a/nyx/nyx_gui/gfx/di.inl
+++ /dev/null
@@ -1,696 +0,0 @@
-/*
-* Copyright (c) 2018 naehrwert
-* Copyright (c) 2018-2019 CTCaer
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms and conditions of the GNU General Public License,
-* version 2, as published by the Free Software Foundation.
-*
-* This program is distributed in the hope it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see .
-*/
-
-//Display A config.
-static const cfg_op_t _display_dc_setup_win_config[94] = {
- {DC_CMD_STATE_ACCESS, 0},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
- {DC_CMD_REG_ACT_CONTROL, 0x54},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_DISP_DC_MCCIF_FIFOCTRL, 0},
- {DC_DISP_DISP_MEM_HIGH_PRIORITY, 0},
- {DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER, 0},
- {DC_CMD_DISPLAY_POWER_CONTROL, PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | PW4_ENABLE | PM0_ENABLE | PM1_ENABLE},
- {DC_CMD_GENERAL_INCR_SYNCPT_CNTRL, SYNCPT_CNTRL_NO_STALL},
- {DC_CMD_CONT_SYNCPT_VSYNC, SYNCPT_VSYNC_ENABLE | 0x9}, // 9: SYNCPT
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ},
- {DC_CMD_STATE_ACCESS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_DV_CONTROL, 0},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- /* Setup default YUV colorspace conversion coefficients */
- {DC_WIN_CSC_YOF, 0xF0},
- {DC_WIN_CSC_KYRGB, 0x12A},
- {DC_WIN_CSC_KUR, 0},
- {DC_WIN_CSC_KVR, 0x198},
- {DC_WIN_CSC_KUG, 0x39B},
- {DC_WIN_CSC_KVG, 0x32F},
- {DC_WIN_CSC_KUB, 0x204},
- {DC_WIN_CSC_KVB, 0},
- /* End of color coefficients */
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_DV_CONTROL, 0},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- /* Setup default YUV colorspace conversion coefficients */
- {DC_WIN_CSC_YOF, 0xF0},
- {DC_WIN_CSC_KYRGB, 0x12A},
- {DC_WIN_CSC_KUR, 0},
- {DC_WIN_CSC_KVR, 0x198},
- {DC_WIN_CSC_KUG, 0x39B},
- {DC_WIN_CSC_KVG, 0x32F},
- {DC_WIN_CSC_KUB, 0x204},
- {DC_WIN_CSC_KVB, 0},
- /* End of color coefficients */
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_DV_CONTROL, 0},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- /* Setup default YUV colorspace conversion coefficients */
- {DC_WIN_CSC_YOF, 0xF0},
- {DC_WIN_CSC_KYRGB, 0x12A},
- {DC_WIN_CSC_KUR, 0},
- {DC_WIN_CSC_KVR, 0x198},
- {DC_WIN_CSC_KUG, 0x39B},
- {DC_WIN_CSC_KVG, 0x32F},
- {DC_WIN_CSC_KUB, 0x204},
- {DC_WIN_CSC_KVB, 0},
- /* End of color coefficients */
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888},
- {DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C},
- {DC_COM_PIN_OUTPUT_POLARITY(1), 0x1000000},
- {DC_COM_PIN_OUTPUT_POLARITY(3), 0},
- {0x4E4, 0},
- {DC_COM_CRC_CONTROL, 0},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {0x716, 0x10000FF},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {0x716, 0x10000FF},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {0x716, 0x10000FF},
- {DC_CMD_DISPLAY_COMMAND_OPTION0, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_STOP},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}
-};
-
-//DSI Init config.
-static const cfg_op_t _display_dsi_init_config[61] = {
- {DSI_WR_DATA, 0},
- {DSI_INT_ENABLE, 0},
- {DSI_INT_STATUS, 0},
- {DSI_INT_MASK, 0},
- {DSI_INIT_SEQ_DATA_0, 0},
- {DSI_INIT_SEQ_DATA_1, 0},
- {DSI_INIT_SEQ_DATA_2, 0},
- {DSI_INIT_SEQ_DATA_3, 0},
- {DSI_INIT_SEQ_DATA_15, 0},
- {DSI_DCS_CMDS, 0},
- {DSI_PKT_SEQ_0_LO, 0},
- {DSI_PKT_SEQ_1_LO, 0},
- {DSI_PKT_SEQ_2_LO, 0},
- {DSI_PKT_SEQ_3_LO, 0},
- {DSI_PKT_SEQ_4_LO, 0},
- {DSI_PKT_SEQ_5_LO, 0},
- {DSI_PKT_SEQ_0_HI, 0},
- {DSI_PKT_SEQ_1_HI, 0},
- {DSI_PKT_SEQ_2_HI, 0},
- {DSI_PKT_SEQ_3_HI, 0},
- {DSI_PKT_SEQ_4_HI, 0},
- {DSI_PKT_SEQ_5_HI, 0},
- {DSI_CONTROL, 0},
- {DSI_PAD_CONTROL_CD, 0},
- {DSI_SOL_DELAY, 0x18},
- {DSI_MAX_THRESHOLD, 0x1E0},
- {DSI_TRIGGER, 0},
- {DSI_INIT_SEQ_CONTROL, 0},
- {DSI_PKT_LEN_0_1, 0},
- {DSI_PKT_LEN_2_3, 0},
- {DSI_PKT_LEN_4_5, 0},
- {DSI_PKT_LEN_6_7, 0},
- {DSI_PAD_CONTROL_1, 0},
- {DSI_PHY_TIMING_0, 0x6070601},
- {DSI_PHY_TIMING_1, 0x40A0E05},
- {DSI_PHY_TIMING_2, 0x30109},
- {DSI_BTA_TIMING, 0x190A14},
- {DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)},
- {DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x765) | DSI_TIMEOUT_TA(0x2000)},
- {DSI_TO_TALLY, 0},
- {DSI_PAD_CONTROL_0, DSI_PAD_CONTROL_VS1_PULLDN(0) | DSI_PAD_CONTROL_VS1_PDIO(0)}, // Enable
- {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
- {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
- {DSI_POWER_CONTROL, 0},
- {DSI_POWER_CONTROL, 0},
- {DSI_PAD_CONTROL_1, 0},
- {DSI_PHY_TIMING_0, 0x6070601},
- {DSI_PHY_TIMING_1, 0x40A0E05},
- {DSI_PHY_TIMING_2, 0x30118},
- {DSI_BTA_TIMING, 0x190A14},
- {DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)},
- {DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x1343) | DSI_TIMEOUT_TA(0x2000)},
- {DSI_TO_TALLY, 0},
- {DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC},
- {DSI_CONTROL, DSI_CONTROL_LANES(3) | DSI_CONTROL_HOST_ENABLE},
- {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
- {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
- {DSI_MAX_THRESHOLD, 0x40},
- {DSI_TRIGGER, 0},
- {DSI_TX_CRC, 0},
- {DSI_INIT_SEQ_CONTROL, 0}
-};
-
-//DSI panel config.
-static const cfg_op_t _display_init_config_jdi[43] = {
- {DSI_WR_DATA, 0x439}, // MIPI_DSI_DCS_LONG_WRITE: 4 bytes.
- {DSI_WR_DATA, 0x9483FFB9}, // Enable extension cmd. (Pass: FF 83 94).
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x00BD15}, // MIPI_DSI_DCS_SHORT_WRITE_PARAM: 0x0BD.
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x1939}, // MIPI_DSI_DCS_LONG_WRITE: 25 bytes.
- {DSI_WR_DATA, 0xAAAAAAD8},
- {DSI_WR_DATA, 0xAAAAAAEB},
- {DSI_WR_DATA, 0xAAEBAAAA},
- {DSI_WR_DATA, 0xAAAAAAAA},
- {DSI_WR_DATA, 0xAAAAAAEB},
- {DSI_WR_DATA, 0xAAEBAAAA},
- {DSI_WR_DATA, 0xAA},
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x01BD15}, // MIPI_DSI_DCS_SHORT_WRITE_PARAM: 0x1BD.
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x2739}, // MIPI_DSI_DCS_LONG_WRITE: 39 bytes.
- {DSI_WR_DATA, 0xFFFFFFD8},
- {DSI_WR_DATA, 0xFFFFFFFF},
- {DSI_WR_DATA, 0xFFFFFFFF},
- {DSI_WR_DATA, 0xFFFFFFFF},
- {DSI_WR_DATA, 0xFFFFFFFF},
- {DSI_WR_DATA, 0xFFFFFFFF},
- {DSI_WR_DATA, 0xFFFFFFFF},
- {DSI_WR_DATA, 0xFFFFFFFF},
- {DSI_WR_DATA, 0xFFFFFFFF},
- {DSI_WR_DATA, 0xFFFFFF},
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x02BD15}, // MIPI_DSI_DCS_SHORT_WRITE_PARAM: 0x2BD.
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0xF39}, // MIPI_DSI_DCS_LONG_WRITE: 15 bytes.
- {DSI_WR_DATA, 0xFFFFFFD8},
- {DSI_WR_DATA, 0xFFFFFFFF},
- {DSI_WR_DATA, 0xFFFFFFFF},
- {DSI_WR_DATA, 0xFFFFFF},
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x00BD15}, // MIPI_DSI_DCS_SHORT_WRITE_PARAM: 0x0BD.
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x06D915}, // MIPI_DSI_DCS_SHORT_WRITE_PARAM: 0x6D9.
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x439}, // MIPI_DSI_DCS_LONG_WRITE: 4 bytes.
- {DSI_WR_DATA, 0x000000B9}, // Disable extension cmd.
- {DSI_TRIGGER, DSI_TRIGGER_HOST}
-};
-
-//DSI packet config.
-static const cfg_op_t _display_dsi_packet_config[21] = {
- {DSI_PAD_CONTROL_1, 0},
- {DSI_PHY_TIMING_0, 0x6070601},
- {DSI_PHY_TIMING_1, 0x40A0E05},
- {DSI_PHY_TIMING_2, 0x30172},
- {DSI_BTA_TIMING, 0x190A14},
- {DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xA40)},
- {DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x5A2F) | DSI_TIMEOUT_TA(0x2000)},
- {DSI_TO_TALLY, 0},
- {DSI_PKT_SEQ_0_LO, 0x40000208},
- {DSI_PKT_SEQ_2_LO, 0x40000308},
- {DSI_PKT_SEQ_4_LO, 0x40000308},
- {DSI_PKT_SEQ_1_LO, 0x40000308},
- {DSI_PKT_SEQ_3_LO, 0x3F3B2B08},
- {DSI_PKT_SEQ_3_HI, 0x2CC},
- {DSI_PKT_SEQ_5_LO, 0x3F3B2B08},
- {DSI_PKT_SEQ_5_HI, 0x2CC},
- {DSI_PKT_LEN_0_1, 0xCE0000},
- {DSI_PKT_LEN_2_3, 0x87001A2},
- {DSI_PKT_LEN_4_5, 0x190},
- {DSI_PKT_LEN_6_7, 0x190},
- {DSI_HOST_CONTROL, 0},
-};
-
-//DSI mode config.
-static const cfg_op_t _display_dsi_mode_config[10] = {
- {DSI_TRIGGER, 0},
- {DSI_CONTROL, 0},
- {DSI_SOL_DELAY, 6},
- {DSI_MAX_THRESHOLD, 0x1E0},
- {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
- {DSI_CONTROL, DSI_CONTROL_HS_CLK_CTRL | DSI_CONTROL_FORMAT(3) | DSI_CONTROL_LANES(3) | DSI_CONTROL_VIDEO_ENABLE},
- {DSI_HOST_CONTROL, DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_FIFO_SEL| DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC},
- {DSI_CONTROL, DSI_CONTROL_HS_CLK_CTRL | DSI_CONTROL_FORMAT(3) | DSI_CONTROL_LANES(3) | DSI_CONTROL_VIDEO_ENABLE},
- {DSI_HOST_CONTROL, DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC},
- {DSI_HOST_CONTROL, DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}
-};
-
-//MIPI CAL config.
-static const cfg_op_t _display_mipi_pad_cal_config[6] = {
- {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0},
- {MIPI_CAL_CIL_MIPI_CAL_STATUS, 0xF3F10000},
- {MIPI_CAL_MIPI_BIAS_PAD_CFG0, 0},
- {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0},
- {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0x10010},
- {MIPI_CAL_MIPI_BIAS_PAD_CFG1, 0x300}
-};
-
-//DSI config.
-static const cfg_op_t _display_dsi_pad_cal_config[4] = {
- {DSI_PAD_CONTROL_1, 0},
- {DSI_PAD_CONTROL_2, 0},
- {DSI_PAD_CONTROL_3, DSI_PAD_PREEMP_PD_CLK(0x3) | DSI_PAD_PREEMP_PU_CLK(0x3) | DSI_PAD_PREEMP_PD(0x03) | DSI_PAD_PREEMP_PU(0x3)},
- {DSI_PAD_CONTROL_4, 0}
-};
-
-//MIPI CAL config.
-static const cfg_op_t _display_mipi_apply_dsi_cal_config[16] = {
- {MIPI_CAL_DSIA_MIPI_CAL_CONFIG, 0x200200},
- {MIPI_CAL_DSIB_MIPI_CAL_CONFIG, 0x200200},
- {MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2, 0x200002},
- {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0x200002},
- {MIPI_CAL_CILA_MIPI_CAL_CONFIG, 0},
- {MIPI_CAL_CILB_MIPI_CAL_CONFIG, 0},
- {MIPI_CAL_CILC_MIPI_CAL_CONFIG, 0},
- {MIPI_CAL_CILD_MIPI_CAL_CONFIG, 0},
- {MIPI_CAL_CILE_MIPI_CAL_CONFIG, 0},
- {MIPI_CAL_CILF_MIPI_CAL_CONFIG, 0},
- {MIPI_CAL_DSIC_MIPI_CAL_CONFIG, 0},
- {MIPI_CAL_DSID_MIPI_CAL_CONFIG, 0},
- {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0},
- {MIPI_CAL_DSIC_MIPI_CAL_CONFIG_2, 0},
- {MIPI_CAL_DSID_MIPI_CAL_CONFIG_2, 0},
- {MIPI_CAL_MIPI_CAL_CTRL, 0x2A000001}
-};
-
-//Display A config.
-static const cfg_op_t _display_video_disp_controller_enable_config[113] = {
- {DC_CMD_STATE_ACCESS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_DV_CONTROL, 0},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- /* Setup default YUV colorspace conversion coefficients */
- {DC_WIN_CSC_YOF, 0xF0},
- {DC_WIN_CSC_KYRGB, 0x12A},
- {DC_WIN_CSC_KUR, 0},
- {DC_WIN_CSC_KVR, 0x198},
- {DC_WIN_CSC_KUG, 0x39B},
- {DC_WIN_CSC_KVG, 0x32F},
- {DC_WIN_CSC_KUB, 0x204},
- {DC_WIN_CSC_KVB, 0},
- /* End of color coefficients */
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_DV_CONTROL, 0},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- /* Setup default YUV colorspace conversion coefficients */
- {DC_WIN_CSC_YOF, 0xF0},
- {DC_WIN_CSC_KYRGB, 0x12A},
- {DC_WIN_CSC_KUR, 0},
- {DC_WIN_CSC_KVR, 0x198},
- {DC_WIN_CSC_KUG, 0x39B},
- {DC_WIN_CSC_KVG, 0x32F},
- {DC_WIN_CSC_KUB, 0x204},
- {DC_WIN_CSC_KVB, 0},
- /* End of color coefficients */
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_DV_CONTROL, 0},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- /* Setup default YUV colorspace conversion coefficients */
- {DC_WIN_CSC_YOF, 0xF0},
- {DC_WIN_CSC_KYRGB, 0x12A},
- {DC_WIN_CSC_KUR, 0},
- {DC_WIN_CSC_KVR, 0x198},
- {DC_WIN_CSC_KUG, 0x39B},
- {DC_WIN_CSC_KVG, 0x32F},
- {DC_WIN_CSC_KUB, 0x204},
- {DC_WIN_CSC_KVB, 0},
- /* End of color coefficients */
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888},
- {DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C},
- {DC_COM_PIN_OUTPUT_POLARITY(1), 0x1000000},
- {DC_COM_PIN_OUTPUT_POLARITY(3), 0},
- {0x4E4, 0},
- {DC_COM_CRC_CONTROL, 0},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {0x716, 0x10000FF},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {0x716, 0x10000FF},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {0x716, 0x10000FF},
- {DC_CMD_DISPLAY_COMMAND_OPTION0, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_STOP},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ},
- {DC_CMD_STATE_ACCESS, 0},
- /* Set Display timings */
- {DC_DISP_DISP_TIMING_OPTIONS, 0},
- {DC_DISP_REF_TO_SYNC, (1 << 16)}, // h_ref_to_sync = 0, v_ref_to_sync = 1.
- {DC_DISP_SYNC_WIDTH, 0x10048},
- {DC_DISP_BACK_PORCH, 0x90048},
- {DC_DISP_ACTIVE, 0x50002D0},
- {DC_DISP_FRONT_PORCH, 0xA0088}, // Sources say that this should be above the DC_DISP_ACTIVE cmd.
- /* End of Display timings */
- {DC_DISP_SHIFT_CLOCK_OPTIONS, SC1_H_QUALIFIER_NONE | SC0_H_QUALIFIER_NONE},
- {DC_COM_PIN_OUTPUT_ENABLE(1), 0},
- {DC_DISP_DATA_ENABLE_OPTIONS, DE_SELECT_ACTIVE | DE_CONTROL_NORMAL},
- {DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C},
- {DC_DISP_DISP_CLOCK_CONTROL, 0},
- {DC_CMD_DISPLAY_COMMAND_OPTION0, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
- {DC_CMD_STATE_ACCESS, READ_MUX | WRITE_MUX},
- {DC_DISP_FRONT_PORCH, 0xA0088},
- {DC_CMD_STATE_ACCESS, 0},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
- {DC_CMD_GENERAL_INCR_SYNCPT, 0x301},
- {DC_CMD_GENERAL_INCR_SYNCPT, 0x301},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
- {DC_CMD_STATE_ACCESS, 0},
- {DC_DISP_DISP_CLOCK_CONTROL, PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(4)},
- {DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888},
- {DC_CMD_DISPLAY_COMMAND_OPTION0, 0}
-};
-
-////Display A config.
-static const cfg_op_t _display_video_disp_controller_disable_config[17] = {
- {DC_DISP_FRONT_PORCH, 0xA0088},
- {DC_CMD_INT_MASK, 0},
- {DC_CMD_STATE_ACCESS, 0},
- {DC_CMD_INT_ENABLE, 0},
- {DC_CMD_CONT_SYNCPT_VSYNC, 0},
- {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_STOP},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
- {DC_CMD_GENERAL_INCR_SYNCPT, 0x301},
- {DC_CMD_GENERAL_INCR_SYNCPT, 0x301},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
- {DC_CMD_DISPLAY_POWER_CONTROL, 0},
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ},
-};
-
-//DSI config.
-static const cfg_op_t _display_dsi_timing_deinit_config[16] = {
- {DSI_POWER_CONTROL, 0},
- {DSI_PAD_CONTROL_1, 0},
- {DSI_PHY_TIMING_0, 0x6070601},
- {DSI_PHY_TIMING_1, 0x40A0E05},
- {DSI_PHY_TIMING_2, 0x30118},
- {DSI_BTA_TIMING, 0x190A14},
- {DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF) },
- {DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x1343) | DSI_TIMEOUT_TA(0x2000)},
- {DSI_TO_TALLY, 0},
- {DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC},
- {DSI_CONTROL, DSI_CONTROL_LANES(3) | DSI_CONTROL_HOST_ENABLE},
- {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE},
- {DSI_MAX_THRESHOLD, 0x40},
- {DSI_TRIGGER, 0},
- {DSI_TX_CRC, 0},
- {DSI_INIT_SEQ_CONTROL, 0}
-};
-
-//DSI config (if ver == 0x10).
-static const cfg_op_t _display_deinit_config_jdi[22] = {
- {DSI_WR_DATA, 0x439}, // MIPI_DSI_DCS_LONG_WRITE: 4 bytes.
- {DSI_WR_DATA, 0x9483FFB9}, // Enable extension cmd. (Pass: FF 83 94).
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x2139}, // MIPI_DSI_DCS_LONG_WRITE: 33 bytes.
- {DSI_WR_DATA, 0x191919D5},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19},
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0xB39}, // MIPI_DSI_DCS_LONG_WRITE: 11 bytes.
- {DSI_WR_DATA, 0x4F0F41B1}, // Set Power control.
- {DSI_WR_DATA, 0xF179A433},
- {DSI_WR_DATA, 0x002D81},
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x439}, // MIPI_DSI_DCS_LONG_WRITE: 4 bytes.
- {DSI_WR_DATA, 0x000000B9}, // Disable extension cmd.
- {DSI_TRIGGER, DSI_TRIGGER_HOST}
-};
-
-static const cfg_op_t _display_deinit_config_auo[37] = {
- {DSI_WR_DATA, 0x439}, // MIPI_DSI_DCS_LONG_WRITE: 4 bytes.
- {DSI_WR_DATA, 0x9483FFB9}, // Enable extension cmd. (Pass: FF 83 94).
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x2C39}, // MIPI_DSI_DCS_LONG_WRITE: 44 bytes.
- {DSI_WR_DATA, 0x191919D5},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x2C39}, // MIPI_DSI_DCS_LONG_WRITE: 44 bytes.
- {DSI_WR_DATA, 0x191919D6},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_WR_DATA, 0x19191919},
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0xB39}, // MIPI_DSI_DCS_LONG_WRITE: 11 bytes.
- {DSI_WR_DATA, 0x711148B1}, // Set Power control. (Not deep standby, BT1 / XDK, VRH gamma volt adj 49 / x40).
- // Set Power control. (NVRH gamma volt adj 9, Amplifier current small / x30, FS0 freq Fosc/80 / FS1 freq Fosc/32, Enter standby / PON / VCOMG).
- {DSI_WR_DATA, 0x71143209},
- {DSI_WR_DATA, 0x114D31}, // Set Power control. (Unknown).
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
- {DSI_WR_DATA, 0x439}, // MIPI_DSI_DCS_LONG_WRITE: 4 bytes.
- {DSI_WR_DATA, 0x000000B9}, // Disable extension cmd.
- {DSI_TRIGGER, DSI_TRIGGER_HOST}
-};
-
-static const cfg_op_t _display_init_config_invert[3] = {
- {DSI_WR_DATA, 0x239},
- {DSI_WR_DATA, 0x02C1}, // INV_EN.
- {DSI_TRIGGER, DSI_TRIGGER_HOST},
-};
-
-//Display A config.
-static const cfg_op_t cfg_display_one_color[8] = {
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY} // Continuous display.
-};
-
-//Display A config linear pitch.
-static const cfg_op_t cfg_display_framebuffer_pitch[32] = {
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_COLOR_DEPTH, WIN_COLOR_DEPTH_B8G8R8A8}, // NX Default: T_A8B8G8R8, WIN_COLOR_DEPTH_R8G8B8A8.
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_WIN_POSITION, 0}, //(0,0)
- {DC_WIN_H_INITIAL_DDA, 0},
- {DC_WIN_V_INITIAL_DDA, 0},
- {DC_WIN_PRESCALED_SIZE, V_PRESCALED_SIZE(1280) | H_PRESCALED_SIZE(720 * 4)},
- {DC_WIN_DDA_INC, V_DDA_INC(0x1000) | H_DDA_INC(0x1000)}, // 1.0x.
- {DC_WIN_SIZE, V_SIZE(1280) | H_SIZE(720)},
- {DC_WIN_LINE_STRIDE, UV_LINE_STRIDE(720 * 2) | LINE_STRIDE(720 * 4)}, // 720*2x720*4 (= 0x600 x 0xC00) bytes, see TRM for alignment requirements.
- {DC_WIN_BUFFER_CONTROL, BUFFER_CONTROL_HOST},
- {DC_WINBUF_SURFACE_KIND, PITCH},
- {DC_WINBUF_START_ADDR, IPL_FB_ADDRESS}, // Framebuffer address.
- {DC_WINBUF_ADDR_H_OFFSET, 0},
- {DC_WINBUF_ADDR_V_OFFSET, 0},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_WIN_OPTIONS, WIN_ENABLE}, // Enable window AD.
- {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, // Continuous display.
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ}
-};
-
-//Display A config linear pitch inverse + Win D support.
-static const cfg_op_t cfg_display_framebuffer_pitch_inv[34] = {
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_D_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_COLOR_DEPTH, WIN_COLOR_DEPTH_B8G8R8A8}, // NX Default: T_A8B8G8R8, WIN_COLOR_DEPTH_R8G8B8A8.
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_WIN_POSITION, 0}, //(0,0)
- {DC_WIN_H_INITIAL_DDA, 0},
- {DC_WIN_V_INITIAL_DDA, 0},
- {DC_WIN_PRESCALED_SIZE, V_PRESCALED_SIZE(1280) | H_PRESCALED_SIZE(720 * 4)},
- {DC_WIN_DDA_INC, V_DDA_INC(0x1000) | H_DDA_INC(0x1000)}, // 1.0x.
- {DC_WIN_SIZE, V_SIZE(1280) | H_SIZE(720)},
- {DC_WIN_LINE_STRIDE, UV_LINE_STRIDE(720 * 2) | LINE_STRIDE(720 * 4)}, // 720*2x720*4 (= 0x600 x 0xC00) bytes, see TRM for alignment requirements.
- {DC_WIN_BUFFER_CONTROL, BUFFER_CONTROL_HOST},
- {DC_WINBUF_SURFACE_KIND, PITCH},
- {DC_WINBUF_START_ADDR, NYX_FB_ADDRESS}, // Framebuffer address.
- {DC_WINBUF_ADDR_H_OFFSET, 0}, // Linear: 0x383FFC, Block: 0x3813FC.
- {DC_WINBUF_ADDR_V_OFFSET, 1279}, // Linear: 1279, Block: 0.
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_WIN_OPTIONS, WIN_ENABLE | V_DIRECTION}, // Enable window AD.
- {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, // Continuous display.
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ}
-};
-
-//Display A config block linear.
-static const cfg_op_t cfg_display_framebuffer_block[34] = {
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_D_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_COLOR_DEPTH, WIN_COLOR_DEPTH_B8G8R8A8}, // NX Default: T_A8B8G8R8, WIN_COLOR_DEPTH_R8G8B8A8.
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_WIN_POSITION, 0}, //(0,0)
- {DC_WIN_H_INITIAL_DDA, 0},
- {DC_WIN_V_INITIAL_DDA, 0},
- {DC_WIN_PRESCALED_SIZE, V_PRESCALED_SIZE(1280) | H_PRESCALED_SIZE(720 * 4)},
- {DC_WIN_DDA_INC, V_DDA_INC(0x1000) | H_DDA_INC(0x1000)}, // 1.0x.
- {DC_WIN_SIZE, V_SIZE(1280) | H_SIZE(720)},
- {DC_WIN_LINE_STRIDE, UV_LINE_STRIDE(1280 * 2) | LINE_STRIDE(1280 * 4)}, //720*2x720*4 (= 0x600 x 0xC00) bytes, see TRM for alignment requirements.
- {DC_WIN_BUFFER_CONTROL, BUFFER_CONTROL_HOST},
- {DC_WINBUF_SURFACE_KIND, BLOCK_HEIGHT(4) | BLOCK},
- {DC_WINBUF_START_ADDR, NYX_FB_ADDRESS}, // Framebuffer address.
- {DC_WINBUF_ADDR_H_OFFSET, 0x3813FC}, // Linear: 0x383FFC, Block: 0x3813FC.
- {DC_WINBUF_ADDR_V_OFFSET, 0}, // Linear: 1279, Block: 0.
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE},
- {DC_WIN_WIN_OPTIONS, WIN_ENABLE | SCAN_COLUMN | H_DIRECTION}, // Enable window AD. | SCAN_COLUMN | H_DIRECTION.
- {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, // Continuous display.
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ}
-};
-
-//Display D config.
-static const cfg_op_t cfg_display_framebuffer_log[20] = {
- {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_D_SELECT},
- {DC_WIN_WIN_OPTIONS, 0},
- {DC_WIN_COLOR_DEPTH, WIN_COLOR_DEPTH_B8G8R8A8},
- {DC_WIN_POSITION, 0}, //(0,0)
- {DC_WIN_H_INITIAL_DDA, 0},
- {DC_WIN_V_INITIAL_DDA, 0},
- {DC_WIN_PRESCALED_SIZE, V_PRESCALED_SIZE(1280) | H_PRESCALED_SIZE(656 * 4)},
- {DC_WIN_DDA_INC, V_DDA_INC(0x1000) | H_DDA_INC(0x1000)}, // 1.0x.
- {DC_WIN_SIZE, V_SIZE(1280) | H_SIZE(656)},
- {DC_WIN_LINE_STRIDE, UV_LINE_STRIDE(656 * 2) | LINE_STRIDE(656 * 4)}, //656*2x656*4 (= 0x600 x 0xC00) bytes, see TRM for alignment requirements.
- {DC_WIN_BUFFER_CONTROL, BUFFER_CONTROL_HOST},
- {DC_WINBUF_SURFACE_KIND, PITCH},
- {DC_WINBUF_START_ADDR, LOG_FB_ADDRESS}, // Framebuffer address.
- {DC_WINBUF_ADDR_H_OFFSET, 0},
- {DC_WINBUF_ADDR_V_OFFSET, 0},
- {DC_WINBUF_BLEND_LAYER_CONTROL, WIN_BLEND_ENABLE | WIN_K1(200)},
- {DC_WINBUF_BLEND_MATCH_SELECT, WIN_BLEND_FACT_SRC_COLOR_MATCH_SEL_K1 | WIN_BLEND_FACT_DST_COLOR_MATCH_SEL_NEG_K1},
- {DC_WIN_WIN_OPTIONS, 0}, // Enable window DD.
- {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_D_UPDATE},
- {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_D_ACT_REQ}
-};
diff --git a/nyx/nyx_gui/ianos/ianos.c b/nyx/nyx_gui/ianos/ianos.c
deleted file mode 100644
index b574c3f..0000000
--- a/nyx/nyx_gui/ianos/ianos.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Copyright (c) 2018 M4xw
- * Copyright (c) 2018-2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "ianos.h"
-#include "../../../common/common_module.h"
-#include "../gfx/gfx.h"
-#include "../libs/elfload/elfload.h"
-#include "../mem/heap.h"
-#include "../storage/nx_sd.h"
-#include "../utils/types.h"
-
-#define IRAM_LIB_ADDR 0x4002B000
-#define DRAM_LIB_ADDR 0xE0000000
-
-extern heap_t _heap;
-
-void *elfBuf = NULL;
-void *fileBuf = NULL;
-
-static void _ianos_call_ep(moduleEntrypoint_t entrypoint, void *moduleConfig)
-{
- bdkParams_t bdkParameters = (bdkParams_t)malloc(sizeof(struct _bdkParams_t));
- bdkParameters->gfxCon = &gfx_con;
- bdkParameters->gfxCtx = &gfx_ctxt;
- bdkParameters->memcpy = (memcpy_t)&memcpy;
- bdkParameters->memset = (memset_t)&memset;
- bdkParameters->sharedHeap = &_heap;
-
- entrypoint(moduleConfig, bdkParameters);
-}
-
-static void *_ianos_alloc_cb(el_ctx *ctx, Elf_Addr phys, Elf_Addr virt, Elf_Addr size)
-{
- (void)ctx;
- (void)phys;
- (void)size;
- return (void *)virt;
-}
-
-static bool _ianos_read_cb(el_ctx *ctx, void *dest, size_t numberBytes, size_t offset)
-{
- (void)ctx;
-
- memcpy(dest, fileBuf + offset, numberBytes);
-
- return true;
-}
-
-//TODO: Support shared libraries.
-uintptr_t ianos_loader(char *path, elfType_t type, void *moduleConfig)
-{
- el_ctx ctx;
- uintptr_t epaddr = 0;
-
- if (!sd_mount())
- goto elfLoadFinalOut;
-
- // Read library.
- fileBuf = sd_file_read(path, NULL);
-
- if (!fileBuf)
- goto elfLoadFinalOut;
-
- ctx.pread = _ianos_read_cb;
-
- if (el_init(&ctx))
- goto elfLoadFinalOut;
-
- // Set our relocated library's buffer.
- switch (type & 0xFFFF)
- {
- case EXEC_ELF:
- case AR64_ELF:
- elfBuf = (void *)DRAM_LIB_ADDR;
- break;
- default:
- elfBuf = malloc(ctx.memsz); // Aligned to 0x10 by default.
- }
-
- if (!elfBuf)
- goto elfLoadFinalOut;
-
- // Load and relocate library.
- ctx.base_load_vaddr = ctx.base_load_paddr = (uintptr_t)elfBuf;
- if (el_load(&ctx, _ianos_alloc_cb))
- goto elfFreeOut;
-
- if (el_relocate(&ctx))
- goto elfFreeOut;
-
- // Launch.
- epaddr = ctx.ehdr.e_entry + (uintptr_t)elfBuf;
- moduleEntrypoint_t ep = (moduleEntrypoint_t)epaddr;
-
- _ianos_call_ep(ep, moduleConfig);
-
-elfFreeOut:
- free(fileBuf);
- elfBuf = NULL;
- fileBuf = NULL;
-
-elfLoadFinalOut:
- return epaddr;
-}
\ No newline at end of file
diff --git a/nyx/nyx_gui/ianos/ianos.h b/nyx/nyx_gui/ianos/ianos.h
deleted file mode 100644
index d64b329..0000000
--- a/nyx/nyx_gui/ianos/ianos.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (c) 2018 M4xw
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef IANOS_H
-#define IANOS_H
-
-#include "../utils/types.h"
-
-typedef enum
-{
- DRAM_LIB = 0, // DRAM library.
- EXEC_ELF = 1, // Executable elf that does not return.
- DR64_LIB = 2, // AARCH64 DRAM library.
- AR64_ELF = 3, // Executable elf that does not return.
- KEEP_IN_RAM = (1 << 31) // Shared library mask.
-} elfType_t;
-
-uintptr_t ianos_loader(char *path, elfType_t type, void* config);
-
-#endif
\ No newline at end of file
diff --git a/nyx/nyx_gui/libs/compr/blz.c b/nyx/nyx_gui/libs/compr/blz.c
deleted file mode 100644
index e0a0e7b..0000000
--- a/nyx/nyx_gui/libs/compr/blz.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * Copyright (c) 2018 rajkosto
- * Copyright (c) 2018 SciresM
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-#include
-
-#include "blz.h"
-
-const blz_footer *blz_get_footer(const unsigned char *compData, unsigned int compDataLen, blz_footer *outFooter)
-{
- if (compDataLen < sizeof(blz_footer))
- return NULL;
-
- const blz_footer *srcFooter = (const blz_footer*)&compData[compDataLen - sizeof(blz_footer)];
- if (outFooter != NULL)
- memcpy(outFooter, srcFooter, sizeof(blz_footer)); // Must be a memcpy because no umaligned accesses on ARMv4.
-
- return srcFooter;
-}
-
-// From https://github.com/SciresM/hactool/blob/master/kip.c which is exactly how kernel does it, thanks SciresM!
-int blz_uncompress_inplace(unsigned char *dataBuf, unsigned int compSize, const blz_footer *footer)
-{
- u32 addl_size = footer->addl_size;
- u32 header_size = footer->header_size;
- u32 cmp_and_hdr_size = footer->cmp_and_hdr_size;
-
- unsigned char* cmp_start = &dataBuf[compSize] - cmp_and_hdr_size;
- u32 cmp_ofs = cmp_and_hdr_size - header_size;
- u32 out_ofs = cmp_and_hdr_size + addl_size;
-
- while (out_ofs)
- {
- unsigned char control = cmp_start[--cmp_ofs];
- for (unsigned int i=0; i<8; i++)
- {
- if (control & 0x80)
- {
- if (cmp_ofs < 2)
- return 0; // Out of bounds.
-
- cmp_ofs -= 2;
- u16 seg_val = ((unsigned int)(cmp_start[cmp_ofs + 1]) << 8) | cmp_start[cmp_ofs];
- u32 seg_size = ((seg_val >> 12) & 0xF) + 3;
- u32 seg_ofs = (seg_val & 0x0FFF) + 3;
- if (out_ofs < seg_size) // Kernel restricts segment copy to stay in bounds.
- seg_size = out_ofs;
-
- out_ofs -= seg_size;
-
- for (unsigned int j = 0; j < seg_size; j++)
- cmp_start[out_ofs + j] = cmp_start[out_ofs + j + seg_ofs];
- }
- else
- {
- // Copy directly.
- if (cmp_ofs < 1)
- return 0; //out of bounds
-
- cmp_start[--out_ofs] = cmp_start[--cmp_ofs];
- }
- control <<= 1;
- if (out_ofs == 0) // Blz works backwards, so if it reaches byte 0, it's done.
- return 1;
- }
- }
-
- return 1;
-}
-
-int blz_uncompress_srcdest(const unsigned char *compData, unsigned int compDataLen, unsigned char *dstData, unsigned int dstSize)
-{
- blz_footer footer;
- const blz_footer *compFooterPtr = blz_get_footer(compData, compDataLen, &footer);
- if (compFooterPtr == NULL)
- return 0;
-
- // Decompression must be done in-place, so need to copy the relevant compressed data first.
- unsigned int numCompBytes = (const unsigned char*)(compFooterPtr)-compData;
- memcpy(dstData, compData, numCompBytes);
- memset(&dstData[numCompBytes], 0, dstSize - numCompBytes);
-
- return blz_uncompress_inplace(dstData, compDataLen, &footer);
-}
\ No newline at end of file
diff --git a/nyx/nyx_gui/libs/compr/blz.h b/nyx/nyx_gui/libs/compr/blz.h
deleted file mode 100644
index 3c17f8d..0000000
--- a/nyx/nyx_gui/libs/compr/blz.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright (c) 2018 rajkosto
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _BLZ_H_
-#define _BLZ_H_
-
-#include "../../utils/types.h"
-
-typedef struct _blz_footer
-{
- u32 cmp_and_hdr_size;
- u32 header_size;
- u32 addl_size;
-} blz_footer;
-
-// Returns pointer to footer in compData if present, additionally copies it to outFooter if not NULL.
-const blz_footer *blz_get_footer(const unsigned char *compData, unsigned int compDataLen, blz_footer *outFooter);
-// Returns 0 on failure.
-int blz_uncompress_inplace(unsigned char *dataBuf, unsigned int compSize, const blz_footer *footer);
-// Returns 0 on failure.
-int blz_uncompress_srcdest(const unsigned char *compData, unsigned int compDataLen, unsigned char *dstData, unsigned int dstSize);
-
-#endif
\ No newline at end of file
diff --git a/nyx/nyx_gui/libs/compr/lz.c b/nyx/nyx_gui/libs/compr/lz.c
deleted file mode 100644
index a17c6e4..0000000
--- a/nyx/nyx_gui/libs/compr/lz.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/*************************************************************************
-* Name: lz.c
-* Author: Marcus Geelnard
-* Description: LZ77 coder/decoder implementation.
-* Reentrant: Yes
-*
-* The LZ77 compression scheme is a substitutional compression scheme
-* proposed by Abraham Lempel and Jakob Ziv in 1977. It is very simple in
-* its design, and uses no fancy bit level compression.
-*
-* This is my first attempt at an implementation of a LZ77 code/decoder.
-*
-* The principle of the LZ77 compression algorithm is to store repeated
-* occurrences of strings as references to previous occurrences of the same
-* string. The point is that the reference consumes less space than the
-* string itself, provided that the string is long enough (in this
-* implementation, the string has to be at least 4 bytes long, since the
-* minimum coded reference is 3 bytes long). Also note that the term
-* "string" refers to any kind of byte sequence (it does not have to be
-* an ASCII string, for instance).
-*
-* The coder uses a brute force approach to finding string matches in the
-* history buffer (or "sliding window", if you wish), which is very, very
-* slow. I recon the complexity is somewhere between O(n^2) and O(n^3),
-* depending on the input data.
-*
-* There is also a faster implementation that uses a large working buffer
-* in which a "jump table" is stored, which is used to quickly find
-* possible string matches (see the source code for LZ_CompressFast() for
-* more information). The faster method is an order of magnitude faster,
-* but still quite slow compared to other compression methods.
-*
-* The upside is that decompression is very fast, and the compression ratio
-* is often very good.
-*
-* The reference to a string is coded as a (length,offset) pair, where the
-* length indicates the length of the string, and the offset gives the
-* offset from the current data position. To distinguish between string
-* references and literal strings (uncompressed bytes), a string reference
-* is preceded by a marker byte, which is chosen as the least common byte
-* symbol in the input data stream (this marker byte is stored in the
-* output stream as the first byte).
-*
-* Occurrences of the marker byte in the stream are encoded as the marker
-* byte followed by a zero byte, which means that occurrences of the marker
-* byte have to be coded with two bytes.
-*
-* The lengths and offsets are coded in a variable length fashion, allowing
-* values of any magnitude (up to 4294967295 in this implementation).
-*
-* With this compression scheme, the worst case compression result is
-* (257/256)*insize + 1.
-*
-*-------------------------------------------------------------------------
-* Copyright (c) 2003-2006 Marcus Geelnard
-*
-* This software is provided 'as-is', without any express or implied
-* warranty. In no event will the authors be held liable for any damages
-* arising from the use of this software.
-*
-* Permission is granted to anyone to use this software for any purpose,
-* including commercial applications, and to alter it and redistribute it
-* freely, subject to the following restrictions:
-*
-* 1. The origin of this software must not be misrepresented; you must not
-* claim that you wrote the original software. If you use this software
-* in a product, an acknowledgment in the product documentation would
-* be appreciated but is not required.
-*
-* 2. Altered source versions must be plainly marked as such, and must not
-* be misrepresented as being the original software.
-*
-* 3. This notice may not be removed or altered from any source
-* distribution.
-*
-* Marcus Geelnard
-* marcus.geelnard at home.se
-*************************************************************************/
-
-
-/*************************************************************************
-* INTERNAL FUNCTIONS *
-*************************************************************************/
-
-
-/*************************************************************************
-* _LZ_ReadVarSize() - Read unsigned integer with variable number of
-* bytes depending on value.
-*************************************************************************/
-
-static int _LZ_ReadVarSize( unsigned int * x, const unsigned char * buf )
-{
- unsigned int y, b, num_bytes;
-
- /* Read complete value (stop when byte contains zero in 8:th bit) */
- y = 0;
- num_bytes = 0;
- do
- {
- b = (unsigned int) (*buf ++);
- y = (y << 7) | (b & 0x0000007f);
- ++ num_bytes;
- }
- while( b & 0x00000080 );
-
- /* Store value in x */
- *x = y;
-
- /* Return number of bytes read */
- return num_bytes;
-}
-
-
-
-/*************************************************************************
-* PUBLIC FUNCTIONS *
-*************************************************************************/
-
-
-/*************************************************************************
-* LZ_Uncompress() - Uncompress a block of data using an LZ77 decoder.
-* in - Input (compressed) buffer.
-* out - Output (uncompressed) buffer. This buffer must be large
-* enough to hold the uncompressed data.
-* insize - Number of input bytes.
-*************************************************************************/
-
-void LZ_Uncompress( const unsigned char *in, unsigned char *out,
- unsigned int insize )
-{
- unsigned char marker, symbol;
- unsigned int i, inpos, outpos, length, offset;
-
- /* Do we have anything to uncompress? */
- if( insize < 1 )
- {
- return;
- }
-
- /* Get marker symbol from input stream */
- marker = in[ 0 ];
- inpos = 1;
-
- /* Main decompression loop */
- outpos = 0;
- do
- {
- symbol = in[ inpos ++ ];
- if( symbol == marker )
- {
- /* We had a marker byte */
- if( in[ inpos ] == 0 )
- {
- /* It was a single occurrence of the marker byte */
- out[ outpos ++ ] = marker;
- ++ inpos;
- }
- else
- {
- /* Extract true length and offset */
- inpos += _LZ_ReadVarSize( &length, &in[ inpos ] );
- inpos += _LZ_ReadVarSize( &offset, &in[ inpos ] );
-
- /* Copy corresponding data from history window */
- for( i = 0; i < length; ++ i )
- {
- out[ outpos ] = out[ outpos - offset ];
- ++ outpos;
- }
- }
- }
- else
- {
- /* No marker, plain copy */
- out[ outpos ++ ] = symbol;
- }
- }
- while( inpos < insize );
-}
diff --git a/nyx/nyx_gui/libs/compr/lz.h b/nyx/nyx_gui/libs/compr/lz.h
deleted file mode 100644
index 6f31b4a..0000000
--- a/nyx/nyx_gui/libs/compr/lz.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*************************************************************************
-* Name: lz.h
-* Author: Marcus Geelnard
-* Description: LZ77 coder/decoder interface.
-* Reentrant: Yes
-*-------------------------------------------------------------------------
-* Copyright (c) 2003-2006 Marcus Geelnard
-*
-* This software is provided 'as-is', without any express or implied
-* warranty. In no event will the authors be held liable for any damages
-* arising from the use of this software.
-*
-* Permission is granted to anyone to use this software for any purpose,
-* including commercial applications, and to alter it and redistribute it
-* freely, subject to the following restrictions:
-*
-* 1. The origin of this software must not be misrepresented; you must not
-* claim that you wrote the original software. If you use this software
-* in a product, an acknowledgment in the product documentation would
-* be appreciated but is not required.
-*
-* 2. Altered source versions must be plainly marked as such, and must not
-* be misrepresented as being the original software.
-*
-* 3. This notice may not be removed or altered from any source
-* distribution.
-*
-* Marcus Geelnard
-* marcus.geelnard at home.se
-*************************************************************************/
-
-#ifndef _lz_h_
-#define _lz_h_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-/*************************************************************************
-* Function prototypes
-*************************************************************************/
-
-void LZ_Uncompress( const unsigned char *in, unsigned char *out,
- unsigned int insize );
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _lz_h_ */
diff --git a/nyx/nyx_gui/libs/elfload/elf.h b/nyx/nyx_gui/libs/elfload/elf.h
deleted file mode 100644
index 196cf87..0000000
--- a/nyx/nyx_gui/libs/elfload/elf.h
+++ /dev/null
@@ -1,589 +0,0 @@
-/* $OpenBSD: exec_elf.h,v 1.53 2014/01/03 03:00:39 guenther Exp $ */
-/*
- * Copyright (c) 1995, 1996 Erik Theisen. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/* imported sys/exec_elf.h from OpenBSD */
-
-#ifndef ELF_H
-#define ELF_H
-#include
-
-typedef uint8_t Elf_Byte;
-
-typedef uint32_t Elf32_Addr; /* Unsigned program address */
-typedef uint32_t Elf32_Off; /* Unsigned file offset */
-typedef int32_t Elf32_Sword; /* Signed large integer */
-typedef uint32_t Elf32_Word; /* Unsigned large integer */
-typedef uint16_t Elf32_Half; /* Unsigned medium integer */
-
-typedef uint64_t Elf64_Addr;
-typedef uint64_t Elf64_Off;
-typedef int32_t Elf64_Shalf;
-
-#ifdef __alpha__
-typedef int64_t Elf64_Sword;
-typedef uint64_t Elf64_Word;
-#else
-typedef int32_t Elf64_Sword;
-typedef uint32_t Elf64_Word;
-#endif
-
-typedef int64_t Elf64_Sxword;
-typedef uint64_t Elf64_Xword;
-
-typedef uint32_t Elf64_Half;
-typedef uint16_t Elf64_Quarter;
-
-/*
- * e_ident[] identification indexes
- * See http://www.sco.com/developers/gabi/latest/ch4.eheader.html
- */
-#define EI_MAG0 0 /* file ID */
-#define EI_MAG1 1 /* file ID */
-#define EI_MAG2 2 /* file ID */
-#define EI_MAG3 3 /* file ID */
-#define EI_CLASS 4 /* file class */
-#define EI_DATA 5 /* data encoding */
-#define EI_VERSION 6 /* ELF header version */
-#define EI_OSABI 7 /* OS/ABI ID */
-#define EI_ABIVERSION 8 /* ABI version */
-#define EI_PAD 9 /* start of pad bytes */
-#define EI_NIDENT 16 /* Size of e_ident[] */
-
-/* e_ident[] magic number */
-#define ELFMAG0 0x7f /* e_ident[EI_MAG0] */
-#define ELFMAG1 'E' /* e_ident[EI_MAG1] */
-#define ELFMAG2 'L' /* e_ident[EI_MAG2] */
-#define ELFMAG3 'F' /* e_ident[EI_MAG3] */
-#define ELFMAG "\177ELF" /* magic */
-#define SELFMAG 4 /* size of magic */
-
-/* e_ident[] file class */
-#define ELFCLASSNONE 0 /* invalid */
-#define ELFCLASS32 1 /* 32-bit objs */
-#define ELFCLASS64 2 /* 64-bit objs */
-#define ELFCLASSNUM 3 /* number of classes */
-
-/* e_ident[] data encoding */
-#define ELFDATANONE 0 /* invalid */
-#define ELFDATA2LSB 1 /* Little-Endian */
-#define ELFDATA2MSB 2 /* Big-Endian */
-#define ELFDATANUM 3 /* number of data encode defines */
-
-/* e_ident[] Operating System/ABI */
-#define ELFOSABI_SYSV 0 /* UNIX System V ABI */
-#define ELFOSABI_HPUX 1 /* HP-UX operating system */
-#define ELFOSABI_NETBSD 2 /* NetBSD */
-#define ELFOSABI_LINUX 3 /* GNU/Linux */
-#define ELFOSABI_HURD 4 /* GNU/Hurd */
-#define ELFOSABI_86OPEN 5 /* 86Open common IA32 ABI */
-#define ELFOSABI_SOLARIS 6 /* Solaris */
-#define ELFOSABI_MONTEREY 7 /* Monterey */
-#define ELFOSABI_IRIX 8 /* IRIX */
-#define ELFOSABI_FREEBSD 9 /* FreeBSD */
-#define ELFOSABI_TRU64 10 /* TRU64 UNIX */
-#define ELFOSABI_MODESTO 11 /* Novell Modesto */
-#define ELFOSABI_OPENBSD 12 /* OpenBSD */
-#define ELFOSABI_ARM 97 /* ARM */
-#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
-
-/* e_ident */
-#define IS_ELF(ehdr) ((ehdr).e_ident[EI_MAG0] == ELFMAG0 && \
- (ehdr).e_ident[EI_MAG1] == ELFMAG1 && \
- (ehdr).e_ident[EI_MAG2] == ELFMAG2 && \
- (ehdr).e_ident[EI_MAG3] == ELFMAG3)
-
-/* ELF Header */
-typedef struct
-{
- unsigned char e_ident[EI_NIDENT]; /* ELF Identification */
- Elf32_Half e_type; /* object file type */
- Elf32_Half e_machine; /* machine */
- Elf32_Word e_version; /* object file version */
- Elf32_Addr e_entry; /* virtual entry point */
- Elf32_Off e_phoff; /* program header table offset */
- Elf32_Off e_shoff; /* section header table offset */
- Elf32_Word e_flags; /* processor-specific flags */
- Elf32_Half e_ehsize; /* ELF header size */
- Elf32_Half e_phentsize; /* program header entry size */
- Elf32_Half e_phnum; /* number of program header entries */
- Elf32_Half e_shentsize; /* section header entry size */
- Elf32_Half e_shnum; /* number of section header entries */
- Elf32_Half e_shstrndx; /* section header table's "section
- header string table" entry offset */
-} Elf32_Ehdr;
-
-typedef struct
-{
- unsigned char e_ident[EI_NIDENT]; /* Id bytes */
- Elf64_Quarter e_type; /* file type */
- Elf64_Quarter e_machine; /* machine type */
- Elf64_Half e_version; /* version number */
- Elf64_Addr e_entry; /* entry point */
- Elf64_Off e_phoff; /* Program hdr offset */
- Elf64_Off e_shoff; /* Section hdr offset */
- Elf64_Half e_flags; /* Processor flags */
- Elf64_Quarter e_ehsize; /* sizeof ehdr */
- Elf64_Quarter e_phentsize; /* Program header entry size */
- Elf64_Quarter e_phnum; /* Number of program headers */
- Elf64_Quarter e_shentsize; /* Section header entry size */
- Elf64_Quarter e_shnum; /* Number of section headers */
- Elf64_Quarter e_shstrndx; /* String table index */
-} Elf64_Ehdr;
-
-/* e_type */
-#define ET_NONE 0 /* No file type */
-#define ET_REL 1 /* relocatable file */
-#define ET_EXEC 2 /* executable file */
-#define ET_DYN 3 /* shared object file */
-#define ET_CORE 4 /* core file */
-#define ET_NUM 5 /* number of types */
-#define ET_LOPROC 0xff00 /* reserved range for processor */
-#define ET_HIPROC 0xffff /* specific e_type */
-
-/* e_machine */
-#define EM_NONE 0 /* No Machine */
-#define EM_M32 1 /* AT&T WE 32100 */
-#define EM_SPARC 2 /* SPARC */
-#define EM_386 3 /* Intel 80386 */
-#define EM_68K 4 /* Motorola 68000 */
-#define EM_88K 5 /* Motorola 88000 */
-#define EM_486 6 /* Intel 80486 - unused? */
-#define EM_860 7 /* Intel 80860 */
-#define EM_MIPS 8 /* MIPS R3000 Big-Endian only */
-/*
- * Don't know if EM_MIPS_RS4_BE,
- * EM_SPARC64, EM_PARISC,
- * or EM_PPC are ABI compliant
- */
-#define EM_MIPS_RS4_BE 10 /* MIPS R4000 Big-Endian */
-#define EM_SPARC64 11 /* SPARC v9 64-bit unofficial */
-#define EM_PARISC 15 /* HPPA */
-#define EM_SPARC32PLUS 18 /* Enhanced instruction set SPARC */
-#define EM_PPC 20 /* PowerPC */
-#define EM_ARM 40 /* ARM AArch32 */
-#define EM_ALPHA 41 /* DEC ALPHA */
-#define EM_SH 42 /* Hitachi/Renesas Super-H */
-#define EM_SPARCV9 43 /* SPARC version 9 */
-#define EM_IA_64 50 /* Intel IA-64 Processor */
-#define EM_AMD64 62 /* AMD64 architecture */
-#define EM_VAX 75 /* DEC VAX */
-#define EM_AARCH64 183 /* ARM AArch64 */
-
-/* Non-standard */
-#define EM_ALPHA_EXP 0x9026 /* DEC ALPHA */
-
-/* Version */
-#define EV_NONE 0 /* Invalid */
-#define EV_CURRENT 1 /* Current */
-#define EV_NUM 2 /* number of versions */
-
-/* Section Header */
-typedef struct
-{
- Elf32_Word sh_name; /* name - index into section header
- * string table section */
- Elf32_Word sh_type; /* type */
- Elf32_Word sh_flags; /* flags */
- Elf32_Addr sh_addr; /* address */
- Elf32_Off sh_offset; /* file offset */
- Elf32_Word sh_size; /* section size */
- Elf32_Word sh_link; /* section header table index link */
- Elf32_Word sh_info; /* extra information */
- Elf32_Word sh_addralign; /* address alignment */
- Elf32_Word sh_entsize; /* section entry size */
-} Elf32_Shdr;
-
-typedef struct
-{
- Elf64_Half sh_name; /* section name */
- Elf64_Half sh_type; /* section type */
- Elf64_Xword sh_flags; /* section flags */
- Elf64_Addr sh_addr; /* virtual address */
- Elf64_Off sh_offset; /* file offset */
- Elf64_Xword sh_size; /* section size */
- Elf64_Half sh_link; /* link to another */
- Elf64_Half sh_info; /* misc info */
- Elf64_Xword sh_addralign; /* memory alignment */
- Elf64_Xword sh_entsize; /* table entry size */
-} Elf64_Shdr;
-
-/* Special Section Indexes */
-#define SHN_UNDEF 0 /* undefined */
-#define SHN_LORESERVE 0xff00 /* lower bounds of reserved indexes */
-#define SHN_LOPROC 0xff00 /* reserved range for processor */
-#define SHN_HIPROC 0xff1f /* specific section indexes */
-#define SHN_ABS 0xfff1 /* absolute value */
-#define SHN_COMMON 0xfff2 /* common symbol */
-#define SHN_HIRESERVE 0xffff /* upper bounds of reserved indexes */
-
-/* sh_type */
-#define SHT_NULL 0 /* inactive */
-#define SHT_PROGBITS 1 /* program defined information */
-#define SHT_SYMTAB 2 /* symbol table section */
-#define SHT_STRTAB 3 /* string table section */
-#define SHT_RELA 4 /* relocation section with addends*/
-#define SHT_HASH 5 /* symbol hash table section */
-#define SHT_DYNAMIC 6 /* dynamic section */
-#define SHT_NOTE 7 /* note section */
-#define SHT_NOBITS 8 /* no space section */
-#define SHT_REL 9 /* relation section without addends */
-#define SHT_SHLIB 10 /* reserved - purpose unknown */
-#define SHT_DYNSYM 11 /* dynamic symbol table section */
-#define SHT_NUM 12 /* number of section types */
-#define SHT_LOPROC 0x70000000 /* reserved range for processor */
-#define SHT_HIPROC 0x7fffffff /* specific section header types */
-#define SHT_LOUSER 0x80000000 /* reserved range for application */
-#define SHT_HIUSER 0xffffffff /* specific indexes */
-
-/* Section names */
-#define ELF_BSS ".bss" /* uninitialized data */
-#define ELF_DATA ".data" /* initialized data */
-#define ELF_DEBUG ".debug" /* debug */
-#define ELF_DYNAMIC ".dynamic" /* dynamic linking information */
-#define ELF_DYNSTR ".dynstr" /* dynamic string table */
-#define ELF_DYNSYM ".dynsym" /* dynamic symbol table */
-#define ELF_FINI ".fini" /* termination code */
-#define ELF_GOT ".got" /* global offset table */
-#define ELF_HASH ".hash" /* symbol hash table */
-#define ELF_INIT ".init" /* initialization code */
-#define ELF_REL_DATA ".rel.data" /* relocation data */
-#define ELF_REL_FINI ".rel.fini" /* relocation termination code */
-#define ELF_REL_INIT ".rel.init" /* relocation initialization code */
-#define ELF_REL_DYN ".rel.dyn" /* relocation dynamic link info */
-#define ELF_REL_RODATA ".rel.rodata" /* relocation read-only data */
-#define ELF_REL_TEXT ".rel.text" /* relocation code */
-#define ELF_RODATA ".rodata" /* read-only data */
-#define ELF_SHSTRTAB ".shstrtab" /* section header string table */
-#define ELF_STRTAB ".strtab" /* string table */
-#define ELF_SYMTAB ".symtab" /* symbol table */
-#define ELF_TEXT ".text" /* code */
-
-/* Section Attribute Flags - sh_flags */
-#define SHF_WRITE 0x1 /* Writable */
-#define SHF_ALLOC 0x2 /* occupies memory */
-#define SHF_EXECINSTR 0x4 /* executable */
-#define SHF_TLS 0x400 /* thread local storage */
-#define SHF_MASKPROC 0xf0000000 /* reserved bits for processor \
- * specific section attributes */
-
-/* Symbol Table Entry */
-typedef struct elf32_sym
-{
- Elf32_Word st_name; /* name - index into string table */
- Elf32_Addr st_value; /* symbol value */
- Elf32_Word st_size; /* symbol size */
- unsigned char st_info; /* type and binding */
- unsigned char st_other; /* 0 - no defined meaning */
- Elf32_Half st_shndx; /* section header index */
-} Elf32_Sym;
-
-typedef struct
-{
- Elf64_Half st_name; /* Symbol name index in str table */
- Elf_Byte st_info; /* type / binding attrs */
- Elf_Byte st_other; /* unused */
- Elf64_Quarter st_shndx; /* section index of symbol */
- Elf64_Xword st_value; /* value of symbol */
- Elf64_Xword st_size; /* size of symbol */
-} Elf64_Sym;
-
-/* Symbol table index */
-#define STN_UNDEF 0 /* undefined */
-
-/* Extract symbol info - st_info */
-#define ELF32_ST_BIND(x) ((x) >> 4)
-#define ELF32_ST_TYPE(x) (((unsigned int)x) & 0xf)
-#define ELF32_ST_INFO(b, t) (((b) << 4) + ((t)&0xf))
-
-#define ELF64_ST_BIND(x) ((x) >> 4)
-#define ELF64_ST_TYPE(x) (((unsigned int)x) & 0xf)
-#define ELF64_ST_INFO(b, t) (((b) << 4) + ((t)&0xf))
-
-/* Symbol Binding - ELF32_ST_BIND - st_info */
-#define STB_LOCAL 0 /* Local symbol */
-#define STB_GLOBAL 1 /* Global symbol */
-#define STB_WEAK 2 /* like global - lower precedence */
-#define STB_NUM 3 /* number of symbol bindings */
-#define STB_LOPROC 13 /* reserved range for processor */
-#define STB_HIPROC 15 /* specific symbol bindings */
-
-/* Symbol type - ELF32_ST_TYPE - st_info */
-#define STT_NOTYPE 0 /* not specified */
-#define STT_OBJECT 1 /* data object */
-#define STT_FUNC 2 /* function */
-#define STT_SECTION 3 /* section */
-#define STT_FILE 4 /* file */
-#define STT_TLS 6 /* thread local storage */
-#define STT_LOPROC 13 /* reserved range for processor */
-#define STT_HIPROC 15 /* specific symbol types */
-
-/* Relocation entry with implicit addend */
-typedef struct
-{
- Elf32_Addr r_offset; /* offset of relocation */
- Elf32_Word r_info; /* symbol table index and type */
-} Elf32_Rel;
-
-/* Relocation entry with explicit addend */
-typedef struct
-{
- Elf32_Addr r_offset; /* offset of relocation */
- Elf32_Word r_info; /* symbol table index and type */
- Elf32_Sword r_addend;
-} Elf32_Rela;
-
-/* Extract relocation info - r_info */
-#define ELF32_R_SYM(i) ((i) >> 8)
-#define ELF32_R_TYPE(i) ((unsigned char)(i))
-#define ELF32_R_INFO(s, t) (((s) << 8) + (unsigned char)(t))
-
-typedef struct
-{
- Elf64_Xword r_offset; /* where to do it */
- Elf64_Xword r_info; /* index & type of relocation */
-} Elf64_Rel;
-
-typedef struct
-{
- Elf64_Xword r_offset; /* where to do it */
- Elf64_Xword r_info; /* index & type of relocation */
- Elf64_Sxword r_addend; /* adjustment value */
-} Elf64_Rela;
-
-#define ELF64_R_SYM(info) ((info) >> 32)
-#define ELF64_R_TYPE(info) ((info)&0xFFFFFFFF)
-#define ELF64_R_INFO(s, t) (((s) << 32) + (__uint32_t)(t))
-
-#if defined(__mips64__) && defined(__MIPSEL__)
-/*
- * The 64-bit MIPS ELF ABI uses a slightly different relocation format
- * than the regular ELF ABI: the r_info field is split into several
- * pieces (see gnu/usr.bin/binutils/include/elf/mips.h for details).
- */
-#undef ELF64_R_SYM
-#undef ELF64_R_TYPE
-#undef ELF64_R_INFO
-#define ELF64_R_TYPE(info) (swap32((info) >> 32))
-#define ELF64_R_SYM(info) ((info)&0xFFFFFFFF)
-#define ELF64_R_INFO(s, t) (((__uint64_t)swap32(t) << 32) + (__uint32_t)(s))
-#endif /* __mips64__ && __MIPSEL__ */
-
-/* Program Header */
-typedef struct
-{
- Elf32_Word p_type; /* segment type */
- Elf32_Off p_offset; /* segment offset */
- Elf32_Addr p_vaddr; /* virtual address of segment */
- Elf32_Addr p_paddr; /* physical address - ignored? */
- Elf32_Word p_filesz; /* number of bytes in file for seg. */
- Elf32_Word p_memsz; /* number of bytes in mem. for seg. */
- Elf32_Word p_flags; /* flags */
- Elf32_Word p_align; /* memory alignment */
-} Elf32_Phdr;
-
-typedef struct
-{
- Elf64_Half p_type; /* entry type */
- Elf64_Half p_flags; /* flags */
- Elf64_Off p_offset; /* offset */
- Elf64_Addr p_vaddr; /* virtual address */
- Elf64_Addr p_paddr; /* physical address */
- Elf64_Xword p_filesz; /* file size */
- Elf64_Xword p_memsz; /* memory size */
- Elf64_Xword p_align; /* memory & file alignment */
-} Elf64_Phdr;
-
-/* Segment types - p_type */
-#define PT_NULL 0 /* unused */
-#define PT_LOAD 1 /* loadable segment */
-#define PT_DYNAMIC 2 /* dynamic linking section */
-#define PT_INTERP 3 /* the RTLD */
-#define PT_NOTE 4 /* auxiliary information */
-#define PT_SHLIB 5 /* reserved - purpose undefined */
-#define PT_PHDR 6 /* program header */
-#define PT_TLS 7 /* thread local storage */
-#define PT_LOOS 0x60000000 /* reserved range for OS */
-#define PT_HIOS 0x6fffffff /* specific segment types */
-#define PT_LOPROC 0x70000000 /* reserved range for processor */
-#define PT_HIPROC 0x7fffffff /* specific segment types */
-
-#define PT_OPENBSD_RANDOMIZE 0x65a3dbe6 /* fill with random data */
-#define PT_GANDR_KERNEL 0x67646b6c /* gdkl */
-
-/* Segment flags - p_flags */
-#define PF_X 0x1 /* Executable */
-#define PF_W 0x2 /* Writable */
-#define PF_R 0x4 /* Readable */
-#define PF_MASKPROC 0xf0000000 /* reserved bits for processor */
- /* specific segment flags */
-
-/* Dynamic structure */
-typedef struct
-{
- Elf32_Sword d_tag; /* controls meaning of d_val */
- union {
- Elf32_Word d_val; /* Multiple meanings - see d_tag */
- Elf32_Addr d_ptr; /* program virtual address */
- } d_un;
-} Elf32_Dyn;
-
-typedef struct
-{
- Elf64_Xword d_tag; /* controls meaning of d_val */
- union {
- Elf64_Addr d_ptr;
- Elf64_Xword d_val;
- } d_un;
-} Elf64_Dyn;
-
-/* Dynamic Array Tags - d_tag */
-#define DT_NULL 0 /* marks end of _DYNAMIC array */
-#define DT_NEEDED 1 /* string table offset of needed lib */
-#define DT_PLTRELSZ 2 /* size of relocation entries in PLT */
-#define DT_PLTGOT 3 /* address PLT/GOT */
-#define DT_HASH 4 /* address of symbol hash table */
-#define DT_STRTAB 5 /* address of string table */
-#define DT_SYMTAB 6 /* address of symbol table */
-#define DT_RELA 7 /* address of relocation table */
-#define DT_RELASZ 8 /* size of relocation table */
-#define DT_RELAENT 9 /* size of relocation entry */
-#define DT_STRSZ 10 /* size of string table */
-#define DT_SYMENT 11 /* size of symbol table entry */
-#define DT_INIT 12 /* address of initialization func. */
-#define DT_FINI 13 /* address of termination function */
-#define DT_SONAME 14 /* string table offset of shared obj */
-#define DT_RPATH 15 /* string table offset of library \
- * search path */
-#define DT_SYMBOLIC 16 /* start sym search in shared obj. */
-#define DT_REL 17 /* address of rel. tbl. w addends */
-#define DT_RELSZ 18 /* size of DT_REL relocation table */
-#define DT_RELENT 19 /* size of DT_REL relocation entry */
-#define DT_PLTREL 20 /* PLT referenced relocation entry */
-#define DT_DEBUG 21 /* bugger */
-#define DT_TEXTREL 22 /* Allow rel. mod. to unwritable seg */
-#define DT_JMPREL 23 /* add. of PLT's relocation entries */
-#define DT_BIND_NOW 24 /* Bind now regardless of env setting */
-#define DT_LOOS 0x6000000d /* reserved range for OS */
-#define DT_HIOS 0x6ffff000 /* specific dynamic array tags */
-#define DT_LOPROC 0x70000000 /* reserved range for processor */
-#define DT_HIPROC 0x7fffffff /* specific dynamic array tags */
-
-/* some other useful tags */
-#define DT_RELACOUNT 0x6ffffff9 /* if present, number of RELATIVE */
-#define DT_RELCOUNT 0x6ffffffa /* relocs, which must come first */
-#define DT_FLAGS_1 0x6ffffffb
-
-/* Dynamic Flags - DT_FLAGS_1 .dynamic entry */
-#define DF_1_NOW 0x00000001
-#define DF_1_GLOBAL 0x00000002
-#define DF_1_GROUP 0x00000004
-#define DF_1_NODELETE 0x00000008
-#define DF_1_LOADFLTR 0x00000010
-#define DF_1_INITFIRST 0x00000020
-#define DF_1_NOOPEN 0x00000040
-#define DF_1_ORIGIN 0x00000080
-#define DF_1_DIRECT 0x00000100
-#define DF_1_TRANS 0x00000200
-#define DF_1_INTERPOSE 0x00000400
-#define DF_1_NODEFLIB 0x00000800
-#define DF_1_NODUMP 0x00001000
-#define DF_1_CONLFAT 0x00002000
-
-/* ld.so: number of low tags that are used saved internally (0 .. DT_NUM-1) */
-#define DT_NUM (DT_JMPREL + 1)
-
-/*
- * Note Definitions
- */
-typedef struct
-{
- Elf32_Word namesz;
- Elf32_Word descsz;
- Elf32_Word type;
-} Elf32_Note;
-
-typedef struct
-{
- Elf64_Half namesz;
- Elf64_Half descsz;
- Elf64_Half type;
-} Elf64_Note;
-
-#if defined(ELFSIZE) && (ELFSIZE == 32)
-#define Elf_Ehdr Elf32_Ehdr
-#define Elf_Phdr Elf32_Phdr
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define Elf_Rel Elf32_Rel
-#define Elf_RelA Elf32_Rela
-#define Elf_Dyn Elf32_Dyn
-#define Elf_Half Elf32_Half
-#define Elf_Word Elf32_Word
-#define Elf_Sword Elf32_Sword
-#define Elf_Addr Elf32_Addr
-#define Elf_Off Elf32_Off
-#define Elf_Nhdr Elf32_Nhdr
-#define Elf_Note Elf32_Note
-
-#define ELF_R_SYM ELF32_R_SYM
-#define ELF_R_TYPE ELF32_R_TYPE
-#define ELF_R_INFO ELF32_R_INFO
-#define ELFCLASS ELFCLASS32
-
-#define ELF_ST_BIND ELF32_ST_BIND
-#define ELF_ST_TYPE ELF32_ST_TYPE
-#define ELF_ST_INFO ELF32_ST_INFO
-
-#elif defined(ELFSIZE) && (ELFSIZE == 64)
-
-#define Elf_Ehdr Elf64_Ehdr
-#define Elf_Phdr Elf64_Phdr
-#define Elf_Shdr Elf64_Shdr
-#define Elf_Sym Elf64_Sym
-#define Elf_Rel Elf64_Rel
-#define Elf_RelA Elf64_Rela
-#define Elf_Dyn Elf64_Dyn
-#define Elf_Half Elf64_Half
-#define Elf_Word Elf64_Word
-#define Elf_Sword Elf64_Sword
-#define Elf_Addr Elf64_Addr
-#define Elf_Off Elf64_Off
-#define Elf_Nhdr Elf64_Nhdr
-#define Elf_Note Elf64_Note
-
-#define ELF_R_SYM ELF64_R_SYM
-#define ELF_R_TYPE ELF64_R_TYPE
-#define ELF_R_INFO ELF64_R_INFO
-#define ELFCLASS ELFCLASS64
-
-#define ELF_ST_BIND ELF64_ST_BIND
-#define ELF_ST_TYPE ELF64_ST_TYPE
-#define ELF_ST_INFO ELF64_ST_INFO
-
-#endif
-
-#endif
diff --git a/nyx/nyx_gui/libs/elfload/elfarch.h b/nyx/nyx_gui/libs/elfload/elfarch.h
deleted file mode 100644
index f1cc388..0000000
--- a/nyx/nyx_gui/libs/elfload/elfarch.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright © 2014, Owen Shepherd
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
- * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
- * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
- * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
- * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
- * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef ELFARCH_H
-#define ELFARCH_H
-
-#if defined(__i386__)
-#define EM_THIS EM_386
-#define EL_ARCH_USES_REL
-#elif defined(__amd64__)
-#define EM_THIS EM_AMD64
-#define EL_ARCH_USES_RELA
-#elif defined(__arm__)
-#define EM_THIS EM_ARM
-#define EL_ARCH_USES_REL
-#elif defined(__aarch64__)
-#define EM_THIS EM_AARCH64
-#define EL_ARCH_USES_RELA
-#define EL_ARCH_USES_REL
-#else
-#error specify your ELF architecture
-#endif
-
-#if defined(__LP64__) || defined(__LLP64__)
-#define ELFSIZE 64
-#else
-#define ELFSIZE 32
-#endif
-
-#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
-#define ELFDATATHIS ELFDATA2LSB
-#else
-#define ELFDATATHIS ELFDATA2MSB
-#endif
-
-#endif
diff --git a/nyx/nyx_gui/libs/elfload/elfload.c b/nyx/nyx_gui/libs/elfload/elfload.c
deleted file mode 100644
index 16f8200..0000000
--- a/nyx/nyx_gui/libs/elfload/elfload.c
+++ /dev/null
@@ -1,324 +0,0 @@
-/*
- * Copyright © 2018, M4xw
- * Copyright © 2014, Owen Shepherd
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
- * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
- * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
- * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
- * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
- * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include
-
-#include "elfload.h"
-
-el_status el_pread(el_ctx *ctx, void *def, size_t nb, size_t offset)
-{
- return ctx->pread(ctx, def, nb, offset) ? EL_OK : EL_EIO;
-}
-
-#define EL_PHOFF(ctx, num) (((ctx)->ehdr.e_phoff + (num) *(ctx)->ehdr.e_phentsize))
-el_status el_findphdr(el_ctx *ctx, Elf_Phdr *phdr, uint32_t type, unsigned *i)
-{
- el_status rv = EL_OK;
- for (; *i < ctx->ehdr.e_phnum; (*i)++)
- {
- if ((rv = el_pread(ctx, phdr, sizeof *phdr, EL_PHOFF(ctx, *i))))
- return rv;
-
- if (phdr->p_type == type)
- {
- return rv;
- }
- }
-
- *i = -1;
- return rv;
-}
-
-#define EL_SHOFF(ctx, num) (((ctx)->ehdr.e_shoff + (num) *(ctx)->ehdr.e_shentsize))
-el_status el_findshdr(el_ctx *ctx, Elf_Shdr *shdr, uint32_t type, unsigned *i)
-{
- el_status rv = EL_OK;
-
- for (; *i < ctx->ehdr.e_shnum; (*i)++)
- {
- if ((rv = el_pread(ctx, shdr, sizeof *shdr, EL_SHOFF(ctx, *i))))
-
- return rv;
-
- if (shdr->sh_type == type)
- {
- return rv;
- }
- }
-
- *i = -1;
-
- return rv;
-}
-
-el_status el_init(el_ctx *ctx)
-{
- el_status rv = EL_OK;
- if ((rv = el_pread(ctx, &ctx->ehdr, sizeof ctx->ehdr, 0)))
- return rv;
-
- /* validate header */
-
- if (!IS_ELF(ctx->ehdr))
- return EL_NOTELF;
-
- if (ctx->ehdr.e_ident[EI_CLASS] != ELFCLASS)
- return EL_WRONGBITS;
-
- if (ctx->ehdr.e_ident[EI_DATA] != ELFDATATHIS)
- return EL_WRONGENDIAN;
-
- if (ctx->ehdr.e_ident[EI_VERSION] != EV_CURRENT)
- return EL_NOTELF;
-
- if (ctx->ehdr.e_type != ET_EXEC && ctx->ehdr.e_type != ET_DYN)
- return EL_NOTEXEC;
-
- if (ctx->ehdr.e_machine != EM_THIS)
- return EL_WRONGARCH;
-
- if (ctx->ehdr.e_version != EV_CURRENT)
- return EL_NOTELF;
-
- /* load phdrs */
- Elf_Phdr ph;
-
- /* iterate through, calculate extents */
- ctx->base_load_paddr = ctx->base_load_vaddr = 0;
- ctx->align = 1;
- ctx->memsz = 0;
-
- unsigned i = 0;
- for (;;)
- {
- if ((rv = el_findphdr(ctx, &ph, PT_LOAD, &i)))
- return rv;
-
- if (i == (unsigned)-1)
- break;
-
- Elf_Addr phend = ph.p_vaddr + ph.p_memsz;
- if (phend > ctx->memsz)
- ctx->memsz = phend;
-
- if (ph.p_align > ctx->align)
- ctx->align = ph.p_align;
-
- i++;
- }
-
- // Program Header
- if (ctx->ehdr.e_type == ET_DYN)
- {
- i = 0;
-
- if ((rv = el_findphdr(ctx, &ph, PT_DYNAMIC, &i)))
- return rv;
-
- if (i == (unsigned)-1)
- return EL_NODYN;
-
- ctx->dynoff = ph.p_offset;
- ctx->dynsize = ph.p_filesz;
- }
- else
- {
- ctx->dynoff = 0;
- ctx->dynsize = 0;
- }
-
- // Section String Table
- if (ctx->ehdr.e_type == ET_DYN)
- {
- i = ctx->ehdr.e_shstrndx - 1;
-
- if ((rv = el_findshdr(ctx, &ctx->shstr, SHT_STRTAB, &i)))
- return rv;
-
- // Reset
- i = 0;
-
- if ((rv = el_findshdr(ctx, &ctx->symtab, SHT_SYMTAB, &i)))
- return rv;
-
- if (i == (unsigned)-1)
- return EL_NODYN;
- }
-
- return rv;
-}
-
-/*
-typedef void* (*el_alloc_cb)(
- el_ctx *ctx,
- Elf_Addr phys,
- Elf_Addr virt,
- Elf_Addr size);
-*/
-
-el_status el_load(el_ctx *ctx, el_alloc_cb alloc)
-{
- el_status rv = EL_OK;
-
- /* address deltas */
- Elf_Addr pdelta = ctx->base_load_paddr;
- Elf_Addr vdelta = ctx->base_load_vaddr;
-
- /* iterate paddrs */
- Elf_Phdr ph;
- unsigned i = 0;
- for (;;)
- {
- if ((rv = el_findphdr(ctx, &ph, PT_LOAD, &i)))
- return rv;
-
- if (i == (unsigned)-1)
- break;
-
- Elf_Addr pload = ph.p_paddr + pdelta;
- Elf_Addr vload = ph.p_vaddr + vdelta;
-
- /* allocate mem */
- char *dest = alloc(ctx, pload, vload, ph.p_memsz);
- if (!dest)
- return EL_ENOMEM;
-
- EL_DEBUG("Loading seg fileoff %x, vaddr %x to %p\n",
- ph.p_offset, ph.p_vaddr, dest);
-
- /* read loaded portion */
- if ((rv = el_pread(ctx, dest, ph.p_filesz, ph.p_offset)))
- return rv;
-
- /* zero mem-only portion */
- memset(dest + ph.p_filesz, 0, ph.p_memsz - ph.p_filesz);
-
- i++;
- }
-
- return rv;
-}
-
-el_status el_finddyn(el_ctx *ctx, Elf_Dyn *dyn, uint32_t tag)
-{
- el_status rv = EL_OK;
- size_t ndyn = ctx->dynsize / sizeof(Elf_Dyn);
-
- for (unsigned i = 0; i < ndyn; i++)
- {
- if ((rv = el_pread(ctx, dyn, sizeof *dyn, ctx->dynoff + i * sizeof *dyn)))
- return rv;
-
- if (dyn->d_tag == tag)
- return EL_OK;
- }
-
- dyn->d_tag = DT_NULL;
- return EL_OK;
-}
-
-el_status el_findrelocs(el_ctx *ctx, el_relocinfo *ri, uint32_t type)
-{
- el_status rv = EL_OK;
-
- Elf_Dyn rel, relsz, relent;
-
- if ((rv = el_finddyn(ctx, &rel, type)))
- return rv;
-
- if ((rv = el_finddyn(ctx, &relsz, type + 1)))
- return rv;
-
- if ((rv = el_finddyn(ctx, &relent, type + 2)))
- return rv;
-
- if (rel.d_tag == DT_NULL || relsz.d_tag == DT_NULL || relent.d_tag == DT_NULL)
- {
- ri->entrysize = 0;
- ri->tablesize = 0;
- ri->tableoff = 0;
- }
- else
- {
- ri->tableoff = rel.d_un.d_ptr;
- ri->tablesize = relsz.d_un.d_val;
- ri->entrysize = relent.d_un.d_val;
- }
-
- return rv;
-}
-
-extern el_status el_applyrel(el_ctx *ctx, Elf_Rel *rel);
-extern el_status el_applyrela(el_ctx *ctx, Elf_RelA *rela);
-
-el_status el_relocate(el_ctx *ctx)
-{
- el_status rv = EL_OK;
-
- // not dynamic
- if (ctx->ehdr.e_type != ET_DYN)
- return EL_OK;
-
- char *base = (char *)ctx->base_load_paddr;
-
- el_relocinfo ri;
-#ifdef EL_ARCH_USES_REL
- if ((rv = el_findrelocs(ctx, &ri, DT_REL)))
- return rv;
-
- if (ri.entrysize != sizeof(Elf_Rel) && ri.tablesize)
- {
- EL_DEBUG("Relocation size %u doesn't match expected %u\n",
- ri.entrysize, sizeof(Elf_Rel));
- return EL_BADREL;
- }
-
- size_t relcnt = ri.tablesize / sizeof(Elf_Rel);
- Elf_Rel *reltab = (Elf_Rel *)(base + ri.tableoff);
- for (size_t i = 0; i < relcnt; i++)
- {
- if ((rv = el_applyrel(ctx, &reltab[i])))
- return rv;
- }
-#endif
-
-#ifdef EL_ARCH_USES_RELA
- if ((rv = el_findrelocs(ctx, &ri, DT_RELA)))
- return rv;
-
- if (ri.entrysize != sizeof(Elf_RelA) && ri.tablesize)
- {
- EL_DEBUG("Relocation size %u doesn't match expected %u\n",
- ri.entrysize, sizeof(Elf_RelA));
- return EL_BADREL;
- }
-
- size_t relacnt = ri.tablesize / sizeof(Elf_RelA);
- Elf_RelA *relatab = (Elf_RelA *)(base + ri.tableoff);
- for (size_t i = 0; i < relacnt; i++)
- {
- if ((rv = el_applyrela(ctx, &relatab[i])))
- return rv;
- }
-#endif
-
-#if !defined(EL_ARCH_USES_REL) && !defined(EL_ARCH_USES_RELA)
-#error No relocation type defined!
-#endif
-
- return rv;
-}
diff --git a/nyx/nyx_gui/libs/elfload/elfload.h b/nyx/nyx_gui/libs/elfload/elfload.h
deleted file mode 100644
index 3a15dc2..0000000
--- a/nyx/nyx_gui/libs/elfload/elfload.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * Copyright © 2018, M4xw
- * Copyright © 2014, Owen Shepherd
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
- * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
- * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
- * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
- * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
- * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef ELFLOAD_H
-#define ELFLOAD_H
-#include
-
-#include "elfarch.h"
-#include "elf.h"
-
-#include "../../utils/types.h"
-
-#ifdef DEBUG
-#include "../../gfx/gfx.h"
-#define EL_DEBUG(format, ...) \
- gfx_printf(format __VA_OPT__(, ) __VA_ARGS__)
-#else
-#define EL_DEBUG(...) \
- do \
- { \
- } while (0)
-#endif
-
-typedef enum
-{
- EL_OK = 0,
-
- EL_EIO,
- EL_ENOMEM,
-
- EL_NOTELF,
- EL_WRONGBITS,
- EL_WRONGENDIAN,
- EL_WRONGARCH,
- EL_WRONGOS,
- EL_NOTEXEC,
- EL_NODYN,
- EL_BADREL,
-
-} el_status;
-
-typedef struct el_ctx
-{
- bool (*pread)(struct el_ctx *ctx, void *dest, size_t nb, size_t offset);
-
- /* base_load_* -> address we are actually going to load at
- */
- Elf_Addr
- base_load_paddr,
- base_load_vaddr;
-
- /* size in memory of binary */
- Elf_Addr memsz;
-
- /* required alignment */
- Elf_Addr align;
-
- /* ELF header */
- Elf_Ehdr ehdr;
-
- // Section Header Str Table
- Elf_Shdr shstr;
- Elf_Shdr symtab;
-
- /* Offset of dynamic table (0 if not ET_DYN) */
- Elf_Off dynoff;
- /* Size of dynamic table (0 if not ET_DYN) */
- Elf_Addr dynsize;
-} el_ctx;
-
-el_status el_pread(el_ctx *ctx, void *def, size_t nb, size_t offset);
-
-el_status el_init(el_ctx *ctx);
-typedef void *(*el_alloc_cb)(
- el_ctx *ctx,
- Elf_Addr phys,
- Elf_Addr virt,
- Elf_Addr size);
-
-el_status el_load(el_ctx *ctx, el_alloc_cb alloccb);
-
-/* find the next phdr of type \p type, starting at \p *i.
- * On success, returns EL_OK with *i set to the phdr number, and the phdr loaded
- * in *phdr.
- *
- * If the end of the phdrs table was reached, *i is set to -1 and the contents
- * of *phdr are undefined
- */
-el_status el_findphdr(el_ctx *ctx, Elf_Phdr *phdr, uint32_t type, unsigned *i);
-
-/* Relocate the loaded executable */
-el_status el_relocate(el_ctx *ctx);
-
-/* find a dynamic table entry
- * returns the entry on success, dyn->d_tag = DT_NULL on failure
- */
-el_status el_finddyn(el_ctx *ctx, Elf_Dyn *dyn, uint32_t type);
-
-typedef struct
-{
- Elf_Off tableoff;
- Elf_Addr tablesize;
- Elf_Addr entrysize;
-} el_relocinfo;
-
-/* find all information regarding relocations of a specific type.
- *
- * pass DT_REL or DT_RELA for type
- * sets ri->entrysize = 0 if not found
- */
-el_status el_findrelocs(el_ctx *ctx, el_relocinfo *ri, uint32_t type);
-
-#endif
diff --git a/nyx/nyx_gui/libs/elfload/elfreloc_aarch64.c b/nyx/nyx_gui/libs/elfload/elfreloc_aarch64.c
deleted file mode 100644
index bbb0ce4..0000000
--- a/nyx/nyx_gui/libs/elfload/elfreloc_aarch64.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright © 2014, Owen Shepherd
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
- * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
- * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
- * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
- * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
- * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include "elfload.h"
-
-#if defined(__aarch64__)
-
-#define R_AARCH64_NONE 0
-#define R_AARCH64_RELATIVE 1027
-
-el_status el_applyrela(el_ctx *ctx, Elf_RelA *rel)
-{
- uintptr_t *p = (uintptr_t *)(rel->r_offset + ctx->base_load_paddr);
- uint32_t type = ELF_R_TYPE(rel->r_info);
- uint32_t sym = ELF_R_SYM(rel->r_info);
-
- switch (type)
- {
- case R_AARCH64_NONE:
- EL_DEBUG("R_AARCH64_NONE\n");
- break;
- case R_AARCH64_RELATIVE:
- if (sym)
- {
- EL_DEBUG("R_AARCH64_RELATIVE with symbol ref!\n");
- return EL_BADREL;
- }
-
- EL_DEBUG("Applying R_AARCH64_RELATIVE reloc @%p\n", p);
- *p = rel->r_addend + ctx->base_load_vaddr;
- break;
-
- default:
- EL_DEBUG("Bad relocation %u\n", type);
- return EL_BADREL;
- }
-
- return EL_OK;
-}
-
-el_status el_applyrel(el_ctx *ctx, Elf_Rel *rel)
-{
- uintptr_t *p = (uintptr_t *)(rel->r_offset + ctx->base_load_paddr);
- uint32_t type = ELF_R_TYPE(rel->r_info);
- uint32_t sym = ELF_R_SYM(rel->r_info);
-
- switch (type)
- {
- case R_AARCH64_NONE:
- EL_DEBUG("R_AARCH64_NONE\n");
- break;
- case R_AARCH64_RELATIVE:
- if (sym)
- {
- EL_DEBUG("R_AARCH64_RELATIVE with symbol ref!\n");
- return EL_BADREL;
- }
-
- EL_DEBUG("Applying R_AARCH64_RELATIVE reloc @%p\n", p);
- *p += ctx->base_load_vaddr;
- break;
-
- default:
- EL_DEBUG("Bad relocation %u\n", type);
- return EL_BADREL;
- }
-
- return EL_OK;
-}
-
-#endif
diff --git a/nyx/nyx_gui/libs/elfload/elfreloc_arm.c b/nyx/nyx_gui/libs/elfload/elfreloc_arm.c
deleted file mode 100644
index 8b905cb..0000000
--- a/nyx/nyx_gui/libs/elfload/elfreloc_arm.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * ----------------------------------------------------------------------------
- * "THE BEER-WARE LICENSE" (Revision 42):
- * wrote this file. As long as you retain this notice you can do
- * whatever you want with this stuff. If we meet some day, and you think this
- * stuff is worth it, you can buy me a beer in return. M4xw
- * ----------------------------------------------------------------------------
- */
-
-#include "elfload.h"
-
-#if defined(__arm__)
-
-// Taken from http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044f/IHI0044F_aaelf.pdf
-#define R_ARM_NONE 0
-#define R_ARM_ABS32 2
-#define R_ARM_JUMP_SLOT 22
-#define R_ARM_GLOB_DAT 21
-#define R_ARM_RELATIVE 23
-
-el_status el_applyrel(el_ctx *ctx, Elf_Rel *rel)
-{
- uint32_t sym = ELF_R_SYM(rel->r_info); // Symbol offset
- uint32_t type = ELF_R_TYPE(rel->r_info); // Relocation Type
- uintptr_t *p = (uintptr_t *)(rel->r_offset + ctx->base_load_paddr); // Target Addr
-
-#if 0 // For later symbol usage
- Elf32_Sym *elfSym;
- const char *symbolName;
-
- // We resolve relocs from the originating elf-image
- elfSym = (Elf32_Sym *)(ctx->symtab.sh_offset + (char *)buffteg) + sym;
- int strtab_offset = ctx->shstr.sh_offset;
- char *strtab = (char *)buffteg + strtab_offset;
- symbolName = strtab + elfSym->st_name;
- //EL_DEBUG("Str: %s sz: %x val: %x\n", symbolName, elfSym->st_size, elfSym->st_value);
-#endif
-
- switch (type)
- {
- case R_ARM_NONE:
- EL_DEBUG("R_ARM_NONE\n");
- break;
- case R_ARM_JUMP_SLOT:
- case R_ARM_ABS32:
- case R_ARM_GLOB_DAT:
- // Stubbed for later purpose
- //*p += elfSym->st_value; // + vaddr from sec
- //*p |= 0; // 1 if Thumb && STT_FUNC, ignored for now
- break;
- case R_ARM_RELATIVE: // Needed for PIE
- if (sym)
- {
- return EL_BADREL;
- }
- *p += ctx->base_load_vaddr;
- break;
-
- default:
- return EL_BADREL;
- }
-
- return EL_OK;
-}
-
-#endif
diff --git a/nyx/nyx_gui/libs/fatfs/diskio.h b/nyx/nyx_gui/libs/fatfs/diskio.h
deleted file mode 100644
index 31b855d..0000000
--- a/nyx/nyx_gui/libs/fatfs/diskio.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*-----------------------------------------------------------------------/
-/ Low level disk interface modlue include file (C)ChaN, 2014 /
-/-----------------------------------------------------------------------*/
-
-#ifndef _DISKIO_DEFINED
-#define _DISKIO_DEFINED
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "../../utils/types.h"
-
-/* Status of Disk Functions */
-typedef BYTE DSTATUS;
-
-/* Results of Disk Functions */
-typedef enum {
- RES_OK = 0, /* 0: Successful */
- RES_ERROR, /* 1: R/W Error */
- RES_WRPRT, /* 2: Write Protected */
- RES_NOTRDY, /* 3: Not Ready */
- RES_PARERR /* 4: Invalid Parameter */
-} DRESULT;
-
-typedef enum {
- DRIVE_SD = 0,
- DRIVE_RAM = 1,
- DRIVE_EMMC = 2,
- DRIVE_BIS = 3
-} DDRIVE;
-
-
-/*---------------------------------------*/
-/* Prototypes for disk control functions */
-
-
-DSTATUS disk_initialize (BYTE pdrv);
-DSTATUS disk_status (BYTE pdrv);
-DRESULT disk_read (BYTE pdrv, BYTE* buff, DWORD sector, UINT count);
-DRESULT disk_write (BYTE pdrv, const BYTE* buff, DWORD sector, UINT count);
-DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff);
-DRESULT disk_set_info (BYTE pdrv, BYTE cmd, void *buff);
-
-
-/* Disk Status Bits (DSTATUS) */
-
-#define STA_NOINIT 0x01 /* Drive not initialized */
-#define STA_NODISK 0x02 /* No medium in the drive */
-#define STA_PROTECT 0x04 /* Write protected */
-
-
-/* Command code for disk_ioctrl fucntion */
-
-/* Generic command (Used by FatFs) */
-#define CTRL_SYNC 0 /* Complete pending write process (needed at FF_FS_READONLY == 0) */
-#define GET_SECTOR_COUNT 1 /* Get media size (needed at FF_USE_MKFS == 1) */
-#define SET_SECTOR_COUNT 1 /* Set media size (needed at FF_USE_MKFS == 1) */
-#define GET_SECTOR_SIZE 2 /* Get sector size (needed at FF_MAX_SS != FF_MIN_SS) */
-#define GET_BLOCK_SIZE 3 /* Get erase block size (needed at FF_USE_MKFS == 1) */
-#define CTRL_TRIM 4 /* Inform device that the data on the block of sectors is no longer used (needed at FF_USE_TRIM == 1) */
-
-/* Generic command (Not used by FatFs) */
-#define CTRL_POWER 5 /* Get/Set power status */
-#define CTRL_LOCK 6 /* Lock/Unlock media removal */
-#define CTRL_EJECT 7 /* Eject media */
-#define CTRL_FORMAT 8 /* Create physical format on the media */
-
-/* MMC/SDC specific ioctl command */
-#define MMC_GET_TYPE 10 /* Get card type */
-#define MMC_GET_CSD 11 /* Get CSD */
-#define MMC_GET_CID 12 /* Get CID */
-#define MMC_GET_OCR 13 /* Get OCR */
-#define MMC_GET_SDSTAT 14 /* Get SD status */
-#define ISDIO_READ 55 /* Read data form SD iSDIO register */
-#define ISDIO_WRITE 56 /* Write data to SD iSDIO register */
-#define ISDIO_MRITE 57 /* Masked write data to SD iSDIO register */
-
-/* ATA/CF specific ioctl command */
-#define ATA_GET_REV 20 /* Get F/W revision */
-#define ATA_GET_MODEL 21 /* Get model name */
-#define ATA_GET_SN 22 /* Get serial number */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/nyx/nyx_gui/libs/fatfs/ff.c b/nyx/nyx_gui/libs/fatfs/ff.c
deleted file mode 100644
index c6c4d75..0000000
--- a/nyx/nyx_gui/libs/fatfs/ff.c
+++ /dev/null
@@ -1,6860 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-/*----------------------------------------------------------------------------/
-/ FatFs - Generic FAT Filesystem Module R0.13c (p4) /
-/-----------------------------------------------------------------------------/
-/
-/ Copyright (C) 2018, ChaN, all right reserved.
-/
-/ FatFs module is an open source software. Redistribution and use of FatFs in
-/ source and binary forms, with or without modification, are permitted provided
-/ that the following condition is met:
-/
-/ 1. Redistributions of source code must retain the above copyright notice,
-/ this condition and the following disclaimer.
-/
-/ This software is provided by the copyright holder and contributors "AS IS"
-/ and any warranties related to this software are DISCLAIMED.
-/ The copyright owner or contributors be NOT LIABLE for any damages caused
-/ by use of this software.
-/
-/----------------------------------------------------------------------------*/
-
-
-#include "ff.h" /* Declarations of FatFs API */
-#include "diskio.h" /* Declarations of device I/O functions */
-#include "../../gfx/gfx.h"
-
-#define EFSPRINTF(text, ...) print_error(); gfx_printf("%k"text"%k\n", 0xFFFFFF00, 0xFFFFFFFF);
-//#define EFSPRINTF(...)
-
-/*--------------------------------------------------------------------------
-
- Module Private Definitions
-
----------------------------------------------------------------------------*/
-
-#if FF_DEFINED != 86604 /* Revision ID */
-#error Wrong include file (ff.h).
-#endif
-
-
-/* Limits and boundaries */
-#define MAX_DIR 0x200000 /* Max size of FAT directory */
-#define MAX_DIR_EX 0x10000000 /* Max size of exFAT directory */
-#define MAX_FAT12 0xFF5 /* Max FAT12 clusters (differs from specs, but right for real DOS/Windows behavior) */
-#define MAX_FAT16 0xFFF5 /* Max FAT16 clusters (differs from specs, but right for real DOS/Windows behavior) */
-#define MAX_FAT32 0x0FFFFFF5 /* Max FAT32 clusters (not specified, practical limit) */
-#define MAX_EXFAT 0x7FFFFFFD /* Max exFAT clusters (differs from specs, implementation limit) */
-
-
-/* Character code support macros */
-#define IsUpper(c) ((c) >= 'A' && (c) <= 'Z')
-#define IsLower(c) ((c) >= 'a' && (c) <= 'z')
-#define IsDigit(c) ((c) >= '0' && (c) <= '9')
-#define IsSurrogate(c) ((c) >= 0xD800 && (c) <= 0xDFFF)
-#define IsSurrogateH(c) ((c) >= 0xD800 && (c) <= 0xDBFF)
-#define IsSurrogateL(c) ((c) >= 0xDC00 && (c) <= 0xDFFF)
-
-
-/* Additional file access control and file status flags for internal use */
-#define FA_SEEKEND 0x20 /* Seek to end of the file on file open */
-#define FA_MODIFIED 0x40 /* File has been modified */
-#define FA_DIRTY 0x80 /* FIL.buf[] needs to be written-back */
-
-
-/* Additional file attribute bits for internal use */
-#define AM_VOL 0x08 /* Volume label */
-#define AM_LFN 0x0F /* LFN entry */
-#define AM_MASK 0x3F /* Mask of defined bits */
-
-
-/* Name status flags in fn[11] */
-#define NSFLAG 11 /* Index of the name status byte */
-#define NS_LOSS 0x01 /* Out of 8.3 format */
-#define NS_LFN 0x02 /* Force to create LFN entry */
-#define NS_LAST 0x04 /* Last segment */
-#define NS_BODY 0x08 /* Lower case flag (body) */
-#define NS_EXT 0x10 /* Lower case flag (ext) */
-#define NS_DOT 0x20 /* Dot entry */
-#define NS_NOLFN 0x40 /* Do not find LFN */
-#define NS_NONAME 0x80 /* Not followed */
-
-
-/* exFAT directory entry types */
-#define ET_BITMAP 0x81 /* Allocation bitmap */
-#define ET_UPCASE 0x82 /* Up-case table */
-#define ET_VLABEL 0x83 /* Volume label */
-#define ET_FILEDIR 0x85 /* File and directory */
-#define ET_STREAM 0xC0 /* Stream extension */
-#define ET_FILENAME 0xC1 /* Name extension */
-
-
-/* FatFs refers the FAT structure as simple byte array instead of structure member
-/ because the C structure is not binary compatible between different platforms */
-
-#define BS_JmpBoot 0 /* x86 jump instruction (3-byte) */
-#define BS_OEMName 3 /* OEM name (8-byte) */
-#define BPB_BytsPerSec 11 /* Sector size [byte] (WORD) */
-#define BPB_SecPerClus 13 /* Cluster size [sector] (BYTE) */
-#define BPB_RsvdSecCnt 14 /* Size of reserved area [sector] (WORD) */
-#define BPB_NumFATs 16 /* Number of FATs (BYTE) */
-#define BPB_RootEntCnt 17 /* Size of root directory area for FAT [entry] (WORD) */
-#define BPB_TotSec16 19 /* Volume size (16-bit) [sector] (WORD) */
-#define BPB_Media 21 /* Media descriptor byte (BYTE) */
-#define BPB_FATSz16 22 /* FAT size (16-bit) [sector] (WORD) */
-#define BPB_SecPerTrk 24 /* Number of sectors per track for int13h [sector] (WORD) */
-#define BPB_NumHeads 26 /* Number of heads for int13h (WORD) */
-#define BPB_HiddSec 28 /* Volume offset from top of the drive (DWORD) */
-#define BPB_TotSec32 32 /* Volume size (32-bit) [sector] (DWORD) */
-#define BS_DrvNum 36 /* Physical drive number for int13h (BYTE) */
-#define BS_NTres 37 /* WindowsNT error flag (BYTE) */
-#define BS_BootSig 38 /* Extended boot signature (BYTE) */
-#define BS_VolID 39 /* Volume serial number (DWORD) */
-#define BS_VolLab 43 /* Volume label string (8-byte) */
-#define BS_FilSysType 54 /* Filesystem type string (8-byte) */
-#define BS_BootCode 62 /* Boot code (448-byte) */
-#define BS_55AA 510 /* Signature word (WORD) */
-
-#define BPB_FATSz32 36 /* FAT32: FAT size [sector] (DWORD) */
-#define BPB_ExtFlags32 40 /* FAT32: Extended flags (WORD) */
-#define BPB_FSVer32 42 /* FAT32: Filesystem version (WORD) */
-#define BPB_RootClus32 44 /* FAT32: Root directory cluster (DWORD) */
-#define BPB_FSInfo32 48 /* FAT32: Offset of FSINFO sector (WORD) */
-#define BPB_BkBootSec32 50 /* FAT32: Offset of backup boot sector (WORD) */
-#define BS_DrvNum32 64 /* FAT32: Physical drive number for int13h (BYTE) */
-#define BS_NTres32 65 /* FAT32: Error flag (BYTE) */
-#define BS_BootSig32 66 /* FAT32: Extended boot signature (BYTE) */
-#define BS_VolID32 67 /* FAT32: Volume serial number (DWORD) */
-#define BS_VolLab32 71 /* FAT32: Volume label string (8-byte) */
-#define BS_FilSysType32 82 /* FAT32: Filesystem type string (8-byte) */
-#define BS_BootCode32 90 /* FAT32: Boot code (420-byte) */
-
-#define BPB_ZeroedEx 11 /* exFAT: MBZ field (53-byte) */
-#define BPB_VolOfsEx 64 /* exFAT: Volume offset from top of the drive [sector] (QWORD) */
-#define BPB_TotSecEx 72 /* exFAT: Volume size [sector] (QWORD) */
-#define BPB_FatOfsEx 80 /* exFAT: FAT offset from top of the volume [sector] (DWORD) */
-#define BPB_FatSzEx 84 /* exFAT: FAT size [sector] (DWORD) */
-#define BPB_DataOfsEx 88 /* exFAT: Data offset from top of the volume [sector] (DWORD) */
-#define BPB_NumClusEx 92 /* exFAT: Number of clusters (DWORD) */
-#define BPB_RootClusEx 96 /* exFAT: Root directory start cluster (DWORD) */
-#define BPB_VolIDEx 100 /* exFAT: Volume serial number (DWORD) */
-#define BPB_FSVerEx 104 /* exFAT: Filesystem version (WORD) */
-#define BPB_VolFlagEx 106 /* exFAT: Volume flags (WORD) */
-#define BPB_BytsPerSecEx 108 /* exFAT: Log2 of sector size in unit of byte (BYTE) */
-#define BPB_SecPerClusEx 109 /* exFAT: Log2 of cluster size in unit of sector (BYTE) */
-#define BPB_NumFATsEx 110 /* exFAT: Number of FATs (BYTE) */
-#define BPB_DrvNumEx 111 /* exFAT: Physical drive number for int13h (BYTE) */
-#define BPB_PercInUseEx 112 /* exFAT: Percent in use (BYTE) */
-#define BPB_RsvdEx 113 /* exFAT: Reserved (7-byte) */
-#define BS_BootCodeEx 120 /* exFAT: Boot code (390-byte) */
-
-#define DIR_Name 0 /* Short file name (11-byte) */
-#define DIR_Attr 11 /* Attribute (BYTE) */
-#define DIR_NTres 12 /* Lower case flag (BYTE) */
-#define DIR_CrtTime10 13 /* Created time sub-second (BYTE) */
-#define DIR_CrtTime 14 /* Created time (DWORD) */
-#define DIR_LstAccDate 18 /* Last accessed date (WORD) */
-#define DIR_FstClusHI 20 /* Higher 16-bit of first cluster (WORD) */
-#define DIR_ModTime 22 /* Modified time (DWORD) */
-#define DIR_FstClusLO 26 /* Lower 16-bit of first cluster (WORD) */
-#define DIR_FileSize 28 /* File size (DWORD) */
-#define LDIR_Ord 0 /* LFN: LFN order and LLE flag (BYTE) */
-#define LDIR_Attr 11 /* LFN: LFN attribute (BYTE) */
-#define LDIR_Type 12 /* LFN: Entry type (BYTE) */
-#define LDIR_Chksum 13 /* LFN: Checksum of the SFN (BYTE) */
-#define LDIR_FstClusLO 26 /* LFN: MBZ field (WORD) */
-#define XDIR_Type 0 /* exFAT: Type of exFAT directory entry (BYTE) */
-#define XDIR_NumLabel 1 /* exFAT: Number of volume label characters (BYTE) */
-#define XDIR_Label 2 /* exFAT: Volume label (11-WORD) */
-#define XDIR_CaseSum 4 /* exFAT: Sum of case conversion table (DWORD) */
-#define XDIR_NumSec 1 /* exFAT: Number of secondary entries (BYTE) */
-#define XDIR_SetSum 2 /* exFAT: Sum of the set of directory entries (WORD) */
-#define XDIR_Attr 4 /* exFAT: File attribute (WORD) */
-#define XDIR_CrtTime 8 /* exFAT: Created time (DWORD) */
-#define XDIR_ModTime 12 /* exFAT: Modified time (DWORD) */
-#define XDIR_AccTime 16 /* exFAT: Last accessed time (DWORD) */
-#define XDIR_CrtTime10 20 /* exFAT: Created time subsecond (BYTE) */
-#define XDIR_ModTime10 21 /* exFAT: Modified time subsecond (BYTE) */
-#define XDIR_CrtTZ 22 /* exFAT: Created timezone (BYTE) */
-#define XDIR_ModTZ 23 /* exFAT: Modified timezone (BYTE) */
-#define XDIR_AccTZ 24 /* exFAT: Last accessed timezone (BYTE) */
-#define XDIR_GenFlags 33 /* exFAT: General secondary flags (BYTE) */
-#define XDIR_NumName 35 /* exFAT: Number of file name characters (BYTE) */
-#define XDIR_NameHash 36 /* exFAT: Hash of file name (WORD) */
-#define XDIR_ValidFileSize 40 /* exFAT: Valid file size (QWORD) */
-#define XDIR_FstClus 52 /* exFAT: First cluster of the file data (DWORD) */
-#define XDIR_FileSize 56 /* exFAT: File/Directory size (QWORD) */
-
-#define SZDIRE 32 /* Size of a directory entry */
-#define DDEM 0xE5 /* Deleted directory entry mark set to DIR_Name[0] */
-#define RDDEM 0x05 /* Replacement of the character collides with DDEM */
-#define LLEF 0x40 /* Last long entry flag in LDIR_Ord */
-
-#define FSI_LeadSig 0 /* FAT32 FSI: Leading signature (DWORD) */
-#define FSI_StrucSig 484 /* FAT32 FSI: Structure signature (DWORD) */
-#define FSI_Free_Count 488 /* FAT32 FSI: Number of free clusters (DWORD) */
-#define FSI_Nxt_Free 492 /* FAT32 FSI: Last allocated cluster (DWORD) */
-
-#define MBR_Table 446 /* MBR: Offset of partition table in the MBR */
-#define SZ_PTE 16 /* MBR: Size of a partition table entry */
-#define PTE_Boot 0 /* MBR PTE: Boot indicator */
-#define PTE_StHead 1 /* MBR PTE: Start head */
-#define PTE_StSec 2 /* MBR PTE: Start sector */
-#define PTE_StCyl 3 /* MBR PTE: Start cylinder */
-#define PTE_System 4 /* MBR PTE: System ID */
-#define PTE_EdHead 5 /* MBR PTE: End head */
-#define PTE_EdSec 6 /* MBR PTE: End sector */
-#define PTE_EdCyl 7 /* MBR PTE: End cylinder */
-#define PTE_StLba 8 /* MBR PTE: Start in LBA */
-#define PTE_SizLba 12 /* MBR PTE: Size in LBA */
-
-
-/* Post process on fatal error in the file operations */
-#define ABORT(fs, res) { fp->err = (BYTE)(res); LEAVE_FF(fs, res); }
-
-
-/* Re-entrancy related */
-#if FF_FS_REENTRANT
-#if FF_USE_LFN == 1
-#error Static LFN work area cannot be used at thread-safe configuration
-#endif
-#define LEAVE_FF(fs, res) { unlock_fs(fs, res); return res; }
-#else
-#define LEAVE_FF(fs, res) return res
-#endif
-
-
-/* Definitions of volume - physical location conversion */
-#if FF_MULTI_PARTITION
-#define LD2PD(vol) VolToPart[vol].pd /* Get physical drive number */
-#define LD2PT(vol) VolToPart[vol].pt /* Get partition index */
-#else
-#define LD2PD(vol) (BYTE)(vol) /* Each logical drive is bound to the same physical drive number */
-#define LD2PT(vol) 0 /* Find first valid partition or in SFD */
-#endif
-
-
-/* Definitions of sector size */
-#if (FF_MAX_SS < FF_MIN_SS) || (FF_MAX_SS != 512 && FF_MAX_SS != 1024 && FF_MAX_SS != 2048 && FF_MAX_SS != 4096) || (FF_MIN_SS != 512 && FF_MIN_SS != 1024 && FF_MIN_SS != 2048 && FF_MIN_SS != 4096)
-#error Wrong sector size configuration
-#endif
-#if FF_MAX_SS == FF_MIN_SS
-#define SS(fs) ((UINT)FF_MAX_SS) /* Fixed sector size */
-#else
-#define SS(fs) ((fs)->ssize) /* Variable sector size */
-#endif
-
-
-/* Timestamp */
-#if FF_FS_NORTC == 1
-#if FF_NORTC_YEAR < 1980 || FF_NORTC_YEAR > 2107 || FF_NORTC_MON < 1 || FF_NORTC_MON > 12 || FF_NORTC_MDAY < 1 || FF_NORTC_MDAY > 31
-#error Invalid FF_FS_NORTC settings
-#endif
-#define GET_FATTIME() ((DWORD)(FF_NORTC_YEAR - 1980) << 25 | (DWORD)FF_NORTC_MON << 21 | (DWORD)FF_NORTC_MDAY << 16)
-#else
-#define GET_FATTIME() get_fattime()
-#endif
-
-
-/* File lock controls */
-#if FF_FS_LOCK != 0
-#if FF_FS_READONLY
-#error FF_FS_LOCK must be 0 at read-only configuration
-#endif
-typedef struct {
- FATFS *fs; /* Object ID 1, volume (NULL:blank entry) */
- DWORD clu; /* Object ID 2, containing directory (0:root) */
- DWORD ofs; /* Object ID 3, offset in the directory */
- WORD ctr; /* Object open counter, 0:none, 0x01..0xFF:read mode open count, 0x100:write mode */
-} FILESEM;
-#endif
-
-
-/* SBCS up-case tables (\x80-\xFF) */
-#define TBL_CT437 {0x80,0x9A,0x45,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F, \
- 0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
- 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT720 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \
- 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
- 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT737 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \
- 0x90,0x92,0x92,0x93,0x94,0x95,0x96,0x97,0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87, \
- 0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0xAA,0x92,0x93,0x94,0x95,0x96, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0x97,0xEA,0xEB,0xEC,0xE4,0xED,0xEE,0xEF,0xF5,0xF0,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT771 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \
- 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
- 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDC,0xDE,0xDE, \
- 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
- 0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFE,0xFF}
-#define TBL_CT775 {0x80,0x9A,0x91,0xA0,0x8E,0x95,0x8F,0x80,0xAD,0xED,0x8A,0x8A,0xA1,0x8D,0x8E,0x8F, \
- 0x90,0x92,0x92,0xE2,0x99,0x95,0x96,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
- 0xA0,0xA1,0xE0,0xA3,0xA3,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xA5,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE3,0xE8,0xE8,0xEA,0xEA,0xEE,0xED,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT850 {0x43,0x55,0x45,0x41,0x41,0x41,0x41,0x43,0x45,0x45,0x45,0x49,0x49,0x49,0x41,0x41, \
- 0x45,0x92,0x92,0x4F,0x4F,0x4F,0x55,0x55,0x59,0x4F,0x55,0x4F,0x9C,0x4F,0x9E,0x9F, \
- 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0x41,0x41,0x41,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0x41,0x41,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD1,0xD1,0x45,0x45,0x45,0x49,0x49,0x49,0x49,0xD9,0xDA,0xDB,0xDC,0xDD,0x49,0xDF, \
- 0x4F,0xE1,0x4F,0x4F,0x4F,0x4F,0xE6,0xE8,0xE8,0x55,0x55,0x55,0x59,0x59,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT852 {0x80,0x9A,0x90,0xB6,0x8E,0xDE,0x8F,0x80,0x9D,0xD3,0x8A,0x8A,0xD7,0x8D,0x8E,0x8F, \
- 0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0xAC, \
- 0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD1,0xD1,0xD2,0xD3,0xD2,0xD5,0xD6,0xD7,0xB7,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0xE0,0xE1,0xE2,0xE3,0xE3,0xD5,0xE6,0xE6,0xE8,0xE9,0xE8,0xEB,0xED,0xED,0xDD,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xEB,0xFC,0xFC,0xFE,0xFF}
-#define TBL_CT855 {0x81,0x81,0x83,0x83,0x85,0x85,0x87,0x87,0x89,0x89,0x8B,0x8B,0x8D,0x8D,0x8F,0x8F, \
- 0x91,0x91,0x93,0x93,0x95,0x95,0x97,0x97,0x99,0x99,0x9B,0x9B,0x9D,0x9D,0x9F,0x9F, \
- 0xA1,0xA1,0xA3,0xA3,0xA5,0xA5,0xA7,0xA7,0xA9,0xA9,0xAB,0xAB,0xAD,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB6,0xB6,0xB8,0xB8,0xB9,0xBA,0xBB,0xBC,0xBE,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD1,0xD1,0xD3,0xD3,0xD5,0xD5,0xD7,0xD7,0xDD,0xD9,0xDA,0xDB,0xDC,0xDD,0xE0,0xDF, \
- 0xE0,0xE2,0xE2,0xE4,0xE4,0xE6,0xE6,0xE8,0xE8,0xEA,0xEA,0xEC,0xEC,0xEE,0xEE,0xEF, \
- 0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT857 {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0x49,0x8E,0x8F, \
- 0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x98,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9E, \
- 0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA6,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0x49,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xDE,0xED,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT860 {0x80,0x9A,0x90,0x8F,0x8E,0x91,0x86,0x80,0x89,0x89,0x92,0x8B,0x8C,0x98,0x8E,0x8F, \
- 0x90,0x91,0x92,0x8C,0x99,0xA9,0x96,0x9D,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
- 0x86,0x8B,0x9F,0x96,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT861 {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x8B,0x8B,0x8D,0x8E,0x8F, \
- 0x90,0x92,0x92,0x4F,0x99,0x8D,0x55,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
- 0xA4,0xA5,0xA6,0xA7,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT862 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \
- 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
- 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT863 {0x43,0x55,0x45,0x41,0x41,0x41,0x86,0x43,0x45,0x45,0x45,0x49,0x49,0x8D,0x41,0x8F, \
- 0x45,0x45,0x45,0x4F,0x45,0x49,0x55,0x55,0x98,0x4F,0x55,0x9B,0x9C,0x55,0x55,0x9F, \
- 0xA0,0xA1,0x4F,0x55,0xA4,0xA5,0xA6,0xA7,0x49,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT864 {0x80,0x9A,0x45,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F, \
- 0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
- 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT865 {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F, \
- 0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
- 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \
- 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT866 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \
- 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
- 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
- 0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
-#define TBL_CT869 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \
- 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x86,0x9C,0x8D,0x8F,0x90, \
- 0x91,0x90,0x92,0x95,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
- 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
- 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
- 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xA4,0xA5,0xA6,0xD9,0xDA,0xDB,0xDC,0xA7,0xA8,0xDF, \
- 0xA9,0xAA,0xAC,0xAD,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xCF,0xCF,0xD0,0xEF, \
- 0xF0,0xF1,0xD1,0xD2,0xD3,0xF5,0xD4,0xF7,0xF8,0xF9,0xD5,0x96,0x95,0x98,0xFE,0xFF}
-
-
-/* DBCS code range |----- 1st byte -----| |----------- 2nd byte -----------| */
-#define TBL_DC932 {0x81, 0x9F, 0xE0, 0xFC, 0x40, 0x7E, 0x80, 0xFC, 0x00, 0x00}
-#define TBL_DC936 {0x81, 0xFE, 0x00, 0x00, 0x40, 0x7E, 0x80, 0xFE, 0x00, 0x00}
-#define TBL_DC949 {0x81, 0xFE, 0x00, 0x00, 0x41, 0x5A, 0x61, 0x7A, 0x81, 0xFE}
-#define TBL_DC950 {0x81, 0xFE, 0x00, 0x00, 0x40, 0x7E, 0xA1, 0xFE, 0x00, 0x00}
-
-
-/* Macros for table definitions */
-#define MERGE_2STR(a, b) a ## b
-#define MKCVTBL(hd, cp) MERGE_2STR(hd, cp)
-
-
-
-
-/*--------------------------------------------------------------------------
-
- Module Private Work Area
-
----------------------------------------------------------------------------*/
-/* Remark: Variables defined here without initial value shall be guaranteed
-/ zero/null at start-up. If not, the linker option or start-up routine is
-/ not compliance with C standard. */
-
-/*--------------------------------*/
-/* File/Volume controls */
-/*--------------------------------*/
-
-#if FF_VOLUMES < 1 || FF_VOLUMES > 10
-#error Wrong FF_VOLUMES setting
-#endif
-static FATFS* FatFs[FF_VOLUMES]; /* Pointer to the filesystem objects (logical drives) */
-static WORD Fsid; /* Filesystem mount ID */
-
-#if FF_FS_RPATH != 0
-static BYTE CurrVol; /* Current drive */
-#endif
-
-#if FF_FS_LOCK != 0
-static FILESEM Files[FF_FS_LOCK]; /* Open object lock semaphores */
-#endif
-
-#if FF_STR_VOLUME_ID
-#ifdef FF_VOLUME_STRS
-static const char* const VolumeStr[FF_VOLUMES] = {FF_VOLUME_STRS}; /* Pre-defined volume ID */
-#endif
-#endif
-
-
-/*--------------------------------*/
-/* LFN/Directory working buffer */
-/*--------------------------------*/
-
-#if FF_USE_LFN == 0 /* Non-LFN configuration */
-#if FF_FS_EXFAT
-#error LFN must be enabled when enable exFAT
-#endif
-#define DEF_NAMBUF
-#define INIT_NAMBUF(fs)
-#define FREE_NAMBUF()
-#define LEAVE_MKFS(res) return res
-
-#else /* LFN configurations */
-#if FF_MAX_LFN < 12 || FF_MAX_LFN > 255
-#error Wrong setting of FF_MAX_LFN
-#endif
-#if FF_LFN_BUF < FF_SFN_BUF || FF_SFN_BUF < 12
-#error Wrong setting of FF_LFN_BUF or FF_SFN_BUF
-#endif
-#if FF_LFN_UNICODE < 0 || FF_LFN_UNICODE > 3
-#error Wrong setting of FF_LFN_UNICODE
-#endif
-static const BYTE LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30}; /* FAT: Offset of LFN characters in the directory entry */
-#define MAXDIRB(nc) ((nc + 44U) / 15 * SZDIRE) /* exFAT: Size of directory entry block scratchpad buffer needed for the name length */
-
-#if FF_USE_LFN == 1 /* LFN enabled with static working buffer */
-#if FF_FS_EXFAT
-static BYTE DirBuf[MAXDIRB(FF_MAX_LFN)]; /* Directory entry block scratchpad buffer */
-#endif
-static WCHAR LfnBuf[FF_MAX_LFN + 1]; /* LFN working buffer */
-#define DEF_NAMBUF
-#define INIT_NAMBUF(fs)
-#define FREE_NAMBUF()
-#define LEAVE_MKFS(res) return res
-
-#elif FF_USE_LFN == 2 /* LFN enabled with dynamic working buffer on the stack */
-#if FF_FS_EXFAT
-#define DEF_NAMBUF WCHAR lbuf[FF_MAX_LFN+1]; BYTE dbuf[MAXDIRB(FF_MAX_LFN)]; /* LFN working buffer and directory entry block scratchpad buffer */
-#define INIT_NAMBUF(fs) { (fs)->lfnbuf = lbuf; (fs)->dirbuf = dbuf; }
-#define FREE_NAMBUF()
-#else
-#define DEF_NAMBUF WCHAR lbuf[FF_MAX_LFN+1]; /* LFN working buffer */
-#define INIT_NAMBUF(fs) { (fs)->lfnbuf = lbuf; }
-#define FREE_NAMBUF()
-#endif
-#define LEAVE_MKFS(res) return res
-
-#elif FF_USE_LFN == 3 /* LFN enabled with dynamic working buffer on the heap */
-#if FF_FS_EXFAT
-#define DEF_NAMBUF WCHAR *lfn; /* Pointer to LFN working buffer and directory entry block scratchpad buffer */
-#define INIT_NAMBUF(fs) { lfn = ff_memalloc((FF_MAX_LFN+1)*2 + MAXDIRB(FF_MAX_LFN)); if (!lfn) LEAVE_FF(fs, FR_NOT_ENOUGH_CORE); (fs)->lfnbuf = lfn; (fs)->dirbuf = (BYTE*)(lfn+FF_MAX_LFN+1); }
-#define FREE_NAMBUF() ff_memfree(lfn)
-#else
-#define DEF_NAMBUF WCHAR *lfn; /* Pointer to LFN working buffer */
-#define INIT_NAMBUF(fs) { lfn = ff_memalloc((FF_MAX_LFN+1)*2); if (!lfn) LEAVE_FF(fs, FR_NOT_ENOUGH_CORE); (fs)->lfnbuf = lfn; }
-#define FREE_NAMBUF() ff_memfree(lfn)
-#endif
-#define LEAVE_MKFS(res) { if (!work) ff_memfree(buf); return res; }
-#define MAX_MALLOC 0x8000 /* Must be >=FF_MAX_SS */
-
-#else
-#error Wrong setting of FF_USE_LFN
-
-#endif /* FF_USE_LFN == 1 */
-#endif /* FF_USE_LFN == 0 */
-
-
-
-/*--------------------------------*/
-/* Code conversion tables */
-/*--------------------------------*/
-
-#if FF_CODE_PAGE == 0 /* Run-time code page configuration */
-#define CODEPAGE CodePage
-static WORD CodePage; /* Current code page */
-static const BYTE *ExCvt, *DbcTbl; /* Pointer to current SBCS up-case table and DBCS code range table below */
-
-static const BYTE Ct437[] = TBL_CT437;
-static const BYTE Ct720[] = TBL_CT720;
-static const BYTE Ct737[] = TBL_CT737;
-static const BYTE Ct771[] = TBL_CT771;
-static const BYTE Ct775[] = TBL_CT775;
-static const BYTE Ct850[] = TBL_CT850;
-static const BYTE Ct852[] = TBL_CT852;
-static const BYTE Ct855[] = TBL_CT855;
-static const BYTE Ct857[] = TBL_CT857;
-static const BYTE Ct860[] = TBL_CT860;
-static const BYTE Ct861[] = TBL_CT861;
-static const BYTE Ct862[] = TBL_CT862;
-static const BYTE Ct863[] = TBL_CT863;
-static const BYTE Ct864[] = TBL_CT864;
-static const BYTE Ct865[] = TBL_CT865;
-static const BYTE Ct866[] = TBL_CT866;
-static const BYTE Ct869[] = TBL_CT869;
-static const BYTE Dc932[] = TBL_DC932;
-static const BYTE Dc936[] = TBL_DC936;
-static const BYTE Dc949[] = TBL_DC949;
-static const BYTE Dc950[] = TBL_DC950;
-
-#elif FF_CODE_PAGE < 900 /* Static code page configuration (SBCS) */
-#define CODEPAGE FF_CODE_PAGE
-static const BYTE ExCvt[] = MKCVTBL(TBL_CT, FF_CODE_PAGE);
-
-#else /* Static code page configuration (DBCS) */
-#define CODEPAGE FF_CODE_PAGE
-static const BYTE DbcTbl[] = MKCVTBL(TBL_DC, FF_CODE_PAGE);
-
-#endif
-
-
-
-
-/*--------------------------------------------------------------------------
-
- Module Private Functions
-
----------------------------------------------------------------------------*/
-
-/*-----------------------------------------------------------------------*/
-/* Print error header */
-/*-----------------------------------------------------------------------*/
-
-void print_error()
-{
- gfx_printf("\n\n\n%k[FatFS] Error: %k", 0xFFFFFF00, 0xFFFFFFFF);
-}
-
-
-/*-----------------------------------------------------------------------*/
-/* Load/Store multi-byte word in the FAT structure */
-/*-----------------------------------------------------------------------*/
-
-static WORD ld_word (const BYTE* ptr) /* Load a 2-byte little-endian word */
-{
- WORD rv;
-
- rv = ptr[1];
- rv = rv << 8 | ptr[0];
- return rv;
-}
-
-static DWORD ld_dword (const BYTE* ptr) /* Load a 4-byte little-endian word */
-{
- DWORD rv;
-
- rv = ptr[3];
- rv = rv << 8 | ptr[2];
- rv = rv << 8 | ptr[1];
- rv = rv << 8 | ptr[0];
- return rv;
-}
-
-#if FF_FS_EXFAT
-static QWORD ld_qword (const BYTE* ptr) /* Load an 8-byte little-endian word */
-{
- QWORD rv;
-
- rv = ptr[7];
- rv = rv << 8 | ptr[6];
- rv = rv << 8 | ptr[5];
- rv = rv << 8 | ptr[4];
- rv = rv << 8 | ptr[3];
- rv = rv << 8 | ptr[2];
- rv = rv << 8 | ptr[1];
- rv = rv << 8 | ptr[0];
- return rv;
-}
-#endif
-
-#if !FF_FS_READONLY
-static void st_word (BYTE* ptr, WORD val) /* Store a 2-byte word in little-endian */
-{
- *ptr++ = (BYTE)val; val >>= 8;
- *ptr++ = (BYTE)val;
-}
-
-static void st_dword (BYTE* ptr, DWORD val) /* Store a 4-byte word in little-endian */
-{
- *ptr++ = (BYTE)val; val >>= 8;
- *ptr++ = (BYTE)val; val >>= 8;
- *ptr++ = (BYTE)val; val >>= 8;
- *ptr++ = (BYTE)val;
-}
-
-#if FF_FS_EXFAT
-static void st_qword (BYTE* ptr, QWORD val) /* Store an 8-byte word in little-endian */
-{
- *ptr++ = (BYTE)val; val >>= 8;
- *ptr++ = (BYTE)val; val >>= 8;
- *ptr++ = (BYTE)val; val >>= 8;
- *ptr++ = (BYTE)val; val >>= 8;
- *ptr++ = (BYTE)val; val >>= 8;
- *ptr++ = (BYTE)val; val >>= 8;
- *ptr++ = (BYTE)val; val >>= 8;
- *ptr++ = (BYTE)val;
-}
-#endif
-#endif /* !FF_FS_READONLY */
-
-
-
-/*-----------------------------------------------------------------------*/
-/* String functions */
-/*-----------------------------------------------------------------------*/
-
-/* Copy memory to memory */
-static void mem_cpy (void* dst, const void* src, UINT cnt)
-{
- BYTE *d = (BYTE*)dst;
- const BYTE *s = (const BYTE*)src;
-
- if (cnt != 0) {
- do {
- *d++ = *s++;
- } while (--cnt);
- }
-}
-
-
-/* Fill memory block */
-static void mem_set (void* dst, int val, UINT cnt)
-{
- BYTE *d = (BYTE*)dst;
-
- do {
- *d++ = (BYTE)val;
- } while (--cnt);
-}
-
-
-/* Compare memory block */
-static int mem_cmp (const void* dst, const void* src, UINT cnt) /* ZR:same, NZ:different */
-{
- const BYTE *d = (const BYTE *)dst, *s = (const BYTE *)src;
- int r = 0;
-
- do {
- r = *d++ - *s++;
- } while (--cnt && r == 0);
-
- return r;
-}
-
-
-/* Check if chr is contained in the string */
-static int chk_chr (const char* str, int chr) /* NZ:contained, ZR:not contained */
-{
- while (*str && *str != chr) str++;
- return *str;
-}
-
-
-/* Test if the character is DBC 1st byte */
-static int dbc_1st (BYTE c)
-{
-#if FF_CODE_PAGE == 0 /* Variable code page */
- if (DbcTbl && c >= DbcTbl[0]) {
- if (c <= DbcTbl[1]) return 1; /* 1st byte range 1 */
- if (c >= DbcTbl[2] && c <= DbcTbl[3]) return 1; /* 1st byte range 2 */
- }
-#elif FF_CODE_PAGE >= 900 /* DBCS fixed code page */
- if (c >= DbcTbl[0]) {
- if (c <= DbcTbl[1]) return 1;
- if (c >= DbcTbl[2] && c <= DbcTbl[3]) return 1;
- }
-#else /* SBCS fixed code page */
- if (c != 0) return 0; /* Always false */
-#endif
- return 0;
-}
-
-
-/* Test if the character is DBC 2nd byte */
-static int dbc_2nd (BYTE c)
-{
-#if FF_CODE_PAGE == 0 /* Variable code page */
- if (DbcTbl && c >= DbcTbl[4]) {
- if (c <= DbcTbl[5]) return 1; /* 2nd byte range 1 */
- if (c >= DbcTbl[6] && c <= DbcTbl[7]) return 1; /* 2nd byte range 2 */
- if (c >= DbcTbl[8] && c <= DbcTbl[9]) return 1; /* 2nd byte range 3 */
- }
-#elif FF_CODE_PAGE >= 900 /* DBCS fixed code page */
- if (c >= DbcTbl[4]) {
- if (c <= DbcTbl[5]) return 1;
- if (c >= DbcTbl[6] && c <= DbcTbl[7]) return 1;
- if (c >= DbcTbl[8] && c <= DbcTbl[9]) return 1;
- }
-#else /* SBCS fixed code page */
- if (c != 0) return 0; /* Always false */
-#endif
- return 0;
-}
-
-
-#if FF_USE_LFN
-
-/* Get a character from TCHAR string in defined API encodeing */
-static DWORD tchar2uni ( /* Returns character in UTF-16 encoding (>=0x10000 on double encoding unit, 0xFFFFFFFF on decode error) */
- const TCHAR** str /* Pointer to pointer to TCHAR string in configured encoding */
-)
-{
- DWORD uc;
- const TCHAR *p = *str;
-
-#if FF_LFN_UNICODE == 1 /* UTF-16 input */
- WCHAR wc;
-
- uc = *p++; /* Get a unit */
- if (IsSurrogate(uc)) { /* Surrogate? */
- wc = *p++; /* Get low surrogate */
- if (!IsSurrogateH(uc) || !IsSurrogateL(wc)) return 0xFFFFFFFF; /* Wrong surrogate? */
- uc = uc << 16 | wc;
- }
-
-#elif FF_LFN_UNICODE == 2 /* UTF-8 input */
- BYTE b;
- int nf;
-
- uc = (BYTE)*p++; /* Get a unit */
- if (uc & 0x80) { /* Multiple byte code? */
- if ((uc & 0xE0) == 0xC0) { /* 2-byte sequence? */
- uc &= 0x1F; nf = 1;
- } else {
- if ((uc & 0xF0) == 0xE0) { /* 3-byte sequence? */
- uc &= 0x0F; nf = 2;
- } else {
- if ((uc & 0xF8) == 0xF0) { /* 4-byte sequence? */
- uc &= 0x07; nf = 3;
- } else { /* Wrong sequence */
- return 0xFFFFFFFF;
- }
- }
- }
- do { /* Get trailing bytes */
- b = (BYTE)*p++;
- if ((b & 0xC0) != 0x80) return 0xFFFFFFFF; /* Wrong sequence? */
- uc = uc << 6 | (b & 0x3F);
- } while (--nf != 0);
- if (uc < 0x80 || IsSurrogate(uc) || uc >= 0x110000) return 0xFFFFFFFF; /* Wrong code? */
- if (uc >= 0x010000) uc = 0xD800DC00 | ((uc - 0x10000) << 6 & 0x3FF0000) | (uc & 0x3FF); /* Make a surrogate pair if needed */
- }
-
-#elif FF_LFN_UNICODE == 3 /* UTF-32 input */
- uc = (TCHAR)*p++; /* Get a unit */
- if (uc >= 0x110000) return 0xFFFFFFFF; /* Wrong code? */
- if (uc >= 0x010000) uc = 0xD800DC00 | ((uc - 0x10000) << 6 & 0x3FF0000) | (uc & 0x3FF); /* Make a surrogate pair if needed */
-
-#else /* ANSI/OEM input */
- BYTE b;
- WCHAR wc;
-
- wc = (BYTE)*p++; /* Get a byte */
- if (dbc_1st((BYTE)wc)) { /* Is it a DBC 1st byte? */
- b = (BYTE)*p++; /* Get 2nd byte */
- if (!dbc_2nd(b)) return 0xFFFFFFFF; /* Invalid code? */
- wc = (wc << 8) + b; /* Make a DBC */
- }
- if (wc != 0) {
- wc = ff_oem2uni(wc, CODEPAGE); /* ANSI/OEM ==> Unicode */
- if (wc == 0) return 0xFFFFFFFF; /* Invalid code? */
- }
- uc = wc;
-
-#endif
- *str = p; /* Next read pointer */
- return uc;
-}
-
-
-/* Output a TCHAR string in defined API encoding */
-static BYTE put_utf ( /* Returns number of encoding units written (0:buffer overflow or wrong encoding) */
- DWORD chr, /* UTF-16 encoded character (Double encoding unit char if >=0x10000) */
- TCHAR* buf, /* Output buffer */
- UINT szb /* Size of the buffer */
-)
-{
-#if FF_LFN_UNICODE == 1 /* UTF-16 output */
- WCHAR hs, wc;
-
- hs = (WCHAR)(chr >> 16);
- wc = (WCHAR)chr;
- if (hs == 0) { /* Single encoding unit? */
- if (szb < 1 || IsSurrogate(wc)) return 0; /* Buffer overflow or wrong code? */
- *buf = wc;
- return 1;
- }
- if (szb < 2 || !IsSurrogateH(hs) || !IsSurrogateL(wc)) return 0; /* Buffer overflow or wrong surrogate? */
- *buf++ = hs;
- *buf++ = wc;
- return 2;
-
-#elif FF_LFN_UNICODE == 2 /* UTF-8 output */
- DWORD hc;
-
- if (chr < 0x80) { /* Single byte code? */
- if (szb < 1) return 0; /* Buffer overflow? */
- *buf = (TCHAR)chr;
- return 1;
- }
- if (chr < 0x800) { /* 2-byte sequence? */
- if (szb < 2) return 0; /* Buffer overflow? */
- *buf++ = (TCHAR)(0xC0 | (chr >> 6 & 0x1F));
- *buf++ = (TCHAR)(0x80 | (chr >> 0 & 0x3F));
- return 2;
- }
- if (chr < 0x10000) { /* 3-byte sequence? */
- if (szb < 3 || IsSurrogate(chr)) return 0; /* Buffer overflow or wrong code? */
- *buf++ = (TCHAR)(0xE0 | (chr >> 12 & 0x0F));
- *buf++ = (TCHAR)(0x80 | (chr >> 6 & 0x3F));
- *buf++ = (TCHAR)(0x80 | (chr >> 0 & 0x3F));
- return 3;
- }
- /* 4-byte sequence */
- if (szb < 4) return 0; /* Buffer overflow? */
- hc = ((chr & 0xFFFF0000) - 0xD8000000) >> 6; /* Get high 10 bits */
- chr = (chr & 0xFFFF) - 0xDC00; /* Get low 10 bits */
- if (hc >= 0x100000 || chr >= 0x400) return 0; /* Wrong surrogate? */
- chr = (hc | chr) + 0x10000;
- *buf++ = (TCHAR)(0xF0 | (chr >> 18 & 0x07));
- *buf++ = (TCHAR)(0x80 | (chr >> 12 & 0x3F));
- *buf++ = (TCHAR)(0x80 | (chr >> 6 & 0x3F));
- *buf++ = (TCHAR)(0x80 | (chr >> 0 & 0x3F));
- return 4;
-
-#elif FF_LFN_UNICODE == 3 /* UTF-32 output */
- DWORD hc;
-
- if (szb < 1) return 0; /* Buffer overflow? */
- if (chr >= 0x10000) { /* Out of BMP? */
- hc = ((chr & 0xFFFF0000) - 0xD8000000) >> 6; /* Get high 10 bits */
- chr = (chr & 0xFFFF) - 0xDC00; /* Get low 10 bits */
- if (hc >= 0x100000 || chr >= 0x400) return 0; /* Wrong surrogate? */
- chr = (hc | chr) + 0x10000;
- }
- *buf++ = (TCHAR)chr;
- return 1;
-
-#else /* ANSI/OEM output */
- WCHAR wc;
-
- wc = ff_uni2oem(chr, CODEPAGE);
- if (wc >= 0x100) { /* Is this a DBC? */
- if (szb < 2) return 0;
- *buf++ = (char)(wc >> 8); /* Store DBC 1st byte */
- *buf++ = (TCHAR)wc; /* Store DBC 2nd byte */
- return 2;
- }
- if (wc == 0 || szb < 1) return 0; /* Invalid char or buffer overflow? */
- *buf++ = (TCHAR)wc; /* Store the character */
- return 1;
-#endif
-}
-#endif /* FF_USE_LFN */
-
-
-#if FF_FS_REENTRANT
-/*-----------------------------------------------------------------------*/
-/* Request/Release grant to access the volume */
-/*-----------------------------------------------------------------------*/
-static int lock_fs ( /* 1:Ok, 0:timeout */
- FATFS* fs /* Filesystem object */
-)
-{
- return ff_req_grant(fs->sobj);
-}
-
-
-static void unlock_fs (
- FATFS* fs, /* Filesystem object */
- FRESULT res /* Result code to be returned */
-)
-{
- if (fs && res != FR_NOT_ENABLED && res != FR_INVALID_DRIVE && res != FR_TIMEOUT) {
- ff_rel_grant(fs->sobj);
- }
-}
-
-#endif
-
-
-
-#if FF_FS_LOCK != 0
-/*-----------------------------------------------------------------------*/
-/* File lock control functions */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT chk_lock ( /* Check if the file can be accessed */
- DIR* dp, /* Directory object pointing the file to be checked */
- int acc /* Desired access type (0:Read mode open, 1:Write mode open, 2:Delete or rename) */
-)
-{
- UINT i, be;
-
- /* Search open object table for the object */
- be = 0;
- for (i = 0; i < FF_FS_LOCK; i++) {
- if (Files[i].fs) { /* Existing entry */
- if (Files[i].fs == dp->obj.fs && /* Check if the object matches with an open object */
- Files[i].clu == dp->obj.sclust &&
- Files[i].ofs == dp->dptr) break;
- } else { /* Blank entry */
- be = 1;
- }
- }
- if (i == FF_FS_LOCK) { /* The object has not been opened */
- return (!be && acc != 2) ? FR_TOO_MANY_OPEN_FILES : FR_OK; /* Is there a blank entry for new object? */
- }
-
- /* The object was opened. Reject any open against writing file and all write mode open */
- return (acc != 0 || Files[i].ctr == 0x100) ? FR_LOCKED : FR_OK;
-}
-
-
-static int enq_lock (void) /* Check if an entry is available for a new object */
-{
- UINT i;
-
- for (i = 0; i < FF_FS_LOCK && Files[i].fs; i++) ;
- return (i == FF_FS_LOCK) ? 0 : 1;
-}
-
-
-static UINT inc_lock ( /* Increment object open counter and returns its index (0:Internal error) */
- DIR* dp, /* Directory object pointing the file to register or increment */
- int acc /* Desired access (0:Read, 1:Write, 2:Delete/Rename) */
-)
-{
- UINT i;
-
-
- for (i = 0; i < FF_FS_LOCK; i++) { /* Find the object */
- if (Files[i].fs == dp->obj.fs &&
- Files[i].clu == dp->obj.sclust &&
- Files[i].ofs == dp->dptr) break;
- }
-
- if (i == FF_FS_LOCK) { /* Not opened. Register it as new. */
- for (i = 0; i < FF_FS_LOCK && Files[i].fs; i++) ;
- if (i == FF_FS_LOCK) return 0; /* No free entry to register (int err) */
- Files[i].fs = dp->obj.fs;
- Files[i].clu = dp->obj.sclust;
- Files[i].ofs = dp->dptr;
- Files[i].ctr = 0;
- }
-
- if (acc >= 1 && Files[i].ctr) return 0; /* Access violation (int err) */
-
- Files[i].ctr = acc ? 0x100 : Files[i].ctr + 1; /* Set semaphore value */
-
- return i + 1; /* Index number origin from 1 */
-}
-
-
-static FRESULT dec_lock ( /* Decrement object open counter */
- UINT i /* Semaphore index (1..) */
-)
-{
- WORD n;
- FRESULT res;
-
-
- if (--i < FF_FS_LOCK) { /* Index number origin from 0 */
- n = Files[i].ctr;
- if (n == 0x100) n = 0; /* If write mode open, delete the entry */
- if (n > 0) n--; /* Decrement read mode open count */
- Files[i].ctr = n;
- if (n == 0) Files[i].fs = 0; /* Delete the entry if open count gets zero */
- res = FR_OK;
- } else {
- res = FR_INT_ERR; /* Invalid index nunber */
- }
- return res;
-}
-
-
-static void clear_lock ( /* Clear lock entries of the volume */
- FATFS *fs
-)
-{
- UINT i;
-
- for (i = 0; i < FF_FS_LOCK; i++) {
- if (Files[i].fs == fs) Files[i].fs = 0;
- }
-}
-
-#endif /* FF_FS_LOCK != 0 */
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Move/Flush disk access window in the filesystem object */
-/*-----------------------------------------------------------------------*/
-#if !FF_FS_READONLY
-static FRESULT sync_window ( /* Returns FR_OK or FR_DISK_ERR */
- FATFS* fs /* Filesystem object */
-)
-{
- FRESULT res = FR_OK;
-
-
- if (fs->wflag) { /* Is the disk access window dirty */
- if (disk_write(fs->pdrv, fs->win, fs->winsect, 1) == RES_OK) { /* Write back the window */
- fs->wflag = 0; /* Clear window dirty flag */
- if (fs->winsect - fs->fatbase < fs->fsize) { /* Is it in the 1st FAT? */
- if (fs->n_fats == 2) disk_write(fs->pdrv, fs->win, fs->winsect + fs->fsize, 1); /* Reflect it to 2nd FAT if needed */
- }
- } else {
- res = FR_DISK_ERR;
- }
- }
- return res;
-}
-#endif
-
-
-static FRESULT move_window ( /* Returns FR_OK or FR_DISK_ERR */
- FATFS* fs, /* Filesystem object */
- DWORD sector /* Sector number to make appearance in the fs->win[] */
-)
-{
- FRESULT res = FR_OK;
-
-
- if (sector != fs->winsect) { /* Window offset changed? */
-#if !FF_FS_READONLY
- res = sync_window(fs); /* Write-back changes */
-#endif
- if (res == FR_OK) { /* Fill sector window with new data */
- if (disk_read(fs->pdrv, fs->win, sector, 1) != RES_OK) {
- sector = 0xFFFFFFFF; /* Invalidate window if read data is not valid */
- res = FR_DISK_ERR;
- }
- fs->winsect = sector;
- }
- }
- return res;
-}
-
-
-
-
-#if !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* Synchronize filesystem and data on the storage */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT sync_fs ( /* Returns FR_OK or FR_DISK_ERR */
- FATFS* fs /* Filesystem object */
-)
-{
- FRESULT res;
-
-
- res = sync_window(fs);
- if (res == FR_OK) {
- if (fs->fs_type == FS_FAT32 && fs->fsi_flag == 1) { /* FAT32: Update FSInfo sector if needed */
- /* Create FSInfo structure */
- mem_set(fs->win, 0, sizeof fs->win);
- st_word(fs->win + BS_55AA, 0xAA55);
- st_dword(fs->win + FSI_LeadSig, 0x41615252);
- st_dword(fs->win + FSI_StrucSig, 0x61417272);
- st_dword(fs->win + FSI_Free_Count, fs->free_clst);
- st_dword(fs->win + FSI_Nxt_Free, fs->last_clst);
- /* Write it into the FSInfo sector */
- fs->winsect = fs->volbase + 1;
- disk_write(fs->pdrv, fs->win, fs->winsect, 1);
- fs->fsi_flag = 0;
- }
- /* Make sure that no pending write process in the lower layer */
- if (disk_ioctl(fs->pdrv, CTRL_SYNC, 0) != RES_OK) res = FR_DISK_ERR;
- }
-
- return res;
-}
-
-#endif
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Get physical sector number from cluster number */
-/*-----------------------------------------------------------------------*/
-
-static DWORD clst2sect ( /* !=0:Sector number, 0:Failed (invalid cluster#) */
- FATFS* fs, /* Filesystem object */
- DWORD clst /* Cluster# to be converted */
-)
-{
- clst -= 2; /* Cluster number is origin from 2 */
- if (clst >= fs->n_fatent - 2) return 0; /* Is it invalid cluster number? */
- return fs->database + fs->csize * clst; /* Start sector number of the cluster */
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* FAT access - Read value of a FAT entry */
-/*-----------------------------------------------------------------------*/
-
-static DWORD get_fat ( /* 0xFFFFFFFF:Disk error, 1:Internal error, 2..0x7FFFFFFF:Cluster status */
- FFOBJID* obj, /* Corresponding object */
- DWORD clst /* Cluster number to get the value */
-)
-{
- UINT wc, bc;
- DWORD val;
- FATFS *fs = obj->fs;
-
-
- if (clst < 2 || clst >= fs->n_fatent) { /* Check if in valid range */
- val = 1; /* Internal error */
-
- } else {
- val = 0xFFFFFFFF; /* Default value falls on disk error */
-
- switch (fs->fs_type) {
- case FS_FAT12 :
- bc = (UINT)clst; bc += bc / 2;
- if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
- wc = fs->win[bc++ % SS(fs)]; /* Get 1st byte of the entry */
- if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
- wc |= fs->win[bc % SS(fs)] << 8; /* Merge 2nd byte of the entry */
- val = (clst & 1) ? (wc >> 4) : (wc & 0xFFF); /* Adjust bit position */
- break;
-
- case FS_FAT16 :
- if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;
- val = ld_word(fs->win + clst * 2 % SS(fs)); /* Simple WORD array */
- break;
-
- case FS_FAT32 :
- if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
- val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x0FFFFFFF; /* Simple DWORD array but mask out upper 4 bits */
- break;
-#if FF_FS_EXFAT
- case FS_EXFAT :
- if ((obj->objsize != 0 && obj->sclust != 0) || obj->stat == 0) { /* Object except root dir must have valid data length */
- DWORD cofs = clst - obj->sclust; /* Offset from start cluster */
- DWORD clen = (DWORD)((obj->objsize - 1) / SS(fs)) / fs->csize; /* Number of clusters - 1 */
-
- if (obj->stat == 2 && cofs <= clen) { /* Is it a contiguous chain? */
- val = (cofs == clen) ? 0x7FFFFFFF : clst + 1; /* No data on the FAT, generate the value */
- break;
- }
- if (obj->stat == 3 && cofs < obj->n_cont) { /* Is it in the 1st fragment? */
- val = clst + 1; /* Generate the value */
- break;
- }
- if (obj->stat != 2) { /* Get value from FAT if FAT chain is valid */
- if (obj->n_frag != 0) { /* Is it on the growing edge? */
- val = 0x7FFFFFFF; /* Generate EOC */
- } else {
- if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
- val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x7FFFFFFF;
- }
- break;
- }
- }
- /* go to default */
-#endif
- default:
- val = 1; /* Internal error */
- }
- }
-
- return val;
-}
-
-
-
-
-#if !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* FAT access - Change value of a FAT entry */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT put_fat ( /* FR_OK(0):succeeded, !=0:error */
- FATFS* fs, /* Corresponding filesystem object */
- DWORD clst, /* FAT index number (cluster number) to be changed */
- DWORD val /* New value to be set to the entry */
-)
-{
- UINT bc;
- BYTE *p;
- FRESULT res = FR_INT_ERR;
-
-
- if (clst >= 2 && clst < fs->n_fatent) { /* Check if in valid range */
- switch (fs->fs_type) {
- case FS_FAT12 :
- bc = (UINT)clst; bc += bc / 2; /* bc: byte offset of the entry */
- res = move_window(fs, fs->fatbase + (bc / SS(fs)));
- if (res != FR_OK) break;
- p = fs->win + bc++ % SS(fs);
- *p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val; /* Put 1st byte */
- fs->wflag = 1;
- res = move_window(fs, fs->fatbase + (bc / SS(fs)));
- if (res != FR_OK) break;
- p = fs->win + bc % SS(fs);
- *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F)); /* Put 2nd byte */
- fs->wflag = 1;
- break;
-
- case FS_FAT16 :
- res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 2)));
- if (res != FR_OK) break;
- st_word(fs->win + clst * 2 % SS(fs), (WORD)val); /* Simple WORD array */
- fs->wflag = 1;
- break;
-
- case FS_FAT32 :
-#if FF_FS_EXFAT
- case FS_EXFAT :
-#endif
- res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 4)));
- if (res != FR_OK) break;
- if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) {
- val = (val & 0x0FFFFFFF) | (ld_dword(fs->win + clst * 4 % SS(fs)) & 0xF0000000);
- }
- st_dword(fs->win + clst * 4 % SS(fs), val);
- fs->wflag = 1;
- break;
- }
- }
- return res;
-}
-
-#endif /* !FF_FS_READONLY */
-
-
-
-
-#if FF_FS_EXFAT && !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* exFAT: Accessing FAT and Allocation Bitmap */
-/*-----------------------------------------------------------------------*/
-
-/*--------------------------------------*/
-/* Find a contiguous free cluster block */
-/*--------------------------------------*/
-
-static DWORD find_bitmap ( /* 0:Not found, 2..:Cluster block found, 0xFFFFFFFF:Disk error */
- FATFS* fs, /* Filesystem object */
- DWORD clst, /* Cluster number to scan from */
- DWORD ncl /* Number of contiguous clusters to find (1..) */
-)
-{
- BYTE bm, bv;
- UINT i;
- DWORD val, scl, ctr;
-
-
- clst -= 2; /* The first bit in the bitmap corresponds to cluster #2 */
- if (clst >= fs->n_fatent - 2) clst = 0;
- scl = val = clst; ctr = 0;
- for (;;) {
- if (move_window(fs, fs->bitbase + val / 8 / SS(fs)) != FR_OK) return 0xFFFFFFFF;
- i = val / 8 % SS(fs); bm = 1 << (val % 8);
- do {
- do {
- bv = fs->win[i] & bm; bm <<= 1; /* Get bit value */
- if (++val >= fs->n_fatent - 2) { /* Next cluster (with wrap-around) */
- val = 0; bm = 0; i = SS(fs);
- }
- if (bv == 0) { /* Is it a free cluster? */
- if (++ctr == ncl) return scl + 2; /* Check if run length is sufficient for required */
- } else {
- scl = val; ctr = 0; /* Encountered a cluster in-use, restart to scan */
- }
- if (val == clst) return 0; /* All cluster scanned? */
- } while (bm != 0);
- bm = 1;
- } while (++i < SS(fs));
- }
-}
-
-
-/*----------------------------------------*/
-/* Set/Clear a block of allocation bitmap */
-/*----------------------------------------*/
-
-static FRESULT change_bitmap (
- FATFS* fs, /* Filesystem object */
- DWORD clst, /* Cluster number to change from */
- DWORD ncl, /* Number of clusters to be changed */
- int bv /* bit value to be set (0 or 1) */
-)
-{
- BYTE bm;
- UINT i;
- DWORD sect;
-
-
- clst -= 2; /* The first bit corresponds to cluster #2 */
- sect = fs->bitbase + clst / 8 / SS(fs); /* Sector address */
- i = clst / 8 % SS(fs); /* Byte offset in the sector */
- bm = 1 << (clst % 8); /* Bit mask in the byte */
- for (;;) {
- if (move_window(fs, sect++) != FR_OK) return FR_DISK_ERR;
- do {
- do {
- if (bv == (int)((fs->win[i] & bm) != 0)) return FR_INT_ERR; /* Is the bit expected value? */
- fs->win[i] ^= bm; /* Flip the bit */
- fs->wflag = 1;
- if (--ncl == 0) return FR_OK; /* All bits processed? */
- } while (bm <<= 1); /* Next bit */
- bm = 1;
- } while (++i < SS(fs)); /* Next byte */
- i = 0;
- }
-}
-
-
-/*---------------------------------------------*/
-/* Fill the first fragment of the FAT chain */
-/*---------------------------------------------*/
-
-static FRESULT fill_first_frag (
- FFOBJID* obj /* Pointer to the corresponding object */
-)
-{
- FRESULT res;
- DWORD cl, n;
-
-
- if (obj->stat == 3) { /* Has the object been changed 'fragmented' in this session? */
- for (cl = obj->sclust, n = obj->n_cont; n; cl++, n--) { /* Create cluster chain on the FAT */
- res = put_fat(obj->fs, cl, cl + 1);
- if (res != FR_OK) return res;
- }
- obj->stat = 0; /* Change status 'FAT chain is valid' */
- }
- return FR_OK;
-}
-
-
-/*---------------------------------------------*/
-/* Fill the last fragment of the FAT chain */
-/*---------------------------------------------*/
-
-static FRESULT fill_last_frag (
- FFOBJID* obj, /* Pointer to the corresponding object */
- DWORD lcl, /* Last cluster of the fragment */
- DWORD term /* Value to set the last FAT entry */
-)
-{
- FRESULT res;
-
-
- while (obj->n_frag > 0) { /* Create the chain of last fragment */
- res = put_fat(obj->fs, lcl - obj->n_frag + 1, (obj->n_frag > 1) ? lcl - obj->n_frag + 2 : term);
- if (res != FR_OK) return res;
- obj->n_frag--;
- }
- return FR_OK;
-}
-
-#endif /* FF_FS_EXFAT && !FF_FS_READONLY */
-
-
-
-#if !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* FAT handling - Remove a cluster chain */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT remove_chain ( /* FR_OK(0):succeeded, !=0:error */
- FFOBJID* obj, /* Corresponding object */
- DWORD clst, /* Cluster to remove a chain from */
- DWORD pclst /* Previous cluster of clst (0 if entire chain) */
-)
-{
- FRESULT res = FR_OK;
- DWORD nxt;
- FATFS *fs = obj->fs;
-#if FF_FS_EXFAT || FF_USE_TRIM
- DWORD scl = clst, ecl = clst;
-#endif
-#if FF_USE_TRIM
- DWORD rt[2];
-#endif
-
- if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR; /* Check if in valid range */
-
- /* Mark the previous cluster 'EOC' on the FAT if it exists */
- if (pclst != 0 && (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT || obj->stat != 2)) {
- res = put_fat(fs, pclst, 0xFFFFFFFF);
- if (res != FR_OK) return res;
- }
-
- /* Remove the chain */
- do {
- nxt = get_fat(obj, clst); /* Get cluster status */
- if (nxt == 0) break; /* Empty cluster? */
- if (nxt == 1) return FR_INT_ERR; /* Internal error? */
- if (nxt == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error? */
- if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) {
- res = put_fat(fs, clst, 0); /* Mark the cluster 'free' on the FAT */
- if (res != FR_OK) return res;
- }
- if (fs->free_clst < fs->n_fatent - 2) { /* Update FSINFO */
- fs->free_clst++;
- fs->fsi_flag |= 1;
- }
-#if FF_FS_EXFAT || FF_USE_TRIM
- if (ecl + 1 == nxt) { /* Is next cluster contiguous? */
- ecl = nxt;
- } else { /* End of contiguous cluster block */
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- res = change_bitmap(fs, scl, ecl - scl + 1, 0); /* Mark the cluster block 'free' on the bitmap */
- if (res != FR_OK) return res;
- }
-#endif
-#if FF_USE_TRIM
- rt[0] = clst2sect(fs, scl); /* Start of data area freed */
- rt[1] = clst2sect(fs, ecl) + fs->csize - 1; /* End of data area freed */
- disk_ioctl(fs->pdrv, CTRL_TRIM, rt); /* Inform device the data in the block is no longer needed */
-#endif
- scl = ecl = nxt;
- }
-#endif
- clst = nxt; /* Next cluster */
- } while (clst < fs->n_fatent); /* Repeat while not the last link */
-
-#if FF_FS_EXFAT
- /* Some post processes for chain status */
- if (fs->fs_type == FS_EXFAT) {
- if (pclst == 0) { /* Has the entire chain been removed? */
- obj->stat = 0; /* Change the chain status 'initial' */
- } else {
- if (obj->stat == 0) { /* Is it a fragmented chain from the beginning of this session? */
- clst = obj->sclust; /* Follow the chain to check if it gets contiguous */
- while (clst != pclst) {
- nxt = get_fat(obj, clst);
- if (nxt < 2) return FR_INT_ERR;
- if (nxt == 0xFFFFFFFF) return FR_DISK_ERR;
- if (nxt != clst + 1) break; /* Not contiguous? */
- clst++;
- }
- if (clst == pclst) { /* Has the chain got contiguous again? */
- obj->stat = 2; /* Change the chain status 'contiguous' */
- }
- } else {
- if (obj->stat == 3 && pclst >= obj->sclust && pclst <= obj->sclust + obj->n_cont) { /* Was the chain fragmented in this session and got contiguous again? */
- obj->stat = 2; /* Change the chain status 'contiguous' */
- }
- }
- }
- }
-#endif
- return FR_OK;
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* FAT handling - Stretch a chain or Create a new chain */
-/*-----------------------------------------------------------------------*/
-
-static DWORD create_chain ( /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */
- FFOBJID* obj, /* Corresponding object */
- DWORD clst /* Cluster# to stretch, 0:Create a new chain */
-)
-{
- DWORD cs, ncl, scl;
- FRESULT res;
- FATFS *fs = obj->fs;
-
-
- if (clst == 0) { /* Create a new chain */
- scl = fs->last_clst; /* Suggested cluster to start to find */
- if (scl == 0 || scl >= fs->n_fatent) scl = 1;
- }
- else { /* Stretch a chain */
- cs = get_fat(obj, clst); /* Check the cluster status */
- if (cs < 2) return 1; /* Test for insanity */
- if (cs == 0xFFFFFFFF) return cs; /* Test for disk error */
- if (cs < fs->n_fatent) return cs; /* It is already followed by next cluster */
- scl = clst; /* Cluster to start to find */
- }
- if (fs->free_clst == 0) return 0; /* No free cluster */
-
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */
- ncl = find_bitmap(fs, scl, 1); /* Find a free cluster */
- if (ncl == 0 || ncl == 0xFFFFFFFF) return ncl; /* No free cluster or hard error? */
- res = change_bitmap(fs, ncl, 1, 1); /* Mark the cluster 'in use' */
- if (res == FR_INT_ERR) return 1;
- if (res == FR_DISK_ERR) return 0xFFFFFFFF;
- if (clst == 0) { /* Is it a new chain? */
- obj->stat = 2; /* Set status 'contiguous' */
- } else { /* It is a stretched chain */
- if (obj->stat == 2 && ncl != scl + 1) { /* Is the chain got fragmented? */
- obj->n_cont = scl - obj->sclust; /* Set size of the contiguous part */
- obj->stat = 3; /* Change status 'just fragmented' */
- }
- }
- if (obj->stat != 2) { /* Is the file non-contiguous? */
- if (ncl == clst + 1) { /* Is the cluster next to previous one? */
- obj->n_frag = obj->n_frag ? obj->n_frag + 1 : 2; /* Increment size of last framgent */
- } else { /* New fragment */
- if (obj->n_frag == 0) obj->n_frag = 1;
- res = fill_last_frag(obj, clst, ncl); /* Fill last fragment on the FAT and link it to new one */
- if (res == FR_OK) obj->n_frag = 1;
- }
- }
- } else
-#endif
- { /* On the FAT/FAT32 volume */
- ncl = 0;
- if (scl == clst) { /* Stretching an existing chain? */
- ncl = scl + 1; /* Test if next cluster is free */
- if (ncl >= fs->n_fatent) ncl = 2;
- cs = get_fat(obj, ncl); /* Get next cluster status */
- if (cs == 1 || cs == 0xFFFFFFFF) return cs; /* Test for error */
- if (cs != 0) { /* Not free? */
- cs = fs->last_clst; /* Start at suggested cluster if it is valid */
- if (cs >= 2 && cs < fs->n_fatent) scl = cs;
- ncl = 0;
- }
- }
- if (ncl == 0) { /* The new cluster cannot be contiguous and find another fragment */
- ncl = scl; /* Start cluster */
- for (;;) {
- ncl++; /* Next cluster */
- if (ncl >= fs->n_fatent) { /* Check wrap-around */
- ncl = 2;
- if (ncl > scl) return 0; /* No free cluster found? */
- }
- cs = get_fat(obj, ncl); /* Get the cluster status */
- if (cs == 0) break; /* Found a free cluster? */
- if (cs == 1 || cs == 0xFFFFFFFF) return cs; /* Test for error */
- if (ncl == scl) return 0; /* No free cluster found? */
- }
- }
- res = put_fat(fs, ncl, 0xFFFFFFFF); /* Mark the new cluster 'EOC' */
- if (res == FR_OK && clst != 0) {
- res = put_fat(fs, clst, ncl); /* Link it from the previous one if needed */
- }
- }
-
- if (res == FR_OK) { /* Update FSINFO if function succeeded. */
- fs->last_clst = ncl;
- if (fs->free_clst <= fs->n_fatent - 2) fs->free_clst--;
- fs->fsi_flag |= 1;
- } else {
- ncl = (res == FR_DISK_ERR) ? 0xFFFFFFFF : 1; /* Failed. Generate error status */
- }
-
- return ncl; /* Return new cluster number or error status */
-}
-
-#endif /* !FF_FS_READONLY */
-
-
-
-
-#if FF_USE_FASTSEEK
-/*-----------------------------------------------------------------------*/
-/* FAT handling - Convert offset into cluster with link map table */
-/*-----------------------------------------------------------------------*/
-
-static DWORD clmt_clust ( /* <2:Error, >=2:Cluster number */
- FIL* fp, /* Pointer to the file object */
- FSIZE_t ofs /* File offset to be converted to cluster# */
-)
-{
- DWORD cl, ncl, *tbl;
- FATFS *fs = fp->obj.fs;
-
-
- tbl = fp->cltbl + 1; /* Top of CLMT */
- cl = (DWORD)(ofs / SS(fs) / fs->csize); /* Cluster order from top of the file */
- for (;;) {
- ncl = *tbl++; /* Number of cluters in the fragment */
- if (ncl == 0) return 0; /* End of table? (error) */
- if (cl < ncl) break; /* In this fragment? */
- cl -= ncl; tbl++; /* Next fragment */
- }
- return cl + *tbl; /* Return the cluster number */
-}
-
-#endif /* FF_USE_FASTSEEK */
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Directory handling - Fill a cluster with zeros */
-/*-----------------------------------------------------------------------*/
-
-#if !FF_FS_READONLY
-static FRESULT dir_clear ( /* Returns FR_OK or FR_DISK_ERR */
- FATFS *fs, /* Filesystem object */
- DWORD clst /* Directory table to clear */
-)
-{
- DWORD sect;
- UINT n, szb;
- BYTE *ibuf;
-
-
- if (sync_window(fs) != FR_OK) return FR_DISK_ERR; /* Flush disk access window */
- sect = clst2sect(fs, clst); /* Top of the cluster */
- fs->winsect = sect; /* Set window to top of the cluster */
- mem_set(fs->win, 0, sizeof fs->win); /* Clear window buffer */
-#if FF_USE_LFN == 3 /* Quick table clear by using multi-secter write */
- /* Allocate a temporary buffer */
- for (szb = ((DWORD)fs->csize * SS(fs) >= MAX_MALLOC) ? MAX_MALLOC : fs->csize * SS(fs), ibuf = 0; szb > SS(fs) && (ibuf = ff_memalloc(szb)) == 0; szb /= 2) ;
- if (szb > SS(fs)) { /* Buffer allocated? */
- mem_set(ibuf, 0, szb);
- szb /= SS(fs); /* Bytes -> Sectors */
- for (n = 0; n < fs->csize && disk_write(fs->pdrv, ibuf, sect + n, szb) == RES_OK; n += szb) ; /* Fill the cluster with 0 */
- ff_memfree(ibuf);
- } else
-#endif
- {
- ibuf = fs->win; szb = 1; /* Use window buffer (many single-sector writes may take a time) */
- for (n = 0; n < fs->csize && disk_write(fs->pdrv, ibuf, sect + n, szb) == RES_OK; n += szb) ; /* Fill the cluster with 0 */
- }
- return (n == fs->csize) ? FR_OK : FR_DISK_ERR;
-}
-#endif /* !FF_FS_READONLY */
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Directory handling - Set directory index */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT dir_sdi ( /* FR_OK(0):succeeded, !=0:error */
- DIR* dp, /* Pointer to directory object */
- DWORD ofs /* Offset of directory table */
-)
-{
- DWORD csz, clst;
- FATFS *fs = dp->obj.fs;
-
-
- if (ofs >= (DWORD)((FF_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR) || ofs % SZDIRE) { /* Check range of offset and alignment */
- return FR_INT_ERR;
- }
- dp->dptr = ofs; /* Set current offset */
- clst = dp->obj.sclust; /* Table start cluster (0:root) */
- if (clst == 0 && fs->fs_type >= FS_FAT32) { /* Replace cluster# 0 with root cluster# */
- clst = fs->dirbase;
- if (FF_FS_EXFAT) dp->obj.stat = 0; /* exFAT: Root dir has an FAT chain */
- }
-
- if (clst == 0) { /* Static table (root-directory on the FAT volume) */
- if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */
- dp->sect = fs->dirbase;
-
- } else { /* Dynamic table (sub-directory or root-directory on the FAT32/exFAT volume) */
- csz = (DWORD)fs->csize * SS(fs); /* Bytes per cluster */
- while (ofs >= csz) { /* Follow cluster chain */
- clst = get_fat(&dp->obj, clst); /* Get next cluster */
- if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
- if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR; /* Reached to end of table or internal error */
- ofs -= csz;
- }
- dp->sect = clst2sect(fs, clst);
- }
- dp->clust = clst; /* Current cluster# */
- if (dp->sect == 0) return FR_INT_ERR;
- dp->sect += ofs / SS(fs); /* Sector# of the directory entry */
- dp->dir = fs->win + (ofs % SS(fs)); /* Pointer to the entry in the win[] */
-
- return FR_OK;
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Directory handling - Move directory table index next */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT dir_next ( /* FR_OK(0):succeeded, FR_NO_FILE:End of table, FR_DENIED:Could not stretch */
- DIR* dp, /* Pointer to the directory object */
- int stretch /* 0: Do not stretch table, 1: Stretch table if needed */
-)
-{
- DWORD ofs, clst;
- FATFS *fs = dp->obj.fs;
-
-
- ofs = dp->dptr + SZDIRE; /* Next entry */
- if (ofs >= (DWORD)((FF_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR)) dp->sect = 0; /* Disable it if the offset reached the max value */
- if (dp->sect == 0) return FR_NO_FILE; /* Report EOT if it has been disabled */
-
- if (ofs % SS(fs) == 0) { /* Sector changed? */
- dp->sect++; /* Next sector */
-
- if (dp->clust == 0) { /* Static table */
- if (ofs / SZDIRE >= fs->n_rootdir) { /* Report EOT if it reached end of static table */
- dp->sect = 0; return FR_NO_FILE;
- }
- }
- else { /* Dynamic table */
- if ((ofs / SS(fs) & (fs->csize - 1)) == 0) { /* Cluster changed? */
- clst = get_fat(&dp->obj, dp->clust); /* Get next cluster */
- if (clst <= 1) return FR_INT_ERR; /* Internal error */
- if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
- if (clst >= fs->n_fatent) { /* It reached end of dynamic table */
-#if !FF_FS_READONLY
- if (!stretch) { /* If no stretch, report EOT */
- dp->sect = 0; return FR_NO_FILE;
- }
- clst = create_chain(&dp->obj, dp->clust); /* Allocate a cluster */
- if (clst == 0) return FR_DENIED; /* No free cluster */
- if (clst == 1) return FR_INT_ERR; /* Internal error */
- if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
- if (dir_clear(fs, clst) != FR_OK) return FR_DISK_ERR; /* Clean up the stretched table */
- if (FF_FS_EXFAT) dp->obj.stat |= 4; /* exFAT: The directory has been stretched */
-#else
- if (!stretch) dp->sect = 0; /* (this line is to suppress compiler warning) */
- dp->sect = 0; return FR_NO_FILE; /* Report EOT */
-#endif
- }
- dp->clust = clst; /* Initialize data for new cluster */
- dp->sect = clst2sect(fs, clst);
- }
- }
- }
- dp->dptr = ofs; /* Current entry */
- dp->dir = fs->win + ofs % SS(fs); /* Pointer to the entry in the win[] */
-
- return FR_OK;
-}
-
-
-
-
-#if !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* Directory handling - Reserve a block of directory entries */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT dir_alloc ( /* FR_OK(0):succeeded, !=0:error */
- DIR* dp, /* Pointer to the directory object */
- UINT nent /* Number of contiguous entries to allocate */
-)
-{
- FRESULT res;
- UINT n;
- FATFS *fs = dp->obj.fs;
-
-
- res = dir_sdi(dp, 0);
- if (res == FR_OK) {
- n = 0;
- do {
- res = move_window(fs, dp->sect);
- if (res != FR_OK) break;
-#if FF_FS_EXFAT
- if ((fs->fs_type == FS_EXFAT) ? (int)((dp->dir[XDIR_Type] & 0x80) == 0) : (int)(dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0)) {
-#else
- if (dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0) {
-#endif
- if (++n == nent) break; /* A block of contiguous free entries is found */
- } else {
- n = 0; /* Not a blank entry. Restart to search */
- }
- res = dir_next(dp, 1);
- } while (res == FR_OK); /* Next entry with table stretch enabled */
- }
-
- if (res == FR_NO_FILE) res = FR_DENIED; /* No directory entry to allocate */
- return res;
-}
-
-#endif /* !FF_FS_READONLY */
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* FAT: Directory handling - Load/Store start cluster number */
-/*-----------------------------------------------------------------------*/
-
-static DWORD ld_clust ( /* Returns the top cluster value of the SFN entry */
- FATFS* fs, /* Pointer to the fs object */
- const BYTE* dir /* Pointer to the key entry */
-)
-{
- DWORD cl;
-
- cl = ld_word(dir + DIR_FstClusLO);
- if (fs->fs_type == FS_FAT32) {
- cl |= (DWORD)ld_word(dir + DIR_FstClusHI) << 16;
- }
-
- return cl;
-}
-
-
-#if !FF_FS_READONLY
-static void st_clust (
- FATFS* fs, /* Pointer to the fs object */
- BYTE* dir, /* Pointer to the key entry */
- DWORD cl /* Value to be set */
-)
-{
- st_word(dir + DIR_FstClusLO, (WORD)cl);
- if (fs->fs_type == FS_FAT32) {
- st_word(dir + DIR_FstClusHI, (WORD)(cl >> 16));
- }
-}
-#endif
-
-
-
-#if FF_USE_LFN
-/*--------------------------------------------------------*/
-/* FAT-LFN: Compare a part of file name with an LFN entry */
-/*--------------------------------------------------------*/
-
-static int cmp_lfn ( /* 1:matched, 0:not matched */
- const WCHAR* lfnbuf, /* Pointer to the LFN working buffer to be compared */
- BYTE* dir /* Pointer to the directory entry containing the part of LFN */
-)
-{
- UINT i, s;
- WCHAR wc, uc;
-
-
- if (ld_word(dir + LDIR_FstClusLO) != 0) return 0; /* Check LDIR_FstClusLO */
-
- i = ((dir[LDIR_Ord] & 0x3F) - 1) * 13; /* Offset in the LFN buffer */
-
- for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */
- uc = ld_word(dir + LfnOfs[s]); /* Pick an LFN character */
- if (wc != 0) {
- if (i >= FF_MAX_LFN + 1 || ff_wtoupper(uc) != ff_wtoupper(lfnbuf[i++])) { /* Compare it */
- return 0; /* Not matched */
- }
- wc = uc;
- } else {
- if (uc != 0xFFFF) return 0; /* Check filler */
- }
- }
-
- if ((dir[LDIR_Ord] & LLEF) && wc && lfnbuf[i]) return 0; /* Last segment matched but different length */
-
- return 1; /* The part of LFN matched */
-}
-
-
-#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 || FF_USE_LABEL || FF_FS_EXFAT
-/*-----------------------------------------------------*/
-/* FAT-LFN: Pick a part of file name from an LFN entry */
-/*-----------------------------------------------------*/
-
-static int pick_lfn ( /* 1:succeeded, 0:buffer overflow or invalid LFN entry */
- WCHAR* lfnbuf, /* Pointer to the LFN working buffer */
- BYTE* dir /* Pointer to the LFN entry */
-)
-{
- UINT i, s;
- WCHAR wc, uc;
-
-
- if (ld_word(dir + LDIR_FstClusLO) != 0) return 0; /* Check LDIR_FstClusLO is 0 */
-
- i = ((dir[LDIR_Ord] & ~LLEF) - 1) * 13; /* Offset in the LFN buffer */
-
- for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */
- uc = ld_word(dir + LfnOfs[s]); /* Pick an LFN character */
- if (wc != 0) {
- if (i >= FF_MAX_LFN + 1) return 0; /* Buffer overflow? */
- lfnbuf[i++] = wc = uc; /* Store it */
- } else {
- if (uc != 0xFFFF) return 0; /* Check filler */
- }
- }
-
- if (dir[LDIR_Ord] & LLEF && wc != 0) { /* Put terminator if it is the last LFN part and not terminated */
- if (i >= FF_MAX_LFN + 1) return 0; /* Buffer overflow? */
- lfnbuf[i] = 0;
- }
-
- return 1; /* The part of LFN is valid */
-}
-#endif
-
-
-#if !FF_FS_READONLY
-/*-----------------------------------------*/
-/* FAT-LFN: Create an entry of LFN entries */
-/*-----------------------------------------*/
-
-static void put_lfn (
- const WCHAR* lfn, /* Pointer to the LFN */
- BYTE* dir, /* Pointer to the LFN entry to be created */
- BYTE ord, /* LFN order (1-20) */
- BYTE sum /* Checksum of the corresponding SFN */
-)
-{
- UINT i, s;
- WCHAR wc;
-
-
- dir[LDIR_Chksum] = sum; /* Set checksum */
- dir[LDIR_Attr] = AM_LFN; /* Set attribute. LFN entry */
- dir[LDIR_Type] = 0;
- st_word(dir + LDIR_FstClusLO, 0);
-
- i = (ord - 1) * 13; /* Get offset in the LFN working buffer */
- s = wc = 0;
- do {
- if (wc != 0xFFFF) wc = lfn[i++]; /* Get an effective character */
- st_word(dir + LfnOfs[s], wc); /* Put it */
- if (wc == 0) wc = 0xFFFF; /* Padding characters for left locations */
- } while (++s < 13);
- if (wc == 0xFFFF || !lfn[i]) ord |= LLEF; /* Last LFN part is the start of LFN sequence */
- dir[LDIR_Ord] = ord; /* Set the LFN order */
-}
-
-#endif /* !FF_FS_READONLY */
-#endif /* FF_USE_LFN */
-
-
-
-#if FF_USE_LFN && !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* FAT-LFN: Create a Numbered SFN */
-/*-----------------------------------------------------------------------*/
-
-static void gen_numname (
- BYTE* dst, /* Pointer to the buffer to store numbered SFN */
- const BYTE* src, /* Pointer to SFN */
- const WCHAR* lfn, /* Pointer to LFN */
- UINT seq /* Sequence number */
-)
-{
- BYTE ns[8], c;
- UINT i, j;
- WCHAR wc;
- DWORD sr;
-
-
- mem_cpy(dst, src, 11);
-
- if (seq > 5) { /* In case of many collisions, generate a hash number instead of sequential number */
- sr = seq;
- while (*lfn) { /* Create a CRC as hash value */
- wc = *lfn++;
- for (i = 0; i < 16; i++) {
- sr = (sr << 1) + (wc & 1);
- wc >>= 1;
- if (sr & 0x10000) sr ^= 0x11021;
- }
- }
- seq = (UINT)sr;
- }
-
- /* itoa (hexdecimal) */
- i = 7;
- do {
- c = (BYTE)((seq % 16) + '0');
- if (c > '9') c += 7;
- ns[i--] = c;
- seq /= 16;
- } while (seq);
- ns[i] = '~';
-
- /* Append the number to the SFN body */
- for (j = 0; j < i && dst[j] != ' '; j++) {
- if (dbc_1st(dst[j])) {
- if (j == i - 1) break;
- j++;
- }
- }
- do {
- dst[j++] = (i < 8) ? ns[i++] : ' ';
- } while (j < 8);
-}
-#endif /* FF_USE_LFN && !FF_FS_READONLY */
-
-
-
-#if FF_USE_LFN
-/*-----------------------------------------------------------------------*/
-/* FAT-LFN: Calculate checksum of an SFN entry */
-/*-----------------------------------------------------------------------*/
-
-static BYTE sum_sfn (
- const BYTE* dir /* Pointer to the SFN entry */
-)
-{
- BYTE sum = 0;
- UINT n = 11;
-
- do {
- sum = (sum >> 1) + (sum << 7) + *dir++;
- } while (--n);
- return sum;
-}
-
-#endif /* FF_USE_LFN */
-
-
-
-#if FF_FS_EXFAT
-/*-----------------------------------------------------------------------*/
-/* exFAT: Checksum */
-/*-----------------------------------------------------------------------*/
-
-static WORD xdir_sum ( /* Get checksum of the directoly entry block */
- const BYTE* dir /* Directory entry block to be calculated */
-)
-{
- UINT i, szblk;
- WORD sum;
-
-
- szblk = (dir[XDIR_NumSec] + 1) * SZDIRE; /* Number of bytes of the entry block */
- for (i = sum = 0; i < szblk; i++) {
- if (i == XDIR_SetSum) { /* Skip 2-byte sum field */
- i++;
- } else {
- sum = ((sum & 1) ? 0x8000 : 0) + (sum >> 1) + dir[i];
- }
- }
- return sum;
-}
-
-
-
-static WORD xname_sum ( /* Get check sum (to be used as hash) of the file name */
- const WCHAR* name /* File name to be calculated */
-)
-{
- WCHAR chr;
- WORD sum = 0;
-
-
- while ((chr = *name++) != 0) {
- chr = (WCHAR)ff_wtoupper(chr); /* File name needs to be up-case converted */
- sum = ((sum & 1) ? 0x8000 : 0) + (sum >> 1) + (chr & 0xFF);
- sum = ((sum & 1) ? 0x8000 : 0) + (sum >> 1) + (chr >> 8);
- }
- return sum;
-}
-
-
-#if !FF_FS_READONLY && FF_USE_MKFS
-static DWORD xsum32 ( /* Returns 32-bit checksum */
- BYTE dat, /* Byte to be calculated (byte-by-byte processing) */
- DWORD sum /* Previous sum value */
-)
-{
- sum = ((sum & 1) ? 0x80000000 : 0) + (sum >> 1) + dat;
- return sum;
-}
-#endif
-
-
-#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2
-/*------------------------------------------------------*/
-/* exFAT: Get object information from a directory block */
-/*------------------------------------------------------*/
-
-static void get_xfileinfo (
- BYTE* dirb, /* Pointer to the direcotry entry block 85+C0+C1s */
- FILINFO* fno /* Buffer to store the extracted file information */
-)
-{
- WCHAR wc, hs;
- UINT di, si, nc;
-
- /* Get file name from the entry block */
- si = SZDIRE * 2; /* 1st C1 entry */
- nc = 0; hs = 0; di = 0;
- while (nc < dirb[XDIR_NumName]) {
- if (si >= MAXDIRB(FF_MAX_LFN)) { di = 0; break; } /* Truncated directory block? */
- if ((si % SZDIRE) == 0) si += 2; /* Skip entry type field */
- wc = ld_word(dirb + si); si += 2; nc++; /* Get a character */
- if (hs == 0 && IsSurrogate(wc)) { /* Is it a surrogate? */
- hs = wc; continue; /* Get low surrogate */
- }
- wc = put_utf((DWORD)hs << 16 | wc, &fno->fname[di], FF_LFN_BUF - di); /* Store it in API encoding */
- if (wc == 0) { di = 0; break; } /* Buffer overflow or wrong encoding? */
- di += wc;
- hs = 0;
- }
- if (hs != 0) di = 0; /* Broken surrogate pair? */
- if (di == 0) fno->fname[di++] = '?'; /* Inaccessible object name? */
- fno->fname[di] = 0; /* Terminate the name */
- fno->altname[0] = 0; /* exFAT does not support SFN */
-
- fno->fattrib = dirb[XDIR_Attr]; /* Attribute */
- fno->fsize = (fno->fattrib & AM_DIR) ? 0 : ld_qword(dirb + XDIR_FileSize); /* Size */
- fno->ftime = ld_word(dirb + XDIR_ModTime + 0); /* Time */
- fno->fdate = ld_word(dirb + XDIR_ModTime + 2); /* Date */
-}
-
-#endif /* FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 */
-
-
-/*-----------------------------------*/
-/* exFAT: Get a directry entry block */
-/*-----------------------------------*/
-
-static FRESULT load_xdir ( /* FR_INT_ERR: invalid entry block */
- DIR* dp /* Reading direcotry object pointing top of the entry block to load */
-)
-{
- FRESULT res;
- UINT i, sz_ent;
- BYTE* dirb = dp->obj.fs->dirbuf; /* Pointer to the on-memory direcotry entry block 85+C0+C1s */
-
-
- /* Load file-directory entry */
- res = move_window(dp->obj.fs, dp->sect);
- if (res != FR_OK) return res;
- if (dp->dir[XDIR_Type] != ET_FILEDIR) return FR_INT_ERR; /* Invalid order */
- mem_cpy(dirb + 0 * SZDIRE, dp->dir, SZDIRE);
- sz_ent = (dirb[XDIR_NumSec] + 1) * SZDIRE;
- if (sz_ent < 3 * SZDIRE || sz_ent > 19 * SZDIRE) return FR_INT_ERR;
-
- /* Load stream-extension entry */
- res = dir_next(dp, 0);
- if (res == FR_NO_FILE) res = FR_INT_ERR; /* It cannot be */
- if (res != FR_OK) return res;
- res = move_window(dp->obj.fs, dp->sect);
- if (res != FR_OK) return res;
- if (dp->dir[XDIR_Type] != ET_STREAM) return FR_INT_ERR; /* Invalid order */
- mem_cpy(dirb + 1 * SZDIRE, dp->dir, SZDIRE);
- if (MAXDIRB(dirb[XDIR_NumName]) > sz_ent) return FR_INT_ERR;
-
- /* Load file-name entries */
- i = 2 * SZDIRE; /* Name offset to load */
- do {
- res = dir_next(dp, 0);
- if (res == FR_NO_FILE) res = FR_INT_ERR; /* It cannot be */
- if (res != FR_OK) return res;
- res = move_window(dp->obj.fs, dp->sect);
- if (res != FR_OK) return res;
- if (dp->dir[XDIR_Type] != ET_FILENAME) return FR_INT_ERR; /* Invalid order */
- if (i < MAXDIRB(FF_MAX_LFN)) mem_cpy(dirb + i, dp->dir, SZDIRE);
- } while ((i += SZDIRE) < sz_ent);
-
- /* Sanity check (do it for only accessible object) */
- if (i <= MAXDIRB(FF_MAX_LFN)) {
- if (xdir_sum(dirb) != ld_word(dirb + XDIR_SetSum)) return FR_INT_ERR;
- }
- return FR_OK;
-}
-
-
-/*------------------------------------------------------------------*/
-/* exFAT: Initialize object allocation info with loaded entry block */
-/*------------------------------------------------------------------*/
-
-static void init_alloc_info (
- FATFS* fs, /* Filesystem object */
- FFOBJID* obj /* Object allocation information to be initialized */
-)
-{
- obj->sclust = ld_dword(fs->dirbuf + XDIR_FstClus); /* Start cluster */
- obj->objsize = ld_qword(fs->dirbuf + XDIR_FileSize); /* Size */
- obj->stat = fs->dirbuf[XDIR_GenFlags] & 2; /* Allocation status */
- obj->n_frag = 0; /* No last fragment info */
-}
-
-
-
-#if !FF_FS_READONLY || FF_FS_RPATH != 0
-/*------------------------------------------------*/
-/* exFAT: Load the object's directory entry block */
-/*------------------------------------------------*/
-
-static FRESULT load_obj_xdir (
- DIR* dp, /* Blank directory object to be used to access containing direcotry */
- const FFOBJID* obj /* Object with its containing directory information */
-)
-{
- FRESULT res;
-
- /* Open object containing directory */
- dp->obj.fs = obj->fs;
- dp->obj.sclust = obj->c_scl;
- dp->obj.stat = (BYTE)obj->c_size;
- dp->obj.objsize = obj->c_size & 0xFFFFFF00;
- dp->obj.n_frag = 0;
- dp->blk_ofs = obj->c_ofs;
-
- res = dir_sdi(dp, dp->blk_ofs); /* Goto object's entry block */
- if (res == FR_OK) {
- res = load_xdir(dp); /* Load the object's entry block */
- }
- return res;
-}
-#endif
-
-
-#if !FF_FS_READONLY
-/*----------------------------------------*/
-/* exFAT: Store the directory entry block */
-/*----------------------------------------*/
-
-static FRESULT store_xdir (
- DIR* dp /* Pointer to the direcotry object */
-)
-{
- FRESULT res;
- UINT nent;
- BYTE* dirb = dp->obj.fs->dirbuf; /* Pointer to the direcotry entry block 85+C0+C1s */
-
- /* Create set sum */
- st_word(dirb + XDIR_SetSum, xdir_sum(dirb));
- nent = dirb[XDIR_NumSec] + 1;
-
- /* Store the direcotry entry block to the directory */
- res = dir_sdi(dp, dp->blk_ofs);
- while (res == FR_OK) {
- res = move_window(dp->obj.fs, dp->sect);
- if (res != FR_OK) break;
- mem_cpy(dp->dir, dirb, SZDIRE);
- dp->obj.fs->wflag = 1;
- if (--nent == 0) break;
- dirb += SZDIRE;
- res = dir_next(dp, 0);
- }
- return (res == FR_OK || res == FR_DISK_ERR) ? res : FR_INT_ERR;
-}
-
-
-
-/*-------------------------------------------*/
-/* exFAT: Create a new directory enrty block */
-/*-------------------------------------------*/
-
-static void create_xdir (
- BYTE* dirb, /* Pointer to the direcotry entry block buffer */
- const WCHAR* lfn /* Pointer to the object name */
-)
-{
- UINT i;
- BYTE nc1, nlen;
- WCHAR wc;
-
-
- /* Create file-directory and stream-extension entry */
- mem_set(dirb, 0, 2 * SZDIRE);
- dirb[0 * SZDIRE + XDIR_Type] = ET_FILEDIR;
- dirb[1 * SZDIRE + XDIR_Type] = ET_STREAM;
-
- /* Create file-name entries */
- i = SZDIRE * 2; /* Top of file_name entries */
- nlen = nc1 = 0; wc = 1;
- do {
- dirb[i++] = ET_FILENAME; dirb[i++] = 0;
- do { /* Fill name field */
- if (wc != 0 && (wc = lfn[nlen]) != 0) nlen++; /* Get a character if exist */
- st_word(dirb + i, wc); /* Store it */
- i += 2;
- } while (i % SZDIRE != 0);
- nc1++;
- } while (lfn[nlen]); /* Fill next entry if any char follows */
-
- dirb[XDIR_NumName] = nlen; /* Set name length */
- dirb[XDIR_NumSec] = 1 + nc1; /* Set secondary count (C0 + C1s) */
- st_word(dirb + XDIR_NameHash, xname_sum(lfn)); /* Set name hash */
-}
-
-#endif /* !FF_FS_READONLY */
-#endif /* FF_FS_EXFAT */
-
-
-
-#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 || FF_USE_LABEL || FF_FS_EXFAT
-/*-----------------------------------------------------------------------*/
-/* Read an object from the directory */
-/*-----------------------------------------------------------------------*/
-
-#define DIR_READ_FILE(dp) dir_read(dp, 0)
-#define DIR_READ_LABEL(dp) dir_read(dp, 1)
-
-static FRESULT dir_read (
- DIR* dp, /* Pointer to the directory object */
- int vol /* Filtered by 0:file/directory or 1:volume label */
-)
-{
- FRESULT res = FR_NO_FILE;
- FATFS *fs = dp->obj.fs;
- BYTE attr, b;
-#if FF_USE_LFN
- BYTE ord = 0xFF, sum = 0xFF;
-#endif
-
- while (dp->sect) {
- res = move_window(fs, dp->sect);
- if (res != FR_OK) break;
- b = dp->dir[DIR_Name]; /* Test for the entry type */
- if (b == 0) {
- res = FR_NO_FILE; break; /* Reached to end of the directory */
- }
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */
- if (FF_USE_LABEL && vol) {
- if (b == ET_VLABEL) break; /* Volume label entry? */
- } else {
- if (b == ET_FILEDIR) { /* Start of the file entry block? */
- dp->blk_ofs = dp->dptr; /* Get location of the block */
- res = load_xdir(dp); /* Load the entry block */
- if (res == FR_OK) {
- dp->obj.attr = fs->dirbuf[XDIR_Attr] & AM_MASK; /* Get attribute */
- }
- break;
- }
- }
- } else
-#endif
- { /* On the FAT/FAT32 volume */
- dp->obj.attr = attr = dp->dir[DIR_Attr] & AM_MASK; /* Get attribute */
-#if FF_USE_LFN /* LFN configuration */
- if (b == DDEM || b == '.' || (int)((attr & ~AM_ARC) == AM_VOL) != vol) { /* An entry without valid data */
- ord = 0xFF;
- } else {
- if (attr == AM_LFN) { /* An LFN entry is found */
- if (b & LLEF) { /* Is it start of an LFN sequence? */
- sum = dp->dir[LDIR_Chksum];
- b &= (BYTE)~LLEF; ord = b;
- dp->blk_ofs = dp->dptr;
- }
- /* Check LFN validity and capture it */
- ord = (b == ord && sum == dp->dir[LDIR_Chksum] && pick_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0xFF;
- } else { /* An SFN entry is found */
- if (ord != 0 || sum != sum_sfn(dp->dir)) { /* Is there a valid LFN? */
- dp->blk_ofs = 0xFFFFFFFF; /* It has no LFN. */
- }
- break;
- }
- }
-#else /* Non LFN configuration */
- if (b != DDEM && b != '.' && attr != AM_LFN && (int)((attr & ~AM_ARC) == AM_VOL) == vol) { /* Is it a valid entry? */
- break;
- }
-#endif
- }
- res = dir_next(dp, 0); /* Next entry */
- if (res != FR_OK) break;
- }
-
- if (res != FR_OK) dp->sect = 0; /* Terminate the read operation on error or EOT */
- return res;
-}
-
-#endif /* FF_FS_MINIMIZE <= 1 || FF_USE_LABEL || FF_FS_RPATH >= 2 */
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Directory handling - Find an object in the directory */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT dir_find ( /* FR_OK(0):succeeded, !=0:error */
- DIR* dp /* Pointer to the directory object with the file name */
-)
-{
- FRESULT res;
- FATFS *fs = dp->obj.fs;
- BYTE c;
-#if FF_USE_LFN
- BYTE a, ord, sum;
-#endif
-
- res = dir_sdi(dp, 0); /* Rewind directory object */
- if (res != FR_OK) return res;
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */
- BYTE nc;
- UINT di, ni;
- WORD hash = xname_sum(fs->lfnbuf); /* Hash value of the name to find */
-
- while ((res = DIR_READ_FILE(dp)) == FR_OK) { /* Read an item */
-#if FF_MAX_LFN < 255
- if (fs->dirbuf[XDIR_NumName] > FF_MAX_LFN) continue; /* Skip comparison if inaccessible object name */
-#endif
- if (ld_word(fs->dirbuf + XDIR_NameHash) != hash) continue; /* Skip comparison if hash mismatched */
- for (nc = fs->dirbuf[XDIR_NumName], di = SZDIRE * 2, ni = 0; nc; nc--, di += 2, ni++) { /* Compare the name */
- if ((di % SZDIRE) == 0) di += 2;
- if (ff_wtoupper(ld_word(fs->dirbuf + di)) != ff_wtoupper(fs->lfnbuf[ni])) break;
- }
- if (nc == 0 && !fs->lfnbuf[ni]) break; /* Name matched? */
- }
- return res;
- }
-#endif
- /* On the FAT/FAT32 volume */
-#if FF_USE_LFN
- ord = sum = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */
-#endif
- do {
- res = move_window(fs, dp->sect);
- if (res != FR_OK) break;
- c = dp->dir[DIR_Name];
- if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */
-#if FF_USE_LFN /* LFN configuration */
- dp->obj.attr = a = dp->dir[DIR_Attr] & AM_MASK;
- if (c == DDEM || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */
- ord = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */
- } else {
- if (a == AM_LFN) { /* An LFN entry is found */
- if (!(dp->fn[NSFLAG] & NS_NOLFN)) {
- if (c & LLEF) { /* Is it start of LFN sequence? */
- sum = dp->dir[LDIR_Chksum];
- c &= (BYTE)~LLEF; ord = c; /* LFN start order */
- dp->blk_ofs = dp->dptr; /* Start offset of LFN */
- }
- /* Check validity of the LFN entry and compare it with given name */
- ord = (c == ord && sum == dp->dir[LDIR_Chksum] && cmp_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0xFF;
- }
- } else { /* An SFN entry is found */
- if (ord == 0 && sum == sum_sfn(dp->dir)) break; /* LFN matched? */
- if (!(dp->fn[NSFLAG] & NS_LOSS) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* SFN matched? */
- ord = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */
- }
- }
-#else /* Non LFN configuration */
- dp->obj.attr = dp->dir[DIR_Attr] & AM_MASK;
- if (!(dp->dir[DIR_Attr] & AM_VOL) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* Is it a valid entry? */
-#endif
- res = dir_next(dp, 0); /* Next entry */
- } while (res == FR_OK);
-
- return res;
-}
-
-
-
-
-#if !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* Register an object to the directory */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT dir_register ( /* FR_OK:succeeded, FR_DENIED:no free entry or too many SFN collision, FR_DISK_ERR:disk error */
- DIR* dp /* Target directory with object name to be created */
-)
-{
- FRESULT res;
- FATFS *fs = dp->obj.fs;
-#if FF_USE_LFN /* LFN configuration */
- UINT n, nlen, nent;
- BYTE sn[12], sum;
-
-
- if (dp->fn[NSFLAG] & (NS_DOT | NS_NONAME)) return FR_INVALID_NAME; /* Check name validity */
- for (nlen = 0; fs->lfnbuf[nlen]; nlen++) ; /* Get lfn length */
-
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */
- nent = (nlen + 14) / 15 + 2; /* Number of entries to allocate (85+C0+C1s) */
- res = dir_alloc(dp, nent); /* Allocate directory entries */
- if (res != FR_OK) return res;
- dp->blk_ofs = dp->dptr - SZDIRE * (nent - 1); /* Set the allocated entry block offset */
-
- if (dp->obj.stat & 4) { /* Has the directory been stretched by new allocation? */
- dp->obj.stat &= ~4;
- res = fill_first_frag(&dp->obj); /* Fill the first fragment on the FAT if needed */
- if (res != FR_OK) return res;
- res = fill_last_frag(&dp->obj, dp->clust, 0xFFFFFFFF); /* Fill the last fragment on the FAT if needed */
- if (res != FR_OK) return res;
- if (dp->obj.sclust != 0) { /* Is it a sub-directory? */
- DIR dj;
-
- res = load_obj_xdir(&dj, &dp->obj); /* Load the object status */
- if (res != FR_OK) return res;
- dp->obj.objsize += (DWORD)fs->csize * SS(fs); /* Increase the directory size by cluster size */
- st_qword(fs->dirbuf + XDIR_FileSize, dp->obj.objsize); /* Update the allocation status */
- st_qword(fs->dirbuf + XDIR_ValidFileSize, dp->obj.objsize);
- fs->dirbuf[XDIR_GenFlags] = dp->obj.stat | 1;
- res = store_xdir(&dj); /* Store the object status */
- if (res != FR_OK) return res;
- }
- }
-
- create_xdir(fs->dirbuf, fs->lfnbuf); /* Create on-memory directory block to be written later */
- return FR_OK;
- }
-#endif
- /* On the FAT/FAT32 volume */
- mem_cpy(sn, dp->fn, 12);
- if (sn[NSFLAG] & NS_LOSS) { /* When LFN is out of 8.3 format, generate a numbered name */
- dp->fn[NSFLAG] = NS_NOLFN; /* Find only SFN */
- for (n = 1; n < 100; n++) {
- gen_numname(dp->fn, sn, fs->lfnbuf, n); /* Generate a numbered name */
- res = dir_find(dp); /* Check if the name collides with existing SFN */
- if (res != FR_OK) break;
- }
- if (n == 100) return FR_DENIED; /* Abort if too many collisions */
- if (res != FR_NO_FILE) return res; /* Abort if the result is other than 'not collided' */
- dp->fn[NSFLAG] = sn[NSFLAG];
- }
-
- /* Create an SFN with/without LFNs. */
- nent = (sn[NSFLAG] & NS_LFN) ? (nlen + 12) / 13 + 1 : 1; /* Number of entries to allocate */
- res = dir_alloc(dp, nent); /* Allocate entries */
- if (res == FR_OK && --nent) { /* Set LFN entry if needed */
- res = dir_sdi(dp, dp->dptr - nent * SZDIRE);
- if (res == FR_OK) {
- sum = sum_sfn(dp->fn); /* Checksum value of the SFN tied to the LFN */
- do { /* Store LFN entries in bottom first */
- res = move_window(fs, dp->sect);
- if (res != FR_OK) break;
- put_lfn(fs->lfnbuf, dp->dir, (BYTE)nent, sum);
- fs->wflag = 1;
- res = dir_next(dp, 0); /* Next entry */
- } while (res == FR_OK && --nent);
- }
- }
-
-#else /* Non LFN configuration */
- res = dir_alloc(dp, 1); /* Allocate an entry for SFN */
-
-#endif
-
- /* Set SFN entry */
- if (res == FR_OK) {
- res = move_window(fs, dp->sect);
- if (res == FR_OK) {
- mem_set(dp->dir, 0, SZDIRE); /* Clean the entry */
- mem_cpy(dp->dir + DIR_Name, dp->fn, 11); /* Put SFN */
-#if FF_USE_LFN
- dp->dir[DIR_NTres] = dp->fn[NSFLAG] & (NS_BODY | NS_EXT); /* Put NT flag */
-#endif
- fs->wflag = 1;
- }
- }
-
- return res;
-}
-
-#endif /* !FF_FS_READONLY */
-
-
-
-#if !FF_FS_READONLY && FF_FS_MINIMIZE == 0
-/*-----------------------------------------------------------------------*/
-/* Remove an object from the directory */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT dir_remove ( /* FR_OK:Succeeded, FR_DISK_ERR:A disk error */
- DIR* dp /* Directory object pointing the entry to be removed */
-)
-{
- FRESULT res;
- FATFS *fs = dp->obj.fs;
-#if FF_USE_LFN /* LFN configuration */
- DWORD last = dp->dptr;
-
- res = (dp->blk_ofs == 0xFFFFFFFF) ? FR_OK : dir_sdi(dp, dp->blk_ofs); /* Goto top of the entry block if LFN is exist */
- if (res == FR_OK) {
- do {
- res = move_window(fs, dp->sect);
- if (res != FR_OK) break;
- if (FF_FS_EXFAT && fs->fs_type == FS_EXFAT) { /* On the exFAT volume */
- dp->dir[XDIR_Type] &= 0x7F; /* Clear the entry InUse flag. */
- } else { /* On the FAT/FAT32 volume */
- dp->dir[DIR_Name] = DDEM; /* Mark the entry 'deleted'. */
- }
- fs->wflag = 1;
- if (dp->dptr >= last) break; /* If reached last entry then all entries of the object has been deleted. */
- res = dir_next(dp, 0); /* Next entry */
- } while (res == FR_OK);
- if (res == FR_NO_FILE) res = FR_INT_ERR;
- }
-#else /* Non LFN configuration */
-
- res = move_window(fs, dp->sect);
- if (res == FR_OK) {
- dp->dir[DIR_Name] = DDEM; /* Mark the entry 'deleted'.*/
- fs->wflag = 1;
- }
-#endif
-
- return res;
-}
-
-#endif /* !FF_FS_READONLY && FF_FS_MINIMIZE == 0 */
-
-
-
-#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2
-/*-----------------------------------------------------------------------*/
-/* Get file information from directory entry */
-/*-----------------------------------------------------------------------*/
-
-static void get_fileinfo (
- DIR* dp, /* Pointer to the directory object */
- FILINFO* fno /* Pointer to the file information to be filled */
-)
-{
- UINT si, di;
-#if FF_USE_LFN
- BYTE lcf;
- WCHAR wc, hs;
- FATFS *fs = dp->obj.fs;
-#else
- TCHAR c;
-#endif
-
-
- fno->fname[0] = 0; /* Invaidate file info */
- if (dp->sect == 0) return; /* Exit if read pointer has reached end of directory */
-
-#if FF_USE_LFN /* LFN configuration */
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */
- get_xfileinfo(fs->dirbuf, fno);
- return;
- } else
-#endif
- { /* On the FAT/FAT32 volume */
- if (dp->blk_ofs != 0xFFFFFFFF) { /* Get LFN if available */
- si = di = hs = 0;
- while (fs->lfnbuf[si] != 0) {
- wc = fs->lfnbuf[si++]; /* Get an LFN character (UTF-16) */
- if (hs == 0 && IsSurrogate(wc)) { /* Is it a surrogate? */
- hs = wc; continue; /* Get low surrogate */
- }
- wc = put_utf((DWORD)hs << 16 | wc, &fno->fname[di], FF_LFN_BUF - di); /* Store it in UTF-16 or UTF-8 encoding */
- if (wc == 0) { di = 0; break; } /* Invalid char or buffer overflow? */
- di += wc;
- hs = 0;
- }
- if (hs != 0) di = 0; /* Broken surrogate pair? */
- fno->fname[di] = 0; /* Terminate the LFN (null string means LFN is invalid) */
- }
- }
-
- si = di = 0;
- while (si < 11) { /* Get SFN from SFN entry */
- wc = dp->dir[si++]; /* Get a char */
- if (wc == ' ') continue; /* Skip padding spaces */
- if (wc == RDDEM) wc = DDEM; /* Restore replaced DDEM character */
- if (si == 9 && di < FF_SFN_BUF) fno->altname[di++] = '.'; /* Insert a . if extension is exist */
-#if FF_LFN_UNICODE >= 1 /* Unicode output */
- if (dbc_1st((BYTE)wc) && si != 8 && si != 11 && dbc_2nd(dp->dir[si])) { /* Make a DBC if needed */
- wc = wc << 8 | dp->dir[si++];
- }
- wc = ff_oem2uni(wc, CODEPAGE); /* ANSI/OEM -> Unicode */
- if (wc == 0) { di = 0; break; } /* Wrong char in the current code page? */
- wc = put_utf(wc, &fno->altname[di], FF_SFN_BUF - di); /* Store it in Unicode */
- if (wc == 0) { di = 0; break; } /* Buffer overflow? */
- di += wc;
-#else /* ANSI/OEM output */
- fno->altname[di++] = (TCHAR)wc; /* Store it without any conversion */
-#endif
- }
- fno->altname[di] = 0; /* Terminate the SFN (null string means SFN is invalid) */
-
- if (fno->fname[0] == 0) { /* If LFN is invalid, altname[] needs to be copied to fname[] */
- if (di == 0) { /* If LFN and SFN both are invalid, this object is inaccesible */
- fno->fname[di++] = '?';
- } else {
- for (si = di = 0, lcf = NS_BODY; fno->altname[si]; si++, di++) { /* Copy altname[] to fname[] with case information */
- wc = (WCHAR)fno->altname[si];
- if (wc == '.') lcf = NS_EXT;
- if (IsUpper(wc) && (dp->dir[DIR_NTres] & lcf)) wc += 0x20;
- fno->fname[di] = (TCHAR)wc;
- }
- }
- fno->fname[di] = 0; /* Terminate the LFN */
- if (!dp->dir[DIR_NTres]) fno->altname[0] = 0; /* Altname is not needed if neither LFN nor case info is exist. */
- }
-
-#else /* Non-LFN configuration */
- si = di = 0;
- while (si < 11) { /* Copy name body and extension */
- c = (TCHAR)dp->dir[si++];
- if (c == ' ') continue; /* Skip padding spaces */
- if (c == RDDEM) c = DDEM; /* Restore replaced DDEM character */
- if (si == 9) fno->fname[di++] = '.';/* Insert a . if extension is exist */
- fno->fname[di++] = c;
- }
- fno->fname[di] = 0;
-#endif
-
- fno->fattrib = dp->dir[DIR_Attr]; /* Attribute */
- fno->fsize = ld_dword(dp->dir + DIR_FileSize); /* Size */
- fno->ftime = ld_word(dp->dir + DIR_ModTime + 0); /* Time */
- fno->fdate = ld_word(dp->dir + DIR_ModTime + 2); /* Date */
-}
-
-#endif /* FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 */
-
-
-
-#if FF_USE_FIND && FF_FS_MINIMIZE <= 1
-/*-----------------------------------------------------------------------*/
-/* Pattern matching */
-/*-----------------------------------------------------------------------*/
-
-static DWORD get_achar ( /* Get a character and advances ptr */
- const TCHAR** ptr /* Pointer to pointer to the ANSI/OEM or Unicode string */
-)
-{
- DWORD chr;
-
-
-#if FF_USE_LFN && FF_LFN_UNICODE >= 1 /* Unicode input */
- chr = tchar2uni(ptr);
- if (chr == 0xFFFFFFFF) chr = 0; /* Wrong UTF encoding is recognized as end of the string */
- chr = ff_wtoupper(chr);
-
-#else /* ANSI/OEM input */
- chr = (BYTE)*(*ptr)++; /* Get a byte */
- if (IsLower(chr)) chr -= 0x20; /* To upper ASCII char */
-#if FF_CODE_PAGE == 0
- if (ExCvt && chr >= 0x80) chr = ExCvt[chr - 0x80]; /* To upper SBCS extended char */
-#elif FF_CODE_PAGE < 900
- if (chr >= 0x80) chr = ExCvt[chr - 0x80]; /* To upper SBCS extended char */
-#endif
-#if FF_CODE_PAGE == 0 || FF_CODE_PAGE >= 900
- if (dbc_1st((BYTE)chr)) { /* Get DBC 2nd byte if needed */
- chr = dbc_2nd((BYTE)**ptr) ? chr << 8 | (BYTE)*(*ptr)++ : 0;
- }
-#endif
-
-#endif
- return chr;
-}
-
-
-static int pattern_matching ( /* 0:not matched, 1:matched */
- const TCHAR* pat, /* Matching pattern */
- const TCHAR* nam, /* String to be tested */
- int skip, /* Number of pre-skip chars (number of ?s) */
- int inf /* Infinite search (* specified) */
-)
-{
- const TCHAR *pp, *np;
- DWORD pc, nc;
- int nm, nx;
-
-
- while (skip--) { /* Pre-skip name chars */
- if (!get_achar(&nam)) return 0; /* Branch mismatched if less name chars */
- }
- if (*pat == 0 && inf) return 1; /* (short circuit) */
-
- do {
- pp = pat; np = nam; /* Top of pattern and name to match */
- for (;;) {
- if (*pp == '?' || *pp == '*') { /* Wildcard? */
- nm = nx = 0;
- do { /* Analyze the wildcard block */
- if (*pp++ == '?') nm++; else nx = 1;
- } while (*pp == '?' || *pp == '*');
- if (pattern_matching(pp, np, nm, nx)) return 1; /* Test new branch (recurs upto number of wildcard blocks in the pattern) */
- nc = *np; break; /* Branch mismatched */
- }
- pc = get_achar(&pp); /* Get a pattern char */
- nc = get_achar(&np); /* Get a name char */
- if (pc != nc) break; /* Branch mismatched? */
- if (pc == 0) return 1; /* Branch matched? (matched at end of both strings) */
- }
- get_achar(&nam); /* nam++ */
- } while (inf && nc); /* Retry until end of name if infinite search is specified */
-
- return 0;
-}
-
-#endif /* FF_USE_FIND && FF_FS_MINIMIZE <= 1 */
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Pick a top segment and create the object name in directory form */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT create_name ( /* FR_OK: successful, FR_INVALID_NAME: could not create */
- DIR* dp, /* Pointer to the directory object */
- const TCHAR** path /* Pointer to pointer to the segment in the path string */
-)
-{
-#if FF_USE_LFN /* LFN configuration */
- BYTE b, cf;
- WCHAR wc, *lfn;
- DWORD uc;
- UINT i, ni, si, di;
- const TCHAR *p;
-
-
- /* Create LFN into LFN working buffer */
- p = *path; lfn = dp->obj.fs->lfnbuf; di = 0;
- for (;;) {
- uc = tchar2uni(&p); /* Get a character */
- if (uc == 0xFFFFFFFF) return FR_INVALID_NAME; /* Invalid code or UTF decode error */
- if (uc >= 0x10000) lfn[di++] = (WCHAR)(uc >> 16); /* Store high surrogate if needed */
- wc = (WCHAR)uc;
- if (wc < ' ' || wc == '/' || wc == '\\') break; /* Break if end of the path or a separator is found */
- if (wc < 0x80 && chk_chr("\"*:<>\?|\x7F", wc)) return FR_INVALID_NAME; /* Reject illegal characters for LFN */
- if (di >= FF_MAX_LFN) return FR_INVALID_NAME; /* Reject too long name */
- lfn[di++] = wc; /* Store the Unicode character */
- }
- while (*p == '/' || *p == '\\') p++; /* Skip duplicated separators if exist */
- *path = p; /* Return pointer to the next segment */
- cf = (wc < ' ') ? NS_LAST : 0; /* Set last segment flag if end of the path */
-
-#if FF_FS_RPATH != 0
- if ((di == 1 && lfn[di - 1] == '.') ||
- (di == 2 && lfn[di - 1] == '.' && lfn[di - 2] == '.')) { /* Is this segment a dot name? */
- lfn[di] = 0;
- for (i = 0; i < 11; i++) { /* Create dot name for SFN entry */
- dp->fn[i] = (i < di) ? '.' : ' ';
- }
- dp->fn[i] = cf | NS_DOT; /* This is a dot entry */
- return FR_OK;
- }
-#endif
- while (di) { /* Snip off trailing spaces and dots if exist */
- wc = lfn[di - 1];
- if (wc != ' ' && wc != '.') break;
- di--;
- }
- lfn[di] = 0; /* LFN is created into the working buffer */
- if (di == 0) return FR_INVALID_NAME; /* Reject null name */
-
- /* Create SFN in directory form */
- for (si = 0; lfn[si] == ' '; si++) ; /* Remove leading spaces */
- if (si > 0 || lfn[si] == '.') cf |= NS_LOSS | NS_LFN; /* Is there any leading space or dot? */
- while (di > 0 && lfn[di - 1] != '.') di--; /* Find last dot (di<=si: no extension) */
-
- mem_set(dp->fn, ' ', 11);
- i = b = 0; ni = 8;
- for (;;) {
- wc = lfn[si++]; /* Get an LFN character */
- if (wc == 0) break; /* Break on end of the LFN */
- if (wc == ' ' || (wc == '.' && si != di)) { /* Remove embedded spaces and dots */
- cf |= NS_LOSS | NS_LFN;
- continue;
- }
-
- if (i >= ni || si == di) { /* End of field? */
- if (ni == 11) { /* Name extension overflow? */
- cf |= NS_LOSS | NS_LFN;
- break;
- }
- if (si != di) cf |= NS_LOSS | NS_LFN; /* Name body overflow? */
- if (si > di) break; /* No name extension? */
- si = di; i = 8; ni = 11; b <<= 2; /* Enter name extension */
- continue;
- }
-
- if (wc >= 0x80) { /* Is this a non-ASCII character? */
- cf |= NS_LFN; /* LFN entry needs to be created */
-#if FF_CODE_PAGE == 0
- if (ExCvt) { /* At SBCS */
- wc = ff_uni2oem(wc, CODEPAGE); /* Unicode ==> ANSI/OEM code */
- if (wc & 0x80) wc = ExCvt[wc & 0x7F]; /* Convert extended character to upper (SBCS) */
- } else { /* At DBCS */
- wc = ff_uni2oem(ff_wtoupper(wc), CODEPAGE); /* Unicode ==> Upper convert ==> ANSI/OEM code */
- }
-#elif FF_CODE_PAGE < 900 /* SBCS cfg */
- wc = ff_uni2oem(wc, CODEPAGE); /* Unicode ==> ANSI/OEM code */
- if (wc & 0x80) wc = ExCvt[wc & 0x7F]; /* Convert extended character to upper (SBCS) */
-#else /* DBCS cfg */
- wc = ff_uni2oem(ff_wtoupper(wc), CODEPAGE); /* Unicode ==> Upper convert ==> ANSI/OEM code */
-#endif
- }
-
- if (wc >= 0x100) { /* Is this a DBC? */
- if (i >= ni - 1) { /* Field overflow? */
- cf |= NS_LOSS | NS_LFN;
- i = ni; continue; /* Next field */
- }
- dp->fn[i++] = (BYTE)(wc >> 8); /* Put 1st byte */
- } else { /* SBC */
- if (wc == 0 || chk_chr("+,;=[]", wc)) { /* Replace illegal characters for SFN if needed */
- wc = '_'; cf |= NS_LOSS | NS_LFN;/* Lossy conversion */
- } else {
- if (IsUpper(wc)) { /* ASCII upper case? */
- b |= 2;
- }
- if (IsLower(wc)) { /* ASCII lower case? */
- b |= 1; wc -= 0x20;
- }
- }
- }
- dp->fn[i++] = (BYTE)wc;
- }
-
- if (dp->fn[0] == DDEM) dp->fn[0] = RDDEM; /* If the first character collides with DDEM, replace it with RDDEM */
-
- if (ni == 8) b <<= 2; /* Shift capital flags if no extension */
- if ((b & 0x0C) == 0x0C || (b & 0x03) == 0x03) cf |= NS_LFN; /* LFN entry needs to be created if composite capitals */
- if (!(cf & NS_LFN)) { /* When LFN is in 8.3 format without extended character, NT flags are created */
- if (b & 0x01) cf |= NS_EXT; /* NT flag (Extension has small capital letters only) */
- if (b & 0x04) cf |= NS_BODY; /* NT flag (Body has small capital letters only) */
- }
-
- dp->fn[NSFLAG] = cf; /* SFN is created into dp->fn[] */
-
- return FR_OK;
-
-
-#else /* FF_USE_LFN : Non-LFN configuration */
- BYTE c, d, *sfn;
- UINT ni, si, i;
- const char *p;
-
- /* Create file name in directory form */
- p = *path; sfn = dp->fn;
- mem_set(sfn, ' ', 11);
- si = i = 0; ni = 8;
-#if FF_FS_RPATH != 0
- if (p[si] == '.') { /* Is this a dot entry? */
- for (;;) {
- c = (BYTE)p[si++];
- if (c != '.' || si >= 3) break;
- sfn[i++] = c;
- }
- if (c != '/' && c != '\\' && c > ' ') return FR_INVALID_NAME;
- *path = p + si; /* Return pointer to the next segment */
- sfn[NSFLAG] = (c <= ' ') ? NS_LAST | NS_DOT : NS_DOT; /* Set last segment flag if end of the path */
- return FR_OK;
- }
-#endif
- for (;;) {
- c = (BYTE)p[si++]; /* Get a byte */
- if (c <= ' ') break; /* Break if end of the path name */
- if (c == '/' || c == '\\') { /* Break if a separator is found */
- while (p[si] == '/' || p[si] == '\\') si++; /* Skip duplicated separator if exist */
- break;
- }
- if (c == '.' || i >= ni) { /* End of body or field overflow? */
- if (ni == 11 || c != '.') return FR_INVALID_NAME; /* Field overflow or invalid dot? */
- i = 8; ni = 11; /* Enter file extension field */
- continue;
- }
-#if FF_CODE_PAGE == 0
- if (ExCvt && c >= 0x80) { /* Is SBC extended character? */
- c = ExCvt[c & 0x7F]; /* To upper SBC extended character */
- }
-#elif FF_CODE_PAGE < 900
- if (c >= 0x80) { /* Is SBC extended character? */
- c = ExCvt[c & 0x7F]; /* To upper SBC extended character */
- }
-#endif
- if (dbc_1st(c)) { /* Check if it is a DBC 1st byte */
- d = (BYTE)p[si++]; /* Get 2nd byte */
- if (!dbc_2nd(d) || i >= ni - 1) return FR_INVALID_NAME; /* Reject invalid DBC */
- sfn[i++] = c;
- sfn[i++] = d;
- } else { /* SBC */
- if (chk_chr("\"*+,:;<=>\?[]|\x7F", c)) return FR_INVALID_NAME; /* Reject illegal chrs for SFN */
- if (IsLower(c)) c -= 0x20; /* To upper */
- sfn[i++] = c;
- }
- }
- *path = p + si; /* Return pointer to the next segment */
- if (i == 0) return FR_INVALID_NAME; /* Reject nul string */
-
- if (sfn[0] == DDEM) sfn[0] = RDDEM; /* If the first character collides with DDEM, replace it with RDDEM */
- sfn[NSFLAG] = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of the path */
-
- return FR_OK;
-#endif /* FF_USE_LFN */
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Follow a file path */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */
- DIR* dp, /* Directory object to return last directory and found object */
- const TCHAR* path /* Full-path string to find a file or directory */
-)
-{
- FRESULT res;
- BYTE ns;
- FATFS *fs = dp->obj.fs;
-
-
-#if FF_FS_RPATH != 0
- if (*path != '/' && *path != '\\') { /* Without heading separator */
- dp->obj.sclust = fs->cdir; /* Start from current directory */
- } else
-#endif
- { /* With heading separator */
- while (*path == '/' || *path == '\\') path++; /* Strip heading separator */
- dp->obj.sclust = 0; /* Start from root directory */
- }
-#if FF_FS_EXFAT
- dp->obj.n_frag = 0; /* Invalidate last fragment counter of the object */
-#if FF_FS_RPATH != 0
- if (fs->fs_type == FS_EXFAT && dp->obj.sclust) { /* exFAT: Retrieve the sub-directory's status */
- DIR dj;
-
- dp->obj.c_scl = fs->cdc_scl;
- dp->obj.c_size = fs->cdc_size;
- dp->obj.c_ofs = fs->cdc_ofs;
- res = load_obj_xdir(&dj, &dp->obj);
- if (res != FR_OK) return res;
- dp->obj.objsize = ld_dword(fs->dirbuf + XDIR_FileSize);
- dp->obj.stat = fs->dirbuf[XDIR_GenFlags] & 2;
- }
-#endif
-#endif
-
- if ((UINT)*path < ' ') { /* Null path name is the origin directory itself */
- dp->fn[NSFLAG] = NS_NONAME;
- res = dir_sdi(dp, 0);
-
- } else { /* Follow path */
- for (;;) {
- res = create_name(dp, &path); /* Get a segment name of the path */
- if (res != FR_OK) break;
- res = dir_find(dp); /* Find an object with the segment name */
- ns = dp->fn[NSFLAG];
- if (res != FR_OK) { /* Failed to find the object */
- if (res == FR_NO_FILE) { /* Object is not found */
- if (FF_FS_RPATH && (ns & NS_DOT)) { /* If dot entry is not exist, stay there */
- if (!(ns & NS_LAST)) continue; /* Continue to follow if not last segment */
- dp->fn[NSFLAG] = NS_NONAME;
- res = FR_OK;
- } else { /* Could not find the object */
- if (!(ns & NS_LAST)) res = FR_NO_PATH; /* Adjust error code if not last segment */
- }
- }
- break;
- }
- if (ns & NS_LAST) break; /* Last segment matched. Function completed. */
- /* Get into the sub-directory */
- if (!(dp->obj.attr & AM_DIR)) { /* It is not a sub-directory and cannot follow */
- res = FR_NO_PATH; break;
- }
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) { /* Save containing directory information for next dir */
- dp->obj.c_scl = dp->obj.sclust;
- dp->obj.c_size = ((DWORD)dp->obj.objsize & 0xFFFFFF00) | dp->obj.stat;
- dp->obj.c_ofs = dp->blk_ofs;
- init_alloc_info(fs, &dp->obj); /* Open next directory */
- } else
-#endif
- {
- dp->obj.sclust = ld_clust(fs, fs->win + dp->dptr % SS(fs)); /* Open next directory */
- }
- }
- }
-
- return res;
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Get logical drive number from path name */
-/*-----------------------------------------------------------------------*/
-
-static int get_ldnumber ( /* Returns logical drive number (-1:invalid drive number or null pointer) */
- const TCHAR** path /* Pointer to pointer to the path name */
-)
-{
- const TCHAR *tp, *tt;
- TCHAR tc;
- int i, vol = -1;
-#if FF_STR_VOLUME_ID /* Find string volume ID */
- const char *sp;
- char c;
-#endif
-
- tt = tp = *path;
- if (!tp) return vol; /* Invalid path name? */
- do tc = *tt++; while ((UINT)tc >= (FF_USE_LFN ? ' ' : '!') && tc != ':'); /* Find a colon in the path */
-
- if (tc == ':') { /* DOS/Windows style volume ID? */
- i = FF_VOLUMES;
- if (IsDigit(*tp) && tp + 2 == tt) { /* Is there a numeric volume ID + colon? */
- i = (int)*tp - '0'; /* Get the LD number */
- }
-#if FF_STR_VOLUME_ID == 1 /* Arbitrary string is enabled */
- else {
- i = 0;
- do {
- sp = VolumeStr[i]; tp = *path; /* This string volume ID and path name */
- do { /* Compare the volume ID with path name */
- c = *sp++; tc = *tp++;
- if (IsLower(c)) c -= 0x20;
- if (IsLower(tc)) tc -= 0x20;
- } while (c && (TCHAR)c == tc);
- } while ((c || tp != tt) && ++i < FF_VOLUMES); /* Repeat for each id until pattern match */
- }
-#endif
- if (i < FF_VOLUMES) { /* If a volume ID is found, get the drive number and strip it */
- vol = i; /* Drive number */
- *path = tt; /* Snip the drive prefix off */
- }
- return vol;
- }
-#if FF_STR_VOLUME_ID == 2 /* Unix style volume ID is enabled */
- if (*tp == '/') {
- i = 0;
- do {
- sp = VolumeStr[i]; tp = *path; /* This string volume ID and path name */
- do { /* Compare the volume ID with path name */
- c = *sp++; tc = *(++tp);
- if (IsLower(c)) c -= 0x20;
- if (IsLower(tc)) tc -= 0x20;
- } while (c && (TCHAR)c == tc);
- } while ((c || (tc != '/' && (UINT)tc >= (FF_USE_LFN ? ' ' : '!'))) && ++i < FF_VOLUMES); /* Repeat for each ID until pattern match */
- if (i < FF_VOLUMES) { /* If a volume ID is found, get the drive number and strip it */
- vol = i; /* Drive number */
- *path = tp; /* Snip the drive prefix off */
- return vol;
- }
- }
-#endif
- /* No drive prefix is found */
-#if FF_FS_RPATH != 0
- vol = CurrVol; /* Default drive is current drive */
-#else
- vol = 0; /* Default drive is 0 */
-#endif
- return vol; /* Return the default drive */
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Load a sector and check if it is an FAT VBR */
-/*-----------------------------------------------------------------------*/
-
-static BYTE check_fs ( /* 0:FAT, 1:exFAT, 2:Valid BS but not FAT, 3:Not a BS, 4:Disk error */
- FATFS* fs, /* Filesystem object */
- DWORD sect /* Sector# (lba) to load and check if it is an FAT-VBR or not */
-)
-{
- fs->wflag = 0; fs->winsect = 0xFFFFFFFF; /* Invaidate window */
- if (move_window(fs, sect) != FR_OK) return 4; /* Load boot record */
-
- if (ld_word(fs->win + BS_55AA) != 0xAA55) return 3; /* Check boot record signature (always here regardless of the sector size) */
-
-#if FF_FS_EXFAT
- if (!mem_cmp(fs->win + BS_JmpBoot, "\xEB\x76\x90" "EXFAT ", 11)) return 1; /* Check if exFAT VBR */
-#endif
- if (fs->win[BS_JmpBoot] == 0xE9 || fs->win[BS_JmpBoot] == 0xEB || fs->win[BS_JmpBoot] == 0xE8) { /* Valid JumpBoot code? */
- if (!mem_cmp(fs->win + BS_FilSysType, "FAT", 3)) return 0; /* Is it an FAT VBR? */
- if (!mem_cmp(fs->win + BS_FilSysType32, "FAT32", 5)) return 0; /* Is it an FAT32 VBR? */
- }
- return 2; /* Valid BS but not FAT */
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Determine logical drive number and mount the volume if needed */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT find_volume ( /* FR_OK(0): successful, !=0: an error occurred */
- const TCHAR** path, /* Pointer to pointer to the path name (drive number) */
- FATFS** rfs, /* Pointer to pointer to the found filesystem object */
- BYTE mode /* !=0: Check write protection for write access */
-)
-{
- BYTE fmt, *pt;
- int vol;
- DSTATUS stat;
- DWORD bsect, fasize, tsect, sysect, nclst, szbfat, br[4];
- WORD nrsv;
- FATFS *fs;
- UINT i;
-
-
- /* Get logical drive number */
- *rfs = 0;
- vol = get_ldnumber(path);
- if (vol < 0) return FR_INVALID_DRIVE;
-
- /* Check if the filesystem object is valid or not */
- fs = FatFs[vol]; /* Get pointer to the filesystem object */
- if (!fs) return FR_NOT_ENABLED; /* Is the filesystem object available? */
-#if FF_FS_REENTRANT
- if (!lock_fs(fs)) return FR_TIMEOUT; /* Lock the volume */
-#endif
- *rfs = fs; /* Return pointer to the filesystem object */
-
- mode &= (BYTE)~FA_READ; /* Desired access mode, write access or not */
- if (fs->fs_type != 0) { /* If the volume has been mounted */
- stat = disk_status(fs->pdrv);
- if (!(stat & STA_NOINIT)) { /* and the physical drive is kept initialized */
- if (!FF_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check write protection if needed */
- EFSPRINTF("WPEN1");
- return FR_WRITE_PROTECTED;
- }
- return FR_OK; /* The filesystem object is valid */
- }
- }
-
- /* The filesystem object is not valid. */
- /* Following code attempts to mount the volume. (analyze BPB and initialize the filesystem object) */
-
- fs->fs_type = 0; /* Clear the filesystem object */
- fs->pdrv = LD2PD(vol); /* Bind the logical drive and a physical drive */
- stat = disk_initialize(fs->pdrv); /* Initialize the physical drive */
- if (stat & STA_NOINIT) { /* Check if the initialization succeeded */
- EFSPRINTF("MDNR");
- return FR_NOT_READY; /* Failed to initialize due to no medium or hard error */
- }
- if (!FF_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check disk write protection if needed */
- EFSPRINTF("WPEN2");
- return FR_WRITE_PROTECTED;
- }
-#if FF_MAX_SS != FF_MIN_SS /* Get sector size (multiple sector size cfg only) */
- if (disk_ioctl(fs->pdrv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK) return FR_DISK_ERR;
- if (SS(fs) > FF_MAX_SS || SS(fs) < FF_MIN_SS || (SS(fs) & (SS(fs) - 1))) return FR_DISK_ERR;
-#endif
-
- /* Find an FAT partition on the drive. Supports only generic partitioning rules, FDISK (MBR) and SFD (w/o partition). */
- bsect = 0;
- fmt = check_fs(fs, bsect); /* Load sector 0 and check if it is an FAT-VBR as SFD */
- if (fmt == 2 || (fmt < 2 && LD2PT(vol) != 0)) { /* Not an FAT-VBR or forced partition number */
- for (i = 0; i < 4; i++) { /* Get partition offset */
- pt = fs->win + (MBR_Table + i * SZ_PTE);
- br[i] = pt[PTE_System] ? ld_dword(pt + PTE_StLba) : 0;
- }
- i = LD2PT(vol); /* Partition number: 0:auto, 1-4:forced */
- if (i != 0) i--;
- do { /* Find an FAT volume */
- bsect = br[i];
- fmt = bsect ? check_fs(fs, bsect) : 3; /* Check the partition */
- } while (LD2PT(vol) == 0 && fmt >= 2 && ++i < 4);
- }
- if (fmt == 4) {
- EFSPRINTF("BRNL");
- return FR_DISK_ERR; /* An error occured in the disk I/O layer */
- }
- if (fmt >= 2) {
- EFSPRINTF("NOFAT");
- return FR_NO_FILESYSTEM; /* No FAT volume is found */
- }
-
- /* An FAT volume is found (bsect). Following code initializes the filesystem object */
-
-#if FF_FS_EXFAT
- if (fmt == 1) {
- QWORD maxlba;
- DWORD so, cv, bcl;
-
- for (i = BPB_ZeroedEx; i < BPB_ZeroedEx + 53 && fs->win[i] == 0; i++) ; /* Check zero filler */
- if (i < BPB_ZeroedEx + 53) return FR_NO_FILESYSTEM;
-
- if (ld_word(fs->win + BPB_FSVerEx) != 0x100) return FR_NO_FILESYSTEM; /* Check exFAT version (must be version 1.0) */
-
- if (1 << fs->win[BPB_BytsPerSecEx] != SS(fs)) { /* (BPB_BytsPerSecEx must be equal to the physical sector size) */
- EFSPRINTF("EXSPS");
- return FR_NO_FILESYSTEM;
- }
-
- maxlba = ld_qword(fs->win + BPB_TotSecEx) + bsect; /* Last LBA + 1 of the volume */
- if (maxlba >= 0x100000000) return FR_NO_FILESYSTEM; /* (It cannot be handled in 32-bit LBA) */
-
- fs->fsize = ld_dword(fs->win + BPB_FatSzEx); /* Number of sectors per FAT */
-
- fs->n_fats = fs->win[BPB_NumFATsEx]; /* Number of FATs */
- if (fs->n_fats != 1) {
- EFSPRINTF("EXFNF");
- return FR_NO_FILESYSTEM; /* (Supports only 1 FAT) */
- }
-
- fs->csize = 1 << fs->win[BPB_SecPerClusEx]; /* Cluster size */
- if (fs->csize == 0) return FR_NO_FILESYSTEM; /* (Must be 1..32768) */
-
- nclst = ld_dword(fs->win + BPB_NumClusEx); /* Number of clusters */
- if (nclst > MAX_EXFAT) return FR_NO_FILESYSTEM; /* (Too many clusters) */
- fs->n_fatent = nclst + 2;
-
- /* Boundaries and Limits */
- fs->volbase = bsect;
- fs->database = bsect + ld_dword(fs->win + BPB_DataOfsEx);
- fs->fatbase = bsect + ld_dword(fs->win + BPB_FatOfsEx);
- if (maxlba < (QWORD)fs->database + nclst * fs->csize) return FR_NO_FILESYSTEM; /* (Volume size must not be smaller than the size requiered) */
- fs->dirbase = ld_dword(fs->win + BPB_RootClusEx);
-
- /* Get bitmap location and check if it is contiguous (implementation assumption) */
- so = i = 0;
- for (;;) { /* Find the bitmap entry in the root directory (in only first cluster) */
- if (i == 0) {
- if (so >= fs->csize) return FR_NO_FILESYSTEM; /* Not found? */
- if (move_window(fs, clst2sect(fs, fs->dirbase) + so) != FR_OK) {
- EFSPRINTF("EXBM1C");
- return FR_DISK_ERR;
- }
- so++;
- }
- if (fs->win[i] == ET_BITMAP) break; /* Is it a bitmap entry? */
- i = (i + SZDIRE) % SS(fs); /* Next entry */
- }
- bcl = ld_dword(fs->win + i + 20); /* Bitmap cluster */
- if (bcl < 2 || bcl >= fs->n_fatent) {
- EFSPRINTF("EXBMM");
- return FR_NO_FILESYSTEM;
- }
- fs->bitbase = fs->database + fs->csize * (bcl - 2); /* Bitmap sector */
- for (;;) { /* Check if bitmap is contiguous */
- if (move_window(fs, fs->fatbase + bcl / (SS(fs) / 4)) != FR_OK) return FR_DISK_ERR;
- cv = ld_dword(fs->win + bcl % (SS(fs) / 4) * 4);
- if (cv == 0xFFFFFFFF) break; /* Last link? */
- if (cv != ++bcl) {
- EFSPRINTF("EXBMM");
- return FR_NO_FILESYSTEM; /* Fragmented? */
- }
- }
-
-#if !FF_FS_READONLY
- fs->last_clst = fs->free_clst = 0xFFFFFFFF; /* Initialize cluster allocation information */
-#endif
- fmt = FS_EXFAT; /* FAT sub-type */
- } else
-#endif /* FF_FS_EXFAT */
- {
- if (ld_word(fs->win + BPB_BytsPerSec) != SS(fs)) {
- EFSPRINTF("32SPS");
- return FR_NO_FILESYSTEM; /* (BPB_BytsPerSec must be equal to the physical sector size) */
- }
-
- fasize = ld_word(fs->win + BPB_FATSz16); /* Number of sectors per FAT */
- if (fasize == 0) fasize = ld_dword(fs->win + BPB_FATSz32);
- fs->fsize = fasize;
-
- fs->n_fats = fs->win[BPB_NumFATs]; /* Number of FATs */
- if (fs->n_fats != 1 && fs->n_fats != 2) return FR_NO_FILESYSTEM; /* (Must be 1 or 2) */
- fasize *= fs->n_fats; /* Number of sectors for FAT area */
-
- fs->csize = fs->win[BPB_SecPerClus]; /* Cluster size */
- if (fs->csize == 0 || (fs->csize & (fs->csize - 1))) return FR_NO_FILESYSTEM; /* (Must be power of 2) */
-
- fs->n_rootdir = ld_word(fs->win + BPB_RootEntCnt); /* Number of root directory entries */
- if (fs->n_rootdir % (SS(fs) / SZDIRE)) return FR_NO_FILESYSTEM; /* (Must be sector aligned) */
-
- tsect = ld_word(fs->win + BPB_TotSec16); /* Number of sectors on the volume */
- if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32);
-
- nrsv = ld_word(fs->win + BPB_RsvdSecCnt); /* Number of reserved sectors */
- if (nrsv == 0) return FR_NO_FILESYSTEM; /* (Must not be 0) */
-
- /* Determine the FAT sub type */
- sysect = nrsv + fasize + fs->n_rootdir / (SS(fs) / SZDIRE); /* RSV + FAT + DIR */
- if (tsect < sysect) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
- nclst = (tsect - sysect) / fs->csize; /* Number of clusters */
- if (nclst == 0) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
- fmt = 0;
- if (nclst <= MAX_FAT32) fmt = FS_FAT32;
- if (nclst <= MAX_FAT16) fmt = FS_FAT16;
- if (nclst <= MAX_FAT12) fmt = FS_FAT12;
- if (fmt == 0) return FR_NO_FILESYSTEM;
-
- /* Boundaries and Limits */
- fs->n_fatent = nclst + 2; /* Number of FAT entries */
- fs->volbase = bsect; /* Volume start sector */
- fs->fatbase = bsect + nrsv; /* FAT start sector */
- fs->database = bsect + sysect; /* Data start sector */
- if (fmt == FS_FAT32) {
- if (ld_word(fs->win + BPB_FSVer32) != 0) return FR_NO_FILESYSTEM; /* (Must be FAT32 revision 0.0) */
- if (fs->n_rootdir != 0) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must be 0) */
- fs->dirbase = ld_dword(fs->win + BPB_RootClus32); /* Root directory start cluster */
- szbfat = fs->n_fatent * 4; /* (Needed FAT size) */
- } else {
- if (fs->n_rootdir == 0) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must not be 0) */
- fs->dirbase = fs->fatbase + fasize; /* Root directory start sector */
- szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */
- fs->n_fatent * 2 : fs->n_fatent * 3 / 2 + (fs->n_fatent & 1);
- }
- if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs)) return FR_NO_FILESYSTEM; /* (BPB_FATSz must not be less than the size needed) */
-
-#if !FF_FS_READONLY
- /* Get FSInfo if available */
- fs->last_clst = fs->free_clst = 0xFFFFFFFF; /* Initialize cluster allocation information */
- fs->fsi_flag = 0x80;
-#if (FF_FS_NOFSINFO & 3) != 3
- if (fmt == FS_FAT32 /* Allow to update FSInfo only if BPB_FSInfo32 == 1 */
- && ld_word(fs->win + BPB_FSInfo32) == 1
- && move_window(fs, bsect + 1) == FR_OK)
- {
- fs->fsi_flag = 0;
- if (ld_word(fs->win + BS_55AA) == 0xAA55 /* Load FSInfo data if available */
- && ld_dword(fs->win + FSI_LeadSig) == 0x41615252
- && ld_dword(fs->win + FSI_StrucSig) == 0x61417272)
- {
-#if (FF_FS_NOFSINFO & 1) == 0
- fs->free_clst = ld_dword(fs->win + FSI_Free_Count);
-#endif
-#if (FF_FS_NOFSINFO & 2) == 0
- fs->last_clst = ld_dword(fs->win + FSI_Nxt_Free);
-#endif
- }
- }
-#endif /* (FF_FS_NOFSINFO & 3) != 3 */
-#endif /* !FF_FS_READONLY */
- }
-
- fs->fs_type = fmt; /* FAT sub-type */
- fs->id = ++Fsid; /* Volume mount ID */
-#if FF_USE_LFN == 1
- fs->lfnbuf = LfnBuf; /* Static LFN working buffer */
-#if FF_FS_EXFAT
- fs->dirbuf = DirBuf; /* Static directory block scratchpad buffer */
-#endif
-#endif
-#if FF_FS_RPATH != 0
- fs->cdir = 0; /* Initialize current directory */
-#endif
-#if FF_FS_LOCK != 0 /* Clear file lock semaphores */
- clear_lock(fs);
-#endif
- return FR_OK;
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Check if the file/directory object is valid or not */
-/*-----------------------------------------------------------------------*/
-
-static FRESULT validate ( /* Returns FR_OK or FR_INVALID_OBJECT */
- FFOBJID* obj, /* Pointer to the FFOBJID, the 1st member in the FIL/DIR object, to check validity */
- FATFS** rfs /* Pointer to pointer to the owner filesystem object to return */
-)
-{
- FRESULT res = FR_INVALID_OBJECT;
-
-
- if (obj && obj->fs && obj->fs->fs_type && obj->id == obj->fs->id) { /* Test if the object is valid */
-#if FF_FS_REENTRANT
- if (lock_fs(obj->fs)) { /* Obtain the filesystem object */
- if (!(disk_status(obj->fs->pdrv) & STA_NOINIT)) { /* Test if the phsical drive is kept initialized */
- res = FR_OK;
- } else {
- unlock_fs(obj->fs, FR_OK);
- }
- } else {
- res = FR_TIMEOUT;
- }
-#else
- if (!(disk_status(obj->fs->pdrv) & STA_NOINIT)) { /* Test if the phsical drive is kept initialized */
- res = FR_OK;
- }
-#endif
- }
- *rfs = (res == FR_OK) ? obj->fs : 0; /* Corresponding filesystem object */
- return res;
-}
-
-
-
-
-/*---------------------------------------------------------------------------
-
- Public Functions (FatFs API)
-
-----------------------------------------------------------------------------*/
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Mount/Unmount a Logical Drive */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_mount (
- FATFS* fs, /* Pointer to the filesystem object (NULL:unmount)*/
- const TCHAR* path, /* Logical drive number to be mounted/unmounted */
- BYTE opt /* Mode option 0:Do not mount (delayed mount), 1:Mount immediately */
-)
-{
- FATFS *cfs;
- int vol;
- FRESULT res;
- const TCHAR *rp = path;
-
-
- /* Get logical drive number */
- vol = get_ldnumber(&rp);
- if (vol < 0) {
- EFSPRINTF("IDRIVE!");
- return FR_INVALID_DRIVE;
- }
- cfs = FatFs[vol]; /* Pointer to fs object */
-
- if (cfs) {
-#if FF_FS_LOCK != 0
- clear_lock(cfs);
-#endif
-#if FF_FS_REENTRANT /* Discard sync object of the current volume */
- if (!ff_del_syncobj(cfs->sobj)) return FR_INT_ERR;
-#endif
- cfs->fs_type = 0; /* Clear old fs object */
- }
-
- if (fs) {
- fs->fs_type = 0; /* Clear new fs object */
-#if FF_FS_REENTRANT /* Create sync object for the new volume */
- if (!ff_cre_syncobj((BYTE)vol, &fs->sobj)) return FR_INT_ERR;
-#endif
- }
- FatFs[vol] = fs; /* Register new fs object */
-
- if (opt == 0) return FR_OK; /* Do not mount now, it will be mounted later */
-
- res = find_volume(&path, &fs, 0); /* Force mounted the volume */
- LEAVE_FF(fs, res);
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Open or Create a File */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_open (
- FIL* fp, /* Pointer to the blank file object */
- const TCHAR* path, /* Pointer to the file name */
- BYTE mode /* Access mode and file open mode flags */
-)
-{
- FRESULT res;
- DIR dj;
- FATFS *fs;
-#if !FF_FS_READONLY
- DWORD dw, cl, bcs, clst, sc;
- FSIZE_t ofs;
-#endif
- DEF_NAMBUF
-
-
- if (!fp) return FR_INVALID_OBJECT;
-
- /* Get logical drive number */
- mode &= FF_FS_READONLY ? FA_READ : FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_CREATE_NEW | FA_OPEN_ALWAYS | FA_OPEN_APPEND;
- res = find_volume(&path, &fs, mode);
- if (res == FR_OK) {
- dj.obj.fs = fs;
- INIT_NAMBUF(fs);
- res = follow_path(&dj, path); /* Follow the file path */
-#if !FF_FS_READONLY /* Read/Write configuration */
- if (res == FR_OK) {
- if (dj.fn[NSFLAG] & NS_NONAME) { /* Origin directory itself? */
- res = FR_INVALID_NAME;
- }
-#if FF_FS_LOCK != 0
- else {
- res = chk_lock(&dj, (mode & ~FA_READ) ? 1 : 0); /* Check if the file can be used */
- }
-#endif
- }
- /* Create or Open a file */
- if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) {
- if (res != FR_OK) { /* No file, create new */
- if (res == FR_NO_FILE) { /* There is no file to open, create a new entry */
-#if FF_FS_LOCK != 0
- res = enq_lock() ? dir_register(&dj) : FR_TOO_MANY_OPEN_FILES;
-#else
- res = dir_register(&dj);
-#endif
- }
- mode |= FA_CREATE_ALWAYS; /* File is created */
- }
- else { /* Any object with the same name is already existing */
- if (dj.obj.attr & (AM_RDO | AM_DIR)) { /* Cannot overwrite it (R/O or DIR) */
- res = FR_DENIED;
- } else {
- if (mode & FA_CREATE_NEW) res = FR_EXIST; /* Cannot create as new file */
- }
- }
- if (res == FR_OK && (mode & FA_CREATE_ALWAYS)) { /* Truncate the file if overwrite mode */
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- /* Get current allocation info */
- fp->obj.fs = fs;
- init_alloc_info(fs, &fp->obj);
- /* Set directory entry block initial state */
- mem_set(fs->dirbuf + 2, 0, 30); /* Clear 85 entry except for NumSec */
- mem_set(fs->dirbuf + 38, 0, 26); /* Clear C0 entry except for NumName and NameHash */
- fs->dirbuf[XDIR_Attr] = AM_ARC;
- st_dword(fs->dirbuf + XDIR_CrtTime, GET_FATTIME());
- fs->dirbuf[XDIR_GenFlags] = 1;
- res = store_xdir(&dj);
- if (res == FR_OK && fp->obj.sclust != 0) { /* Remove the cluster chain if exist */
- res = remove_chain(&fp->obj, fp->obj.sclust, 0);
- fs->last_clst = fp->obj.sclust - 1; /* Reuse the cluster hole */
- }
- } else
-#endif
- {
- /* Set directory entry initial state */
- cl = ld_clust(fs, dj.dir); /* Get current cluster chain */
- st_dword(dj.dir + DIR_CrtTime, GET_FATTIME()); /* Set created time */
- dj.dir[DIR_Attr] = AM_ARC; /* Reset attribute */
- st_clust(fs, dj.dir, 0); /* Reset file allocation info */
- st_dword(dj.dir + DIR_FileSize, 0);
- fs->wflag = 1;
- if (cl != 0) { /* Remove the cluster chain if exist */
- dw = fs->winsect;
- res = remove_chain(&dj.obj, cl, 0);
- if (res == FR_OK) {
- res = move_window(fs, dw);
- fs->last_clst = cl - 1; /* Reuse the cluster hole */
- }
- }
- }
- }
- }
- else { /* Open an existing file */
- if (res == FR_OK) { /* Is the object exsiting? */
- if (dj.obj.attr & AM_DIR) { /* File open against a directory */
- res = FR_NO_FILE;
- } else {
- if ((mode & FA_WRITE) && (dj.obj.attr & AM_RDO)) { /* Write mode open against R/O file */
- res = FR_DENIED;
- }
- }
- }
- }
- if (res == FR_OK) {
- if (mode & FA_CREATE_ALWAYS) mode |= FA_MODIFIED; /* Set file change flag if created or overwritten */
- fp->dir_sect = fs->winsect; /* Pointer to the directory entry */
- fp->dir_ptr = dj.dir;
-#if FF_FS_LOCK != 0
- fp->obj.lockid = inc_lock(&dj, (mode & ~FA_READ) ? 1 : 0); /* Lock the file for this session */
- if (fp->obj.lockid == 0) res = FR_INT_ERR;
-#endif
- }
-#else /* R/O configuration */
- if (res == FR_OK) {
- if (dj.fn[NSFLAG] & NS_NONAME) { /* Is it origin directory itself? */
- res = FR_INVALID_NAME;
- } else {
- if (dj.obj.attr & AM_DIR) { /* Is it a directory? */
- res = FR_NO_FILE;
- }
- }
- }
-#endif
-
- if (res == FR_OK) {
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- fp->obj.c_scl = dj.obj.sclust; /* Get containing directory info */
- fp->obj.c_size = ((DWORD)dj.obj.objsize & 0xFFFFFF00) | dj.obj.stat;
- fp->obj.c_ofs = dj.blk_ofs;
- init_alloc_info(fs, &fp->obj);
- } else
-#endif
- {
- fp->obj.sclust = ld_clust(fs, dj.dir); /* Get object allocation info */
- fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize);
- }
-#if FF_USE_FASTSEEK
- fp->cltbl = 0; /* Disable fast seek mode */
-#endif
- fp->obj.fs = fs; /* Validate the file object */
- fp->obj.id = fs->id;
- fp->flag = mode; /* Set file access mode */
- fp->err = 0; /* Clear error flag */
- fp->sect = 0; /* Invalidate current data sector */
- fp->fptr = 0; /* Set file pointer top of the file */
-#if !FF_FS_READONLY
-#if !FF_FS_TINY
- mem_set(fp->buf, 0, sizeof fp->buf); /* Clear sector buffer */
-#endif
- if ((mode & FA_SEEKEND) && fp->obj.objsize > 0) { /* Seek to end of file if FA_OPEN_APPEND is specified */
- fp->fptr = fp->obj.objsize; /* Offset to seek */
- bcs = (DWORD)fs->csize * SS(fs); /* Cluster size in byte */
- clst = fp->obj.sclust; /* Follow the cluster chain */
- for (ofs = fp->obj.objsize; res == FR_OK && ofs > bcs; ofs -= bcs) {
- clst = get_fat(&fp->obj, clst);
- if (clst <= 1) res = FR_INT_ERR;
- if (clst == 0xFFFFFFFF) res = FR_DISK_ERR;
- }
- fp->clust = clst;
- if (res == FR_OK && ofs % SS(fs)) { /* Fill sector buffer if not on the sector boundary */
- if ((sc = clst2sect(fs, clst)) == 0) {
- res = FR_INT_ERR;
- } else {
- fp->sect = sc + (DWORD)(ofs / SS(fs));
-#if !FF_FS_TINY
- if (disk_read(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) res = FR_DISK_ERR;
-#endif
- }
- }
- }
-#endif
- }
-
- FREE_NAMBUF();
- }
-
- if (res != FR_OK) fp->obj.fs = 0; /* Invalidate file object on error */
-
- LEAVE_FF(fs, res);
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Read File */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_read (
- FIL* fp, /* Pointer to the file object */
- void* buff, /* Pointer to data buffer */
- UINT btr, /* Number of bytes to read */
- UINT* br /* Pointer to number of bytes read */
-)
-{
- FRESULT res;
- FATFS *fs;
- DWORD clst, sect;
- FSIZE_t remain;
- UINT rcnt, cc, csect;
- BYTE *rbuff = (BYTE*)buff;
-
- UINT br_tmp;
- if (!br)
- br = &br_tmp;
- *br = 0; /* Clear read byte counter */
- res = validate(&fp->obj, &fs); /* Check validity of the file object */
- if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) {
- EFSPRINTF("FOV");
- LEAVE_FF(fs, res); /* Check validity */
- }
- if (!(fp->flag & FA_READ)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
- remain = fp->obj.objsize - fp->fptr;
- if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */
-
- for ( ; btr; /* Repeat until btr bytes read */
- btr -= rcnt, *br += rcnt, rbuff += rcnt, fp->fptr += rcnt) {
- if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */
- csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1)); /* Sector offset in the cluster */
- if (csect == 0) { /* On the cluster boundary? */
- if (fp->fptr == 0) { /* On the top of the file? */
- clst = fp->obj.sclust; /* Follow cluster chain from the origin */
- } else { /* Middle or end of the file */
-#if FF_USE_FASTSEEK
- if (fp->cltbl) {
- clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */
- } else
-#endif
- {
- clst = get_fat(&fp->obj, fp->clust); /* Follow cluster chain on the FAT */
- }
- }
- if (clst < 2) {
- EFSPRINTF("CCHK");
- ABORT(fs, FR_INT_ERR);
- }
- if (clst == 0xFFFFFFFF) {
- EFSPRINTF("DSKC");
- ABORT(fs, FR_DISK_ERR);
- }
- fp->clust = clst; /* Update current cluster */
- }
- sect = clst2sect(fs, fp->clust); /* Get current sector */
- if (sect == 0) ABORT(fs, FR_INT_ERR);
- sect += csect;
- cc = btr / SS(fs); /* When remaining bytes >= sector size, */
- if (cc > 0) { /* Read maximum contiguous sectors directly */
- if (csect + cc > fs->csize) { /* Clip at cluster boundary */
- cc = fs->csize - csect;
- }
- if (disk_read(fs->pdrv, rbuff, sect, cc) != RES_OK) {
- EFSPRINTF("RLIO");
- ABORT(fs, FR_DISK_ERR);
- }
-#if !FF_FS_READONLY && FF_FS_MINIMIZE <= 2 /* Replace one of the read sectors with cached data if it contains a dirty sector */
-#if FF_FS_TINY
- if (fs->wflag && fs->winsect - sect < cc) {
- mem_cpy(rbuff + ((fs->winsect - sect) * SS(fs)), fs->win, SS(fs));
- }
-#else
- if ((fp->flag & FA_DIRTY) && fp->sect - sect < cc) {
- mem_cpy(rbuff + ((fp->sect - sect) * SS(fs)), fp->buf, SS(fs));
- }
-#endif
-#endif
- rcnt = SS(fs) * cc; /* Number of bytes transferred */
- continue;
- }
-#if !FF_FS_TINY
- if (fp->sect != sect) { /* Load data sector if not in cache */
-#if !FF_FS_READONLY
- if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */
- if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) {
- EFSPRINTF("RDC");
- ABORT(fs, FR_DISK_ERR);
- }
- fp->flag &= (BYTE)~FA_DIRTY;
- }
-#endif
- if (disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) {
- EFSPRINTF("RSC");
- ABORT(fs, FR_DISK_ERR); /* Fill sector cache */
- }
- }
-#endif
- fp->sect = sect;
- }
- rcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes left in the sector */
- if (rcnt > btr) rcnt = btr; /* Clip it by btr if needed */
-#if FF_FS_TINY
- if (move_window(fs, fp->sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window */
- mem_cpy(rbuff, fs->win + fp->fptr % SS(fs), rcnt); /* Extract partial sector */
-#else
- mem_cpy(rbuff, fp->buf + fp->fptr % SS(fs), rcnt); /* Extract partial sector */
-#endif
- }
-
- LEAVE_FF(fs, FR_OK);
-}
-
-
-
-
-#if FF_FASTFS && FF_USE_FASTSEEK
-/*-----------------------------------------------------------------------*/
-/* Fast Read Aligned Sized File Without a Cache */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_read_fast (
- FIL* fp, /* Pointer to the file object */
- const void* buff, /* Pointer to the data to be written */
- UINT btr /* Number of bytes to read */
-)
-{
- FRESULT res;
- FATFS *fs;
- UINT csize_bytes;
- DWORD clst;
- UINT count = 0;
- FSIZE_t work_sector = 0;
- FSIZE_t sector_base = 0;
- BYTE *wbuff = (BYTE*)buff;
-
- // TODO support sector reading inside a cluster
-
- res = validate(&fp->obj, &fs); /* Check validity of the file object */
- if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) {
- EFSPRINTF("FOV");
- LEAVE_FF(fs, res); /* Check validity */
- }
-
- if (!(fp->flag & FA_READ)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
- FSIZE_t remain = fp->obj.objsize - fp->fptr;
- if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */
-
- csize_bytes = fs->csize * SS(fs);
-
- if (!fp->fptr) { /* On the top of the file? */
- clst = fp->obj.sclust; /* Follow from the origin */
- } else {
- if (fp->cltbl) clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */
- else { EFSPRINTF("CLTBL"); ABORT(fs, FR_CLTBL_NO_INIT); }
- }
- if (clst < 2) { EFSPRINTF("CCHK"); ABORT(fs, FR_INT_ERR); }
- else if (clst == 0xFFFFFFFF) { EFSPRINTF("DSKC"); ABORT(fs, FR_DISK_ERR); }
-
- fp->clust = clst; /* Set working cluster */
-
- sector_base = clst2sect(fs, fp->clust);
- count += fs->csize;
- btr -= csize_bytes;
- fp->fptr += csize_bytes;
-
- while (btr) {
- clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */
-
- if (clst < 2) { EFSPRINTF("CCHK2"); ABORT(fs, FR_INT_ERR); }
- else if (clst == 0xFFFFFFFF) { EFSPRINTF("DSKC"); ABORT(fs, FR_DISK_ERR); }
-
- fp->clust = clst;
-
- work_sector = clst2sect(fs, fp->clust);
- if ((work_sector - sector_base) == count) count += fs->csize;
- else {
- if (disk_read(fs->pdrv, wbuff, sector_base, count) != RES_OK) ABORT(fs, FR_DISK_ERR);
- wbuff += count * SS(fs);
-
- sector_base = work_sector;
- count = fs->csize;
- }
-
- fp->fptr += MIN(btr, csize_bytes);
- btr -= MIN(btr, csize_bytes);
-
- // TODO: what about if data is smaller than cluster?
- // Must read-write back that cluster.
-
- if (!btr) { /* Final cluster/sectors read. */
- if (disk_read(fs->pdrv, wbuff, sector_base, count) != RES_OK) ABORT(fs, FR_DISK_ERR);
- }
- }
-
- LEAVE_FF(fs, FR_OK);
-}
-#endif
-
-
-
-
-#if !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* Write File */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_write (
- FIL* fp, /* Pointer to the file object */
- const void* buff, /* Pointer to the data to be written */
- UINT btw, /* Number of bytes to write */
- UINT* bw /* Pointer to number of bytes written */
-)
-{
- FRESULT res;
- FATFS *fs;
- DWORD clst, sect;
- UINT wcnt, cc, csect;
- const BYTE *wbuff = (const BYTE*)buff;
-
- UINT bw_tmp;
- if (!bw)
- bw = &bw_tmp;
- *bw = 0; /* Clear write byte counter */
- res = validate(&fp->obj, &fs); /* Check validity of the file object */
- if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) {
- EFSPRINTF("FOV");
- LEAVE_FF(fs, res); /* Check validity */
- }
- if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
-
- /* Check fptr wrap-around (file size cannot reach 4 GiB at FAT volume) */
- if ((!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) && (DWORD)(fp->fptr + btw) < (DWORD)fp->fptr) {
- btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr);
- }
-
- for ( ; btw; /* Repeat until all data written */
- btw -= wcnt, *bw += wcnt, wbuff += wcnt, fp->fptr += wcnt, fp->obj.objsize = (fp->fptr > fp->obj.objsize) ? fp->fptr : fp->obj.objsize) {
- if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */
- csect = (UINT)(fp->fptr / SS(fs)) & (fs->csize - 1); /* Sector offset in the cluster */
- if (csect == 0) { /* On the cluster boundary? */
- if (fp->fptr == 0) { /* On the top of the file? */
- clst = fp->obj.sclust; /* Follow from the origin */
- if (clst == 0) { /* If no cluster is allocated, */
- clst = create_chain(&fp->obj, 0); /* create a new cluster chain */
- }
- } else { /* On the middle or end of the file */
-#if FF_USE_FASTSEEK
- if (fp->cltbl) {
- clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */
- } else
-#endif
- {
- clst = create_chain(&fp->obj, fp->clust); /* Follow or stretch cluster chain on the FAT */
- }
- }
- if (clst == 0) {
- EFSPRINTF("DSKFULL");
- break; /* Could not allocate a new cluster (disk full) */
- }
- if (clst == 1) {
- EFSPRINTF("CCHK");
- ABORT(fs, FR_INT_ERR);
- }
- if (clst == 0xFFFFFFFF) {
- EFSPRINTF("DERR");
- ABORT(fs, FR_DISK_ERR);
- }
- fp->clust = clst; /* Update current cluster */
- if (fp->obj.sclust == 0) fp->obj.sclust = clst; /* Set start cluster if the first write */
- }
-#if FF_FS_TINY
- if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Write-back sector cache */
-#else
- if (fp->flag & FA_DIRTY) { /* Write-back sector cache */
- if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
- fp->flag &= (BYTE)~FA_DIRTY;
- }
-#endif
- sect = clst2sect(fs, fp->clust); /* Get current sector */
- if (sect == 0) ABORT(fs, FR_INT_ERR);
- sect += csect;
- cc = btw / SS(fs); /* When remaining bytes >= sector size, */
- if (cc > 0) { /* Write maximum contiguous sectors directly */
- if (csect + cc > fs->csize) { /* Clip at cluster boundary */
- cc = fs->csize - csect;
- }
- if (disk_write(fs->pdrv, wbuff, sect, cc) != RES_OK) {
- EFSPRINTF("WLIO");
- ABORT(fs, FR_DISK_ERR);
- }
-#if FF_FS_MINIMIZE <= 2
-#if FF_FS_TINY
- if (fs->winsect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */
- mem_cpy(fs->win, wbuff + ((fs->winsect - sect) * SS(fs)), SS(fs));
- fs->wflag = 0;
- }
-#else
- if (fp->sect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */
- mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs));
- fp->flag &= (BYTE)~FA_DIRTY;
- }
-#endif
-#endif
- wcnt = SS(fs) * cc; /* Number of bytes transferred */
- continue;
- }
-#if FF_FS_TINY
- if (fp->fptr >= fp->obj.objsize) { /* Avoid silly cache filling on the growing edge */
- if (sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR);
- fs->winsect = sect;
- }
-#else
- if (fp->sect != sect && /* Fill sector cache with file data */
- fp->fptr < fp->obj.objsize &&
- disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) {
- ABORT(fs, FR_DISK_ERR);
- }
-#endif
- fp->sect = sect;
- }
- wcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes left in the sector */
- if (wcnt > btw) wcnt = btw; /* Clip it by btw if needed */
-#if FF_FS_TINY
- if (move_window(fs, fp->sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window */
- mem_cpy(fs->win + fp->fptr % SS(fs), wbuff, wcnt); /* Fit data to the sector */
- fs->wflag = 1;
-#else
- mem_cpy(fp->buf + fp->fptr % SS(fs), wbuff, wcnt); /* Fit data to the sector */
- fp->flag |= FA_DIRTY;
-#endif
- }
-
- fp->flag |= FA_MODIFIED; /* Set file change flag */
-
- LEAVE_FF(fs, FR_OK);
-}
-
-
-
-
-#if FF_FASTFS && FF_USE_FASTSEEK
-/*-----------------------------------------------------------------------*/
-/* Fast Write Aligned Sized File Without a Cache */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_write_fast (
- FIL* fp, /* Pointer to the file object */
- const void* buff, /* Pointer to the data to be written */
- UINT btw /* Number of bytes to write */
-)
-{
- FRESULT res;
- FATFS *fs;
- UINT csize_bytes;
- DWORD clst;
- UINT count = 0;
- FSIZE_t work_sector = 0;
- FSIZE_t sector_base = 0;
- const BYTE *wbuff = (const BYTE*)buff;
-
- // TODO support sector writing inside a cluster
-
- res = validate(&fp->obj, &fs); /* Check validity of the file object */
- if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) {
- EFSPRINTF("FOV");
- LEAVE_FF(fs, res); /* Check validity */
- }
-
- if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
- /* Check fptr wrap-around (file size cannot reach 4 GiB at FAT volume) */
- if ((!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) && (DWORD)(fp->fptr + btw) < (DWORD)fp->fptr) {
- btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr);
- }
-
- csize_bytes = fs->csize * SS(fs);
-
- if (!fp->fptr) { /* On the top of the file? */
- clst = fp->obj.sclust; /* Follow from the origin */
- } else {
- if (fp->cltbl) clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */
- else { EFSPRINTF("CLTBL"); ABORT(fs, FR_CLTBL_NO_INIT); }
- }
-
- if (clst < 2) { EFSPRINTF("CCHK"); ABORT(fs, FR_INT_ERR); }
- else if (clst == 0xFFFFFFFF) { EFSPRINTF("DERR"); ABORT(fs, FR_DISK_ERR); }
-
- fp->clust = clst; /* Set working cluster */
-
- sector_base = clst2sect(fs, fp->clust);
- count += fs->csize;
- btw -= csize_bytes;
- fp->fptr += csize_bytes;
-
- while (btw) {
- clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */
-
- if (clst < 2) { EFSPRINTF("CCHK2"); ABORT(fs, FR_INT_ERR); }
- else if (clst == 0xFFFFFFFF) { EFSPRINTF("DERR"); ABORT(fs, FR_DISK_ERR); }
-
- fp->clust = clst;
-
- work_sector = clst2sect(fs, fp->clust);
- if ((work_sector - sector_base) == count) count += fs->csize;
- else {
- if (disk_write(fs->pdrv, wbuff, sector_base, count) != RES_OK) ABORT(fs, FR_DISK_ERR);
- wbuff += count * SS(fs);
-
- sector_base = work_sector;
- count = fs->csize;
- }
-
- fp->fptr += MIN(btw, csize_bytes);
- btw -= MIN(btw, csize_bytes);
-
- // what about if data is smaller than cluster?
- // Probably must read-write back that cluster.
- if (!btw) { /* Final cluster/sectors write. */
- if (disk_write(fs->pdrv, wbuff, sector_base, count) != RES_OK) ABORT(fs, FR_DISK_ERR);
- fp->flag &= (BYTE)~FA_DIRTY;
- }
- }
-
- fp->flag |= FA_MODIFIED; /* Set file change flag */
-
- LEAVE_FF(fs, FR_OK);
-}
-#endif
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Synchronize the File */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_sync (
- FIL* fp /* Pointer to the file object */
-)
-{
- FRESULT res;
- FATFS *fs;
- DWORD tm;
- BYTE *dir;
-
-
- res = validate(&fp->obj, &fs); /* Check validity of the file object */
- if (res == FR_OK) {
- if (fp->flag & FA_MODIFIED) { /* Is there any change to the file? */
-#if !FF_FS_TINY
- if (fp->flag & FA_DIRTY) { /* Write-back cached data if needed */
- if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) LEAVE_FF(fs, FR_DISK_ERR);
- fp->flag &= (BYTE)~FA_DIRTY;
- }
-#endif
- /* Update the directory entry */
- tm = GET_FATTIME(); /* Modified time */
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- res = fill_first_frag(&fp->obj); /* Fill first fragment on the FAT if needed */
- if (res == FR_OK) {
- res = fill_last_frag(&fp->obj, fp->clust, 0xFFFFFFFF); /* Fill last fragment on the FAT if needed */
- }
- if (res == FR_OK) {
- DIR dj;
- DEF_NAMBUF
-
- INIT_NAMBUF(fs);
- res = load_obj_xdir(&dj, &fp->obj); /* Load directory entry block */
- if (res == FR_OK) {
- fs->dirbuf[XDIR_Attr] |= AM_ARC; /* Set archive attribute to indicate that the file has been changed */
- fs->dirbuf[XDIR_GenFlags] = fp->obj.stat | 1; /* Update file allocation information */
- st_dword(fs->dirbuf + XDIR_FstClus, fp->obj.sclust);
- st_qword(fs->dirbuf + XDIR_FileSize, fp->obj.objsize);
- st_qword(fs->dirbuf + XDIR_ValidFileSize, fp->obj.objsize);
- st_dword(fs->dirbuf + XDIR_ModTime, tm); /* Update modified time */
- fs->dirbuf[XDIR_ModTime10] = 0;
- st_dword(fs->dirbuf + XDIR_AccTime, 0);
- res = store_xdir(&dj); /* Restore it to the directory */
- if (res == FR_OK) {
- res = sync_fs(fs);
- fp->flag &= (BYTE)~FA_MODIFIED;
- }
- }
- FREE_NAMBUF();
- }
- } else
-#endif
- {
- res = move_window(fs, fp->dir_sect);
- if (res == FR_OK) {
- dir = fp->dir_ptr;
- dir[DIR_Attr] |= AM_ARC; /* Set archive attribute to indicate that the file has been changed */
- st_clust(fp->obj.fs, dir, fp->obj.sclust); /* Update file allocation information */
- st_dword(dir + DIR_FileSize, (DWORD)fp->obj.objsize); /* Update file size */
- st_dword(dir + DIR_ModTime, tm); /* Update modified time */
- st_word(dir + DIR_LstAccDate, 0);
- fs->wflag = 1;
- res = sync_fs(fs); /* Restore it to the directory */
- fp->flag &= (BYTE)~FA_MODIFIED;
- }
- }
- }
- }
-
- LEAVE_FF(fs, res);
-}
-
-#endif /* !FF_FS_READONLY */
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Close File */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_close (
- FIL* fp /* Pointer to the file object to be closed */
-)
-{
- FRESULT res;
- FATFS *fs;
-
-#if !FF_FS_READONLY
- res = f_sync(fp); /* Flush cached data */
- if (res == FR_OK)
-#endif
- {
- res = validate(&fp->obj, &fs); /* Lock volume */
- if (res == FR_OK) {
-#if FF_FS_LOCK != 0
- res = dec_lock(fp->obj.lockid); /* Decrement file open counter */
- if (res == FR_OK) fp->obj.fs = 0; /* Invalidate file object */
-#else
- fp->obj.fs = 0; /* Invalidate file object */
-#endif
-#if FF_FS_REENTRANT
- unlock_fs(fs, FR_OK); /* Unlock volume */
-#endif
- }
- }
- return res;
-}
-
-
-
-
-#if FF_FS_RPATH >= 1
-/*-----------------------------------------------------------------------*/
-/* Change Current Directory or Current Drive, Get Current Directory */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_chdrive (
- const TCHAR* path /* Drive number to set */
-)
-{
- int vol;
-
-
- /* Get logical drive number */
- vol = get_ldnumber(&path);
- if (vol < 0) return FR_INVALID_DRIVE;
- CurrVol = (BYTE)vol; /* Set it as current volume */
-
- return FR_OK;
-}
-
-
-
-FRESULT f_chdir (
- const TCHAR* path /* Pointer to the directory path */
-)
-{
-#if FF_STR_VOLUME_ID == 2
- UINT i;
-#endif
- FRESULT res;
- DIR dj;
- FATFS *fs;
- DEF_NAMBUF
-
-
- /* Get logical drive */
- res = find_volume(&path, &fs, 0);
- if (res == FR_OK) {
- dj.obj.fs = fs;
- INIT_NAMBUF(fs);
- res = follow_path(&dj, path); /* Follow the path */
- if (res == FR_OK) { /* Follow completed */
- if (dj.fn[NSFLAG] & NS_NONAME) { /* Is it the start directory itself? */
- fs->cdir = dj.obj.sclust;
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- fs->cdc_scl = dj.obj.c_scl;
- fs->cdc_size = dj.obj.c_size;
- fs->cdc_ofs = dj.obj.c_ofs;
- }
-#endif
- } else {
- if (dj.obj.attr & AM_DIR) { /* It is a sub-directory */
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- fs->cdir = ld_dword(fs->dirbuf + XDIR_FstClus); /* Sub-directory cluster */
- fs->cdc_scl = dj.obj.sclust; /* Save containing directory information */
- fs->cdc_size = ((DWORD)dj.obj.objsize & 0xFFFFFF00) | dj.obj.stat;
- fs->cdc_ofs = dj.blk_ofs;
- } else
-#endif
- {
- fs->cdir = ld_clust(fs, dj.dir); /* Sub-directory cluster */
- }
- } else {
- res = FR_NO_PATH; /* Reached but a file */
- }
- }
- }
- FREE_NAMBUF();
- if (res == FR_NO_FILE) res = FR_NO_PATH;
-#if FF_STR_VOLUME_ID == 2 /* Also current drive is changed at Unix style volume ID */
- if (res == FR_OK) {
- for (i = FF_VOLUMES - 1; i && fs != FatFs[i]; i--) ; /* Set current drive */
- CurrVol = (BYTE)i;
- }
-#endif
- }
-
- LEAVE_FF(fs, res);
-}
-
-
-#if FF_FS_RPATH >= 2
-FRESULT f_getcwd (
- TCHAR* buff, /* Pointer to the directory path */
- UINT len /* Size of buff in unit of TCHAR */
-)
-{
- FRESULT res;
- DIR dj;
- FATFS *fs;
- UINT i, n;
- DWORD ccl;
- TCHAR *tp = buff;
-#if FF_VOLUMES >= 2
- UINT vl;
-#if FF_STR_VOLUME_ID
- const char *vp;
-#endif
-#endif
- FILINFO fno;
- DEF_NAMBUF
-
-
- /* Get logical drive */
- buff[0] = 0; /* Set null string to get current volume */
- res = find_volume((const TCHAR**)&buff, &fs, 0); /* Get current volume */
- if (res == FR_OK) {
- dj.obj.fs = fs;
- INIT_NAMBUF(fs);
-
- /* Follow parent directories and create the path */
- i = len; /* Bottom of buffer (directory stack base) */
- if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) { /* (Cannot do getcwd on exFAT and returns root path) */
- dj.obj.sclust = fs->cdir; /* Start to follow upper directory from current directory */
- while ((ccl = dj.obj.sclust) != 0) { /* Repeat while current directory is a sub-directory */
- res = dir_sdi(&dj, 1 * SZDIRE); /* Get parent directory */
- if (res != FR_OK) break;
- res = move_window(fs, dj.sect);
- if (res != FR_OK) break;
- dj.obj.sclust = ld_clust(fs, dj.dir); /* Goto parent directory */
- res = dir_sdi(&dj, 0);
- if (res != FR_OK) break;
- do { /* Find the entry links to the child directory */
- res = DIR_READ_FILE(&dj);
- if (res != FR_OK) break;
- if (ccl == ld_clust(fs, dj.dir)) break; /* Found the entry */
- res = dir_next(&dj, 0);
- } while (res == FR_OK);
- if (res == FR_NO_FILE) res = FR_INT_ERR;/* It cannot be 'not found'. */
- if (res != FR_OK) break;
- get_fileinfo(&dj, &fno); /* Get the directory name and push it to the buffer */
- for (n = 0; fno.fname[n]; n++) ; /* Name length */
- if (i < n + 1) { /* Insufficient space to store the path name? */
- res = FR_NOT_ENOUGH_CORE; break;
- }
- while (n) buff[--i] = fno.fname[--n]; /* Stack the name */
- buff[--i] = '/';
- }
- }
- if (res == FR_OK) {
- if (i == len) buff[--i] = '/'; /* Is it the root-directory? */
-#if FF_VOLUMES >= 2 /* Put drive prefix */
- vl = 0;
-#if FF_STR_VOLUME_ID >= 1 /* String volume ID */
- for (n = 0, vp = (const char*)VolumeStr[CurrVol]; vp[n]; n++) ;
- if (i >= n + 2) {
- if (FF_STR_VOLUME_ID == 2) *tp++ = (TCHAR)'/';
- for (vl = 0; vl < n; *tp++ = (TCHAR)vp[vl], vl++) ;
- if (FF_STR_VOLUME_ID == 1) *tp++ = (TCHAR)':';
- vl++;
- }
-#else /* Numeric volume ID */
- if (i >= 3) {
- *tp++ = (TCHAR)'0' + CurrVol;
- *tp++ = (TCHAR)':';
- vl = 2;
- }
-#endif
- if (vl == 0) res = FR_NOT_ENOUGH_CORE;
-#endif
- /* Add current directory path */
- if (res == FR_OK) {
- do *tp++ = buff[i++]; while (i < len); /* Copy stacked path string */
- }
- }
- FREE_NAMBUF();
- }
-
- *tp = 0;
- LEAVE_FF(fs, res);
-}
-
-#endif /* FF_FS_RPATH >= 2 */
-#endif /* FF_FS_RPATH >= 1 */
-
-
-
-#if FF_FS_MINIMIZE <= 2
-/*-----------------------------------------------------------------------*/
-/* Seek File Read/Write Pointer */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_lseek (
- FIL* fp, /* Pointer to the file object */
- FSIZE_t ofs /* File pointer from top of file */
-)
-{
- FRESULT res;
- FATFS *fs;
- DWORD clst, bcs, nsect;
- FSIZE_t ifptr;
-#if FF_USE_FASTSEEK
- DWORD cl, pcl, ncl, tcl, dsc, tlen, ulen, *tbl;
-#endif
-
- res = validate(&fp->obj, &fs); /* Check validity of the file object */
- if (res == FR_OK) res = (FRESULT)fp->err;
-#if FF_FS_EXFAT && !FF_FS_READONLY
- if (res == FR_OK && fs->fs_type == FS_EXFAT) {
- res = fill_last_frag(&fp->obj, fp->clust, 0xFFFFFFFF); /* Fill last fragment on the FAT if needed */
- }
-#endif
- if (res != FR_OK) LEAVE_FF(fs, res);
-
-#if FF_USE_FASTSEEK
- if (fp->cltbl) { /* Fast seek */
- if (ofs == CREATE_LINKMAP) { /* Create CLMT */
- tbl = fp->cltbl;
- tlen = *tbl++; ulen = 2; /* Given table size and required table size */
- cl = fp->obj.sclust; /* Origin of the chain */
- if (cl != 0) {
- do {
- /* Get a fragment */
- tcl = cl; ncl = 0; ulen += 2; /* Top, length and used items */
- do {
- pcl = cl; ncl++;
- cl = get_fat(&fp->obj, cl);
- if (cl <= 1) ABORT(fs, FR_INT_ERR);
- if (cl == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
- } while (cl == pcl + 1);
- if (ulen <= tlen) { /* Store the length and top of the fragment */
- *tbl++ = ncl; *tbl++ = tcl;
- }
- } while (cl < fs->n_fatent); /* Repeat until end of chain */
- }
- *fp->cltbl = ulen; /* Number of items used */
- if (ulen <= tlen) {
- *tbl = 0; /* Terminate table */
- } else {
- res = FR_NOT_ENOUGH_CORE; /* Given table size is smaller than required */
- }
- } else { /* Fast seek */
- if (ofs > fp->obj.objsize) ofs = fp->obj.objsize; /* Clip offset at the file size */
- fp->fptr = ofs; /* Set file pointer */
- if (ofs > 0) {
- fp->clust = clmt_clust(fp, ofs - 1);
- dsc = clst2sect(fs, fp->clust);
- if (dsc == 0) ABORT(fs, FR_INT_ERR);
- dsc += (DWORD)((ofs - 1) / SS(fs)) & (fs->csize - 1);
- if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */
-#if !FF_FS_TINY
-#if !FF_FS_READONLY
- if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */
- if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
- fp->flag &= (BYTE)~FA_DIRTY;
- }
-#endif
- if (disk_read(fs->pdrv, fp->buf, dsc, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Load current sector */
-#endif
- fp->sect = dsc;
- }
- }
- }
- } else
-#endif
-
- /* Normal Seek */
- {
-#if FF_FS_EXFAT
- if (fs->fs_type != FS_EXFAT && ofs >= 0x100000000) ofs = 0xFFFFFFFF; /* Clip at 4 GiB - 1 if at FATxx */
-#endif
- if (ofs > fp->obj.objsize && (FF_FS_READONLY || !(fp->flag & FA_WRITE))) { /* In read-only mode, clip offset with the file size */
- ofs = fp->obj.objsize;
- }
- ifptr = fp->fptr;
- fp->fptr = nsect = 0;
- if (ofs > 0) {
- bcs = (DWORD)fs->csize * SS(fs); /* Cluster size (byte) */
- if (ifptr > 0 &&
- (ofs - 1) / bcs >= (ifptr - 1) / bcs) { /* When seek to same or following cluster, */
- fp->fptr = (ifptr - 1) & ~(FSIZE_t)(bcs - 1); /* start from the current cluster */
- ofs -= fp->fptr;
- clst = fp->clust;
- } else { /* When seek to back cluster, */
- clst = fp->obj.sclust; /* start from the first cluster */
-#if !FF_FS_READONLY
- if (clst == 0) { /* If no cluster chain, create a new chain */
- clst = create_chain(&fp->obj, 0);
- if (clst == 1) ABORT(fs, FR_INT_ERR);
- if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
- fp->obj.sclust = clst;
- }
-#endif
- fp->clust = clst;
- }
- if (clst != 0) {
- while (ofs > bcs) { /* Cluster following loop */
- ofs -= bcs; fp->fptr += bcs;
-#if !FF_FS_READONLY
- if (fp->flag & FA_WRITE) { /* Check if in write mode or not */
- if (FF_FS_EXFAT && fp->fptr > fp->obj.objsize) { /* No FAT chain object needs correct objsize to generate FAT value */
- fp->obj.objsize = fp->fptr;
- fp->flag |= FA_MODIFIED;
- }
- clst = create_chain(&fp->obj, clst); /* Follow chain with forceed stretch */
- if (clst == 0) { /* Clip file size in case of disk full */
- ofs = 0; break;
- }
- } else
-#endif
- {
- clst = get_fat(&fp->obj, clst); /* Follow cluster chain if not in write mode */
- }
- if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
- if (clst <= 1 || clst >= fs->n_fatent) ABORT(fs, FR_INT_ERR);
- fp->clust = clst;
- }
- fp->fptr += ofs;
- if (ofs % SS(fs)) {
- nsect = clst2sect(fs, clst); /* Current sector */
- if (nsect == 0) ABORT(fs, FR_INT_ERR);
- nsect += (DWORD)(ofs / SS(fs));
- }
- }
- }
- if (!FF_FS_READONLY && fp->fptr > fp->obj.objsize) { /* Set file change flag if the file size is extended */
- fp->obj.objsize = fp->fptr;
- fp->flag |= FA_MODIFIED;
- }
- if (fp->fptr % SS(fs) && nsect != fp->sect) { /* Fill sector cache if needed */
-#if !FF_FS_TINY
-#if !FF_FS_READONLY
- if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */
- if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
- fp->flag &= (BYTE)~FA_DIRTY;
- }
-#endif
- if (disk_read(fs->pdrv, fp->buf, nsect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Fill sector cache */
-#endif
- fp->sect = nsect;
- }
- }
-
- LEAVE_FF(fs, res);
-}
-
-
-
-#if FF_FASTFS && FF_USE_FASTSEEK
-/*-----------------------------------------------------------------------*/
-/* Seek File Read/Write Pointer */
-/*-----------------------------------------------------------------------*/
-
-DWORD *f_expand_cltbl (
- FIL* fp, /* Pointer to the file object */
- UINT tblsz, /* Size of table */
- FSIZE_t ofs /* File pointer from top of file */
-)
-{
- if (fp->flag & FA_WRITE) f_lseek(fp, ofs); /* Expand file if write is enabled */
- if (!fp->cltbl) { /* Allocate memory for cluster link table */
- fp->cltbl = (DWORD *)ff_memalloc(tblsz);
- fp->cltbl[0] = tblsz;
- }
- if (f_lseek(fp, CREATE_LINKMAP)) { /* Create cluster link table */
- ff_memfree(fp->cltbl);
- fp->cltbl = NULL;
- EFSPRINTF("CLTBLSZ");
- return NULL;
- }
- f_lseek(fp, 0);
-
- return fp->cltbl;
-}
-#endif
-
-
-
-
-#if FF_FS_MINIMIZE <= 1
-/*-----------------------------------------------------------------------*/
-/* Create a Directory Object */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_opendir (
- DIR* dp, /* Pointer to directory object to create */
- const TCHAR* path /* Pointer to the directory path */
-)
-{
- FRESULT res;
- FATFS *fs;
- DEF_NAMBUF
-
-
- if (!dp) return FR_INVALID_OBJECT;
-
- /* Get logical drive */
- res = find_volume(&path, &fs, 0);
- if (res == FR_OK) {
- dp->obj.fs = fs;
- INIT_NAMBUF(fs);
- res = follow_path(dp, path); /* Follow the path to the directory */
- if (res == FR_OK) { /* Follow completed */
- if (!(dp->fn[NSFLAG] & NS_NONAME)) { /* It is not the origin directory itself */
- if (dp->obj.attr & AM_DIR) { /* This object is a sub-directory */
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- dp->obj.c_scl = dp->obj.sclust; /* Get containing directory inforamation */
- dp->obj.c_size = ((DWORD)dp->obj.objsize & 0xFFFFFF00) | dp->obj.stat;
- dp->obj.c_ofs = dp->blk_ofs;
- init_alloc_info(fs, &dp->obj); /* Get object allocation info */
- } else
-#endif
- {
- dp->obj.sclust = ld_clust(fs, dp->dir); /* Get object allocation info */
- }
- } else { /* This object is a file */
- res = FR_NO_PATH;
- }
- }
- if (res == FR_OK) {
- dp->obj.id = fs->id;
- res = dir_sdi(dp, 0); /* Rewind directory */
-#if FF_FS_LOCK != 0
- if (res == FR_OK) {
- if (dp->obj.sclust != 0) {
- dp->obj.lockid = inc_lock(dp, 0); /* Lock the sub directory */
- if (!dp->obj.lockid) res = FR_TOO_MANY_OPEN_FILES;
- } else {
- dp->obj.lockid = 0; /* Root directory need not to be locked */
- }
- }
-#endif
- }
- }
- FREE_NAMBUF();
- if (res == FR_NO_FILE) res = FR_NO_PATH;
- }
- if (res != FR_OK) dp->obj.fs = 0; /* Invalidate the directory object if function faild */
-
- LEAVE_FF(fs, res);
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Close Directory */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_closedir (
- DIR *dp /* Pointer to the directory object to be closed */
-)
-{
- FRESULT res;
- FATFS *fs;
-
-
- res = validate(&dp->obj, &fs); /* Check validity of the file object */
- if (res == FR_OK) {
-#if FF_FS_LOCK != 0
- if (dp->obj.lockid) res = dec_lock(dp->obj.lockid); /* Decrement sub-directory open counter */
- if (res == FR_OK) dp->obj.fs = 0; /* Invalidate directory object */
-#else
- dp->obj.fs = 0; /* Invalidate directory object */
-#endif
-#if FF_FS_REENTRANT
- unlock_fs(fs, FR_OK); /* Unlock volume */
-#endif
- }
- return res;
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Read Directory Entries in Sequence */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_readdir (
- DIR* dp, /* Pointer to the open directory object */
- FILINFO* fno /* Pointer to file information to return */
-)
-{
- FRESULT res;
- FATFS *fs;
- DEF_NAMBUF
-
-
- res = validate(&dp->obj, &fs); /* Check validity of the directory object */
- if (res == FR_OK) {
- if (!fno) {
- res = dir_sdi(dp, 0); /* Rewind the directory object */
- } else {
- INIT_NAMBUF(fs);
- res = DIR_READ_FILE(dp); /* Read an item */
- if (res == FR_NO_FILE) res = FR_OK; /* Ignore end of directory */
- if (res == FR_OK) { /* A valid entry is found */
- get_fileinfo(dp, fno); /* Get the object information */
- res = dir_next(dp, 0); /* Increment index for next */
- if (res == FR_NO_FILE) res = FR_OK; /* Ignore end of directory now */
- }
- FREE_NAMBUF();
- }
- }
- LEAVE_FF(fs, res);
-}
-
-
-
-#if FF_USE_FIND
-/*-----------------------------------------------------------------------*/
-/* Find Next File */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_findnext (
- DIR* dp, /* Pointer to the open directory object */
- FILINFO* fno /* Pointer to the file information structure */
-)
-{
- FRESULT res;
-
-
- for (;;) {
- res = f_readdir(dp, fno); /* Get a directory item */
- if (res != FR_OK || !fno || !fno->fname[0]) break; /* Terminate if any error or end of directory */
- if (pattern_matching(dp->pat, fno->fname, 0, 0)) break; /* Test for the file name */
-#if FF_USE_LFN && FF_USE_FIND == 2
- if (pattern_matching(dp->pat, fno->altname, 0, 0)) break; /* Test for alternative name if exist */
-#endif
- }
- return res;
-}
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Find First File */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_findfirst (
- DIR* dp, /* Pointer to the blank directory object */
- FILINFO* fno, /* Pointer to the file information structure */
- const TCHAR* path, /* Pointer to the directory to open */
- const TCHAR* pattern /* Pointer to the matching pattern */
-)
-{
- FRESULT res;
-
-
- dp->pat = pattern; /* Save pointer to pattern string */
- res = f_opendir(dp, path); /* Open the target directory */
- if (res == FR_OK) {
- res = f_findnext(dp, fno); /* Find the first item */
- }
- return res;
-}
-
-#endif /* FF_USE_FIND */
-
-
-
-#if FF_FS_MINIMIZE == 0
-/*-----------------------------------------------------------------------*/
-/* Get File Status */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_stat (
- const TCHAR* path, /* Pointer to the file path */
- FILINFO* fno /* Pointer to file information to return */
-)
-{
- FRESULT res;
- DIR dj;
- DEF_NAMBUF
-
-
- /* Get logical drive */
- res = find_volume(&path, &dj.obj.fs, 0);
- if (res == FR_OK) {
- INIT_NAMBUF(dj.obj.fs);
- res = follow_path(&dj, path); /* Follow the file path */
- if (res == FR_OK) { /* Follow completed */
- if (dj.fn[NSFLAG] & NS_NONAME) { /* It is origin directory */
- res = FR_INVALID_NAME;
- } else { /* Found an object */
- if (fno) get_fileinfo(&dj, fno);
- }
- }
- FREE_NAMBUF();
- }
-
- LEAVE_FF(dj.obj.fs, res);
-}
-
-
-
-#if !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* Get Number of Free Clusters */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_getfree (
- const TCHAR* path, /* Logical drive number */
- DWORD* nclst, /* Pointer to a variable to return number of free clusters */
- FATFS** fatfs /* Pointer to return pointer to corresponding filesystem object */
-)
-{
- FRESULT res;
- FATFS *fs;
- DWORD nfree, clst, sect, stat;
- UINT i;
- FFOBJID obj;
-
-
- /* Get logical drive */
- res = find_volume(&path, &fs, 0);
- if (res == FR_OK) {
- if (fatfs) *fatfs = fs; /* Return ptr to the fs object */
- /* If free_clst is valid, return it without full FAT scan */
- if (fs->free_clst <= fs->n_fatent - 2) {
- *nclst = fs->free_clst;
- } else {
- /* Scan FAT to obtain number of free clusters */
- nfree = 0;
- if (fs->fs_type == FS_FAT12) { /* FAT12: Scan bit field FAT entries */
- clst = 2; obj.fs = fs;
- do {
- stat = get_fat(&obj, clst);
- if (stat == 0xFFFFFFFF) { res = FR_DISK_ERR; break; }
- if (stat == 1) { res = FR_INT_ERR; break; }
- if (stat == 0) nfree++;
- } while (++clst < fs->n_fatent);
- } else {
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) { /* exFAT: Scan allocation bitmap */
- BYTE bm;
- UINT b;
-
- clst = fs->n_fatent - 2; /* Number of clusters */
- sect = fs->bitbase; /* Bitmap sector */
- i = 0; /* Offset in the sector */
- do { /* Counts numbuer of bits with zero in the bitmap */
- if (i == 0) {
- res = move_window(fs, sect++);
- if (res != FR_OK) break;
- }
- for (b = 8, bm = fs->win[i]; b && clst; b--, clst--) {
- if (!(bm & 1)) nfree++;
- bm >>= 1;
- }
- i = (i + 1) % SS(fs);
- } while (clst);
- } else
-#endif
- { /* FAT16/32: Scan WORD/DWORD FAT entries */
- clst = fs->n_fatent; /* Number of entries */
- sect = fs->fatbase; /* Top of the FAT */
- i = 0; /* Offset in the sector */
- do { /* Counts numbuer of entries with zero in the FAT */
- if (i == 0) {
- res = move_window(fs, sect++);
- if (res != FR_OK) break;
- }
- if (fs->fs_type == FS_FAT16) {
- if (ld_word(fs->win + i) == 0) nfree++;
- i += 2;
- } else {
- if ((ld_dword(fs->win + i) & 0x0FFFFFFF) == 0) nfree++;
- i += 4;
- }
- i %= SS(fs);
- } while (--clst);
- }
- }
- *nclst = nfree; /* Return the free clusters */
- fs->free_clst = nfree; /* Now free_clst is valid */
- fs->fsi_flag |= 1; /* FAT32: FSInfo is to be updated */
- }
- }
-
- LEAVE_FF(fs, res);
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Truncate File */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_truncate (
- FIL* fp /* Pointer to the file object */
-)
-{
- FRESULT res;
- FATFS *fs;
- DWORD ncl;
-
-
- res = validate(&fp->obj, &fs); /* Check validity of the file object */
- if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res);
- if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
-
- if (fp->fptr < fp->obj.objsize) { /* Process when fptr is not on the eof */
- if (fp->fptr == 0) { /* When set file size to zero, remove entire cluster chain */
- res = remove_chain(&fp->obj, fp->obj.sclust, 0);
- fp->obj.sclust = 0;
- } else { /* When truncate a part of the file, remove remaining clusters */
- ncl = get_fat(&fp->obj, fp->clust);
- res = FR_OK;
- if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR;
- if (ncl == 1) res = FR_INT_ERR;
- if (res == FR_OK && ncl < fs->n_fatent) {
- res = remove_chain(&fp->obj, ncl, fp->clust);
- }
- }
- fp->obj.objsize = fp->fptr; /* Set file size to current read/write point */
- fp->flag |= FA_MODIFIED;
-#if !FF_FS_TINY
- if (res == FR_OK && (fp->flag & FA_DIRTY)) {
- if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) {
- res = FR_DISK_ERR;
- } else {
- fp->flag &= (BYTE)~FA_DIRTY;
- }
- }
-#endif
- if (res != FR_OK) ABORT(fs, res);
- }
-
- LEAVE_FF(fs, res);
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Delete a File/Directory */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_unlink (
- const TCHAR* path /* Pointer to the file or directory path */
-)
-{
- FRESULT res;
- DIR dj, sdj;
- DWORD dclst = 0;
- FATFS *fs;
-#if FF_FS_EXFAT
- FFOBJID obj;
-#endif
- DEF_NAMBUF
-
-
- /* Get logical drive */
- res = find_volume(&path, &fs, FA_WRITE);
- if (res == FR_OK) {
- dj.obj.fs = fs;
- INIT_NAMBUF(fs);
- res = follow_path(&dj, path); /* Follow the file path */
- if (FF_FS_RPATH && res == FR_OK && (dj.fn[NSFLAG] & NS_DOT)) {
- res = FR_INVALID_NAME; /* Cannot remove dot entry */
- }
-#if FF_FS_LOCK != 0
- if (res == FR_OK) res = chk_lock(&dj, 2); /* Check if it is an open object */
-#endif
- if (res == FR_OK) { /* The object is accessible */
- if (dj.fn[NSFLAG] & NS_NONAME) {
- res = FR_INVALID_NAME; /* Cannot remove the origin directory */
- } else {
- if (dj.obj.attr & AM_RDO) {
- res = FR_DENIED; /* Cannot remove R/O object */
- }
- }
- if (res == FR_OK) {
-#if FF_FS_EXFAT
- obj.fs = fs;
- if (fs->fs_type == FS_EXFAT) {
- init_alloc_info(fs, &obj);
- dclst = obj.sclust;
- } else
-#endif
- {
- dclst = ld_clust(fs, dj.dir);
- }
- if (dj.obj.attr & AM_DIR) { /* Is it a sub-directory? */
-#if FF_FS_RPATH != 0
- if (dclst == fs->cdir) { /* Is it the current directory? */
- res = FR_DENIED;
- } else
-#endif
- {
- sdj.obj.fs = fs; /* Open the sub-directory */
- sdj.obj.sclust = dclst;
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- sdj.obj.objsize = obj.objsize;
- sdj.obj.stat = obj.stat;
- }
-#endif
- res = dir_sdi(&sdj, 0);
- if (res == FR_OK) {
- res = DIR_READ_FILE(&sdj); /* Test if the directory is empty */
- if (res == FR_OK) res = FR_DENIED; /* Not empty? */
- if (res == FR_NO_FILE) res = FR_OK; /* Empty? */
- }
- }
- }
- }
- if (res == FR_OK) {
- res = dir_remove(&dj); /* Remove the directory entry */
- if (res == FR_OK && dclst != 0) { /* Remove the cluster chain if exist */
-#if FF_FS_EXFAT
- res = remove_chain(&obj, dclst, 0);
-#else
- res = remove_chain(&dj.obj, dclst, 0);
-#endif
- }
- if (res == FR_OK) res = sync_fs(fs);
- }
- }
- FREE_NAMBUF();
- }
-
- LEAVE_FF(fs, res);
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Create a Directory */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_mkdir (
- const TCHAR* path /* Pointer to the directory path */
-)
-{
- FRESULT res;
- DIR dj;
- FFOBJID sobj;
- FATFS *fs;
- DWORD dcl, pcl, tm;
- DEF_NAMBUF
-
-
- res = find_volume(&path, &fs, FA_WRITE); /* Get logical drive */
- if (res == FR_OK) {
- dj.obj.fs = fs;
- INIT_NAMBUF(fs);
- res = follow_path(&dj, path); /* Follow the file path */
- if (res == FR_OK) res = FR_EXIST; /* Name collision? */
- if (FF_FS_RPATH && res == FR_NO_FILE && (dj.fn[NSFLAG] & NS_DOT)) { /* Invalid name? */
- res = FR_INVALID_NAME;
- }
- if (res == FR_NO_FILE) { /* It is clear to create a new directory */
- sobj.fs = fs; /* New object id to create a new chain */
- dcl = create_chain(&sobj, 0); /* Allocate a cluster for the new directory */
- res = FR_OK;
- if (dcl == 0) res = FR_DENIED; /* No space to allocate a new cluster? */
- if (dcl == 1) res = FR_INT_ERR; /* Any insanity? */
- if (dcl == 0xFFFFFFFF) res = FR_DISK_ERR; /* Disk error? */
- tm = GET_FATTIME();
- if (res == FR_OK) {
- res = dir_clear(fs, dcl); /* Clean up the new table */
- if (res == FR_OK) {
- if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) { /* Create dot entries (FAT only) */
- mem_set(fs->win + DIR_Name, ' ', 11); /* Create "." entry */
- fs->win[DIR_Name] = '.';
- fs->win[DIR_Attr] = AM_DIR;
- st_dword(fs->win + DIR_ModTime, tm);
- st_clust(fs, fs->win, dcl);
- mem_cpy(fs->win + SZDIRE, fs->win, SZDIRE); /* Create ".." entry */
- fs->win[SZDIRE + 1] = '.'; pcl = dj.obj.sclust;
- st_clust(fs, fs->win + SZDIRE, pcl);
- fs->wflag = 1;
- }
- res = dir_register(&dj); /* Register the object to the parent directoy */
- }
- }
- if (res == FR_OK) {
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) { /* Initialize directory entry block */
- st_dword(fs->dirbuf + XDIR_ModTime, tm); /* Created time */
- st_dword(fs->dirbuf + XDIR_FstClus, dcl); /* Table start cluster */
- st_dword(fs->dirbuf + XDIR_FileSize, (DWORD)fs->csize * SS(fs)); /* File size needs to be valid */
- st_dword(fs->dirbuf + XDIR_ValidFileSize, (DWORD)fs->csize * SS(fs));
- fs->dirbuf[XDIR_GenFlags] = 3; /* Initialize the object flag */
- fs->dirbuf[XDIR_Attr] = AM_DIR; /* Attribute */
- res = store_xdir(&dj);
- } else
-#endif
- {
- st_dword(dj.dir + DIR_ModTime, tm); /* Created time */
- st_clust(fs, dj.dir, dcl); /* Table start cluster */
- dj.dir[DIR_Attr] = AM_DIR; /* Attribute */
- fs->wflag = 1;
- }
- if (res == FR_OK) {
- res = sync_fs(fs);
- }
- } else {
- remove_chain(&sobj, dcl, 0); /* Could not register, remove the allocated cluster */
- }
- }
- FREE_NAMBUF();
- }
-
- LEAVE_FF(fs, res);
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Rename a File/Directory */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_rename (
- const TCHAR* path_old, /* Pointer to the object name to be renamed */
- const TCHAR* path_new /* Pointer to the new name */
-)
-{
- FRESULT res;
- DIR djo, djn;
- FATFS *fs;
- BYTE buf[FF_FS_EXFAT ? SZDIRE * 2 : SZDIRE], *dir;
- DWORD dw;
- DEF_NAMBUF
-
-
- get_ldnumber(&path_new); /* Snip the drive number of new name off */
- res = find_volume(&path_old, &fs, FA_WRITE); /* Get logical drive of the old object */
- if (res == FR_OK) {
- djo.obj.fs = fs;
- INIT_NAMBUF(fs);
- res = follow_path(&djo, path_old); /* Check old object */
- if (res == FR_OK && (djo.fn[NSFLAG] & (NS_DOT | NS_NONAME))) res = FR_INVALID_NAME; /* Check validity of name */
-#if FF_FS_LOCK != 0
- if (res == FR_OK) {
- res = chk_lock(&djo, 2);
- }
-#endif
- if (res == FR_OK) { /* Object to be renamed is found */
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) { /* At exFAT volume */
- BYTE nf, nn;
- WORD nh;
-
- mem_cpy(buf, fs->dirbuf, SZDIRE * 2); /* Save 85+C0 entry of old object */
- mem_cpy(&djn, &djo, sizeof djo);
- res = follow_path(&djn, path_new); /* Make sure if new object name is not in use */
- if (res == FR_OK) { /* Is new name already in use by any other object? */
- res = (djn.obj.sclust == djo.obj.sclust && djn.dptr == djo.dptr) ? FR_NO_FILE : FR_EXIST;
- }
- if (res == FR_NO_FILE) { /* It is a valid path and no name collision */
- res = dir_register(&djn); /* Register the new entry */
- if (res == FR_OK) {
- nf = fs->dirbuf[XDIR_NumSec]; nn = fs->dirbuf[XDIR_NumName];
- nh = ld_word(fs->dirbuf + XDIR_NameHash);
- mem_cpy(fs->dirbuf, buf, SZDIRE * 2); /* Restore 85+C0 entry */
- fs->dirbuf[XDIR_NumSec] = nf; fs->dirbuf[XDIR_NumName] = nn;
- st_word(fs->dirbuf + XDIR_NameHash, nh);
- if (!(fs->dirbuf[XDIR_Attr] & AM_DIR)) fs->dirbuf[XDIR_Attr] |= AM_ARC; /* Set archive attribute if it is a file */
-/* Start of critical section where an interruption can cause a cross-link */
- res = store_xdir(&djn);
- }
- }
- } else
-#endif
- { /* At FAT/FAT32 volume */
- mem_cpy(buf, djo.dir, SZDIRE); /* Save directory entry of the object */
- mem_cpy(&djn, &djo, sizeof (DIR)); /* Duplicate the directory object */
- res = follow_path(&djn, path_new); /* Make sure if new object name is not in use */
- if (res == FR_OK) { /* Is new name already in use by any other object? */
- res = (djn.obj.sclust == djo.obj.sclust && djn.dptr == djo.dptr) ? FR_NO_FILE : FR_EXIST;
- }
- if (res == FR_NO_FILE) { /* It is a valid path and no name collision */
- res = dir_register(&djn); /* Register the new entry */
- if (res == FR_OK) {
- dir = djn.dir; /* Copy directory entry of the object except name */
- mem_cpy(dir + 13, buf + 13, SZDIRE - 13);
- dir[DIR_Attr] = buf[DIR_Attr];
- if (!(dir[DIR_Attr] & AM_DIR)) dir[DIR_Attr] |= AM_ARC; /* Set archive attribute if it is a file */
- fs->wflag = 1;
- if ((dir[DIR_Attr] & AM_DIR) && djo.obj.sclust != djn.obj.sclust) { /* Update .. entry in the sub-directory if needed */
- dw = clst2sect(fs, ld_clust(fs, dir));
- if (dw == 0) {
- res = FR_INT_ERR;
- } else {
-/* Start of critical section where an interruption can cause a cross-link */
- res = move_window(fs, dw);
- dir = fs->win + SZDIRE * 1; /* Ptr to .. entry */
- if (res == FR_OK && dir[1] == '.') {
- st_clust(fs, dir, djn.obj.sclust);
- fs->wflag = 1;
- }
- }
- }
- }
- }
- }
- if (res == FR_OK) {
- res = dir_remove(&djo); /* Remove old entry */
- if (res == FR_OK) {
- res = sync_fs(fs);
- }
- }
-/* End of the critical section */
- }
- FREE_NAMBUF();
- }
-
- LEAVE_FF(fs, res);
-}
-
-#endif /* !FF_FS_READONLY */
-#endif /* FF_FS_MINIMIZE == 0 */
-#endif /* FF_FS_MINIMIZE <= 1 */
-#endif /* FF_FS_MINIMIZE <= 2 */
-
-
-
-#if FF_USE_CHMOD && !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* Change Attribute */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_chmod (
- const TCHAR* path, /* Pointer to the file path */
- BYTE attr, /* Attribute bits */
- BYTE mask /* Attribute mask to change */
-)
-{
- FRESULT res;
- DIR dj;
- FATFS *fs;
- DEF_NAMBUF
-
-
- res = find_volume(&path, &fs, FA_WRITE); /* Get logical drive */
- if (res == FR_OK) {
- dj.obj.fs = fs;
- INIT_NAMBUF(fs);
- res = follow_path(&dj, path); /* Follow the file path */
- if (res == FR_OK && (dj.fn[NSFLAG] & (NS_DOT | NS_NONAME))) res = FR_INVALID_NAME; /* Check object validity */
- if (res == FR_OK) {
- mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC; /* Valid attribute mask */
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- fs->dirbuf[XDIR_Attr] = (attr & mask) | (fs->dirbuf[XDIR_Attr] & (BYTE)~mask); /* Apply attribute change */
- res = store_xdir(&dj);
- } else
-#endif
- {
- dj.dir[DIR_Attr] = (attr & mask) | (dj.dir[DIR_Attr] & (BYTE)~mask); /* Apply attribute change */
- fs->wflag = 1;
- }
- if (res == FR_OK) {
- res = sync_fs(fs);
- }
- }
- FREE_NAMBUF();
- }
-
- LEAVE_FF(fs, res);
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Change Timestamp */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_utime (
- const TCHAR* path, /* Pointer to the file/directory name */
- const FILINFO* fno /* Pointer to the timestamp to be set */
-)
-{
- FRESULT res;
- DIR dj;
- FATFS *fs;
- DEF_NAMBUF
-
-
- res = find_volume(&path, &fs, FA_WRITE); /* Get logical drive */
- if (res == FR_OK) {
- dj.obj.fs = fs;
- INIT_NAMBUF(fs);
- res = follow_path(&dj, path); /* Follow the file path */
- if (res == FR_OK && (dj.fn[NSFLAG] & (NS_DOT | NS_NONAME))) res = FR_INVALID_NAME; /* Check object validity */
- if (res == FR_OK) {
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- st_dword(fs->dirbuf + XDIR_ModTime, (DWORD)fno->fdate << 16 | fno->ftime);
- res = store_xdir(&dj);
- } else
-#endif
- {
- st_dword(dj.dir + DIR_ModTime, (DWORD)fno->fdate << 16 | fno->ftime);
- fs->wflag = 1;
- }
- if (res == FR_OK) {
- res = sync_fs(fs);
- }
- }
- FREE_NAMBUF();
- }
-
- LEAVE_FF(fs, res);
-}
-
-#endif /* FF_USE_CHMOD && !FF_FS_READONLY */
-
-
-
-#if FF_USE_LABEL
-/*-----------------------------------------------------------------------*/
-/* Get Volume Label */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_getlabel (
- const TCHAR* path, /* Logical drive number */
- TCHAR* label, /* Buffer to store the volume label */
- DWORD* vsn /* Variable to store the volume serial number */
-)
-{
- FRESULT res;
- DIR dj;
- FATFS *fs;
- UINT si, di;
- WCHAR wc;
-
- /* Get logical drive */
- res = find_volume(&path, &fs, 0);
-
- /* Get volume label */
- if (res == FR_OK && label) {
- dj.obj.fs = fs; dj.obj.sclust = 0; /* Open root directory */
- res = dir_sdi(&dj, 0);
- if (res == FR_OK) {
- res = DIR_READ_LABEL(&dj); /* Find a volume label entry */
- if (res == FR_OK) {
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- WCHAR hs;
-
- for (si = di = hs = 0; si < dj.dir[XDIR_NumLabel]; si++) { /* Extract volume label from 83 entry */
- wc = ld_word(dj.dir + XDIR_Label + si * 2);
- if (hs == 0 && IsSurrogate(wc)) { /* Is the code a surrogate? */
- hs = wc; continue;
- }
- wc = put_utf((DWORD)hs << 16 | wc, &label[di], 4);
- if (wc == 0) { di = 0; break; }
- di += wc;
- hs = 0;
- }
- if (hs != 0) di = 0; /* Broken surrogate pair? */
- label[di] = 0;
- } else
-#endif
- {
- si = di = 0; /* Extract volume label from AM_VOL entry */
- while (si < 11) {
- wc = dj.dir[si++];
-#if FF_USE_LFN && FF_LFN_UNICODE >= 1 /* Unicode output */
- if (dbc_1st((BYTE)wc) && si < 11) wc = wc << 8 | dj.dir[si++]; /* Is it a DBC? */
- wc = ff_oem2uni(wc, CODEPAGE); /* Convert it into Unicode */
- if (wc != 0) wc = put_utf(wc, &label[di], 4); /* Put it in Unicode */
- if (wc == 0) { di = 0; break; }
- di += wc;
-#else /* ANSI/OEM output */
- label[di++] = (TCHAR)wc;
-#endif
- }
- do { /* Truncate trailing spaces */
- label[di] = 0;
- if (di == 0) break;
- } while (label[--di] == ' ');
- }
- }
- }
- if (res == FR_NO_FILE) { /* No label entry and return nul string */
- label[0] = 0;
- res = FR_OK;
- }
- }
-
- /* Get volume serial number */
- if (res == FR_OK && vsn) {
- res = move_window(fs, fs->volbase);
- if (res == FR_OK) {
- switch (fs->fs_type) {
- case FS_EXFAT:
- di = BPB_VolIDEx; break;
-
- case FS_FAT32:
- di = BS_VolID32; break;
-
- default:
- di = BS_VolID;
- }
- *vsn = ld_dword(fs->win + di);
- }
- }
-
- LEAVE_FF(fs, res);
-}
-
-
-
-#if !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* Set Volume Label */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_setlabel (
- const TCHAR* label /* Volume label to set with heading logical drive number */
-)
-{
- FRESULT res;
- DIR dj;
- FATFS *fs;
- BYTE dirvn[22];
- UINT di;
- WCHAR wc;
- static const char badchr[] = "+.,;=[]/\\\"*:<>\?|\x7F"; /* [0..] for FAT, [7..] for exFAT */
-#if FF_USE_LFN
- DWORD dc;
-#endif
-
- /* Get logical drive */
- res = find_volume(&label, &fs, FA_WRITE);
- if (res != FR_OK) LEAVE_FF(fs, res);
-
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */
- mem_set(dirvn, 0, 22);
- di = 0;
- while ((UINT)*label >= ' ') { /* Create volume label */
- dc = tchar2uni(&label); /* Get a Unicode character */
- if (dc >= 0x10000) {
- if (dc == 0xFFFFFFFF || di >= 10) { /* Wrong surrogate or buffer overflow */
- dc = 0;
- } else {
- st_word(dirvn + di * 2, (WCHAR)(dc >> 16)); di++;
- }
- }
- if (dc == 0 || chk_chr(badchr + 7, (int)dc) || di >= 11) { /* Check validity of the volume label */
- LEAVE_FF(fs, FR_INVALID_NAME);
- }
- st_word(dirvn + di * 2, (WCHAR)dc); di++;
- }
- } else
-#endif
- { /* On the FAT/FAT32 volume */
- mem_set(dirvn, ' ', 11);
- di = 0;
- while ((UINT)*label >= ' ') { /* Create volume label */
-#if FF_USE_LFN
- dc = tchar2uni(&label);
- wc = (dc < 0x10000) ? ff_uni2oem(ff_wtoupper(dc), CODEPAGE) : 0;
-#else /* ANSI/OEM input */
- wc = (BYTE)*label++;
- if (dbc_1st((BYTE)wc)) wc = dbc_2nd((BYTE)*label) ? wc << 8 | (BYTE)*label++ : 0;
- if (IsLower(wc)) wc -= 0x20; /* To upper ASCII characters */
-#if FF_CODE_PAGE == 0
- if (ExCvt && wc >= 0x80) wc = ExCvt[wc - 0x80]; /* To upper extended characters (SBCS cfg) */
-#elif FF_CODE_PAGE < 900
- if (wc >= 0x80) wc = ExCvt[wc - 0x80]; /* To upper extended characters (SBCS cfg) */
-#endif
-#endif
- if (wc == 0 || chk_chr(badchr + 0, (int)wc) || di >= (UINT)((wc >= 0x100) ? 10 : 11)) { /* Reject invalid characters for volume label */
- LEAVE_FF(fs, FR_INVALID_NAME);
- }
- if (wc >= 0x100) dirvn[di++] = (BYTE)(wc >> 8);
- dirvn[di++] = (BYTE)wc;
- }
- if (dirvn[0] == DDEM) LEAVE_FF(fs, FR_INVALID_NAME); /* Reject illegal name (heading DDEM) */
- while (di && dirvn[di - 1] == ' ') di--; /* Snip trailing spaces */
- }
-
- /* Set volume label */
- dj.obj.fs = fs; dj.obj.sclust = 0; /* Open root directory */
- res = dir_sdi(&dj, 0);
- if (res == FR_OK) {
- res = DIR_READ_LABEL(&dj); /* Get volume label entry */
- if (res == FR_OK) {
- if (FF_FS_EXFAT && fs->fs_type == FS_EXFAT) {
- dj.dir[XDIR_NumLabel] = (BYTE)di; /* Change the volume label */
- mem_cpy(dj.dir + XDIR_Label, dirvn, 22);
- } else {
- if (di != 0) {
- mem_cpy(dj.dir, dirvn, 11); /* Change the volume label */
- } else {
- dj.dir[DIR_Name] = DDEM; /* Remove the volume label */
- }
- }
- fs->wflag = 1;
- res = sync_fs(fs);
- } else { /* No volume label entry or an error */
- if (res == FR_NO_FILE) {
- res = FR_OK;
- if (di != 0) { /* Create a volume label entry */
- res = dir_alloc(&dj, 1); /* Allocate an entry */
- if (res == FR_OK) {
- mem_set(dj.dir, 0, SZDIRE); /* Clean the entry */
- if (FF_FS_EXFAT && fs->fs_type == FS_EXFAT) {
- dj.dir[XDIR_Type] = ET_VLABEL; /* Create volume label entry */
- dj.dir[XDIR_NumLabel] = (BYTE)di;
- mem_cpy(dj.dir + XDIR_Label, dirvn, 22);
- } else {
- dj.dir[DIR_Attr] = AM_VOL; /* Create volume label entry */
- mem_cpy(dj.dir, dirvn, 11);
- }
- fs->wflag = 1;
- res = sync_fs(fs);
- }
- }
- }
- }
- }
-
- LEAVE_FF(fs, res);
-}
-
-#endif /* !FF_FS_READONLY */
-#endif /* FF_USE_LABEL */
-
-
-
-#if FF_USE_EXPAND && !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* Allocate a Contiguous Blocks to the File */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_expand (
- FIL* fp, /* Pointer to the file object */
- FSIZE_t fsz, /* File size to be expanded to */
- BYTE opt /* Operation mode 0:Find and prepare or 1:Find and allocate */
-)
-{
- FRESULT res;
- FATFS *fs;
- DWORD n, clst, stcl, scl, ncl, tcl, lclst;
-
-
- res = validate(&fp->obj, &fs); /* Check validity of the file object */
- if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res);
- if (fsz == 0 || fp->obj.objsize != 0 || !(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED);
-#if FF_FS_EXFAT
- if (fs->fs_type != FS_EXFAT && fsz >= 0x100000000) LEAVE_FF(fs, FR_DENIED); /* Check if in size limit */
-#endif
- n = (DWORD)fs->csize * SS(fs); /* Cluster size */
- tcl = (DWORD)(fsz / n) + ((fsz & (n - 1)) ? 1 : 0); /* Number of clusters required */
- stcl = fs->last_clst; lclst = 0;
- if (stcl < 2 || stcl >= fs->n_fatent) stcl = 2;
-
-#if FF_FS_EXFAT
- if (fs->fs_type == FS_EXFAT) {
- scl = find_bitmap(fs, stcl, tcl); /* Find a contiguous cluster block */
- if (scl == 0) res = FR_DENIED; /* No contiguous cluster block was found */
- if (scl == 0xFFFFFFFF) res = FR_DISK_ERR;
- if (res == FR_OK) { /* A contiguous free area is found */
- if (opt) { /* Allocate it now */
- res = change_bitmap(fs, scl, tcl, 1); /* Mark the cluster block 'in use' */
- lclst = scl + tcl - 1;
- } else { /* Set it as suggested point for next allocation */
- lclst = scl - 1;
- }
- }
- } else
-#endif
- {
- scl = clst = stcl; ncl = 0;
- for (;;) { /* Find a contiguous cluster block */
- n = get_fat(&fp->obj, clst);
- if (++clst >= fs->n_fatent) clst = 2;
- if (n == 1) { res = FR_INT_ERR; break; }
- if (n == 0xFFFFFFFF) { res = FR_DISK_ERR; break; }
- if (n == 0) { /* Is it a free cluster? */
- if (++ncl == tcl) break; /* Break if a contiguous cluster block is found */
- } else {
- scl = clst; ncl = 0; /* Not a free cluster */
- }
- if (clst == stcl) { res = FR_DENIED; break; } /* No contiguous cluster? */
- }
- if (res == FR_OK) { /* A contiguous free area is found */
- if (opt) { /* Allocate it now */
- for (clst = scl, n = tcl; n; clst++, n--) { /* Create a cluster chain on the FAT */
- res = put_fat(fs, clst, (n == 1) ? 0xFFFFFFFF : clst + 1);
- if (res != FR_OK) break;
- lclst = clst;
- }
- } else { /* Set it as suggested point for next allocation */
- lclst = scl - 1;
- }
- }
- }
-
- if (res == FR_OK) {
- fs->last_clst = lclst; /* Set suggested start cluster to start next */
- if (opt) { /* Is it allocated now? */
- fp->obj.sclust = scl; /* Update object allocation information */
- fp->obj.objsize = fsz;
- if (FF_FS_EXFAT) fp->obj.stat = 2; /* Set status 'contiguous chain' */
- fp->flag |= FA_MODIFIED;
- if (fs->free_clst <= fs->n_fatent - 2) { /* Update FSINFO */
- fs->free_clst -= tcl;
- fs->fsi_flag |= 1;
- }
- }
- }
-
- LEAVE_FF(fs, res);
-}
-
-#endif /* FF_USE_EXPAND && !FF_FS_READONLY */
-
-
-
-#if FF_USE_FORWARD
-/*-----------------------------------------------------------------------*/
-/* Forward Data to the Stream Directly */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_forward (
- FIL* fp, /* Pointer to the file object */
- UINT (*func)(const BYTE*,UINT), /* Pointer to the streaming function */
- UINT btf, /* Number of bytes to forward */
- UINT* bf /* Pointer to number of bytes forwarded */
-)
-{
- FRESULT res;
- FATFS *fs;
- DWORD clst, sect;
- FSIZE_t remain;
- UINT rcnt, csect;
- BYTE *dbuf;
-
-
- *bf = 0; /* Clear transfer byte counter */
- res = validate(&fp->obj, &fs); /* Check validity of the file object */
- if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res);
- if (!(fp->flag & FA_READ)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
-
- remain = fp->obj.objsize - fp->fptr;
- if (btf > remain) btf = (UINT)remain; /* Truncate btf by remaining bytes */
-
- for ( ; btf && (*func)(0, 0); /* Repeat until all data transferred or stream goes busy */
- fp->fptr += rcnt, *bf += rcnt, btf -= rcnt) {
- csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1)); /* Sector offset in the cluster */
- if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */
- if (csect == 0) { /* On the cluster boundary? */
- clst = (fp->fptr == 0) ? /* On the top of the file? */
- fp->obj.sclust : get_fat(&fp->obj, fp->clust);
- if (clst <= 1) ABORT(fs, FR_INT_ERR);
- if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
- fp->clust = clst; /* Update current cluster */
- }
- }
- sect = clst2sect(fs, fp->clust); /* Get current data sector */
- if (sect == 0) ABORT(fs, FR_INT_ERR);
- sect += csect;
-#if FF_FS_TINY
- if (move_window(fs, sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window to the file data */
- dbuf = fs->win;
-#else
- if (fp->sect != sect) { /* Fill sector cache with file data */
-#if !FF_FS_READONLY
- if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */
- if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
- fp->flag &= (BYTE)~FA_DIRTY;
- }
-#endif
- if (disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
- }
- dbuf = fp->buf;
-#endif
- fp->sect = sect;
- rcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes left in the sector */
- if (rcnt > btf) rcnt = btf; /* Clip it by btr if needed */
- rcnt = (*func)(dbuf + ((UINT)fp->fptr % SS(fs)), rcnt); /* Forward the file data */
- if (rcnt == 0) ABORT(fs, FR_INT_ERR);
- }
-
- LEAVE_FF(fs, FR_OK);
-}
-#endif /* FF_USE_FORWARD */
-
-
-
-#if FF_USE_MKFS && !FF_FS_READONLY
-/*-----------------------------------------------------------------------*/
-/* Create an FAT/exFAT volume */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_mkfs (
- const TCHAR* path, /* Logical drive number */
- BYTE opt, /* Format option */
- DWORD au, /* Size of allocation unit (cluster) [byte] */
- void* work, /* Pointer to working buffer (null: use heap memory) */
- UINT len /* Size of working buffer [byte] */
-)
-{
- const UINT n_fats = 2; /* Number of FATs for FAT/FAT32 volume (1 or 2) */
- const UINT n_rootdir = 512; /* Number of root directory entries for FAT volume */
- static const WORD cst[] = {1, 4, 16, 64, 256, 512, 0}; /* Cluster size boundary for FAT volume (4Ks unit) */
- static const WORD cst32[] = {1, 2, 4, 8, 16, 32, 0}; /* Cluster size boundary for FAT32 volume (128Ks unit) */
- BYTE fmt, sys, *buf, *pte, pdrv, part;
- WORD ss; /* Sector size */
- DWORD szb_buf, sz_buf, sz_blk, n_clst, pau, sect, nsect, n;
- DWORD b_vol, b_fat, b_data; /* Base LBA for volume, fat, data */
- DWORD sz_vol, sz_rsv, sz_fat, sz_dir; /* Size for volume, fat, dir, data */
- UINT i;
- int vol;
- DSTATUS stat;
-#if FF_USE_TRIM || FF_FS_EXFAT
- DWORD tbl[3];
-#endif
-
-
- /* Check mounted drive and clear work area */
- vol = get_ldnumber(&path); /* Get target logical drive */
- if (vol < 0) return FR_INVALID_DRIVE;
- if (FatFs[vol]) FatFs[vol]->fs_type = 0; /* Clear the volume if mounted */
- pdrv = LD2PD(vol); /* Physical drive */
- part = LD2PT(vol); /* Partition (0:create as new, 1-4:get from partition table) */
-
- /* Check physical drive status */
- stat = disk_initialize(pdrv);
- if (stat & STA_NOINIT) return FR_NOT_READY;
- if (stat & STA_PROTECT) return FR_WRITE_PROTECTED;
- if (disk_ioctl(pdrv, GET_BLOCK_SIZE, &sz_blk) != RES_OK || !sz_blk || sz_blk > 32768 || (sz_blk & (sz_blk - 1))) sz_blk = 1; /* Erase block to align data area */
-#if FF_MAX_SS != FF_MIN_SS /* Get sector size of the medium if variable sector size cfg. */
- if (disk_ioctl(pdrv, GET_SECTOR_SIZE, &ss) != RES_OK) return FR_DISK_ERR;
- if (ss > FF_MAX_SS || ss < FF_MIN_SS || (ss & (ss - 1))) return FR_DISK_ERR;
-#else
- ss = FF_MAX_SS;
-#endif
- if ((au != 0 && au < ss) || au > 0x1000000 || (au & (au - 1))) return FR_INVALID_PARAMETER; /* Check if au is valid */
- au /= ss; /* Cluster size in unit of sector */
-
- /* Get working buffer */
-#if FF_USE_LFN == 3
- if (!work) { /* Use heap memory for working buffer */
- for (szb_buf = MAX_MALLOC, buf = 0; szb_buf >= ss && (buf = ff_memalloc(szb_buf)) == 0; szb_buf /= 2) ;
- sz_buf = szb_buf / ss; /* Size of working buffer (sector) */
- } else
-#endif
- {
- buf = (BYTE*)work; /* Working buffer */
- sz_buf = len / ss; /* Size of working buffer (sector) */
- szb_buf = sz_buf * ss; /* Size of working buffer (byte) */
- }
- if (!buf || sz_buf == 0) return FR_NOT_ENOUGH_CORE;
-
- /* Determine where the volume to be located (b_vol, sz_vol) */
- if (FF_MULTI_PARTITION && part != 0) {
- /* Get partition information from partition table in the MBR */
- if (disk_read(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Load MBR */
- if (ld_word(buf + BS_55AA) != 0xAA55) LEAVE_MKFS(FR_MKFS_ABORTED); /* Check if MBR is valid */
- pte = buf + (MBR_Table + (part - 1) * SZ_PTE);
- if (pte[PTE_System] == 0) LEAVE_MKFS(FR_MKFS_ABORTED); /* No partition? */
- b_vol = ld_dword(pte + PTE_StLba); /* Get volume start sector */
- sz_vol = ld_dword(pte + PTE_SizLba); /* Get volume size */
- } else {
- /* Create a single-partition in this function */
- if (disk_ioctl(pdrv, GET_SECTOR_COUNT, &sz_vol) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
- b_vol = (opt & FM_SFD) ? 0 : 32768; /* Volume start sector. Align to 16MB */
- if (sz_vol < b_vol) LEAVE_MKFS(FR_MKFS_ABORTED);
- sz_vol -= b_vol; /* Volume size */
- }
- if (sz_vol < 128) LEAVE_MKFS(FR_MKFS_ABORTED); /* Check if volume size is >=128s */
-
- /* Pre-determine the FAT type */
- do {
- if (FF_FS_EXFAT && (opt & FM_EXFAT)) { /* exFAT possible? */
- if ((opt & FM_ANY) == FM_EXFAT || sz_vol >= 0x4000000 || au > 128) { /* exFAT only, vol >= 64Ms or au > 128s ? */
- fmt = FS_EXFAT; break;
- }
- }
- if (au > 128) LEAVE_MKFS(FR_INVALID_PARAMETER); /* Too large au for FAT/FAT32 */
- if (opt & FM_FAT32) { /* FAT32 possible? */
- if ((opt & FM_ANY) == FM_FAT32 || !(opt & FM_FAT)) { /* FAT32 only or no-FAT? */
- fmt = FS_FAT32; break;
- }
- }
- if (!(opt & FM_FAT)) LEAVE_MKFS(FR_INVALID_PARAMETER); /* no-FAT? */
- fmt = FS_FAT16;
- } while (0);
-
-#if FF_FS_EXFAT
- if (fmt == FS_EXFAT) { /* Create an exFAT volume */
- DWORD szb_bit, szb_case, sum, nb, cl;
- WCHAR ch, si;
- UINT j, st;
- BYTE b;
-
- if (sz_vol < 0x1000) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too small volume? */
-#if FF_USE_TRIM
- tbl[0] = b_vol; tbl[1] = b_vol + sz_vol - 1; /* Inform the device the volume area may be erased */
- disk_ioctl(pdrv, CTRL_TRIM, tbl);
-#endif
- /* Determine FAT location, data location and number of clusters */
- if (au == 0) { /* au auto-selection */
- au = 8;
- if (sz_vol >= 0x80000) au = 64; /* >= 512Ks */
- if (sz_vol >= 0x4000000) au = 256; /* >= 64Ms */
- }
- b_fat = b_vol + 32; /* FAT start at offset 32 */
- sz_fat = ((sz_vol / au + 2) * 4 + ss - 1) / ss; /* Number of FAT sectors */
- b_data = (b_fat + sz_fat + sz_blk - 1) & ~(sz_blk - 1); /* Align data area to the erase block boundary */
- if (b_data - b_vol >= sz_vol / 2) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too small volume? */
- n_clst = (sz_vol - (b_data - b_vol)) / au; /* Number of clusters */
- if (n_clst <16) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too few clusters? */
- if (n_clst > MAX_EXFAT) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too many clusters? */
-
- szb_bit = (n_clst + 7) / 8; /* Size of allocation bitmap */
- tbl[0] = (szb_bit + au * ss - 1) / (au * ss); /* Number of allocation bitmap clusters */
-
- /* Create a compressed up-case table */
- sect = b_data + au * tbl[0]; /* Table start sector */
- sum = 0; /* Table checksum to be stored in the 82 entry */
- st = 0; si = 0; i = 0; j = 0; szb_case = 0;
- do {
- switch (st) {
- case 0:
- ch = (WCHAR)ff_wtoupper(si); /* Get an up-case char */
- if (ch != si) {
- si++; break; /* Store the up-case char if exist */
- }
- for (j = 1; (WCHAR)(si + j) && (WCHAR)(si + j) == ff_wtoupper((WCHAR)(si + j)); j++) ; /* Get run length of no-case block */
- if (j >= 128) {
- ch = 0xFFFF; st = 2; break; /* Compress the no-case block if run is >= 128 */
- }
- st = 1; /* Do not compress short run */
- /* go to next case */
- case 1:
- ch = si++; /* Fill the short run */
- if (--j == 0) st = 0;
- break;
-
- default:
- ch = (WCHAR)j; si += (WCHAR)j; /* Number of chars to skip */
- st = 0;
- }
- sum = xsum32(buf[i + 0] = (BYTE)ch, sum); /* Put it into the write buffer */
- sum = xsum32(buf[i + 1] = (BYTE)(ch >> 8), sum);
- i += 2; szb_case += 2;
- if (si == 0 || i == szb_buf) { /* Write buffered data when buffer full or end of process */
- n = (i + ss - 1) / ss;
- if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
- sect += n; i = 0;
- }
- } while (si);
- tbl[1] = (szb_case + au * ss - 1) / (au * ss); /* Number of up-case table clusters */
- tbl[2] = 1; /* Number of root dir clusters */
-
- /* Initialize the allocation bitmap */
- sect = b_data; nsect = (szb_bit + ss - 1) / ss; /* Start of bitmap and number of sectors */
- nb = tbl[0] + tbl[1] + tbl[2]; /* Number of clusters in-use by system */
- do {
- mem_set(buf, 0, szb_buf);
- for (i = 0; nb >= 8 && i < szb_buf; buf[i++] = 0xFF, nb -= 8) ;
- for (b = 1; nb != 0 && i < szb_buf; buf[i] |= b, b <<= 1, nb--) ;
- n = (nsect > sz_buf) ? sz_buf : nsect; /* Write the buffered data */
- if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
- sect += n; nsect -= n;
- } while (nsect);
-
- /* Initialize the FAT */
- sect = b_fat; nsect = sz_fat; /* Start of FAT and number of FAT sectors */
- j = nb = cl = 0;
- do {
- mem_set(buf, 0, szb_buf); i = 0; /* Clear work area and reset write index */
- if (cl == 0) { /* Set entry 0 and 1 */
- st_dword(buf + i, 0xFFFFFFF8); i += 4; cl++;
- st_dword(buf + i, 0xFFFFFFFF); i += 4; cl++;
- }
- do { /* Create chains of bitmap, up-case and root dir */
- while (nb != 0 && i < szb_buf) { /* Create a chain */
- st_dword(buf + i, (nb > 1) ? cl + 1 : 0xFFFFFFFF);
- i += 4; cl++; nb--;
- }
- if (nb == 0 && j < 3) nb = tbl[j++]; /* Next chain */
- } while (nb != 0 && i < szb_buf);
- n = (nsect > sz_buf) ? sz_buf : nsect; /* Write the buffered data */
- if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
- sect += n; nsect -= n;
- } while (nsect);
-
- /* Initialize the root directory */
- mem_set(buf, 0, szb_buf);
- buf[SZDIRE * 0 + 0] = ET_VLABEL; /* Volume label entry */
- buf[SZDIRE * 1 + 0] = ET_BITMAP; /* Bitmap entry */
- st_dword(buf + SZDIRE * 1 + 20, 2); /* cluster */
- st_dword(buf + SZDIRE * 1 + 24, szb_bit); /* size */
- buf[SZDIRE * 2 + 0] = ET_UPCASE; /* Up-case table entry */
- st_dword(buf + SZDIRE * 2 + 4, sum); /* sum */
- st_dword(buf + SZDIRE * 2 + 20, 2 + tbl[0]); /* cluster */
- st_dword(buf + SZDIRE * 2 + 24, szb_case); /* size */
- sect = b_data + au * (tbl[0] + tbl[1]); nsect = au; /* Start of the root directory and number of sectors */
- do { /* Fill root directory sectors */
- n = (nsect > sz_buf) ? sz_buf : nsect;
- if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
- mem_set(buf, 0, ss);
- sect += n; nsect -= n;
- } while (nsect);
-
- /* Create two set of the exFAT VBR blocks */
- sect = b_vol;
- for (n = 0; n < 2; n++) {
- /* Main record (+0) */
- mem_set(buf, 0, ss);
- mem_cpy(buf + BS_JmpBoot, "\xEB\x76\x90" "EXFAT ", 11); /* Boot jump code (x86), OEM name */
- st_dword(buf + BPB_VolOfsEx, b_vol); /* Volume offset in the physical drive [sector] */
- st_dword(buf + BPB_TotSecEx, sz_vol); /* Volume size [sector] */
- st_dword(buf + BPB_FatOfsEx, b_fat - b_vol); /* FAT offset [sector] */
- st_dword(buf + BPB_FatSzEx, sz_fat); /* FAT size [sector] */
- st_dword(buf + BPB_DataOfsEx, b_data - b_vol); /* Data offset [sector] */
- st_dword(buf + BPB_NumClusEx, n_clst); /* Number of clusters */
- st_dword(buf + BPB_RootClusEx, 2 + tbl[0] + tbl[1]); /* Root dir cluster # */
- st_dword(buf + BPB_VolIDEx, GET_FATTIME()); /* VSN */
- st_word(buf + BPB_FSVerEx, 0x100); /* Filesystem version (1.00) */
- for (buf[BPB_BytsPerSecEx] = 0, i = ss; i >>= 1; buf[BPB_BytsPerSecEx]++) ; /* Log2 of sector size [byte] */
- for (buf[BPB_SecPerClusEx] = 0, i = au; i >>= 1; buf[BPB_SecPerClusEx]++) ; /* Log2 of cluster size [sector] */
- buf[BPB_NumFATsEx] = 1; /* Number of FATs */
- buf[BPB_DrvNumEx] = 0x80; /* Drive number (for int13) */
- st_word(buf + BS_BootCodeEx, 0xFEEB); /* Boot code (x86) */
- st_word(buf + BS_55AA, 0xAA55); /* Signature (placed here regardless of sector size) */
- for (i = sum = 0; i < ss; i++) { /* VBR checksum */
- if (i != BPB_VolFlagEx && i != BPB_VolFlagEx + 1 && i != BPB_PercInUseEx) sum = xsum32(buf[i], sum);
- }
- if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
- /* Extended bootstrap record (+1..+8) */
- mem_set(buf, 0, ss);
- st_word(buf + ss - 2, 0xAA55); /* Signature (placed at end of sector) */
- for (j = 1; j < 9; j++) {
- for (i = 0; i < ss; sum = xsum32(buf[i++], sum)) ; /* VBR checksum */
- if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
- }
- /* OEM/Reserved record (+9..+10) */
- mem_set(buf, 0, ss);
- for ( ; j < 11; j++) {
- for (i = 0; i < ss; sum = xsum32(buf[i++], sum)) ; /* VBR checksum */
- if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
- }
- /* Sum record (+11) */
- for (i = 0; i < ss; i += 4) st_dword(buf + i, sum); /* Fill with checksum value */
- if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
- }
-
- } else
-#endif /* FF_FS_EXFAT */
- { /* Create an FAT/FAT32 volume */
- do {
- pau = au;
- /* Pre-determine number of clusters and FAT sub-type */
- if (fmt == FS_FAT32) { /* FAT32 volume */
- if (pau == 0) { /* au auto-selection */
- n = sz_vol / 0x20000; /* Volume size in unit of 128KS */
- for (i = 0, pau = 1; cst32[i] && cst32[i] <= n; i++, pau <<= 1) ; /* Get from table */
- }
- n_clst = sz_vol / pau; /* Number of clusters */
- sz_fat = (n_clst * 4 + 8 + ss - 1) / ss; /* FAT size [sector] */
- sz_rsv = 32; /* Number of reserved sectors */
- sz_dir = 0; /* No static directory */
- if (n_clst <= MAX_FAT16 || n_clst > MAX_FAT32) LEAVE_MKFS(FR_MKFS_ABORTED);
- } else { /* FAT volume */
- if (pau == 0) { /* au auto-selection */
- n = sz_vol / 0x1000; /* Volume size in unit of 4KS */
- for (i = 0, pau = 1; cst[i] && cst[i] <= n; i++, pau <<= 1) ; /* Get from table */
- }
- n_clst = sz_vol / pau;
- if (n_clst > MAX_FAT12) {
- n = n_clst * 2 + 4; /* FAT size [byte] */
- } else {
- fmt = FS_FAT12;
- n = (n_clst * 3 + 1) / 2 + 3; /* FAT size [byte] */
- }
- sz_fat = (n + ss - 1) / ss; /* FAT size [sector] */
- sz_rsv = 1; /* Number of reserved sectors */
- sz_dir = (DWORD)n_rootdir * SZDIRE / ss; /* Rootdir size [sector] */
- }
- b_fat = b_vol + sz_rsv; /* FAT base */
- b_data = b_fat + sz_fat * n_fats + sz_dir; /* Data base */
-
- /* Align data base to erase block boundary (for flash memory media) */
- n = ((b_data + sz_blk - 1) & ~(sz_blk - 1)) - b_data; /* Next nearest erase block from current data base */
- if (fmt == FS_FAT32) { /* FAT32: Move FAT base */
- sz_rsv += n; b_fat += n;
- } else { /* FAT: Expand FAT size */
- if (n % n_fats) { /* Adjust fractional error if needed */
- n--; sz_rsv++; b_fat++;
- }
- sz_fat += n / n_fats;
- }
-
- /* Determine number of clusters and final check of validity of the FAT sub-type */
- if (sz_vol < b_data + pau * 16 - b_vol) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too small volume */
- n_clst = (sz_vol - sz_rsv - sz_fat * n_fats - sz_dir) / pau;
- if (fmt == FS_FAT32) {
- if (n_clst <= MAX_FAT16) { /* Too few clusters for FAT32 */
- if (au == 0 && (au = pau / 2) != 0) continue; /* Adjust cluster size and retry */
- LEAVE_MKFS(FR_MKFS_ABORTED);
- }
- }
- if (fmt == FS_FAT16) {
- if (n_clst > MAX_FAT16) { /* Too many clusters for FAT16 */
- if (au == 0 && (pau * 2) <= 64) {
- au = pau * 2; continue; /* Adjust cluster size and retry */
- }
- if ((opt & FM_FAT32)) {
- fmt = FS_FAT32; continue; /* Switch type to FAT32 and retry */
- }
- if (au == 0 && (au = pau * 2) <= 128) continue; /* Adjust cluster size and retry */
- LEAVE_MKFS(FR_MKFS_ABORTED);
- }
- if (n_clst <= MAX_FAT12) { /* Too few clusters for FAT16 */
- if (au == 0 && (au = pau * 2) <= 128) continue; /* Adjust cluster size and retry */
- LEAVE_MKFS(FR_MKFS_ABORTED);
- }
- }
- if (fmt == FS_FAT12 && n_clst > MAX_FAT12) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too many clusters for FAT12 */
-
- /* Ok, it is the valid cluster configuration */
- break;
- } while (1);
-
-#if FF_USE_TRIM
- tbl[0] = b_vol; tbl[1] = b_vol + sz_vol - 1; /* Inform the device the volume area can be erased */
- disk_ioctl(pdrv, CTRL_TRIM, tbl);
-#endif
- /* Create FAT VBR */
- mem_set(buf, 0, ss);
- mem_cpy(buf + BS_JmpBoot, "\xEB\xFE\x90" "MSDOS5.0", 11);/* Boot jump code (x86), OEM name */
- st_word(buf + BPB_BytsPerSec, ss); /* Sector size [byte] */
- buf[BPB_SecPerClus] = (BYTE)pau; /* Cluster size [sector] */
- st_word(buf + BPB_RsvdSecCnt, (WORD)sz_rsv); /* Size of reserved area */
- buf[BPB_NumFATs] = (BYTE)n_fats; /* Number of FATs */
- st_word(buf + BPB_RootEntCnt, (WORD)((fmt == FS_FAT32) ? 0 : n_rootdir)); /* Number of root directory entries */
- if (sz_vol < 0x10000) {
- st_word(buf + BPB_TotSec16, (WORD)sz_vol); /* Volume size in 16-bit LBA */
- } else {
- st_dword(buf + BPB_TotSec32, sz_vol); /* Volume size in 32-bit LBA */
- }
- buf[BPB_Media] = 0xF8; /* Media descriptor byte */
- st_word(buf + BPB_SecPerTrk, 63); /* Number of sectors per track (for int13) */
- st_word(buf + BPB_NumHeads, 255); /* Number of heads (for int13) */
- st_dword(buf + BPB_HiddSec, b_vol); /* Volume offset in the physical drive [sector] */
- if (fmt == FS_FAT32) {
- st_dword(buf + BS_VolID32, GET_FATTIME()); /* VSN */
- st_dword(buf + BPB_FATSz32, sz_fat); /* FAT size [sector] */
- st_dword(buf + BPB_RootClus32, 2); /* Root directory cluster # (2) */
- st_word(buf + BPB_FSInfo32, 1); /* Offset of FSINFO sector (VBR + 1) */
- st_word(buf + BPB_BkBootSec32, 6); /* Offset of backup VBR (VBR + 6) */
- buf[BS_DrvNum32] = 0x80; /* Drive number (for int13) */
- buf[BS_BootSig32] = 0x29; /* Extended boot signature */
- mem_cpy(buf + BS_VolLab32, "SWITCH SD " "FAT32 ", 19); /* Volume label, FAT signature */
- } else {
- st_dword(buf + BS_VolID, GET_FATTIME()); /* VSN */
- st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */
- buf[BS_DrvNum] = 0x80; /* Drive number (for int13) */
- buf[BS_BootSig] = 0x29; /* Extended boot signature */
- mem_cpy(buf + BS_VolLab, "SWITCH SD " "FAT ", 19); /* Volume label, FAT signature */
- }
- st_word(buf + BS_55AA, 0xAA55); /* Signature (offset is fixed here regardless of sector size) */
- if (disk_write(pdrv, buf, b_vol, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Write it to the VBR sector */
-
- /* Create FSINFO record if needed */
- if (fmt == FS_FAT32) {
- disk_write(pdrv, buf, b_vol + 6, 1); /* Write backup VBR (VBR + 6) */
- mem_set(buf, 0, ss);
- st_dword(buf + FSI_LeadSig, 0x41615252);
- st_dword(buf + FSI_StrucSig, 0x61417272);
- st_dword(buf + FSI_Free_Count, n_clst - 1); /* Number of free clusters */
- st_dword(buf + FSI_Nxt_Free, 2); /* Last allocated cluster# */
- st_word(buf + BS_55AA, 0xAA55);
- disk_write(pdrv, buf, b_vol + 7, 1); /* Write backup FSINFO (VBR + 7) */
- disk_write(pdrv, buf, b_vol + 1, 1); /* Write original FSINFO (VBR + 1) */
- }
-
- /* Initialize FAT area */
- mem_set(buf, 0, (UINT)szb_buf);
- sect = b_fat; /* FAT start sector */
- for (i = 0; i < n_fats; i++) { /* Initialize FATs each */
- if (fmt == FS_FAT32) {
- st_dword(buf + 0, 0xFFFFFFF8); /* Entry 0 */
- st_dword(buf + 4, 0xFFFFFFFF); /* Entry 1 */
- st_dword(buf + 8, 0x0FFFFFFF); /* Entry 2 (root directory) */
- } else {
- st_dword(buf + 0, (fmt == FS_FAT12) ? 0xFFFFF8 : 0xFFFFFFF8); /* Entry 0 and 1 */
- }
- nsect = sz_fat; /* Number of FAT sectors */
- do { /* Fill FAT sectors */
- n = (nsect > sz_buf) ? sz_buf : nsect;
- if (disk_write(pdrv, buf, sect, (UINT)n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
- mem_set(buf, 0, ss);
- sect += n; nsect -= n;
- } while (nsect);
- }
-
- /* Initialize root directory (fill with zero) */
- nsect = (fmt == FS_FAT32) ? pau : sz_dir; /* Number of root directory sectors */
- do {
- n = (nsect > sz_buf) ? sz_buf : nsect;
- if (disk_write(pdrv, buf, sect, (UINT)n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
- sect += n; nsect -= n;
- } while (nsect);
- }
-
- /* Determine system ID in the partition table */
- if (FF_FS_EXFAT && fmt == FS_EXFAT) {
- sys = 0x07; /* HPFS/NTFS/exFAT */
- } else {
- if (fmt == FS_FAT32) {
- sys = 0x0C; /* FAT32X */
- } else {
- if (sz_vol >= 0x10000) {
- sys = 0x06; /* FAT12/16 (large) */
- } else {
- sys = (fmt == FS_FAT16) ? 0x04 : 0x01; /* FAT16 : FAT12 */
- }
- }
- }
-
- /* Update partition information */
- if (FF_MULTI_PARTITION && part != 0) { /* Created in the existing partition */
- /* Update system ID in the partition table */
- if (disk_read(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Read the MBR */
- buf[MBR_Table + (part - 1) * SZ_PTE + PTE_System] = sys; /* Set system ID */
- if (disk_write(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Write it back to the MBR */
- } else { /* Created as a new single partition */
- if (!(opt & FM_SFD)) { /* Create partition table if in FDISK format */
- mem_set(buf, 0, ss);
- st_word(buf + BS_55AA, 0xAA55); /* MBR signature */
- pte = buf + MBR_Table; /* Create partition table for single partition in the drive */
- pte[PTE_Boot] = 0; /* Boot indicator */
- pte[PTE_StHead] = 1; /* Start head */
- pte[PTE_StSec] = 1; /* Start sector */
- pte[PTE_StCyl] = 0; /* Start cylinder */
- pte[PTE_System] = sys; /* System type */
- n = (b_vol + sz_vol) / (63 * 255); /* (End CHS may be invalid) */
- pte[PTE_EdHead] = 254; /* End head */
- pte[PTE_EdSec] = (BYTE)(((n >> 2) & 0xC0) | 63); /* End sector */
- pte[PTE_EdCyl] = (BYTE)n; /* End cylinder */
- st_dword(pte + PTE_StLba, b_vol); /* Start offset in LBA */
- st_dword(pte + PTE_SizLba, sz_vol); /* Size in sectors */
- if (disk_write(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Write it to the MBR */
- }
- }
-
- if (disk_ioctl(pdrv, CTRL_SYNC, 0) != RES_OK) LEAVE_MKFS(FR_DISK_ERR);
-
- LEAVE_MKFS(FR_OK);
-}
-
-
-
-#if FF_MULTI_PARTITION
-/*-----------------------------------------------------------------------*/
-/* Create Partition Table on the Physical Drive */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_fdisk (
- BYTE pdrv, /* Physical drive number */
- const DWORD* szt, /* Pointer to the size table for each partitions */
- void* work /* Pointer to the working buffer (null: use heap memory) */
-)
-{
- UINT i, n, sz_cyl, tot_cyl, b_cyl, e_cyl, p_cyl;
- BYTE s_hd, e_hd, *p, *buf = (BYTE*)work;
- DSTATUS stat;
- DWORD sz_disk, sz_part, s_part;
- FRESULT res;
-
-
- stat = disk_initialize(pdrv);
- if (stat & STA_NOINIT) return FR_NOT_READY;
- if (stat & STA_PROTECT) return FR_WRITE_PROTECTED;
- if (disk_ioctl(pdrv, GET_SECTOR_COUNT, &sz_disk)) return FR_DISK_ERR;
-
- buf = (BYTE*)work;
-#if FF_USE_LFN == 3
- if (!buf) buf = ff_memalloc(FF_MAX_SS); /* Use heap memory for working buffer */
-#endif
- if (!buf) return FR_NOT_ENOUGH_CORE;
-
- /* Determine the CHS without any consideration of the drive geometry */
- for (n = 16; n < 256 && sz_disk / n / 63 > 1024; n *= 2) ;
- if (n == 256) n--;
- e_hd = (BYTE)(n - 1);
- sz_cyl = 63 * n;
- tot_cyl = sz_disk / sz_cyl;
-
- /* Create partition table */
- mem_set(buf, 0, FF_MAX_SS);
- p = buf + MBR_Table; b_cyl = 0;
- for (i = 0; i < 4; i++, p += SZ_PTE) {
- p_cyl = (szt[i] <= 100U) ? (DWORD)tot_cyl * szt[i] / 100 : szt[i] / sz_cyl; /* Number of cylinders */
- if (p_cyl == 0) continue;
- s_part = (DWORD)sz_cyl * b_cyl;
- sz_part = (DWORD)sz_cyl * p_cyl;
- if (i == 0) { /* Exclude first track of cylinder 0 */
- s_hd = 1;
- s_part += 63; sz_part -= 63;
- } else {
- s_hd = 0;
- }
- e_cyl = b_cyl + p_cyl - 1; /* End cylinder */
- if (e_cyl >= tot_cyl) LEAVE_MKFS(FR_INVALID_PARAMETER);
-
- /* Set partition table */
- p[1] = s_hd; /* Start head */
- p[2] = (BYTE)(((b_cyl >> 2) & 0xC0) | 1); /* Start sector */
- p[3] = (BYTE)b_cyl; /* Start cylinder */
- p[4] = 0x07; /* System type (temporary setting) */
- p[5] = e_hd; /* End head */
- p[6] = (BYTE)(((e_cyl >> 2) & 0xC0) | 63); /* End sector */
- p[7] = (BYTE)e_cyl; /* End cylinder */
- st_dword(p + 8, s_part); /* Start sector in LBA */
- st_dword(p + 12, sz_part); /* Number of sectors */
-
- /* Next partition */
- b_cyl += p_cyl;
- }
- st_word(p, 0xAA55); /* MBR signature (always at offset 510) */
-
- /* Write it to the MBR */
- res = (disk_write(pdrv, buf, 0, 1) == RES_OK && disk_ioctl(pdrv, CTRL_SYNC, 0) == RES_OK) ? FR_OK : FR_DISK_ERR;
- LEAVE_MKFS(res);
-}
-
-#endif /* FF_MULTI_PARTITION */
-#endif /* FF_USE_MKFS && !FF_FS_READONLY */
-
-
-
-
-#if FF_USE_STRFUNC
-#if FF_USE_LFN && FF_LFN_UNICODE && (FF_STRF_ENCODE < 0 || FF_STRF_ENCODE > 3)
-#error Wrong FF_STRF_ENCODE setting
-#endif
-/*-----------------------------------------------------------------------*/
-/* Get a String from the File */
-/*-----------------------------------------------------------------------*/
-
-TCHAR* f_gets (
- TCHAR* buff, /* Pointer to the string buffer to read */
- int len, /* Size of string buffer (items) */
- FIL* fp /* Pointer to the file object */
-)
-{
- int nc = 0;
- TCHAR *p = buff;
- BYTE s[4];
- UINT rc;
- DWORD dc;
-#if FF_USE_LFN && FF_LFN_UNICODE && FF_STRF_ENCODE <= 2
- WCHAR wc;
-#endif
-#if FF_USE_LFN && FF_LFN_UNICODE && FF_STRF_ENCODE == 3
- UINT ct;
-#endif
-
-#if FF_USE_LFN && FF_LFN_UNICODE /* With code conversion (Unicode API) */
- /* Make a room for the character and terminator */
- if (FF_LFN_UNICODE == 1) len -= (FF_STRF_ENCODE == 0) ? 1 : 2;
- if (FF_LFN_UNICODE == 2) len -= (FF_STRF_ENCODE == 0) ? 3 : 4;
- if (FF_LFN_UNICODE == 3) len -= 1;
- while (nc < len) {
-#if FF_STRF_ENCODE == 0 /* Read a character in ANSI/OEM */
- f_read(fp, s, 1, &rc);
- if (rc != 1) break;
- wc = s[0];
- if (dbc_1st((BYTE)wc)) {
- f_read(fp, s, 1, &rc);
- if (rc != 1 || !dbc_2nd(s[0])) continue;
- wc = wc << 8 | s[0];
- }
- dc = ff_oem2uni(wc, CODEPAGE);
- if (dc == 0) continue;
-#elif FF_STRF_ENCODE == 1 || FF_STRF_ENCODE == 2 /* Read a character in UTF-16LE/BE */
- f_read(fp, s, 2, &rc);
- if (rc != 2) break;
- dc = (FF_STRF_ENCODE == 1) ? ld_word(s) : s[0] << 8 | s[1];
- if (IsSurrogateL(dc)) continue;
- if (IsSurrogateH(dc)) {
- f_read(fp, s, 2, &rc);
- if (rc != 2) break;
- wc = (FF_STRF_ENCODE == 1) ? ld_word(s) : s[0] << 8 | s[1];
- if (!IsSurrogateL(wc)) continue;
- dc = ((dc & 0x3FF) + 0x40) << 10 | (wc & 0x3FF);
- }
-#else /* Read a character in UTF-8 */
- f_read(fp, s, 1, &rc);
- if (rc != 1) break;
- dc = s[0];
- if (dc >= 0x80) { /* Multi-byte character? */
- ct = 0;
- if ((dc & 0xE0) == 0xC0) { dc &= 0x1F; ct = 1; } /* 2-byte? */
- if ((dc & 0xF0) == 0xE0) { dc &= 0x0F; ct = 2; } /* 3-byte? */
- if ((dc & 0xF8) == 0xF0) { dc &= 0x07; ct = 3; } /* 4-byte? */
- if (ct == 0) continue;
- f_read(fp, s, ct, &rc); /* Get trailing bytes */
- if (rc != ct) break;
- rc = 0;
- do { /* Merge trailing bytes */
- if ((s[rc] & 0xC0) != 0x80) break;
- dc = dc << 6 | (s[rc] & 0x3F);
- } while (++rc < ct);
- if (rc != ct || dc < 0x80 || IsSurrogate(dc) || dc >= 0x110000) continue; /* Wrong encoding? */
- }
-#endif
- if (FF_USE_STRFUNC == 2 && dc == '\r') continue; /* Strip \r off if needed */
-#if FF_LFN_UNICODE == 1 || FF_LFN_UNICODE == 3 /* Output it in UTF-16/32 encoding */
- if (FF_LFN_UNICODE == 1 && dc >= 0x10000) { /* Out of BMP at UTF-16? */
- *p++ = (TCHAR)(0xD800 | ((dc >> 10) - 0x40)); nc++; /* Make and output high surrogate */
- dc = 0xDC00 | (dc & 0x3FF); /* Make low surrogate */
- }
- *p++ = (TCHAR)dc; nc++;
- if (dc == '\n') break; /* End of line? */
-#elif FF_LFN_UNICODE == 2 /* Output it in UTF-8 encoding */
- if (dc < 0x80) { /* 1-byte */
- *p++ = (TCHAR)dc;
- nc++;
- if (dc == '\n') break; /* End of line? */
- } else {
- if (dc < 0x800) { /* 2-byte */
- *p++ = (TCHAR)(0xC0 | (dc >> 6 & 0x1F));
- *p++ = (TCHAR)(0x80 | (dc >> 0 & 0x3F));
- nc += 2;
- } else {
- if (dc < 0x10000) { /* 3-byte */
- *p++ = (TCHAR)(0xE0 | (dc >> 12 & 0x0F));
- *p++ = (TCHAR)(0x80 | (dc >> 6 & 0x3F));
- *p++ = (TCHAR)(0x80 | (dc >> 0 & 0x3F));
- nc += 3;
- } else { /* 4-byte */
- *p++ = (TCHAR)(0xF0 | (dc >> 18 & 0x07));
- *p++ = (TCHAR)(0x80 | (dc >> 12 & 0x3F));
- *p++ = (TCHAR)(0x80 | (dc >> 6 & 0x3F));
- *p++ = (TCHAR)(0x80 | (dc >> 0 & 0x3F));
- nc += 4;
- }
- }
- }
-#endif
- }
-
-#else /* Byte-by-byte without any conversion (ANSI/OEM API) */
- len -= 1; /* Make a room for the terminator */
- while (nc < len) {
- f_read(fp, s, 1, &rc);
- if (rc != 1) break;
- dc = s[0];
- if (FF_USE_STRFUNC == 2 && dc == '\r') continue;
- *p++ = (TCHAR)dc; nc++;
- if (dc == '\n') break;
- }
-#endif
-
- *p = 0; /* Terminate the string */
- return nc ? buff : 0; /* When no data read due to EOF or error, return with error. */
-}
-
-
-
-
-#if !FF_FS_READONLY
-#include
-/*-----------------------------------------------------------------------*/
-/* Put a Character to the File */
-/*-----------------------------------------------------------------------*/
-
-typedef struct { /* Putchar output buffer and work area */
- FIL *fp; /* Ptr to the writing file */
- int idx, nchr; /* Write index of buf[] (-1:error), number of encoding units written */
-#if FF_USE_LFN && FF_LFN_UNICODE == 1
- WCHAR hs;
-#elif FF_USE_LFN && FF_LFN_UNICODE == 2
- BYTE bs[4];
- UINT wi, ct;
-#endif
- BYTE buf[64]; /* Write buffer */
-} putbuff;
-
-
-static void putc_bfd ( /* Buffered write with code conversion */
- putbuff* pb,
- TCHAR c
-)
-{
- UINT n;
- int i, nc;
-#if FF_USE_LFN && FF_LFN_UNICODE
- WCHAR hs, wc;
-#if FF_LFN_UNICODE == 2
- DWORD dc;
- TCHAR *tp;
-#endif
-#endif
-
- if (FF_USE_STRFUNC == 2 && c == '\n') { /* LF -> CRLF conversion */
- putc_bfd(pb, '\r');
- }
-
- i = pb->idx; /* Write index of pb->buf[] */
- if (i < 0) return;
- nc = pb->nchr; /* Write unit counter */
-
-#if FF_USE_LFN && FF_LFN_UNICODE
-#if FF_LFN_UNICODE == 1 /* UTF-16 input */
- if (IsSurrogateH(c)) {
- pb->hs = c; return;
- }
- hs = pb->hs; pb->hs = 0;
- if (hs != 0) {
- if (!IsSurrogateL(c)) hs = 0;
- } else {
- if (IsSurrogateL(c)) return;
- }
- wc = c;
-#elif FF_LFN_UNICODE == 2 /* UTF-8 input */
- for (;;) {
- if (pb->ct == 0) { /* Out of multi-byte sequence? */
- pb->bs[pb->wi = 0] = (BYTE)c; /* Save 1st byte */
- if ((BYTE)c < 0x80) break; /* 1-byte? */
- if (((BYTE)c & 0xE0) == 0xC0) pb->ct = 1; /* 2-byte? */
- if (((BYTE)c & 0xF0) == 0xE0) pb->ct = 2; /* 3-byte? */
- if (((BYTE)c & 0xF1) == 0xF0) pb->ct = 3; /* 4-byte? */
- return;
- } else { /* In the multi-byte sequence */
- if (((BYTE)c & 0xC0) != 0x80) { /* Broken sequence? */
- pb->ct = 0; continue;
- }
- pb->bs[++pb->wi] = (BYTE)c; /* Save the trailing byte */
- if (--pb->ct == 0) break; /* End of multi-byte sequence? */
- return;
- }
- }
- tp = (TCHAR*)pb->bs;
- dc = tchar2uni(&tp); /* UTF-8 ==> UTF-16 */
- if (dc == 0xFFFFFFFF) return;
- wc = (WCHAR)dc;
- hs = (WCHAR)(dc >> 16);
-#elif FF_LFN_UNICODE == 3 /* UTF-32 input */
- if (IsSurrogate(c) || c >= 0x110000) return;
- if (c >= 0x10000) {
- hs = (WCHAR)(0xD800 | ((c >> 10) - 0x40)); /* Make high surrogate */
- wc = 0xDC00 | (c & 0x3FF); /* Make low surrogate */
- } else {
- hs = 0;
- wc = (WCHAR)c;
- }
-#endif
-
-#if FF_STRF_ENCODE == 1 /* Write a character in UTF-16LE */
- if (hs != 0) {
- st_word(&pb->buf[i], hs);
- i += 2;
- nc++;
- }
- st_word(&pb->buf[i], wc);
- i += 2;
-#elif FF_STRF_ENCODE == 2 /* Write a character in UTF-16BE */
- if (hs != 0) {
- pb->buf[i++] = (BYTE)(hs >> 8);
- pb->buf[i++] = (BYTE)hs;
- nc++;
- }
- pb->buf[i++] = (BYTE)(wc >> 8);
- pb->buf[i++] = (BYTE)wc;
-#elif FF_STRF_ENCODE == 3 /* Write it in UTF-8 */
- if (hs != 0) { /* 4-byte */
- nc += 3;
- hs = (hs & 0x3FF) + 0x40;
- pb->buf[i++] = (BYTE)(0xF0 | hs >> 8);
- pb->buf[i++] = (BYTE)(0x80 | (hs >> 2 & 0x3F));
- pb->buf[i++] = (BYTE)(0x80 | (hs & 3) << 4 | (wc >> 6 & 0x0F));
- pb->buf[i++] = (BYTE)(0x80 | (wc & 0x3F));
- } else {
- if (wc < 0x80) { /* 1-byte */
- pb->buf[i++] = (BYTE)wc;
- } else {
- if (wc < 0x800) { /* 2-byte */
- nc += 1;
- pb->buf[i++] = (BYTE)(0xC0 | wc >> 6);
- } else { /* 3-byte */
- nc += 2;
- pb->buf[i++] = (BYTE)(0xE0 | wc >> 12);
- pb->buf[i++] = (BYTE)(0x80 | (wc >> 6 & 0x3F));
- }
- pb->buf[i++] = (BYTE)(0x80 | (wc & 0x3F));
- }
- }
-#else /* Write it in ANSI/OEM */
- if (hs != 0) return;
- wc = ff_uni2oem(wc, CODEPAGE); /* UTF-16 ==> ANSI/OEM */
- if (wc == 0) return;
- if (wc >= 0x100) {
- pb->buf[i++] = (BYTE)(wc >> 8); nc++;
- }
- pb->buf[i++] = (BYTE)wc;
-#endif
-
-#else /* ANSI/OEM input (without re-encode) */
- pb->buf[i++] = (BYTE)c;
-#endif
-
- if (i >= (int)(sizeof pb->buf) - 4) { /* Write buffered characters to the file */
- f_write(pb->fp, pb->buf, (UINT)i, &n);
- i = (n == (UINT)i) ? 0 : -1;
- }
- pb->idx = i;
- pb->nchr = nc + 1;
-}
-
-
-static int putc_flush ( /* Flush left characters in the buffer */
- putbuff* pb
-)
-{
- UINT nw;
-
- if ( pb->idx >= 0 /* Flush buffered characters to the file */
- && f_write(pb->fp, pb->buf, (UINT)pb->idx, &nw) == FR_OK
- && (UINT)pb->idx == nw) return pb->nchr;
- return EOF;
-}
-
-
-static void putc_init ( /* Initialize write buffer */
- putbuff* pb,
- FIL* fp
-)
-{
- mem_set(pb, 0, sizeof (putbuff));
- pb->fp = fp;
-}
-
-
-
-int f_putc (
- TCHAR c, /* A character to be output */
- FIL* fp /* Pointer to the file object */
-)
-{
- putbuff pb;
-
-
- putc_init(&pb, fp);
- putc_bfd(&pb, c); /* Put the character */
- return putc_flush(&pb);
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Put a String to the File */
-/*-----------------------------------------------------------------------*/
-
-int f_puts (
- const TCHAR* str, /* Pointer to the string to be output */
- FIL* fp /* Pointer to the file object */
-)
-{
- putbuff pb;
-
-
- putc_init(&pb, fp);
- while (*str) putc_bfd(&pb, *str++); /* Put the string */
- return putc_flush(&pb);
-}
-
-
-
-
-/*-----------------------------------------------------------------------*/
-/* Put a Formatted String to the File */
-/*-----------------------------------------------------------------------*/
-
-int f_printf (
- FIL* fp, /* Pointer to the file object */
- const TCHAR* fmt, /* Pointer to the format string */
- ... /* Optional arguments... */
-)
-{
- va_list arp;
- putbuff pb;
- BYTE f, r;
- UINT i, j, w;
- DWORD v;
- TCHAR c, d, str[32], *p;
-
-
- putc_init(&pb, fp);
-
- va_start(arp, fmt);
-
- for (;;) {
- c = *fmt++;
- if (c == 0) break; /* End of string */
- if (c != '%') { /* Non escape character */
- putc_bfd(&pb, c);
- continue;
- }
- w = f = 0;
- c = *fmt++;
- if (c == '0') { /* Flag: '0' padding */
- f = 1; c = *fmt++;
- } else {
- if (c == '-') { /* Flag: left justified */
- f = 2; c = *fmt++;
- }
- }
- if (c == '*') { /* Minimum width by argument */
- w = va_arg(arp, int);
- c = *fmt++;
- } else {
- while (IsDigit(c)) { /* Minimum width */
- w = w * 10 + c - '0';
- c = *fmt++;
- }
- }
- if (c == 'l' || c == 'L') { /* Type prefix: Size is long int */
- f |= 4; c = *fmt++;
- }
- if (c == 0) break;
- d = c;
- if (IsLower(d)) d -= 0x20;
- switch (d) { /* Atgument type is... */
- case 'S' : /* String */
- p = va_arg(arp, TCHAR*);
- for (j = 0; p[j]; j++) ;
- if (!(f & 2)) { /* Right padded */
- while (j++ < w) putc_bfd(&pb, ' ') ;
- }
- while (*p) putc_bfd(&pb, *p++) ; /* String body */
- while (j++ < w) putc_bfd(&pb, ' ') ; /* Left padded */
- continue;
-
- case 'C' : /* Character */
- putc_bfd(&pb, (TCHAR)va_arg(arp, int)); continue;
-
- case 'B' : /* Unsigned binary */
- r = 2; break;
-
- case 'O' : /* Unsigned octal */
- r = 8; break;
-
- case 'D' : /* Signed decimal */
- case 'U' : /* Unsigned decimal */
- r = 10; break;
-
- case 'X' : /* Unsigned hexdecimal */
- r = 16; break;
-
- default: /* Unknown type (pass-through) */
- putc_bfd(&pb, c); continue;
- }
-
- /* Get an argument and put it in numeral */
- v = (f & 4) ? (DWORD)va_arg(arp, long) : ((d == 'D') ? (DWORD)(long)va_arg(arp, int) : (DWORD)va_arg(arp, unsigned int));
- if (d == 'D' && (v & 0x80000000)) {
- v = 0 - v;
- f |= 8;
- }
- i = 0;
- do {
- d = (TCHAR)(v % r); v /= r;
- if (d > 9) d += (c == 'x') ? 0x27 : 0x07;
- str[i++] = d + '0';
- } while (v && i < sizeof str / sizeof *str);
- if (f & 8) str[i++] = '-';
- j = i; d = (f & 1) ? '0' : ' ';
- if (!(f & 2)) {
- while (j++ < w) putc_bfd(&pb, d); /* Right pad */
- }
- do {
- putc_bfd(&pb, str[--i]); /* Number body */
- } while (i);
- while (j++ < w) putc_bfd(&pb, d); /* Left pad */
- }
-
- va_end(arp);
-
- return putc_flush(&pb);
-}
-
-#endif /* !FF_FS_READONLY */
-#endif /* FF_USE_STRFUNC */
-
-
-
-#if FF_CODE_PAGE == 0
-/*-----------------------------------------------------------------------*/
-/* Set Active Codepage for the Path Name */
-/*-----------------------------------------------------------------------*/
-
-FRESULT f_setcp (
- WORD cp /* Value to be set as active code page */
-)
-{
- static const WORD validcp[] = { 437, 720, 737, 771, 775, 850, 852, 857, 860, 861, 862, 863, 864, 865, 866, 869, 932, 936, 949, 950, 0};
- static const BYTE* const tables[] = {Ct437, Ct720, Ct737, Ct771, Ct775, Ct850, Ct852, Ct857, Ct860, Ct861, Ct862, Ct863, Ct864, Ct865, Ct866, Ct869, Dc932, Dc936, Dc949, Dc950, 0};
- UINT i;
-
-
- for (i = 0; validcp[i] != 0 && validcp[i] != cp; i++) ; /* Find the code page */
- if (validcp[i] != cp) return FR_INVALID_PARAMETER; /* Not found? */
-
- CodePage = cp;
- if (cp >= 900) { /* DBCS */
- ExCvt = 0;
- DbcTbl = tables[i];
- } else { /* SBCS */
- ExCvt = tables[i];
- DbcTbl = 0;
- }
- return FR_OK;
-}
-#endif /* FF_CODE_PAGE == 0 */
diff --git a/nyx/nyx_gui/libs/fatfs/ff.h b/nyx/nyx_gui/libs/fatfs/ff.h
deleted file mode 100644
index af1151f..0000000
--- a/nyx/nyx_gui/libs/fatfs/ff.h
+++ /dev/null
@@ -1,390 +0,0 @@
-/*----------------------------------------------------------------------------/
-/ FatFs - Generic FAT Filesystem module R0.13c /
-/-----------------------------------------------------------------------------/
-/
-/ Copyright (C) 2018, ChaN, all right reserved.
-/
-/ FatFs module is an open source software. Redistribution and use of FatFs in
-/ source and binary forms, with or without modification, are permitted provided
-/ that the following condition is met:
-
-/ 1. Redistributions of source code must retain the above copyright notice,
-/ this condition and the following disclaimer.
-/
-/ This software is provided by the copyright holder and contributors "AS IS"
-/ and any warranties related to this software are DISCLAIMED.
-/ The copyright owner or contributors be NOT LIABLE for any damages caused
-/ by use of this software.
-/
-/----------------------------------------------------------------------------*/
-
-
-#ifndef FF_DEFINED
-#define FF_DEFINED 86604 /* Revision ID */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "../../utils/types.h" /* Basic integer types */
-#include "ffconf.h" /* FatFs configuration options */
-
-#if FF_DEFINED != FFCONF_DEF
-#error Wrong configuration file (ffconf.h).
-#endif
-
-
-
-/* Definitions of volume management */
-
-#if FF_MULTI_PARTITION /* Multiple partition configuration */
-typedef struct {
- BYTE pd; /* Physical drive number */
- BYTE pt; /* Partition: 0:Auto detect, 1-4:Forced partition) */
-} PARTITION;
-extern PARTITION VolToPart[]; /* Volume - Partition resolution table */
-#endif
-
-#if FF_STR_VOLUME_ID
-#ifndef FF_VOLUME_STRS
-extern const char* VolumeStr[FF_VOLUMES]; /* User defied volume ID */
-#endif
-#endif
-
-
-
-/* Type of path name strings on FatFs API */
-
-#ifndef _INC_TCHAR
-#define _INC_TCHAR
-
-#if FF_USE_LFN && FF_LFN_UNICODE == 1 /* Unicode in UTF-16 encoding */
-typedef WCHAR TCHAR;
-#define _T(x) L ## x
-#define _TEXT(x) L ## x
-#elif FF_USE_LFN && FF_LFN_UNICODE == 2 /* Unicode in UTF-8 encoding */
-typedef char TCHAR;
-#define _T(x) u8 ## x
-#define _TEXT(x) u8 ## x
-#elif FF_USE_LFN && FF_LFN_UNICODE == 3 /* Unicode in UTF-32 encoding */
-typedef DWORD TCHAR;
-#define _T(x) U ## x
-#define _TEXT(x) U ## x
-#elif FF_USE_LFN && (FF_LFN_UNICODE < 0 || FF_LFN_UNICODE > 3)
-#error Wrong FF_LFN_UNICODE setting
-#else /* ANSI/OEM code in SBCS/DBCS */
-typedef char TCHAR;
-#define _T(x) x
-#define _TEXT(x) x
-#endif
-
-#endif
-
-
-
-/* Type of file size variables */
-
-#if FF_FS_EXFAT
-typedef QWORD FSIZE_t;
-#else
-typedef DWORD FSIZE_t;
-#endif
-
-
-
-/* Filesystem object structure (FATFS) */
-
-typedef struct {
- BYTE win[FF_MAX_SS]; /* Disk access window for Directory, FAT (and file data at tiny cfg) */
- BYTE fs_type; /* Filesystem type (0:not mounted) */
- BYTE pdrv; /* Associated physical drive */
- BYTE n_fats; /* Number of FATs (1 or 2) */
- BYTE wflag; /* win[] flag (b0:dirty) */
- BYTE fsi_flag; /* FSINFO flags (b7:disabled, b0:dirty) */
- WORD id; /* Volume mount ID */
- WORD n_rootdir; /* Number of root directory entries (FAT12/16) */
- WORD csize; /* Cluster size [sectors] */
-#if FF_MAX_SS != FF_MIN_SS
- WORD ssize; /* Sector size (512, 1024, 2048 or 4096) */
-#endif
-#if FF_USE_LFN
- WCHAR* lfnbuf; /* LFN working buffer */
-#endif
-#if FF_FS_EXFAT
- BYTE* dirbuf; /* Directory entry block scratchpad buffer for exFAT */
-#endif
-#if FF_FS_REENTRANT
- FF_SYNC_t sobj; /* Identifier of sync object */
-#endif
-#if !FF_FS_READONLY
- DWORD last_clst; /* Last allocated cluster */
- DWORD free_clst; /* Number of free clusters */
-#endif
-#if FF_FS_RPATH
- DWORD cdir; /* Current directory start cluster (0:root) */
-#if FF_FS_EXFAT
- DWORD cdc_scl; /* Containing directory start cluster (invalid when cdir is 0) */
- DWORD cdc_size; /* b31-b8:Size of containing directory, b7-b0: Chain status */
- DWORD cdc_ofs; /* Offset in the containing directory (invalid when cdir is 0) */
-#endif
-#endif
- DWORD n_fatent; /* Number of FAT entries (number of clusters + 2) */
- DWORD fsize; /* Size of an FAT [sectors] */
- DWORD volbase; /* Volume base sector */
- DWORD fatbase; /* FAT base sector */
- DWORD dirbase; /* Root directory base sector/cluster */
- DWORD database; /* Data base sector */
-#if FF_FS_EXFAT
- DWORD bitbase; /* Allocation bitmap base sector */
-#endif
- DWORD winsect; /* Current sector appearing in the win[] */
-} FATFS;
-
-
-
-/* Object ID and allocation information (FFOBJID) */
-
-typedef struct {
- FATFS* fs; /* Pointer to the hosting volume of this object */
- WORD id; /* Hosting volume mount ID */
- BYTE attr; /* Object attribute */
- BYTE stat; /* Object chain status (b1-0: =0:not contiguous, =2:contiguous, =3:fragmented in this session, b2:sub-directory stretched) */
- DWORD sclust; /* Object data start cluster (0:no cluster or root directory) */
- FSIZE_t objsize; /* Object size (valid when sclust != 0) */
-#if FF_FS_EXFAT
- DWORD n_cont; /* Size of first fragment - 1 (valid when stat == 3) */
- DWORD n_frag; /* Size of last fragment needs to be written to FAT (valid when not zero) */
- DWORD c_scl; /* Containing directory start cluster (valid when sclust != 0) */
- DWORD c_size; /* b31-b8:Size of containing directory, b7-b0: Chain status (valid when c_scl != 0) */
- DWORD c_ofs; /* Offset in the containing directory (valid when file object and sclust != 0) */
-#endif
-#if FF_FS_LOCK
- UINT lockid; /* File lock ID origin from 1 (index of file semaphore table Files[]) */
-#endif
-} FFOBJID;
-
-
-
-/* File object structure (FIL) */
-
-typedef struct {
-#if !FF_FS_TINY
- BYTE buf[FF_MAX_SS]; /* File private data read/write window */
-#endif
- FFOBJID obj; /* Object identifier (must be the 1st member to detect invalid object pointer) */
- BYTE flag; /* File status flags */
- BYTE err; /* Abort flag (error code) */
- FSIZE_t fptr; /* File read/write pointer (Zeroed on file open) */
- DWORD clust; /* Current cluster of fpter (invalid when fptr is 0) */
- DWORD sect; /* Sector number appearing in buf[] (0:invalid) */
-#if !FF_FS_READONLY
- DWORD dir_sect; /* Sector number containing the directory entry (not used at exFAT) */
- BYTE* dir_ptr; /* Pointer to the directory entry in the win[] (not used at exFAT) */
-#endif
-#if FF_USE_FASTSEEK
- DWORD* cltbl; /* Pointer to the cluster link map table (nulled on open, set by application) */
-#endif
-} FIL;
-
-
-
-/* Directory object structure (DIR) */
-
-typedef struct {
- FFOBJID obj; /* Object identifier */
- DWORD dptr; /* Current read/write offset */
- DWORD clust; /* Current cluster */
- DWORD sect; /* Current sector (0:Read operation has terminated) */
- BYTE* dir; /* Pointer to the directory item in the win[] */
- BYTE fn[12]; /* SFN (in/out) {body[8],ext[3],status[1]} */
-#if FF_USE_LFN
- DWORD blk_ofs; /* Offset of current entry block being processed (0xFFFFFFFF:Invalid) */
-#endif
-#if FF_USE_FIND
- const TCHAR* pat; /* Pointer to the name matching pattern */
-#endif
-} DIR;
-
-
-
-/* File information structure (FILINFO) */
-
-typedef struct {
- FSIZE_t fsize; /* File size */
- WORD fdate; /* Modified date */
- WORD ftime; /* Modified time */
- BYTE fattrib; /* File attribute */
-#if FF_USE_LFN
- TCHAR altname[FF_SFN_BUF + 1];/* Altenative file name */
- TCHAR fname[FF_LFN_BUF + 1]; /* Primary file name */
-#else
- TCHAR fname[12 + 1]; /* File name */
-#endif
-} FILINFO;
-
-
-
-/* File function return code (FRESULT) */
-
-typedef enum {
- FR_OK = 0, /* (0) Succeeded */
- FR_DISK_ERR, /* (1) A hard error occurred in the low level disk I/O layer */
- FR_INT_ERR, /* (2) Assertion failed */
- FR_NOT_READY, /* (3) The physical drive cannot work */
- FR_NO_FILE, /* (4) Could not find the file */
- FR_NO_PATH, /* (5) Could not find the path */
- FR_INVALID_NAME, /* (6) The path name format is invalid */
- FR_DENIED, /* (7) Access denied due to prohibited access or directory full */
- FR_EXIST, /* (8) Access denied due to prohibited access */
- FR_INVALID_OBJECT, /* (9) The file/directory object is invalid */
- FR_WRITE_PROTECTED, /* (10) The physical drive is write protected */
- FR_INVALID_DRIVE, /* (11) The logical drive number is invalid */
- FR_NOT_ENABLED, /* (12) The volume has no work area */
- FR_NO_FILESYSTEM, /* (13) There is no valid FAT volume */
- FR_MKFS_ABORTED, /* (14) The f_mkfs() aborted due to any problem */
- FR_TIMEOUT, /* (15) Could not get a grant to access the volume within defined period */
- FR_LOCKED, /* (16) The operation is rejected according to the file sharing policy */
- FR_NOT_ENOUGH_CORE, /* (17) LFN working buffer could not be allocated */
- FR_TOO_MANY_OPEN_FILES, /* (18) Number of open files > FF_FS_LOCK */
-#if FF_FASTFS
- FR_INVALID_PARAMETER, /* (19) Given parameter is invalid */
- FR_CLTBL_NO_INIT /* (20) The cluster table for fast seek/read/write was not created */
-#else
- FR_INVALID_PARAMETER /* (19) Given parameter is invalid */
-#endif
-} FRESULT;
-
-
-
-/*--------------------------------------------------------------*/
-/* FatFs module application interface */
-
-FRESULT f_open (FIL* fp, const TCHAR* path, BYTE mode); /* Open or create a file */
-FRESULT f_close (FIL* fp); /* Close an open file object */
-FRESULT f_read (FIL* fp, void* buff, UINT btr, UINT* br); /* Read data from the file */
-FRESULT f_write (FIL* fp, const void* buff, UINT btw, UINT* bw); /* Write data to the file */
-FRESULT f_read_fast (FIL* fp, const void* buff, UINT btr); /* Fast read data from the file */
-FRESULT f_write_fast (FIL* fp, const void* buff, UINT btw); /* Fast write data to the file */
-FRESULT f_lseek (FIL* fp, FSIZE_t ofs); /* Move file pointer of the file object */
-FRESULT f_truncate (FIL* fp); /* Truncate the file */
-FRESULT f_sync (FIL* fp); /* Flush cached data of the writing file */
-FRESULT f_opendir (DIR* dp, const TCHAR* path); /* Open a directory */
-FRESULT f_closedir (DIR* dp); /* Close an open directory */
-FRESULT f_readdir (DIR* dp, FILINFO* fno); /* Read a directory item */
-FRESULT f_findfirst (DIR* dp, FILINFO* fno, const TCHAR* path, const TCHAR* pattern); /* Find first file */
-FRESULT f_findnext (DIR* dp, FILINFO* fno); /* Find next file */
-FRESULT f_mkdir (const TCHAR* path); /* Create a sub directory */
-FRESULT f_unlink (const TCHAR* path); /* Delete an existing file or directory */
-FRESULT f_rename (const TCHAR* path_old, const TCHAR* path_new); /* Rename/Move a file or directory */
-FRESULT f_stat (const TCHAR* path, FILINFO* fno); /* Get file status */
-FRESULT f_chmod (const TCHAR* path, BYTE attr, BYTE mask); /* Change attribute of a file/dir */
-FRESULT f_utime (const TCHAR* path, const FILINFO* fno); /* Change timestamp of a file/dir */
-FRESULT f_chdir (const TCHAR* path); /* Change current directory */
-FRESULT f_chdrive (const TCHAR* path); /* Change current drive */
-FRESULT f_getcwd (TCHAR* buff, UINT len); /* Get current directory */
-FRESULT f_getfree (const TCHAR* path, DWORD* nclst, FATFS** fatfs); /* Get number of free clusters on the drive */
-FRESULT f_getlabel (const TCHAR* path, TCHAR* label, DWORD* vsn); /* Get volume label */
-FRESULT f_setlabel (const TCHAR* label); /* Set volume label */
-FRESULT f_forward (FIL* fp, UINT(*func)(const BYTE*,UINT), UINT btf, UINT* bf); /* Forward data to the stream */
-DWORD *f_expand_cltbl (FIL* fp, UINT tblsz, FSIZE_t ofs); /* Expand file and populate cluster table */
-FRESULT f_expand (FIL* fp, FSIZE_t fsz, BYTE opt); /* Allocate a contiguous block to the file */
-FRESULT f_mount (FATFS* fs, const TCHAR* path, BYTE opt); /* Mount/Unmount a logical drive */
-FRESULT f_mkfs (const TCHAR* path, BYTE opt, DWORD au, void* work, UINT len); /* Create a FAT volume */
-FRESULT f_fdisk (BYTE pdrv, const DWORD* szt, void* work); /* Divide a physical drive into some partitions */
-FRESULT f_setcp (WORD cp); /* Set current code page */
-int f_putc (TCHAR c, FIL* fp); /* Put a character to the file */
-int f_puts (const TCHAR* str, FIL* cp); /* Put a string to the file */
-int f_printf (FIL* fp, const TCHAR* str, ...); /* Put a formatted string to the file */
-TCHAR* f_gets (TCHAR* buff, int len, FIL* fp); /* Get a string from the file */
-
-#define f_eof(fp) ((int)((fp)->fptr == (fp)->obj.objsize))
-#define f_error(fp) ((fp)->err)
-#define f_tell(fp) ((fp)->fptr)
-#define f_size(fp) ((fp)->obj.objsize)
-#define f_rewind(fp) f_lseek((fp), 0)
-#define f_rewinddir(dp) f_readdir((dp), 0)
-#define f_rmdir(path) f_unlink(path)
-#define f_unmount(path) f_mount(0, path, 0)
-
-#ifndef EOF
-#define EOF (-1)
-#endif
-
-
-
-
-/*--------------------------------------------------------------*/
-/* Additional user defined functions */
-
-/* RTC function */
-#if !FF_FS_READONLY && !FF_FS_NORTC
-DWORD get_fattime (void);
-#endif
-
-/* LFN support functions */
-#if FF_USE_LFN >= 1 /* Code conversion (defined in unicode.c) */
-WCHAR ff_oem2uni (WCHAR oem, WORD cp); /* OEM code to Unicode conversion */
-WCHAR ff_uni2oem (DWORD uni, WORD cp); /* Unicode to OEM code conversion */
-DWORD ff_wtoupper (DWORD uni); /* Unicode upper-case conversion */
-#endif
-#if FF_USE_LFN == 3 /* Dynamic memory allocation */
-void* ff_memalloc (UINT msize); /* Allocate memory block */
-void ff_memfree (void* mblock); /* Free memory block */
-#endif
-
-/* Sync functions */
-#if FF_FS_REENTRANT
-int ff_cre_syncobj (BYTE vol, FF_SYNC_t* sobj); /* Create a sync object */
-int ff_req_grant (FF_SYNC_t sobj); /* Lock sync object */
-void ff_rel_grant (FF_SYNC_t sobj); /* Unlock sync object */
-int ff_del_syncobj (FF_SYNC_t sobj); /* Delete a sync object */
-#endif
-
-
-
-
-/*--------------------------------------------------------------*/
-/* Flags and offset address */
-
-
-/* File access mode and open method flags (3rd argument of f_open) */
-#define FA_READ 0x01
-#define FA_WRITE 0x02
-#define FA_OPEN_EXISTING 0x00
-#define FA_CREATE_NEW 0x04
-#define FA_CREATE_ALWAYS 0x08
-#define FA_OPEN_ALWAYS 0x10
-#define FA_OPEN_APPEND 0x30
-
-/* Fast seek controls (2nd argument of f_lseek) */
-#define CREATE_LINKMAP ((FSIZE_t)0 - 1)
-
-/* Format options (2nd argument of f_mkfs) */
-#define FM_FAT 0x01
-#define FM_FAT32 0x02
-#define FM_EXFAT 0x04
-#define FM_ANY 0x07
-#define FM_SFD 0x08
-
-/* Filesystem type (FATFS.fs_type) */
-#define FS_FAT12 1
-#define FS_FAT16 2
-#define FS_FAT32 3
-#define FS_EXFAT 4
-
-/* File attribute bits for directory entry (FILINFO.fattrib) */
-#define AM_RDO 0x01 /* Read only */
-#define AM_HID 0x02 /* Hidden */
-#define AM_SYS 0x04 /* System */
-#define AM_VOL 0x08 /* Volume */
-#define AM_DIR 0x10 /* Directory */
-#define AM_ARC 0x20 /* Archive */
-#define AM_DEV 0x40 /* Device */
-#define AM_RVD 0x80 /* Reserved */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* FF_DEFINED */
diff --git a/nyx/nyx_gui/libs/fatfs/ffunicode.c b/nyx/nyx_gui/libs/fatfs/ffunicode.c
deleted file mode 100644
index 9f03963..0000000
--- a/nyx/nyx_gui/libs/fatfs/ffunicode.c
+++ /dev/null
@@ -1,625 +0,0 @@
-/*------------------------------------------------------------------------*/
-/* Unicode handling functions for FatFs R0.13c */
-/*------------------------------------------------------------------------*/
-/* This module will occupy a huge memory in the .const section when the /
-/ FatFs is configured for LFN with DBCS. If the system has any Unicode /
-/ utilitiy for the code conversion, this module should be modified to use /
-/ that function to avoid silly memory consumption. /
-/-------------------------------------------------------------------------*/
-/*
-/ Copyright (C) 2018, ChaN, all right reserved.
-/
-/ FatFs module is an open source software. Redistribution and use of FatFs in
-/ source and binary forms, with or without modification, are permitted provided
-/ that the following condition is met:
-/
-/ 1. Redistributions of source code must retain the above copyright notice,
-/ this condition and the following disclaimer.
-/
-/ This software is provided by the copyright holder and contributors "AS IS"
-/ and any warranties related to this software are DISCLAIMED.
-/ The copyright owner or contributors be NOT LIABLE for any damages caused
-/ by use of this software.
-*/
-
-
-#include "ff.h"
-
-#if FF_USE_LFN /* This module will be blanked at non-LFN configuration */
-
-#if FF_DEFINED != 86604 /* Revision ID */
-#error Wrong include file (ff.h).
-#endif
-
-#define MERGE2(a, b) a ## b
-#define CVTBL(tbl, cp) MERGE2(tbl, cp)
-
-/*------------------------------------------------------------------------*/
-/* Code Conversion Tables */
-/*------------------------------------------------------------------------*/
-
-#if FF_CODE_PAGE == 437 || FF_CODE_PAGE == 0
-static const WCHAR uc437[] = { /* CP437(U.S.) to Unicode conversion table */
- 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
- 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
- 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
- 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
- 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
- 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 720 || FF_CODE_PAGE == 0
-static const WCHAR uc720[] = { /* CP720(Arabic) to Unicode conversion table */
- 0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9, 0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
- 0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
- 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
- 0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642, 0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
- 0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0x0650, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 737 || FF_CODE_PAGE == 0
-static const WCHAR uc737[] = { /* CP737(Greek) to Unicode conversion table */
- 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
- 0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
- 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
- 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
- 0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD, 0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
- 0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 771 || FF_CODE_PAGE == 0
-static const WCHAR uc771[] = { /* CP771(KBL) to Unicode conversion table */
- 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
- 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
- 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
- 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x0104, 0x0105, 0x010C, 0x010D,
- 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
- 0x0118, 0x0119, 0x0116, 0x0117, 0x012E, 0x012F, 0x0160, 0x0161, 0x0172, 0x0173, 0x016A, 0x016B, 0x017D, 0x017E, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 775 || FF_CODE_PAGE == 0
-static const WCHAR uc775[] = { /* CP775(Baltic) to Unicode conversion table */
- 0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107, 0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
- 0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A, 0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
- 0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6, 0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118, 0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
- 0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B, 0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
- 0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144, 0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
- 0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E, 0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 850 || FF_CODE_PAGE == 0
-static const WCHAR uc850[] = { /* CP850(Latin 1) to Unicode conversion table */
- 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
- 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
- 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
- 0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE, 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
- 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
- 0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 852 || FF_CODE_PAGE == 0
-static const WCHAR uc852[] = { /* CP852(Latin 2) to Unicode conversion table */
- 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7, 0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
- 0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A, 0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
- 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E, 0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A, 0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
- 0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE, 0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
- 0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161, 0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
- 0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 855 || FF_CODE_PAGE == 0
-static const WCHAR uc855[] = { /* CP855(Cyrillic) to Unicode conversion table */
- 0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404, 0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
- 0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C, 0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
- 0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414, 0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438, 0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
- 0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E, 0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
- 0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443, 0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
- 0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D, 0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 857 || FF_CODE_PAGE == 0
-static const WCHAR uc857[] = { /* CP857(Turkish) to Unicode conversion table */
- 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
- 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
- 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F, 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
- 0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE, 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
- 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000, 0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
- 0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 860 || FF_CODE_PAGE == 0
-static const WCHAR uc860[] = { /* CP860(Portuguese) to Unicode conversion table */
- 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E3, 0x00E0, 0x00C1, 0x00E7, 0x00EA, 0x00CA, 0x00E8, 0x00CD, 0x00D4, 0x00EC, 0x00C3, 0x00C2,
- 0x00C9, 0x00C0, 0x00C8, 0x00F4, 0x00F5, 0x00F2, 0x00DA, 0x00F9, 0x00CC, 0x00D5, 0x00DC, 0x00A2, 0x00A3, 0x00D9, 0x20A7, 0x00D3,
- 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x00D2, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
- 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
- 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
- 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 861 || FF_CODE_PAGE == 0
-static const WCHAR uc861[] = { /* CP861(Icelandic) to Unicode conversion table */
- 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E6, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00D0, 0x00F0, 0x00DE, 0x00C4, 0x00C5,
- 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00FE, 0x00FB, 0x00DD, 0x00FD, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x20A7, 0x0192,
- 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00C1, 0x00CD, 0x00D3, 0x00DA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
- 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
- 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
- 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 862 || FF_CODE_PAGE == 0
-static const WCHAR uc862[] = { /* CP862(Hebrew) to Unicode conversion table */
- 0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
- 0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, 0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
- 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
- 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
- 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
- 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 863 || FF_CODE_PAGE == 0
-static const WCHAR uc863[] = { /* CP863(Canadian French) to Unicode conversion table */
- 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00C2, 0x00E0, 0x00B6, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x2017, 0x00C0,
- 0x00C9, 0x00C8, 0x00CA, 0x00F4, 0x00CB, 0x00CF, 0x00FB, 0x00F9, 0x00A4, 0x00D4, 0x00DC, 0x00A2, 0x00A3, 0x00D9, 0x00DB, 0x0192,
- 0x00A6, 0x00B4, 0x00F3, 0x00FA, 0x00A8, 0x00BB, 0x00B3, 0x00AF, 0x00CE, 0x3210, 0x00AC, 0x00BD, 0x00BC, 0x00BE, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
- 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
- 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2219,
- 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 864 || FF_CODE_PAGE == 0
-static const WCHAR uc864[] = { /* CP864(Arabic) to Unicode conversion table */
- 0x00B0, 0x00B7, 0x2219, 0x221A, 0x2592, 0x2500, 0x2502, 0x253C, 0x2524, 0x252C, 0x251C, 0x2534, 0x2510, 0x250C, 0x2514, 0x2518,
- 0x03B2, 0x221E, 0x03C6, 0x00B1, 0x00BD, 0x00BC, 0x2248, 0x00AB, 0x00BB, 0xFEF7, 0xFEF8, 0x0000, 0x0000, 0xFEFB, 0xFEFC, 0x0000,
- 0x00A0, 0x00AD, 0xFE82, 0x00A3, 0x00A4, 0xFE84, 0x0000, 0x20AC, 0xFE8E, 0xFE8F, 0xFE95, 0xFE99, 0x060C, 0xFE9D, 0xFEA1, 0xFEA5,
- 0x0660, 0x0661, 0x0662, 0x0663, 0x0664, 0x0665, 0x0666, 0x0667, 0x0668, 0x0669, 0xFED1, 0x061B, 0xFEB1, 0xFEB5, 0xFEB9, 0x061F,
- 0x00A2, 0xFE80, 0xFE81, 0xFE83, 0xFE85, 0xFECA, 0xFE8B, 0xFE8D, 0xFE91, 0xFE93, 0xFE97, 0xFE9B, 0xFE9F, 0xFEA3, 0xFEA7, 0xFEA9,
- 0xFEAB, 0xFEAD, 0xFEAF, 0xFEB3, 0xFEB7, 0xFEBB, 0xFEBF, 0xFEC1, 0xFEC5, 0xFECB, 0xFECF, 0x00A6, 0x00AC, 0x00F7, 0x00D7, 0xFEC9,
- 0x0640, 0xFED3, 0xFED7, 0xFEDB, 0xFEDF, 0xFEE3, 0xFEE7, 0xFEEB, 0xFEED, 0xFEEF, 0xFEF3, 0xFEBD, 0xFECC, 0xFECE, 0xFECD, 0xFEE1,
- 0xFE7D, 0x0651, 0xFEE5, 0xFEE9, 0xFEEC, 0xFEF0, 0xFEF2, 0xFED0, 0xFED5, 0xFEF5, 0xFEF6, 0xFEDD, 0xFED9, 0xFEF1, 0x25A0, 0x0000
-};
-#endif
-#if FF_CODE_PAGE == 865 || FF_CODE_PAGE == 0
-static const WCHAR uc865[] = { /* CP865(Nordic) to Unicode conversion table */
- 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
- 0x00C5, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x20A7, 0x0192,
- 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00A4,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
- 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
- 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
- 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 866 || FF_CODE_PAGE == 0
-static const WCHAR uc866[] = { /* CP866(Russian) to Unicode conversion table */
- 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
- 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
- 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
- 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
- 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
- 0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
-};
-#endif
-#if FF_CODE_PAGE == 869 || FF_CODE_PAGE == 0
-static const WCHAR uc869[] = { /* CP869(Greek 2) to Unicode conversion table */
- 0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x0386, 0x00B7, 0x00B7, 0x00AC, 0x00A6, 0x2018, 0x2019, 0x0388, 0x2015, 0x0389,
- 0x038A, 0x03AA, 0x038C, 0x00B7, 0x00B7, 0x038E, 0x03AB, 0x00A9, 0x038F, 0x00B2, 0x00B3, 0x03AC, 0x00A3, 0x03AD, 0x03AE, 0x03AF,
- 0x03CA, 0x0390, 0x03CC, 0x03CD, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x00BD, 0x0398, 0x0399, 0x00AB, 0x00BB,
- 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x039A, 0x039B, 0x039C, 0x039D, 0x2563, 0x2551, 0x2557, 0x255D, 0x039E, 0x039F, 0x2510,
- 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0A30, 0x03A1, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x03A3,
- 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, 0x03B1, 0x03B2, 0x03B3, 0x2518, 0x250C, 0x2588, 0x2584, 0x03B4, 0x03B5, 0x2580,
- 0x03B6, 0x03B7, 0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x0384,
- 0x00AD, 0x00B1, 0x03C5, 0x03C6, 0x03C7, 0x00A7, 0x03C8, 0x0385, 0x00B0, 0x00A8, 0x03C9, 0x03CB, 0x03B0, 0x03CE, 0x25A0, 0x00A0
-};
-#endif
-
-
-
-
-/*------------------------------------------------------------------------*/
-/* OEM <==> Unicode conversions for static code page configuration */
-/* SBCS fixed code page */
-/*------------------------------------------------------------------------*/
-
-#if FF_CODE_PAGE != 0 && FF_CODE_PAGE < 900
-WCHAR ff_uni2oem ( /* Returns OEM code character, zero on error */
- DWORD uni, /* UTF-16 encoded character to be converted */
- WORD cp /* Code page for the conversion */
-)
-{
- WCHAR c = 0;
- const WCHAR *p = CVTBL(uc, FF_CODE_PAGE);
-
-
- if (uni < 0x80) { /* ASCII? */
- c = (WCHAR)uni;
-
- } else { /* Non-ASCII */
- if (uni < 0x10000 && cp == FF_CODE_PAGE) { /* Is it in BMP and valid code page? */
- for (c = 0; c < 0x80 && uni != p[c]; c++) ;
- c = (c + 0x80) & 0xFF;
- }
- }
-
- return c;
-}
-
-WCHAR ff_oem2uni ( /* Returns Unicode character, zero on error */
- WCHAR oem, /* OEM code to be converted */
- WORD cp /* Code page for the conversion */
-)
-{
- WCHAR c = 0;
- const WCHAR *p = CVTBL(uc, FF_CODE_PAGE);
-
-
- if (oem < 0x80) { /* ASCII? */
- c = oem;
-
- } else { /* Extended char */
- if (cp == FF_CODE_PAGE) { /* Is it a valid code page? */
- if (oem < 0x100) c = p[oem - 0x80];
- }
- }
-
- return c;
-}
-
-#endif
-
-
-
-/*------------------------------------------------------------------------*/
-/* OEM <==> Unicode conversions for static code page configuration */
-/* DBCS fixed code page */
-/*------------------------------------------------------------------------*/
-
-#if FF_CODE_PAGE >= 900
-WCHAR ff_uni2oem ( /* Returns OEM code character, zero on error */
- DWORD uni, /* UTF-16 encoded character to be converted */
- WORD cp /* Code page for the conversion */
-)
-{
- const WCHAR *p;
- WCHAR c = 0, uc;
- UINT i = 0, n, li, hi;
-
-
- if (uni < 0x80) { /* ASCII? */
- c = (WCHAR)uni;
-
- } else { /* Non-ASCII */
- if (uni < 0x10000 && cp == FF_CODE_PAGE) { /* Is it in BMP and valid code page? */
- uc = (WCHAR)uni;
- p = CVTBL(uni2oem, FF_CODE_PAGE);
- hi = sizeof CVTBL(uni2oem, FF_CODE_PAGE) / 4 - 1;
- li = 0;
- for (n = 16; n; n--) {
- i = li + (hi - li) / 2;
- if (uc == p[i * 2]) break;
- if (uc > p[i * 2]) {
- li = i;
- } else {
- hi = i;
- }
- }
- if (n != 0) c = p[i * 2 + 1];
- }
- }
-
- return c;
-}
-
-
-WCHAR ff_oem2uni ( /* Returns Unicode character, zero on error */
- WCHAR oem, /* OEM code to be converted */
- WORD cp /* Code page for the conversion */
-)
-{
- const WCHAR *p;
- WCHAR c = 0;
- UINT i = 0, n, li, hi;
-
-
- if (oem < 0x80) { /* ASCII? */
- c = oem;
-
- } else { /* Extended char */
- if (cp == FF_CODE_PAGE) { /* Is it valid code page? */
- p = CVTBL(oem2uni, FF_CODE_PAGE);
- hi = sizeof CVTBL(oem2uni, FF_CODE_PAGE) / 4 - 1;
- li = 0;
- for (n = 16; n; n--) {
- i = li + (hi - li) / 2;
- if (oem == p[i * 2]) break;
- if (oem > p[i * 2]) {
- li = i;
- } else {
- hi = i;
- }
- }
- if (n != 0) c = p[i * 2 + 1];
- }
- }
-
- return c;
-}
-#endif
-
-
-
-/*------------------------------------------------------------------------*/
-/* OEM <==> Unicode conversions for dynamic code page configuration */
-/*------------------------------------------------------------------------*/
-
-#if FF_CODE_PAGE == 0
-
-static const WORD cp_code[] = { 437, 720, 737, 771, 775, 850, 852, 855, 857, 860, 861, 862, 863, 864, 865, 866, 869, 0};
-static const WCHAR* const cp_table[] = {uc437, uc720, uc737, uc771, uc775, uc850, uc852, uc855, uc857, uc860, uc861, uc862, uc863, uc864, uc865, uc866, uc869, 0};
-
-
-WCHAR ff_uni2oem ( /* Returns OEM code character, zero on error */
- DWORD uni, /* UTF-16 encoded character to be converted */
- WORD cp /* Code page for the conversion */
-)
-{
- const WCHAR *p;
- WCHAR c = 0, uc;
- UINT i, n, li, hi;
-
-
- if (uni < 0x80) { /* ASCII? */
- c = (WCHAR)uni;
-
- } else { /* Non-ASCII */
- if (uni < 0x10000) { /* Is it in BMP? */
- uc = (WCHAR)uni;
- p = 0;
- if (cp < 900) { /* SBCS */
- for (i = 0; cp_code[i] != 0 && cp_code[i] != cp; i++) ; /* Get conversion table */
- p = cp_table[i];
- if (p) { /* Is it valid code page ? */
- for (c = 0; c < 0x80 && uc != p[c]; c++) ; /* Find OEM code in the table */
- c = (c + 0x80) & 0xFF;
- }
- } else { /* DBCS */
- switch (cp) { /* Get conversion table */
- case 932 : p = uni2oem932; hi = sizeof uni2oem932 / 4 - 1; break;
- case 936 : p = uni2oem936; hi = sizeof uni2oem936 / 4 - 1; break;
- case 949 : p = uni2oem949; hi = sizeof uni2oem949 / 4 - 1; break;
- case 950 : p = uni2oem950; hi = sizeof uni2oem950 / 4 - 1; break;
- }
- if (p) { /* Is it valid code page? */
- li = 0;
- for (n = 16; n; n--) { /* Find OEM code */
- i = li + (hi - li) / 2;
- if (uc == p[i * 2]) break;
- if (uc > p[i * 2]) {
- li = i;
- } else {
- hi = i;
- }
- }
- if (n != 0) c = p[i * 2 + 1];
- }
- }
- }
- }
-
- return c;
-}
-
-
-WCHAR ff_oem2uni ( /* Returns Unicode character, zero on error */
- WCHAR oem, /* OEM code to be converted (DBC if >=0x100) */
- WORD cp /* Code page for the conversion */
-)
-{
- const WCHAR *p;
- WCHAR c = 0;
- UINT i, n, li, hi;
-
-
- if (oem < 0x80) { /* ASCII? */
- c = oem;
-
- } else { /* Extended char */
- p = 0;
- if (cp < 900) { /* SBCS */
- for (i = 0; cp_code[i] != 0 && cp_code[i] != cp; i++) ; /* Get table */
- p = cp_table[i];
- if (p) { /* Is it a valid CP ? */
- if (oem < 0x100) c = p[oem - 0x80];
- }
- } else { /* DBCS */
- switch (cp) {
- case 932 : p = oem2uni932; hi = sizeof oem2uni932 / 4 - 1; break;
- case 936 : p = oem2uni936; hi = sizeof oem2uni936 / 4 - 1; break;
- case 949 : p = oem2uni949; hi = sizeof oem2uni949 / 4 - 1; break;
- case 950 : p = oem2uni950; hi = sizeof oem2uni950 / 4 - 1; break;
- }
- if (p) {
- li = 0;
- for (n = 16; n; n--) {
- i = li + (hi - li) / 2;
- if (oem == p[i * 2]) break;
- if (oem > p[i * 2]) {
- li = i;
- } else {
- hi = i;
- }
- }
- if (n != 0) c = p[i * 2 + 1];
- }
- }
- }
-
- return c;
-}
-#endif
-
-
-
-/*------------------------------------------------------------------------*/
-/* Unicode up-case conversion */
-/*------------------------------------------------------------------------*/
-
-DWORD ff_wtoupper ( /* Returns up-converted code point */
- DWORD uni /* Unicode code point to be up-converted */
-)
-{
- const WORD *p;
- WORD uc, bc, nc, cmd;
- static const WORD cvt1[] = { /* Compressed up conversion table for U+0000 - U+0FFF */
- /* Basic Latin */
- 0x0061,0x031A,
- /* Latin-1 Supplement */
- 0x00E0,0x0317,
- 0x00F8,0x0307,
- 0x00FF,0x0001,0x0178,
- /* Latin Extended-A */
- 0x0100,0x0130,
- 0x0132,0x0106,
- 0x0139,0x0110,
- 0x014A,0x012E,
- 0x0179,0x0106,
- /* Latin Extended-B */
- 0x0180,0x004D,0x0243,0x0181,0x0182,0x0182,0x0184,0x0184,0x0186,0x0187,0x0187,0x0189,0x018A,0x018B,0x018B,0x018D,0x018E,0x018F,0x0190,0x0191,0x0191,0x0193,0x0194,0x01F6,0x0196,0x0197,0x0198,0x0198,0x023D,0x019B,0x019C,0x019D,0x0220,0x019F,0x01A0,0x01A0,0x01A2,0x01A2,0x01A4,0x01A4,0x01A6,0x01A7,0x01A7,0x01A9,0x01AA,0x01AB,0x01AC,0x01AC,0x01AE,0x01AF,0x01AF,0x01B1,0x01B2,0x01B3,0x01B3,0x01B5,0x01B5,0x01B7,0x01B8,0x01B8,0x01BA,0x01BB,0x01BC,0x01BC,0x01BE,0x01F7,0x01C0,0x01C1,0x01C2,0x01C3,0x01C4,0x01C5,0x01C4,0x01C7,0x01C8,0x01C7,0x01CA,0x01CB,0x01CA,
- 0x01CD,0x0110,
- 0x01DD,0x0001,0x018E,
- 0x01DE,0x0112,
- 0x01F3,0x0003,0x01F1,0x01F4,0x01F4,
- 0x01F8,0x0128,
- 0x0222,0x0112,
- 0x023A,0x0009,0x2C65,0x023B,0x023B,0x023D,0x2C66,0x023F,0x0240,0x0241,0x0241,
- 0x0246,0x010A,
- /* IPA Extensions */
- 0x0253,0x0040,0x0181,0x0186,0x0255,0x0189,0x018A,0x0258,0x018F,0x025A,0x0190,0x025C,0x025D,0x025E,0x025F,0x0193,0x0261,0x0262,0x0194,0x0264,0x0265,0x0266,0x0267,0x0197,0x0196,0x026A,0x2C62,0x026C,0x026D,0x026E,0x019C,0x0270,0x0271,0x019D,0x0273,0x0274,0x019F,0x0276,0x0277,0x0278,0x0279,0x027A,0x027B,0x027C,0x2C64,0x027E,0x027F,0x01A6,0x0281,0x0282,0x01A9,0x0284,0x0285,0x0286,0x0287,0x01AE,0x0244,0x01B1,0x01B2,0x0245,0x028D,0x028E,0x028F,0x0290,0x0291,0x01B7,
- /* Greek, Coptic */
- 0x037B,0x0003,0x03FD,0x03FE,0x03FF,
- 0x03AC,0x0004,0x0386,0x0388,0x0389,0x038A,
- 0x03B1,0x0311,
- 0x03C2,0x0002,0x03A3,0x03A3,
- 0x03C4,0x0308,
- 0x03CC,0x0003,0x038C,0x038E,0x038F,
- 0x03D8,0x0118,
- 0x03F2,0x000A,0x03F9,0x03F3,0x03F4,0x03F5,0x03F6,0x03F7,0x03F7,0x03F9,0x03FA,0x03FA,
- /* Cyrillic */
- 0x0430,0x0320,
- 0x0450,0x0710,
- 0x0460,0x0122,
- 0x048A,0x0136,
- 0x04C1,0x010E,
- 0x04CF,0x0001,0x04C0,
- 0x04D0,0x0144,
- /* Armenian */
- 0x0561,0x0426,
-
- 0x0000 /* EOT */
- };
- static const WORD cvt2[] = { /* Compressed up conversion table for U+1000 - U+FFFF */
- /* Phonetic Extensions */
- 0x1D7D,0x0001,0x2C63,
- /* Latin Extended Additional */
- 0x1E00,0x0196,
- 0x1EA0,0x015A,
- /* Greek Extended */
- 0x1F00,0x0608,
- 0x1F10,0x0606,
- 0x1F20,0x0608,
- 0x1F30,0x0608,
- 0x1F40,0x0606,
- 0x1F51,0x0007,0x1F59,0x1F52,0x1F5B,0x1F54,0x1F5D,0x1F56,0x1F5F,
- 0x1F60,0x0608,
- 0x1F70,0x000E,0x1FBA,0x1FBB,0x1FC8,0x1FC9,0x1FCA,0x1FCB,0x1FDA,0x1FDB,0x1FF8,0x1FF9,0x1FEA,0x1FEB,0x1FFA,0x1FFB,
- 0x1F80,0x0608,
- 0x1F90,0x0608,
- 0x1FA0,0x0608,
- 0x1FB0,0x0004,0x1FB8,0x1FB9,0x1FB2,0x1FBC,
- 0x1FCC,0x0001,0x1FC3,
- 0x1FD0,0x0602,
- 0x1FE0,0x0602,
- 0x1FE5,0x0001,0x1FEC,
- 0x1FF3,0x0001,0x1FFC,
- /* Letterlike Symbols */
- 0x214E,0x0001,0x2132,
- /* Number forms */
- 0x2170,0x0210,
- 0x2184,0x0001,0x2183,
- /* Enclosed Alphanumerics */
- 0x24D0,0x051A,
- 0x2C30,0x042F,
- /* Latin Extended-C */
- 0x2C60,0x0102,
- 0x2C67,0x0106, 0x2C75,0x0102,
- /* Coptic */
- 0x2C80,0x0164,
- /* Georgian Supplement */
- 0x2D00,0x0826,
- /* Full-width */
- 0xFF41,0x031A,
-
- 0x0000 /* EOT */
- };
-
-
- if (uni < 0x10000) { /* Is it in BMP? */
- uc = (WORD)uni;
- p = uc < 0x1000 ? cvt1 : cvt2;
- for (;;) {
- bc = *p++; /* Get the block base */
- if (bc == 0 || uc < bc) break; /* Not matched? */
- nc = *p++; cmd = nc >> 8; nc &= 0xFF; /* Get processing command and block size */
- if (uc < bc + nc) { /* In the block? */
- switch (cmd) {
- case 0: uc = p[uc - bc]; break; /* Table conversion */
- case 1: uc -= (uc - bc) & 1; break; /* Case pairs */
- case 2: uc -= 16; break; /* Shift -16 */
- case 3: uc -= 32; break; /* Shift -32 */
- case 4: uc -= 48; break; /* Shift -48 */
- case 5: uc -= 26; break; /* Shift -26 */
- case 6: uc += 8; break; /* Shift +8 */
- case 7: uc -= 80; break; /* Shift -80 */
- case 8: uc -= 0x1C60; break; /* Shift -0x1C60 */
- }
- break;
- }
- if (cmd == 0) p += nc; /* Skip table if needed */
- }
- uni = uc;
- }
-
- return uni;
-}
-
-#endif /* #if FF_USE_LFN */
diff --git a/nyx/nyx_gui/mem/emc.h b/nyx/nyx_gui/mem/emc.h
deleted file mode 100644
index 9be6fe8..0000000
--- a/nyx/nyx_gui/mem/emc.h
+++ /dev/null
@@ -1,693 +0,0 @@
-/*
- * arch/arm/mach-tegra/tegra21_emc.h
- *
- * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
- * Copyright (c) 2019-2020, CTCaer.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
- *
- */
-
-#ifndef _EMC_H_
-#define _EMC_H_
-
-#define EMC_DBG 0x8
-#define EMC_CFG 0xC
-#define EMC_CONFIG_SAMPLE_DELAY 0x5f0
-#define EMC_CFG_UPDATE 0x5f4
-#define EMC_ADR_CFG 0x10
-#define EMC_REFCTRL 0x20
-#define EMC_PIN 0x24
-#define EMC_TIMING_CONTROL 0x28
-#define EMC_RC 0x2c
-#define EMC_RFC 0x30
-#define EMC_RFCPB 0x590
-#define EMC_RAS 0x34
-#define EMC_RP 0x38
-#define EMC_R2W 0x3c
-#define EMC_W2R 0x40
-#define EMC_R2P 0x44
-#define EMC_W2P 0x48
-#define EMC_CCDMW 0x5c0
-#define EMC_RD_RCD 0x4c
-#define EMC_WR_RCD 0x50
-#define EMC_RRD 0x54
-#define EMC_REXT 0x58
-#define EMC_WDV 0x5c
-#define EMC_QUSE 0x60
-#define EMC_QRST 0x64
-#define EMC_ISSUE_QRST 0x428
-#define EMC_QSAFE 0x68
-#define EMC_RDV 0x6c
-#define EMC_REFRESH 0x70
-#define EMC_BURST_REFRESH_NUM 0x74
-#define EMC_PDEX2WR 0x78
-#define EMC_PDEX2RD 0x7c
-#define EMC_PDEX2CKE 0x118
-#define EMC_PCHG2PDEN 0x80
-#define EMC_ACT2PDEN 0x84
-#define EMC_AR2PDEN 0x88
-#define EMC_RW2PDEN 0x8c
-#define EMC_CKE2PDEN 0x11c
-#define EMC_TXSR 0x90
-#define EMC_TCKE 0x94
-#define EMC_TFAW 0x98
-#define EMC_TRPAB 0x9c
-#define EMC_TCLKSTABLE 0xa0
-#define EMC_TCLKSTOP 0xa4
-#define EMC_TREFBW 0xa8
-#define EMC_TPPD 0xac
-#define EMC_PDEX2MRR 0xb4
-#define EMC_ODT_WRITE 0xb0
-#define EMC_WEXT 0xb8
-#define EMC_RFC_SLR 0xc0
-#define EMC_MRS_WAIT_CNT2 0xc4
-#define EMC_MRS_WAIT_CNT 0xc8
-#define EMC_MRS 0xcc
-#define EMC_EMRS 0xd0
-#define EMC_REF 0xd4
-#define EMC_PRE 0xd8
-#define EMC_NOP 0xdc
-#define EMC_SELF_REF 0xe0
-#define EMC_DPD 0xe4
-#define EMC_MRW 0xe8
-#define EMC_MRR 0xec
-#define EMC_CMDQ 0xf0
-#define EMC_MC2EMCQ 0xf4
-#define EMC_FBIO_SPARE 0x100
-#define EMC_FBIO_CFG5 0x104
-#define EMC_CFG_RSV 0x120
-#define EMC_ACPD_CONTROL 0x124
-#define EMC_MPC 0x128
-#define EMC_EMRS2 0x12c
-#define EMC_EMRS3 0x130
-#define EMC_MRW2 0x134
-#define EMC_MRW3 0x138
-#define EMC_MRW4 0x13c
-#define EMC_MRW5 0x4a0
-#define EMC_MRW6 0x4a4
-#define EMC_MRW7 0x4a8
-#define EMC_MRW8 0x4ac
-#define EMC_MRW9 0x4b0
-#define EMC_MRW10 0x4b4
-#define EMC_MRW11 0x4b8
-#define EMC_MRW12 0x4bc
-#define EMC_MRW13 0x4c0
-#define EMC_MRW14 0x4c4
-#define EMC_MRW15 0x4d0
-#define EMC_CFG_SYNC 0x4d4
-#define EMC_CLKEN_OVERRIDE 0x140
-#define EMC_R2R 0x144
-#define EMC_W2W 0x148
-#define EMC_EINPUT 0x14c
-#define EMC_EINPUT_DURATION 0x150
-#define EMC_PUTERM_EXTRA 0x154
-#define EMC_TCKESR 0x158
-#define EMC_TPD 0x15c
-#define EMC_STAT_CONTROL 0x160
-#define EMC_STAT_STATUS 0x164
-#define EMC_STAT_DRAM_CLOCK_LIMIT_LO 0x19c
-#define EMC_STAT_DRAM_CLOCK_LIMIT_HI 0x1a0
-#define EMC_STAT_DRAM_CLOCKS_LO 0x1a4
-#define EMC_STAT_DRAM_CLOCKS_HI 0x1a8
-#define EMC_STAT_DRAM_DEV0_ACTIVATE_CNT_LO 0x1ac
-#define EMC_STAT_DRAM_DEV0_ACTIVATE_CNT_HI 0x1b0
-#define EMC_STAT_DRAM_DEV0_READ_CNT_LO 0x1b4
-#define EMC_STAT_DRAM_DEV0_READ_CNT_HI 0x1b8
-#define EMC_STAT_DRAM_DEV0_READ8_CNT_LO 0x1bc
-#define EMC_STAT_DRAM_DEV0_READ8_CNT_HI 0x1c0
-#define EMC_STAT_DRAM_DEV0_WRITE_CNT_LO 0x1c4
-#define EMC_STAT_DRAM_DEV0_WRITE_CNT_HI 0x1c8
-#define EMC_STAT_DRAM_DEV0_WRITE8_CNT_LO 0x1cc
-#define EMC_STAT_DRAM_DEV0_WRITE8_CNT_HI 0x1d0
-#define EMC_STAT_DRAM_DEV0_REF_CNT_LO 0x1d4
-#define EMC_STAT_DRAM_DEV0_REF_CNT_HI 0x1d8
-#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x1dc
-#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x1e0
-#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x1e4
-#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x1e8
-#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x1ec
-#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x1f0
-#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x1f4
-#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x1f8
-#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x1fc
-#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x200
-#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x204
-#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x208
-#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x20c
-#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x210
-#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x214
-#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x218
-#define EMC_STAT_DRAM_DEV0_SR_CKE_EQ0_CLKS_LO 0x21c
-#define EMC_STAT_DRAM_DEV0_SR_CKE_EQ0_CLKS_HI 0x220
-#define EMC_STAT_DRAM_DEV0_DSR 0x224
-#define EMC_STAT_DRAM_DEV1_ACTIVATE_CNT_LO 0x228
-#define EMC_STAT_DRAM_DEV1_ACTIVATE_CNT_HI 0x22c
-#define EMC_STAT_DRAM_DEV1_READ_CNT_LO 0x230
-#define EMC_STAT_DRAM_DEV1_READ_CNT_HI 0x234
-#define EMC_STAT_DRAM_DEV1_READ8_CNT_LO 0x238
-#define EMC_STAT_DRAM_DEV1_READ8_CNT_HI 0x23c
-#define EMC_STAT_DRAM_DEV1_WRITE_CNT_LO 0x240
-#define EMC_STAT_DRAM_DEV1_WRITE_CNT_HI 0x244
-#define EMC_STAT_DRAM_DEV1_WRITE8_CNT_LO 0x248
-#define EMC_STAT_DRAM_DEV1_WRITE8_CNT_HI 0x24c
-#define EMC_STAT_DRAM_DEV1_REF_CNT_LO 0x250
-#define EMC_STAT_DRAM_DEV1_REF_CNT_HI 0x254
-#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x258
-#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x25c
-#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x260
-#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x264
-#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x268
-#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x26c
-#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x270
-#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x274
-#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x278
-#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x27c
-#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x280
-#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x284
-#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x288
-#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x28c
-#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x290
-#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x294
-#define EMC_STAT_DRAM_DEV1_SR_CKE_EQ0_CLKS_LO 0x298
-#define EMC_STAT_DRAM_DEV1_SR_CKE_EQ0_CLKS_HI 0x29c
-#define EMC_STAT_DRAM_DEV1_DSR 0x2a0
-#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0xc8c
-#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0xc90
-#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0xc94
-#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0xc98
-#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0xc9c
-#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0xca0
-#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0xca4
-#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0xca8
-#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0xcac
-#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0xcb0
-#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0xcb4
-#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0xcb8
-#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0xcbc
-#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0xcc0
-#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0xcc4
-#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0xcc8
-#define EMC_STAT_DRAM_IO_SR_CKE_EQ0_CLKS_LO 0xccc
-#define EMC_STAT_DRAM_IO_SR_CKE_EQ0_CLKS_HI 0xcd0
-#define EMC_STAT_DRAM_IO_DSR 0xcd4
-#define EMC_AUTO_CAL_CONFIG 0x2a4
-#define EMC_AUTO_CAL_CONFIG2 0x458
-#define EMC_AUTO_CAL_CONFIG3 0x45c
-#define EMC_AUTO_CAL_CONFIG4 0x5b0
-#define EMC_AUTO_CAL_CONFIG5 0x5b4
-#define EMC_AUTO_CAL_CONFIG6 0x5cc
-#define EMC_AUTO_CAL_CONFIG7 0x574
-#define EMC_AUTO_CAL_CONFIG8 0x2dc
-#define EMC_AUTO_CAL_VREF_SEL_0 0x2f8
-#define EMC_AUTO_CAL_VREF_SEL_1 0x300
-#define EMC_AUTO_CAL_INTERVAL 0x2a8
-#define EMC_AUTO_CAL_STATUS 0x2ac
-#define EMC_AUTO_CAL_STATUS2 0x3d4
-#define EMC_AUTO_CAL_CHANNEL 0x464
-#define EMC_PMACRO_RX_TERM 0xc48
-#define EMC_PMACRO_DQ_TX_DRV 0xc70
-#define EMC_PMACRO_CA_TX_DRV 0xc74
-#define EMC_PMACRO_CMD_TX_DRV 0xc4c
-#define EMC_PMACRO_AUTOCAL_CFG_0 0x700
-#define EMC_PMACRO_AUTOCAL_CFG_1 0x704
-#define EMC_PMACRO_AUTOCAL_CFG_2 0x708
-#define EMC_PMACRO_AUTOCAL_CFG_COMMON 0xc78
-#define EMC_PMACRO_ZCTRL 0xc44
-#define EMC_XM2COMPPADCTRL 0x30c
-#define EMC_XM2COMPPADCTRL2 0x578
-#define EMC_XM2COMPPADCTRL3 0x2f4
-#define EMC_COMP_PAD_SW_CTRL 0x57c
-#define EMC_REQ_CTRL 0x2b0
-#define EMC_EMC_STATUS 0x2b4
-#define EMC_STATUS_MRR_DIVLD (1 << 20)
-#define EMC_CFG_2 0x2b8
-#define EMC_CFG_DIG_DLL 0x2bc
-#define EMC_CFG_DIG_DLL_PERIOD 0x2c0
-#define EMC_DIG_DLL_STATUS 0x2c4
-#define EMC_CFG_DIG_DLL_1 0x2c8
-#define EMC_RDV_MASK 0x2cc
-#define EMC_WDV_MASK 0x2d0
-#define EMC_RDV_EARLY_MASK 0x2d4
-#define EMC_RDV_EARLY 0x2d8
-#define EMC_WDV_CHK 0x4e0
-#define EMC_ZCAL_INTERVAL 0x2e0
-#define EMC_ZCAL_WAIT_CNT 0x2e4
-#define EMC_ZCAL_MRW_CMD 0x2e8
-#define EMC_ZQ_CAL 0x2ec
-#define EMC_SCRATCH0 0x324
-#define EMC_STALL_THEN_EXE_BEFORE_CLKCHANGE 0x3c8
-#define EMC_STALL_THEN_EXE_AFTER_CLKCHANGE 0x3cc
-#define EMC_UNSTALL_RW_AFTER_CLKCHANGE 0x3d0
-#define EMC_FDPD_CTRL_CMD_NO_RAMP 0x4d8
-#define EMC_SEL_DPD_CTRL 0x3d8
-#define EMC_FDPD_CTRL_DQ 0x310
-#define EMC_FDPD_CTRL_CMD 0x314
-#define EMC_PRE_REFRESH_REQ_CNT 0x3dc
-#define EMC_REFCTRL2 0x580
-#define EMC_FBIO_CFG7 0x584
-#define EMC_DATA_BRLSHFT_0 0x588
-#define EMC_DATA_BRLSHFT_1 0x58c
-#define EMC_DQS_BRLSHFT_0 0x594
-#define EMC_DQS_BRLSHFT_1 0x598
-#define EMC_CMD_BRLSHFT_0 0x59c
-#define EMC_CMD_BRLSHFT_1 0x5a0
-#define EMC_CMD_BRLSHFT_2 0x5a4
-#define EMC_CMD_BRLSHFT_3 0x5a8
-#define EMC_QUSE_BRLSHFT_0 0x5ac
-#define EMC_QUSE_BRLSHFT_1 0x5b8
-#define EMC_QUSE_BRLSHFT_2 0x5bc
-#define EMC_QUSE_BRLSHFT_3 0x5c4
-#define EMC_FBIO_CFG8 0x5c8
-#define EMC_CMD_MAPPING_CMD0_0 0x380
-#define EMC_CMD_MAPPING_CMD0_1 0x384
-#define EMC_CMD_MAPPING_CMD0_2 0x388
-#define EMC_CMD_MAPPING_CMD1_0 0x38c
-#define EMC_CMD_MAPPING_CMD1_1 0x390
-#define EMC_CMD_MAPPING_CMD1_2 0x394
-#define EMC_CMD_MAPPING_CMD2_0 0x398
-#define EMC_CMD_MAPPING_CMD2_1 0x39c
-#define EMC_CMD_MAPPING_CMD2_2 0x3a0
-#define EMC_CMD_MAPPING_CMD3_0 0x3a4
-#define EMC_CMD_MAPPING_CMD3_1 0x3a8
-#define EMC_CMD_MAPPING_CMD3_2 0x3ac
-#define EMC_CMD_MAPPING_BYTE 0x3b0
-#define EMC_DYN_SELF_REF_CONTROL 0x3e0
-#define EMC_TXSRDLL 0x3e4
-#define EMC_CCFIFO_ADDR 0x3e8
-#define EMC_CCFIFO_DATA 0x3ec
-#define EMC_CCFIFO_STATUS 0x3f0
-#define EMC_SWIZZLE_RANK0_BYTE0 0x404
-#define EMC_SWIZZLE_RANK0_BYTE1 0x408
-#define EMC_SWIZZLE_RANK0_BYTE2 0x40c
-#define EMC_SWIZZLE_RANK0_BYTE3 0x410
-#define EMC_SWIZZLE_RANK1_BYTE0 0x418
-#define EMC_SWIZZLE_RANK1_BYTE1 0x41c
-#define EMC_SWIZZLE_RANK1_BYTE2 0x420
-#define EMC_SWIZZLE_RANK1_BYTE3 0x424
-#define EMC_TR_TIMING_0 0x3b4
-#define EMC_TR_CTRL_0 0x3b8
-#define EMC_TR_CTRL_1 0x3bc
-#define EMC_TR_DVFS 0x460
-#define EMC_SWITCH_BACK_CTRL 0x3c0
-#define EMC_TR_RDV 0x3c4
-#define EMC_TR_QPOP 0x3f4
-#define EMC_TR_RDV_MASK 0x3f8
-#define EMC_TR_QSAFE 0x3fc
-#define EMC_TR_QRST 0x400
-#define EMC_IBDLY 0x468
-#define EMC_OBDLY 0x46c
-#define EMC_TXDSRVTTGEN 0x480
-#define EMC_WE_DURATION 0x48c
-#define EMC_WS_DURATION 0x490
-#define EMC_WEV 0x494
-#define EMC_WSV 0x498
-#define EMC_CFG_3 0x49c
-#define EMC_CFG_PIPE_2 0x554
-#define EMC_CFG_PIPE_CLK 0x558
-#define EMC_CFG_PIPE_1 0x55c
-#define EMC_CFG_PIPE 0x560
-#define EMC_QPOP 0x564
-#define EMC_QUSE_WIDTH 0x568
-#define EMC_PUTERM_WIDTH 0x56c
-#define EMC_PROTOBIST_CONFIG_ADR_1 0x5d0
-#define EMC_PROTOBIST_CONFIG_ADR_2 0x5d4
-#define EMC_PROTOBIST_MISC 0x5d8
-#define EMC_PROTOBIST_WDATA_LOWER 0x5dc
-#define EMC_PROTOBIST_WDATA_UPPER 0x5e0
-#define EMC_PROTOBIST_RDATA 0x5ec
-#define EMC_DLL_CFG_0 0x5e4
-#define EMC_DLL_CFG_1 0x5e8
-#define EMC_TRAINING_CMD 0xe00
-#define EMC_TRAINING_CTRL 0xe04
-#define EMC_TRAINING_STATUS 0xe08
-#define EMC_TRAINING_QUSE_CORS_CTRL 0xe0c
-#define EMC_TRAINING_QUSE_FINE_CTRL 0xe10
-#define EMC_TRAINING_QUSE_CTRL_MISC 0xe14
-#define EMC_TRAINING_WRITE_FINE_CTRL 0xe18
-#define EMC_TRAINING_WRITE_CTRL_MISC 0xe1c
-#define EMC_TRAINING_WRITE_VREF_CTRL 0xe20
-#define EMC_TRAINING_READ_FINE_CTRL 0xe24
-#define EMC_TRAINING_READ_CTRL_MISC 0xe28
-#define EMC_TRAINING_READ_VREF_CTRL 0xe2c
-#define EMC_TRAINING_CA_FINE_CTRL 0xe30
-#define EMC_TRAINING_CA_CTRL_MISC 0xe34
-#define EMC_TRAINING_CA_CTRL_MISC1 0xe38
-#define EMC_TRAINING_CA_VREF_CTRL 0xe3c
-#define EMC_TRAINING_CA_TADR_CTRL 0xe40
-#define EMC_TRAINING_SETTLE 0xe44
-#define EMC_TRAINING_DEBUG_CTRL 0xe48
-#define EMC_TRAINING_DEBUG_DQ0 0xe4c
-#define EMC_TRAINING_DEBUG_DQ1 0xe50
-#define EMC_TRAINING_DEBUG_DQ2 0xe54
-#define EMC_TRAINING_DEBUG_DQ3 0xe58
-#define EMC_TRAINING_MPC 0xe5c
-#define EMC_TRAINING_PATRAM_CTRL 0xe60
-#define EMC_TRAINING_PATRAM_DQ 0xe64
-#define EMC_TRAINING_PATRAM_DMI 0xe68
-#define EMC_TRAINING_VREF_SETTLE 0xe6c
-#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE0 0xe70
-#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE1 0xe74
-#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE2 0xe78
-#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE3 0xe7c
-#define EMC_TRAINING_RW_EYE_CENTER_IB_MISC 0xe80
-#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE0 0xe84
-#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE1 0xe88
-#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE2 0xe8c
-#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE3 0xe90
-#define EMC_TRAINING_RW_EYE_CENTER_OB_MISC 0xe94
-#define EMC_TRAINING_RW_OFFSET_IB_BYTE0 0xe98
-#define EMC_TRAINING_RW_OFFSET_IB_BYTE1 0xe9c
-#define EMC_TRAINING_RW_OFFSET_IB_BYTE2 0xea0
-#define EMC_TRAINING_RW_OFFSET_IB_BYTE3 0xea4
-#define EMC_TRAINING_RW_OFFSET_IB_MISC 0xea8
-#define EMC_TRAINING_RW_OFFSET_OB_BYTE0 0xeac
-#define EMC_TRAINING_RW_OFFSET_OB_BYTE1 0xeb0
-#define EMC_TRAINING_RW_OFFSET_OB_BYTE2 0xeb4
-#define EMC_TRAINING_RW_OFFSET_OB_BYTE3 0xeb8
-#define EMC_TRAINING_RW_OFFSET_OB_MISC 0xebc
-#define EMC_TRAINING_OPT_CA_VREF 0xec0
-#define EMC_TRAINING_OPT_DQ_OB_VREF 0xec4
-#define EMC_TRAINING_OPT_DQ_IB_VREF_RANK0 0xec8
-#define EMC_TRAINING_OPT_DQ_IB_VREF_RANK1 0xecc
-#define EMC_TRAINING_QUSE_VREF_CTRL 0xed0
-#define EMC_TRAINING_OPT_DQS_IB_VREF_RANK0 0xed4
-#define EMC_TRAINING_OPT_DQS_IB_VREF_RANK1 0xed8
-#define EMC_TRAINING_DRAMC_TIMING 0xedc
-#define EMC_PMACRO_QUSE_DDLL_RANK0_0 0x600
-#define EMC_PMACRO_QUSE_DDLL_RANK0_1 0x604
-#define EMC_PMACRO_QUSE_DDLL_RANK0_2 0x608
-#define EMC_PMACRO_QUSE_DDLL_RANK0_3 0x60c
-#define EMC_PMACRO_QUSE_DDLL_RANK0_4 0x610
-#define EMC_PMACRO_QUSE_DDLL_RANK0_5 0x614
-#define EMC_PMACRO_QUSE_DDLL_RANK1_0 0x620
-#define EMC_PMACRO_QUSE_DDLL_RANK1_1 0x624
-#define EMC_PMACRO_QUSE_DDLL_RANK1_2 0x628
-#define EMC_PMACRO_QUSE_DDLL_RANK1_3 0x62c
-#define EMC_PMACRO_QUSE_DDLL_RANK1_4 0x630
-#define EMC_PMACRO_QUSE_DDLL_RANK1_5 0x634
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0 0x640
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1 0x644
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2 0x648
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3 0x64c
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4 0x650
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5 0x654
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0 0x660
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1 0x664
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2 0x668
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3 0x66c
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_4 0x670
-#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_5 0x674
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_0 0x680
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_1 0x684
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_2 0x688
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_3 0x68c
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_4 0x690
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_5 0x694
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_0 0x6a0
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_1 0x6a4
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_2 0x6a8
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_3 0x6ac
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_4 0x6b0
-#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_5 0x6b4
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0 0x6c0
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1 0x6c4
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2 0x6c8
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3 0x6cc
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_4 0x6d0
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_5 0x6d4
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0 0x6e0
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1 0x6e4
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2 0x6e8
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3 0x6ec
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_4 0x6f0
-#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_5 0x6f4
-#define EMC_PMACRO_TX_PWRD_0 0x720
-#define EMC_PMACRO_TX_PWRD_1 0x724
-#define EMC_PMACRO_TX_PWRD_2 0x728
-#define EMC_PMACRO_TX_PWRD_3 0x72c
-#define EMC_PMACRO_TX_PWRD_4 0x730
-#define EMC_PMACRO_TX_PWRD_5 0x734
-#define EMC_PMACRO_TX_SEL_CLK_SRC_0 0x740
-#define EMC_PMACRO_TX_SEL_CLK_SRC_1 0x744
-#define EMC_PMACRO_TX_SEL_CLK_SRC_3 0x74c
-#define EMC_PMACRO_TX_SEL_CLK_SRC_2 0x748
-#define EMC_PMACRO_TX_SEL_CLK_SRC_4 0x750
-#define EMC_PMACRO_TX_SEL_CLK_SRC_5 0x754
-#define EMC_PMACRO_DDLL_BYPASS 0x760
-#define EMC_PMACRO_DDLL_PWRD_0 0x770
-#define EMC_PMACRO_DDLL_PWRD_1 0x774
-#define EMC_PMACRO_DDLL_PWRD_2 0x778
-#define EMC_PMACRO_CMD_CTRL_0 0x780
-#define EMC_PMACRO_CMD_CTRL_1 0x784
-#define EMC_PMACRO_CMD_CTRL_2 0x788
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_0 0x800
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_1 0x804
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_2 0x808
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_3 0x80c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_0 0x810
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_1 0x814
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_2 0x818
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_3 0x81c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_0 0x820
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_1 0x824
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_2 0x828
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_3 0x82c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_0 0x830
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_1 0x834
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_2 0x838
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_3 0x83c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_0 0x840
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_1 0x844
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_2 0x848
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_3 0x84c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_0 0x850
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_1 0x854
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_2 0x858
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_3 0x85c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_0 0x860
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_1 0x864
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_2 0x868
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_3 0x86c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_0 0x870
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_1 0x874
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_2 0x878
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_3 0x87c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_0 0x880
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_1 0x884
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_2 0x888
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_3 0x88c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_0 0x890
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_1 0x894
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_2 0x898
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_3 0x89c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_0 0x8a0
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_1 0x8a4
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_2 0x8a8
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_3 0x8ac
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_0 0x8b0
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_1 0x8b4
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_2 0x8b8
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_3 0x8bc
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_0 0x900
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_1 0x904
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_2 0x908
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_3 0x90c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_0 0x910
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_1 0x914
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_2 0x918
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_3 0x91c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_0 0x920
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_1 0x924
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_2 0x928
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_3 0x92c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_0 0x930
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_1 0x934
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_2 0x938
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_3 0x93c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_0 0x940
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_1 0x944
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_2 0x948
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_3 0x94c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_0 0x950
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_1 0x954
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_2 0x958
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_3 0x95c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_0 0x960
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_1 0x964
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_2 0x968
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_3 0x96c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_0 0x970
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_1 0x974
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_2 0x978
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_3 0x97c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_0 0x980
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_1 0x984
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_2 0x988
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_3 0x98c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_0 0x990
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_1 0x994
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_2 0x998
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_3 0x99c
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_0 0x9a0
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_1 0x9a4
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_2 0x9a8
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_3 0x9ac
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_0 0x9b0
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_1 0x9b4
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_2 0x9b8
-#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_3 0x9bc
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_0 0xa00
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_1 0xa04
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_2 0xa08
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_0 0xa10
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_1 0xa14
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_2 0xa18
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_0 0xa20
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_1 0xa24
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_2 0xa28
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_0 0xa30
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_1 0xa34
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_2 0xa38
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_0 0xa40
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_1 0xa44
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_2 0xa48
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_0 0xa50
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_1 0xa54
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_2 0xa58
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_0 0xa60
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_1 0xa64
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_2 0xa68
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_0 0xa70
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_1 0xa74
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_2 0xa78
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD0_0 0xa80
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD0_1 0xa84
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD0_2 0xa88
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD1_0 0xa90
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD1_1 0xa94
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD1_2 0xa98
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD2_0 0xaa0
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD2_1 0xaa4
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD2_2 0xaa8
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD3_0 0xab0
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD3_1 0xab4
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD3_2 0xab8
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_0 0xb00
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_1 0xb04
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_2 0xb08
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_0 0xb10
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_1 0xb14
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_2 0xb18
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_0 0xb20
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_1 0xb24
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_2 0xb28
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_0 0xb30
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_1 0xb34
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_2 0xb38
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_0 0xb40
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_1 0xb44
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_2 0xb48
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_0 0xb50
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_1 0xb54
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_2 0xb58
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_0 0xb60
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_1 0xb64
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_2 0xb68
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_0 0xb70
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_1 0xb74
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_2 0xb78
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD0_0 0xb80
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD0_1 0xb84
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD0_2 0xb88
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD1_0 0xb90
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD1_1 0xb94
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD1_2 0xb98
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD2_0 0xba0
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD2_1 0xba4
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD2_2 0xba8
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD3_0 0xbb0
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD3_1 0xbb4
-#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD3_2 0xbb8
-#define EMC_PMACRO_IB_VREF_DQ_0 0xbe0
-#define EMC_PMACRO_IB_VREF_DQ_1 0xbe4
-#define EMC_PMACRO_IB_VREF_DQ_2 0xbe8
-#define EMC_PMACRO_IB_VREF_DQS_0 0xbf0
-#define EMC_PMACRO_IB_VREF_DQS_1 0xbf4
-#define EMC_PMACRO_IB_VREF_DQS_2 0xbf8
-#define EMC_PMACRO_IB_RXRT 0xcf4
-#define EMC_PMACRO_DDLL_LONG_CMD_0 0xc00
-#define EMC_PMACRO_DDLL_LONG_CMD_1 0xc04
-#define EMC_PMACRO_DDLL_LONG_CMD_2 0xc08
-#define EMC_PMACRO_DDLL_LONG_CMD_3 0xc0c
-#define EMC_PMACRO_DDLL_LONG_CMD_4 0xc10
-#define EMC_PMACRO_DDLL_LONG_CMD_5 0xc14
-#define EMC_PMACRO_DDLL_SHORT_CMD_0 0xc20
-#define EMC_PMACRO_DDLL_SHORT_CMD_1 0xc24
-#define EMC_PMACRO_DDLL_SHORT_CMD_2 0xc28
-#define EMC_PMACRO_CFG_PM_GLOBAL_0 0xc30
-#define EMC_PMACRO_VTTGEN_CTRL_0 0xc34
-#define EMC_PMACRO_VTTGEN_CTRL_1 0xc38
-#define EMC_PMACRO_VTTGEN_CTRL_2 0xcf0
-#define EMC_PMACRO_BG_BIAS_CTRL_0 0xc3c
-#define EMC_PMACRO_PAD_CFG_CTRL 0xc40
-#define EMC_PMACRO_CMD_PAD_RX_CTRL 0xc50
-#define EMC_PMACRO_DATA_PAD_RX_CTRL 0xc54
-#define EMC_PMACRO_CMD_RX_TERM_MODE 0xc58
-#define EMC_PMACRO_DATA_RX_TERM_MODE 0xc5c
-#define EMC_PMACRO_CMD_PAD_TX_CTRL 0xc60
-#define EMC_PMACRO_DATA_PAD_TX_CTRL 0xc64
-#define EMC_PMACRO_COMMON_PAD_TX_CTRL 0xc68
-#define EMC_PMACRO_BRICK_MAPPING_0 0xc80
-#define EMC_PMACRO_BRICK_MAPPING_1 0xc84
-#define EMC_PMACRO_BRICK_MAPPING_2 0xc88
-#define EMC_PMACRO_DDLLCAL_CAL 0xce0
-#define EMC_PMACRO_DDLL_OFFSET 0xce4
-#define EMC_PMACRO_DDLL_PERIODIC_OFFSET 0xce8
-#define EMC_PMACRO_BRICK_CTRL_RFU1 0x330
-#define EMC_PMACRO_BRICK_CTRL_RFU2 0x334
-#define EMC_PMACRO_CMD_BRICK_CTRL_FDPD 0x318
-#define EMC_PMACRO_DATA_BRICK_CTRL_FDPD 0x31c
-#define EMC_PMACRO_TRAINING_CTRL_0 0xcf8
-#define EMC_PMACRO_TRAINING_CTRL_1 0xcfc
-#define EMC_PMC_SCRATCH1 0x440
-#define EMC_PMC_SCRATCH2 0x444
-#define EMC_PMC_SCRATCH3 0x448
-
-#define EMC_STATUS_UPDATE_TIMEOUT 1000
-
-typedef enum _emc_mr_t
-{
- MR5_MAN_ID = 5,
- MR6_REV_ID1 = 6,
- MR7_REV_ID2 = 7,
- MR8_DENSITY = 8,
-} emc_mr_t;
-
-enum
-{
- EMC_CHAN0 = 0,
- EMC_CHAN1 = 1
-};
-
-typedef struct _emc_mr_data_t
-{
- u8 dev0_ch0;
- u8 dev0_ch1;
- u8 dev1_ch0;
- u8 dev1_ch1;
-} emc_mr_data_t;
-
-#endif
diff --git a/nyx/nyx_gui/mem/heap.c b/nyx/nyx_gui/mem/heap.c
deleted file mode 100644
index 7b58e96..0000000
--- a/nyx/nyx_gui/mem/heap.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2020 CTCaer
- * Copyright (c) 2018 M4xw
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-#include "heap.h"
-#include "../gfx/gfx.h"
-#include "../../../common/common_heap.h"
-
-static void _heap_create(heap_t *heap, u32 start)
-{
- heap->start = start;
- heap->first = NULL;
-}
-
-// Node info is before node address.
-static u32 _heap_alloc(heap_t *heap, u32 size)
-{
- hnode_t *node, *new_node;
-
- // Align to cache line size.
- size = ALIGN(size, sizeof(hnode_t));
-
- if (!heap->first)
- {
- node = (hnode_t *)heap->start;
- node->used = 1;
- node->size = size;
- node->prev = NULL;
- node->next = NULL;
- heap->first = node;
-
- return (u32)node + sizeof(hnode_t);
- }
-
- node = heap->first;
- while (true)
- {
- // Check if there's available unused node.
- if (!node->used && (size <= node->size))
- {
- // Size and offset of the new unused node.
- u32 new_size = node->size - size;
- new_node = (hnode_t *)((u32)node + sizeof(hnode_t) + size);
-
- // If there's aligned unused space from the old node,
- // create a new one and set the leftover size.
- if (new_size >= (sizeof(hnode_t) << 2))
- {
- new_node->size = new_size - sizeof(hnode_t);
- new_node->used = 0;
- new_node->next = node->next;
-
- // Check that we are not on first node.
- if (new_node->next)
- new_node->next->prev = new_node;
-
- new_node->prev = node;
- node->next = new_node;
- }
- else // Unused node size is just enough.
- size += new_size;
-
- node->size = size;
- node->used = 1;
-
- return (u32)node + sizeof(hnode_t);
- }
-
- // No unused node found, try the next one.
- if (node->next)
- node = node->next;
- else
- break;
- }
-
- // No unused node found, create a new one.
- new_node = (hnode_t *)((u32)node + sizeof(hnode_t) + node->size);
- new_node->used = 1;
- new_node->size = size;
- new_node->prev = node;
- new_node->next = NULL;
- node->next = new_node;
-
- return (u32)new_node + sizeof(hnode_t);
-}
-
-static void _heap_free(heap_t *heap, u32 addr)
-{
- hnode_t *node = (hnode_t *)(addr - sizeof(hnode_t));
- node->used = 0;
- node = heap->first;
- while (node)
- {
- if (!node->used)
- {
- if (node->prev && !node->prev->used)
- {
- node->prev->size += node->size + sizeof(hnode_t);
- node->prev->next = node->next;
-
- if (node->next)
- node->next->prev = node->prev;
- }
- }
- node = node->next;
- }
-}
-
-heap_t _heap;
-
-void heap_init(u32 base)
-{
- _heap_create(&_heap, base);
-}
-
-void heap_copy(heap_t *heap)
-{
- memcpy(&_heap, heap, sizeof(heap_t));
-}
-
-void *malloc(u32 size)
-{
- return (void *)_heap_alloc(&_heap, size);
-}
-
-void *calloc(u32 num, u32 size)
-{
- void *res = (void *)_heap_alloc(&_heap, num * size);
- memset(res, 0, ALIGN(num * size, sizeof(hnode_t))); // Clear the aligned size.
- return res;
-}
-
-void free(void *buf)
-{
- if ((u32)buf >= _heap.start)
- _heap_free(&_heap, (u32)buf);
-}
-
-void heap_monitor(heap_monitor_t *mon, bool print_node_stats)
-{
- u32 count = 0;
- memset(mon, 0, sizeof(heap_monitor_t));
-
- hnode_t *node = _heap.first;
- while (true)
- {
- if (node->used)
- mon->used += node->size + sizeof(hnode_t);
- else
- mon->total += node->size + sizeof(hnode_t);
-
- if (print_node_stats)
- gfx_printf("%3d - %d, addr: 0x%08X, size: 0x%X\n",
- count, node->used, (u32)node + sizeof(hnode_t), node->size);
-
- count++;
-
- if (node->next)
- node = node->next;
- else
- break;
- }
- mon->total += mon->used;
-}
diff --git a/nyx/nyx_gui/mem/heap.h b/nyx/nyx_gui/mem/heap.h
deleted file mode 100644
index d6a7e5e..0000000
--- a/nyx/nyx_gui/mem/heap.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _HEAP_H_
-#define _HEAP_H_
-
-#include "../utils/types.h"
-#include "../../../common/common_heap.h"
-
-void heap_init(u32 base);
-void heap_copy(heap_t *heap);
-void *malloc(u32 size);
-void *calloc(u32 num, u32 size);
-void free(void *buf);
-void heap_monitor(heap_monitor_t *mon, bool print_node_stats);
-
-#endif
diff --git a/nyx/nyx_gui/mem/mc.c b/nyx/nyx_gui/mem/mc.c
deleted file mode 100644
index dd508e2..0000000
--- a/nyx/nyx_gui/mem/mc.c
+++ /dev/null
@@ -1,143 +0,0 @@
-#include "../mem/mc.h"
-#include "../soc/t210.h"
-#include "../soc/clock.h"
-#include "../utils/util.h"
-
-void mc_config_tsec_carveout(u32 bom, u32 size1mb, bool lock)
-{
- MC(MC_SEC_CARVEOUT_BOM) = bom;
- MC(MC_SEC_CARVEOUT_SIZE_MB) = size1mb;
- if (lock)
- MC(MC_SEC_CARVEOUT_REG_CTRL) = 1;
-}
-
-void mc_config_carveout()
-{
- *(vu32 *)0x8005FFFC = 0xC0EDBBCC;
- MC(MC_VIDEO_PROTECT_GPU_OVERRIDE_0) = 1;
- MC(MC_VIDEO_PROTECT_GPU_OVERRIDE_1) = 0;
- MC(MC_VIDEO_PROTECT_BOM) = 0;
- MC(MC_VIDEO_PROTECT_SIZE_MB) = 0;
- MC(MC_VIDEO_PROTECT_REG_CTRL) = 1;
-
- // Configure TSEC carveout @ 0x90000000, 1MB.
- //mc_config_tsec_carveout(0x90000000, 1, false);
- mc_config_tsec_carveout(0, 0, true);
-
- MC(MC_MTS_CARVEOUT_BOM) = 0;
- MC(MC_MTS_CARVEOUT_SIZE_MB) = 0;
- MC(MC_MTS_CARVEOUT_ADR_HI) = 0;
- MC(MC_MTS_CARVEOUT_REG_CTRL) = 1;
-
- MC(MC_SECURITY_CARVEOUT1_BOM) = 0;
- MC(MC_SECURITY_CARVEOUT1_BOM_HI) = 0;
- MC(MC_SECURITY_CARVEOUT1_SIZE_128KB) = 0;
- MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS0) = 0;
- MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS1) = 0;
- MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2) = 0;
- MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3) = 0;
- MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4) = 0;
- MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0) = 0;
- MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1) = 0;
- MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2) = 0;
- MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3) = 0;
- MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4) = 0;
- MC(MC_SECURITY_CARVEOUT1_CFG0) = 0x4000006;
-
- MC(MC_SECURITY_CARVEOUT2_BOM) = 0x80020000;
- MC(MC_SECURITY_CARVEOUT2_BOM_HI) = 0;
- MC(MC_SECURITY_CARVEOUT2_SIZE_128KB) = 2;
- MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS0) = 0;
- MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS1) = 0;
- MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2) = 0x3100000;
- MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS3) = 0;
- MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS4) = 0x300;
- MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS0) = 0;
- MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS1) = 0;
- MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS2) = 0;
- MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS3) = 0;
- MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS4) = 0;
- MC(MC_SECURITY_CARVEOUT2_CFG0) = 0x440167E;
-
- MC(MC_SECURITY_CARVEOUT3_BOM) = 0;
- MC(MC_SECURITY_CARVEOUT3_BOM_HI) = 0;
- MC(MC_SECURITY_CARVEOUT3_SIZE_128KB) = 0;
- MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS0) = 0;
- MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS1) = 0;
- MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS2) = 0x3000000;
- MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS3) = 0;
- MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS4) = 0x300;
- MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS0) = 0;
- MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS1) = 0;
- MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS2) = 0;
- MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS3) = 0;
- MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS4) = 0;
- MC(MC_SECURITY_CARVEOUT3_CFG0) = 0x4401E7E;
-
- MC(MC_SECURITY_CARVEOUT4_BOM) = 0;
- MC(MC_SECURITY_CARVEOUT4_BOM_HI) = 0;
- MC(MC_SECURITY_CARVEOUT4_SIZE_128KB) = 0;
- MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS0) = 0;
- MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS1) = 0;
- MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS2) = 0;
- MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS3) = 0;
- MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS4) = 0;
- MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS0) = 0;
- MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS1) = 0;
- MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS2) = 0;
- MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS3) = 0;
- MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS4) = 0;
- MC(MC_SECURITY_CARVEOUT4_CFG0) = 0x8F;
-
- MC(MC_SECURITY_CARVEOUT5_BOM) = 0;
- MC(MC_SECURITY_CARVEOUT5_BOM_HI) = 0;
- MC(MC_SECURITY_CARVEOUT5_SIZE_128KB) = 0;
- MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS0) = 0;
- MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS1) = 0;
- MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS2) = 0;
- MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS3) = 0;
- MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS4) = 0;
- MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS0) = 0;
- MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS1) = 0;
- MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS2) = 0;
- MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS3) = 0;
- MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS4) = 0;
- MC(MC_SECURITY_CARVEOUT5_CFG0) = 0x8F;
-}
-
-void mc_enable_ahb_redirect()
-{
- // Enable ARC_CLK_OVR_ON.
- CLOCK(CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD) = (CLOCK(CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD) & 0xFFF7FFFF) | 0x80000;
- //MC(MC_IRAM_REG_CTRL) &= 0xFFFFFFFE;
- MC(MC_IRAM_BOM) = 0x40000000;
- MC(MC_IRAM_TOM) = 0x4003F000;
-}
-
-void mc_disable_ahb_redirect()
-{
- MC(MC_IRAM_BOM) = 0xFFFFF000;
- MC(MC_IRAM_TOM) = 0;
- // Disable IRAM_CFG_WRITE_ACCESS (sticky).
- //MC(MC_IRAM_REG_CTRL) = MC(MC_IRAM_REG_CTRL) & 0xFFFFFFFE | 1;
- // Disable ARC_CLK_OVR_ON.
- CLOCK(CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD) &= 0xFFF7FFFF;
-}
-
-void mc_enable()
-{
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) & 0x1FFFFFFF) | 0x40000000;
- // Enable EMC clock.
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = (CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) & 0xFDFFFFFF) | 0x2000000;
- // Enable MC clock.
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = (CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) & 0xFFFFFFFE) | 1;
- // Enable EMC DLL clock.
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) = (CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) & 0xFFFFBFFF) | 0x4000;
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_CLR) = 0x2000001; //Clear EMC and MC reset.
- usleep(5);
-
- //#ifdef CONFIG_ENABLE_AHB_REDIRECT
- mc_disable_ahb_redirect();
- //mc_enable_ahb_redirect();
- //#endif
-}
diff --git a/nyx/nyx_gui/mem/mc.h b/nyx/nyx_gui/mem/mc.h
deleted file mode 100644
index 6a28bde..0000000
--- a/nyx/nyx_gui/mem/mc.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef _MC_H_
-#define _MC_H_
-
-#include "../utils/types.h"
-#include "../mem/mc_t210.h"
-
-void mc_config_tsec_carveout(u32 bom, u32 size1mb, bool lock);
-void mc_config_carveout();
-void mc_config_carveout_finalize();
-void mc_enable_ahb_redirect();
-void mc_disable_ahb_redirect();
-void mc_enable();
-
-#endif
diff --git a/nyx/nyx_gui/mem/mc_t210.h b/nyx/nyx_gui/mem/mc_t210.h
deleted file mode 100644
index 87fe2ca..0000000
--- a/nyx/nyx_gui/mem/mc_t210.h
+++ /dev/null
@@ -1,516 +0,0 @@
-/*
- * Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _MC_T210_H_
-#define _MC_T210_H_
-
-#define MC_INTSTATUS 0x0
-#define MC_INTMASK 0x4
-#define MC_ERR_STATUS 0x8
-#define MC_ERR_ADR 0xc
-#define MC_PCFIFO_CLIENT_CONFIG0 0xdd0
-#define MC_PCFIFO_CLIENT_CONFIG1 0xdd4
-#define MC_PCFIFO_CLIENT_CONFIG2 0xdd8
-#define MC_PCFIFO_CLIENT_CONFIG3 0xddc
-#define MC_PCFIFO_CLIENT_CONFIG4 0xde0
-#define MC_EMEM_CFG 0x50
-#define MC_EMEM_ADR_CFG 0x54
-#define MC_EMEM_ADR_CFG_DEV0 0x58
-#define MC_EMEM_ADR_CFG_DEV1 0x5c
-#define MC_EMEM_ADR_CFG_CHANNEL_MASK 0x60
-#define MC_EMEM_ADR_CFG_BANK_MASK_0 0x64
-#define MC_EMEM_ADR_CFG_BANK_MASK_1 0x68
-#define MC_EMEM_ADR_CFG_BANK_MASK_2 0x6c
-#define MC_SECURITY_CFG0 0x70
-#define MC_SECURITY_CFG1 0x74
-#define MC_SECURITY_CFG3 0x9bc
-#define MC_SECURITY_RSV 0x7c
-#define MC_EMEM_ARB_CFG 0x90
-#define MC_EMEM_ARB_OUTSTANDING_REQ 0x94
-#define MC_EMEM_ARB_TIMING_RCD 0x98
-#define MC_EMEM_ARB_TIMING_RP 0x9c
-#define MC_EMEM_ARB_TIMING_RC 0xa0
-#define MC_EMEM_ARB_TIMING_RAS 0xa4
-#define MC_EMEM_ARB_TIMING_FAW 0xa8
-#define MC_EMEM_ARB_TIMING_RRD 0xac
-#define MC_EMEM_ARB_TIMING_RAP2PRE 0xb0
-#define MC_EMEM_ARB_TIMING_WAP2PRE 0xb4
-#define MC_EMEM_ARB_TIMING_R2R 0xb8
-#define MC_EMEM_ARB_TIMING_W2W 0xbc
-#define MC_EMEM_ARB_TIMING_R2W 0xc0
-#define MC_EMEM_ARB_TIMING_W2R 0xc4
-#define MC_EMEM_ARB_TIMING_RFCPB 0x6c0
-#define MC_EMEM_ARB_TIMING_CCDMW 0x6c4
-#define MC_EMEM_ARB_REFPB_HP_CTRL 0x6f0
-#define MC_EMEM_ARB_REFPB_BANK_CTRL 0x6f4
-#define MC_EMEM_ARB_DA_TURNS 0xd0
-#define MC_EMEM_ARB_DA_COVERS 0xd4
-#define MC_EMEM_ARB_MISC0 0xd8
-#define MC_EMEM_ARB_MISC1 0xdc
-#define MC_EMEM_ARB_MISC2 0xc8
-#define MC_EMEM_ARB_RING1_THROTTLE 0xe0
-#define MC_EMEM_ARB_RING3_THROTTLE 0xe4
-#define MC_EMEM_ARB_NISO_THROTTLE 0x6b0
-#define MC_EMEM_ARB_OVERRIDE 0xe8
-#define MC_EMEM_ARB_RSV 0xec
-#define MC_CLKEN_OVERRIDE 0xf4
-#define MC_TIMING_CONTROL_DBG 0xf8
-#define MC_TIMING_CONTROL 0xfc
-#define MC_STAT_CONTROL 0x100
-#define MC_STAT_STATUS 0x104
-#define MC_STAT_EMC_CLOCK_LIMIT 0x108
-#define MC_STAT_EMC_CLOCK_LIMIT_MSBS 0x10c
-#define MC_STAT_EMC_CLOCKS 0x110
-#define MC_STAT_EMC_CLOCKS_MSBS 0x114
-#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_LO 0x118
-#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_LO 0x158
-#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_HI 0x11c
-#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_HI 0x15c
-#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_UPPER 0xa20
-#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_UPPER 0xa24
-#define MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_LO 0x198
-#define MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_LO 0x1a8
-#define MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_HI 0x19c
-#define MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_HI 0x1ac
-#define MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_UPPER 0xa28
-#define MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_UPPER 0xa2c
-#define MC_STAT_EMC_FILTER_SET0_ASID 0x1a0
-#define MC_STAT_EMC_FILTER_SET1_ASID 0x1b0
-#define MC_STAT_EMC_FILTER_SET0_SLACK_LIMIT 0x120
-#define MC_STAT_EMC_FILTER_SET1_SLACK_LIMIT 0x160
-#define MC_STAT_EMC_FILTER_SET0_CLIENT_0 0x128
-#define MC_STAT_EMC_FILTER_SET1_CLIENT_0 0x168
-#define MC_STAT_EMC_FILTER_SET0_CLIENT_1 0x12c
-#define MC_STAT_EMC_FILTER_SET1_CLIENT_1 0x16c
-#define MC_STAT_EMC_FILTER_SET0_CLIENT_2 0x130
-#define MC_STAT_EMC_FILTER_SET1_CLIENT_2 0x170
-#define MC_STAT_EMC_FILTER_SET0_CLIENT_3 0x134
-#define MC_STAT_EMC_FILTER_SET0_CLIENT_4 0xb88
-#define MC_STAT_EMC_FILTER_SET1_CLIENT_3 0x174
-#define MC_STAT_EMC_FILTER_SET1_CLIENT_4 0xb8c
-#define MC_STAT_EMC_SET0_COUNT 0x138
-#define MC_STAT_EMC_SET0_COUNT_MSBS 0x13c
-#define MC_STAT_EMC_SET1_COUNT 0x178
-#define MC_STAT_EMC_SET1_COUNT_MSBS 0x17c
-#define MC_STAT_EMC_SET0_SLACK_ACCUM 0x140
-#define MC_STAT_EMC_SET0_SLACK_ACCUM_MSBS 0x144
-#define MC_STAT_EMC_SET1_SLACK_ACCUM 0x180
-#define MC_STAT_EMC_SET1_SLACK_ACCUM_MSBS 0x184
-#define MC_STAT_EMC_SET0_HISTO_COUNT 0x148
-#define MC_STAT_EMC_SET0_HISTO_COUNT_MSBS 0x14c
-#define MC_STAT_EMC_SET1_HISTO_COUNT 0x188
-#define MC_STAT_EMC_SET1_HISTO_COUNT_MSBS 0x18c
-#define MC_STAT_EMC_SET0_MINIMUM_SLACK_OBSERVED 0x150
-#define MC_STAT_EMC_SET1_MINIMUM_SLACK_OBSERVED 0x190
-#define MC_STAT_EMC_SET0_IDLE_CYCLE_COUNT 0x1b8
-#define MC_STAT_EMC_SET0_IDLE_CYCL_COUNT_MSBS 0x1bc
-#define MC_STAT_EMC_SET1_IDLE_CYCLE_COUNT 0x1c8
-#define MC_STAT_EMC_SET1_IDLE_CYCL_COUNT_MSBS 0x1cc
-#define MC_STAT_EMC_SET0_IDLE_CYCLE_PARTITION_SELECT 0x1c0
-#define MC_STAT_EMC_SET1_IDLE_CYCLE_PARTITION_SELECT 0x1d0
-#define MC_CLIENT_HOTRESET_CTRL 0x200
-#define MC_CLIENT_HOTRESET_CTRL_1 0x970
-#define MC_CLIENT_HOTRESET_STATUS 0x204
-#define MC_CLIENT_HOTRESET_STATUS_1 0x974
-#define MC_EMEM_ARB_ISOCHRONOUS_0 0x208
-#define MC_EMEM_ARB_ISOCHRONOUS_1 0x20c
-#define MC_EMEM_ARB_ISOCHRONOUS_2 0x210
-#define MC_EMEM_ARB_ISOCHRONOUS_3 0x214
-#define MC_EMEM_ARB_ISOCHRONOUS_4 0xb94
-#define MC_EMEM_ARB_HYSTERESIS_0 0x218
-#define MC_EMEM_ARB_HYSTERESIS_1 0x21c
-#define MC_EMEM_ARB_HYSTERESIS_2 0x220
-#define MC_EMEM_ARB_HYSTERESIS_3 0x224
-#define MC_EMEM_ARB_HYSTERESIS_4 0xb84
-#define MC_EMEM_ARB_DHYSTERESIS_0 0xbb0
-#define MC_EMEM_ARB_DHYSTERESIS_1 0xbb4
-#define MC_EMEM_ARB_DHYSTERESIS_2 0xbb8
-#define MC_EMEM_ARB_DHYSTERESIS_3 0xbbc
-#define MC_EMEM_ARB_DHYSTERESIS_4 0xbc0
-#define MC_EMEM_ARB_DHYST_CTRL 0xbcc
-#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0 0xbd0
-#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1 0xbd4
-#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2 0xbd8
-#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3 0xbdc
-#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4 0xbe0
-#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5 0xbe4
-#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6 0xbe8
-#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7 0xbec
-#define MC_RESERVED_RSV 0x3fc
-#define MC_DISB_EXTRA_SNAP_LEVELS 0x408
-#define MC_APB_EXTRA_SNAP_LEVELS 0x2a4
-#define MC_AHB_EXTRA_SNAP_LEVELS 0x2a0
-#define MC_USBD_EXTRA_SNAP_LEVELS 0xa18
-#define MC_ISP_EXTRA_SNAP_LEVELS 0xa08
-#define MC_AUD_EXTRA_SNAP_LEVELS 0xa10
-#define MC_MSE_EXTRA_SNAP_LEVELS 0x40c
-#define MC_GK2_EXTRA_SNAP_LEVELS 0xa40
-#define MC_A9AVPPC_EXTRA_SNAP_LEVELS 0x414
-#define MC_FTOP_EXTRA_SNAP_LEVELS 0x2bc
-#define MC_JPG_EXTRA_SNAP_LEVELS 0xa3c
-#define MC_HOST_EXTRA_SNAP_LEVELS 0xa14
-#define MC_SAX_EXTRA_SNAP_LEVELS 0x2c0
-#define MC_DIS_EXTRA_SNAP_LEVELS 0x2ac
-#define MC_VICPC_EXTRA_SNAP_LEVELS 0xa1c
-#define MC_HDAPC_EXTRA_SNAP_LEVELS 0xa48
-#define MC_AVP_EXTRA_SNAP_LEVELS 0x2a8
-#define MC_USBX_EXTRA_SNAP_LEVELS 0x404
-#define MC_PCX_EXTRA_SNAP_LEVELS 0x2b8
-#define MC_SD_EXTRA_SNAP_LEVELS 0xa04
-#define MC_DFD_EXTRA_SNAP_LEVELS 0xa4c
-#define MC_VE_EXTRA_SNAP_LEVELS 0x2d8
-#define MC_GK_EXTRA_SNAP_LEVELS 0xa00
-#define MC_VE2_EXTRA_SNAP_LEVELS 0x410
-#define MC_SDM_EXTRA_SNAP_LEVELS 0xa44
-#define MC_VIDEO_PROTECT_BOM 0x648
-#define MC_VIDEO_PROTECT_SIZE_MB 0x64c
-#define MC_VIDEO_PROTECT_BOM_ADR_HI 0x978
-#define MC_VIDEO_PROTECT_REG_CTRL 0x650
-#define MC_ERR_VPR_STATUS 0x654
-#define MC_ERR_VPR_ADR 0x658
-#define MC_VIDEO_PROTECT_VPR_OVERRIDE 0x418
-#define MC_VIDEO_PROTECT_VPR_OVERRIDE1 0x590
-#define MC_IRAM_BOM 0x65c
-#define MC_IRAM_TOM 0x660
-#define MC_IRAM_ADR_HI 0x980
-#define MC_IRAM_REG_CTRL 0x964
-#define MC_EMEM_CFG_ACCESS_CTRL 0x664
-#define MC_TZ_SECURITY_CTRL 0x668
-#define MC_EMEM_ARB_OUTSTANDING_REQ_RING3 0x66c
-#define MC_EMEM_ARB_OUTSTANDING_REQ_NISO 0x6b4
-#define MC_EMEM_ARB_RING0_THROTTLE_MASK 0x6bc
-#define MC_EMEM_ARB_NISO_THROTTLE_MASK 0x6b8
-#define MC_EMEM_ARB_NISO_THROTTLE_MASK_1 0xb80
-#define MC_SEC_CARVEOUT_BOM 0x670
-#define MC_SEC_CARVEOUT_SIZE_MB 0x674
-#define MC_SEC_CARVEOUT_ADR_HI 0x9d4
-#define MC_SEC_CARVEOUT_REG_CTRL 0x678
-#define MC_ERR_SEC_STATUS 0x67c
-#define MC_ERR_SEC_ADR 0x680
-#define MC_PC_IDLE_CLOCK_GATE_CONFIG 0x684
-#define MC_STUTTER_CONTROL 0x688
-#define MC_RESERVED_RSV_1 0x958
-#define MC_DVFS_PIPE_SELECT 0x95c
-#define MC_AHB_PTSA_MIN 0x4e0
-#define MC_AUD_PTSA_MIN 0x54c
-#define MC_MLL_MPCORER_PTSA_RATE 0x44c
-#define MC_RING2_PTSA_RATE 0x440
-#define MC_USBD_PTSA_RATE 0x530
-#define MC_USBX_PTSA_MIN 0x528
-#define MC_USBD_PTSA_MIN 0x534
-#define MC_APB_PTSA_MAX 0x4f0
-#define MC_JPG_PTSA_RATE 0x584
-#define MC_DIS_PTSA_MIN 0x420
-#define MC_AVP_PTSA_MAX 0x4fc
-#define MC_AVP_PTSA_RATE 0x4f4
-#define MC_RING1_PTSA_MIN 0x480
-#define MC_DIS_PTSA_MAX 0x424
-#define MC_SD_PTSA_MAX 0x4d8
-#define MC_MSE_PTSA_RATE 0x4c4
-#define MC_VICPC_PTSA_MIN 0x558
-#define MC_PCX_PTSA_MAX 0x4b4
-#define MC_ISP_PTSA_RATE 0x4a0
-#define MC_A9AVPPC_PTSA_MIN 0x48c
-#define MC_RING2_PTSA_MAX 0x448
-#define MC_AUD_PTSA_RATE 0x548
-#define MC_HOST_PTSA_MIN 0x51c
-#define MC_MLL_MPCORER_PTSA_MAX 0x454
-#define MC_SD_PTSA_MIN 0x4d4
-#define MC_RING1_PTSA_RATE 0x47c
-#define MC_JPG_PTSA_MIN 0x588
-#define MC_HDAPC_PTSA_MIN 0x62c
-#define MC_AVP_PTSA_MIN 0x4f8
-#define MC_JPG_PTSA_MAX 0x58c
-#define MC_VE_PTSA_MAX 0x43c
-#define MC_DFD_PTSA_MAX 0x63c
-#define MC_VICPC_PTSA_RATE 0x554
-#define MC_GK_PTSA_MAX 0x544
-#define MC_VICPC_PTSA_MAX 0x55c
-#define MC_SDM_PTSA_MAX 0x624
-#define MC_SAX_PTSA_RATE 0x4b8
-#define MC_PCX_PTSA_MIN 0x4b0
-#define MC_APB_PTSA_MIN 0x4ec
-#define MC_GK2_PTSA_MIN 0x614
-#define MC_PCX_PTSA_RATE 0x4ac
-#define MC_RING1_PTSA_MAX 0x484
-#define MC_HDAPC_PTSA_RATE 0x628
-#define MC_MLL_MPCORER_PTSA_MIN 0x450
-#define MC_GK2_PTSA_MAX 0x618
-#define MC_AUD_PTSA_MAX 0x550
-#define MC_GK2_PTSA_RATE 0x610
-#define MC_ISP_PTSA_MAX 0x4a8
-#define MC_DISB_PTSA_RATE 0x428
-#define MC_VE2_PTSA_MAX 0x49c
-#define MC_DFD_PTSA_MIN 0x638
-#define MC_FTOP_PTSA_RATE 0x50c
-#define MC_A9AVPPC_PTSA_RATE 0x488
-#define MC_VE2_PTSA_MIN 0x498
-#define MC_USBX_PTSA_MAX 0x52c
-#define MC_DIS_PTSA_RATE 0x41c
-#define MC_USBD_PTSA_MAX 0x538
-#define MC_A9AVPPC_PTSA_MAX 0x490
-#define MC_USBX_PTSA_RATE 0x524
-#define MC_FTOP_PTSA_MAX 0x514
-#define MC_HDAPC_PTSA_MAX 0x630
-#define MC_SD_PTSA_RATE 0x4d0
-#define MC_DFD_PTSA_RATE 0x634
-#define MC_FTOP_PTSA_MIN 0x510
-#define MC_SDM_PTSA_RATE 0x61c
-#define MC_AHB_PTSA_RATE 0x4dc
-#define MC_SMMU_SMMU_PTSA_MAX 0x460
-#define MC_RING2_PTSA_MIN 0x444
-#define MC_SDM_PTSA_MIN 0x620
-#define MC_APB_PTSA_RATE 0x4e8
-#define MC_MSE_PTSA_MIN 0x4c8
-#define MC_HOST_PTSA_RATE 0x518
-#define MC_VE_PTSA_RATE 0x434
-#define MC_AHB_PTSA_MAX 0x4e4
-#define MC_SAX_PTSA_MIN 0x4bc
-#define MC_SMMU_SMMU_PTSA_MIN 0x45c
-#define MC_ISP_PTSA_MIN 0x4a4
-#define MC_HOST_PTSA_MAX 0x520
-#define MC_SAX_PTSA_MAX 0x4c0
-#define MC_VE_PTSA_MIN 0x438
-#define MC_GK_PTSA_MIN 0x540
-#define MC_MSE_PTSA_MAX 0x4cc
-#define MC_DISB_PTSA_MAX 0x430
-#define MC_DISB_PTSA_MIN 0x42c
-#define MC_SMMU_SMMU_PTSA_RATE 0x458
-#define MC_VE2_PTSA_RATE 0x494
-#define MC_GK_PTSA_RATE 0x53c
-#define MC_PTSA_GRANT_DECREMENT 0x960
-#define MC_LATENCY_ALLOWANCE_AVPC_0 0x2e4
-#define MC_LATENCY_ALLOWANCE_AXIAP_0 0x3a0
-#define MC_LATENCY_ALLOWANCE_XUSB_1 0x380
-#define MC_LATENCY_ALLOWANCE_ISP2B_0 0x384
-#define MC_LATENCY_ALLOWANCE_SDMMCAA_0 0x3bc
-#define MC_LATENCY_ALLOWANCE_SDMMCA_0 0x3b8
-#define MC_LATENCY_ALLOWANCE_ISP2_0 0x370
-#define MC_LATENCY_ALLOWANCE_SE_0 0x3e0
-#define MC_LATENCY_ALLOWANCE_ISP2_1 0x374
-#define MC_LATENCY_ALLOWANCE_DC_0 0x2e8
-#define MC_LATENCY_ALLOWANCE_VIC_0 0x394
-#define MC_LATENCY_ALLOWANCE_DCB_1 0x2f8
-#define MC_LATENCY_ALLOWANCE_NVDEC_0 0x3d8
-#define MC_LATENCY_ALLOWANCE_DCB_2 0x2fc
-#define MC_LATENCY_ALLOWANCE_TSEC_0 0x390
-#define MC_LATENCY_ALLOWANCE_DC_2 0x2f0
-#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0AB 0x694
-#define MC_LATENCY_ALLOWANCE_PPCS_1 0x348
-#define MC_LATENCY_ALLOWANCE_XUSB_0 0x37c
-#define MC_LATENCY_ALLOWANCE_PPCS_0 0x344
-#define MC_LATENCY_ALLOWANCE_TSECB_0 0x3f0
-#define MC_LATENCY_ALLOWANCE_AFI_0 0x2e0
-#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0B 0x698
-#define MC_LATENCY_ALLOWANCE_DC_1 0x2ec
-#define MC_LATENCY_ALLOWANCE_APE_0 0x3dc
-#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0C 0x6a0
-#define MC_LATENCY_ALLOWANCE_A9AVP_0 0x3a4
-#define MC_LATENCY_ALLOWANCE_GPU2_0 0x3e8
-#define MC_LATENCY_ALLOWANCE_DCB_0 0x2f4
-#define MC_LATENCY_ALLOWANCE_HC_1 0x314
-#define MC_LATENCY_ALLOWANCE_SDMMC_0 0x3c0
-#define MC_LATENCY_ALLOWANCE_NVJPG_0 0x3e4
-#define MC_LATENCY_ALLOWANCE_PTC_0 0x34c
-#define MC_LATENCY_ALLOWANCE_ETR_0 0x3ec
-#define MC_LATENCY_ALLOWANCE_MPCORE_0 0x320
-#define MC_LATENCY_ALLOWANCE_VI2_0 0x398
-#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0BB 0x69c
-#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0CB 0x6a4
-#define MC_LATENCY_ALLOWANCE_SATA_0 0x350
-#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0A 0x690
-#define MC_LATENCY_ALLOWANCE_HC_0 0x310
-#define MC_LATENCY_ALLOWANCE_DC_3 0x3c8
-#define MC_LATENCY_ALLOWANCE_GPU_0 0x3ac
-#define MC_LATENCY_ALLOWANCE_SDMMCAB_0 0x3c4
-#define MC_LATENCY_ALLOWANCE_ISP2B_1 0x388
-#define MC_LATENCY_ALLOWANCE_NVENC_0 0x328
-#define MC_LATENCY_ALLOWANCE_HDA_0 0x318
-#define MC_MIN_LENGTH_APE_0 0xb34
-#define MC_MIN_LENGTH_DCB_2 0x8a8
-#define MC_MIN_LENGTH_A9AVP_0 0x950
-#define MC_MIN_LENGTH_TSEC_0 0x93c
-#define MC_MIN_LENGTH_DC_1 0x898
-#define MC_MIN_LENGTH_AXIAP_0 0x94c
-#define MC_MIN_LENGTH_ISP2B_0 0x930
-#define MC_MIN_LENGTH_VI2_0 0x944
-#define MC_MIN_LENGTH_DCB_0 0x8a0
-#define MC_MIN_LENGTH_DCB_1 0x8a4
-#define MC_MIN_LENGTH_PPCS_1 0x8f4
-#define MC_MIN_LENGTH_NVJPG_0 0xb3c
-#define MC_MIN_LENGTH_HDA_0 0x8c4
-#define MC_MIN_LENGTH_NVENC_0 0x8d4
-#define MC_MIN_LENGTH_SDMMC_0 0xb18
-#define MC_MIN_LENGTH_ISP2B_1 0x934
-#define MC_MIN_LENGTH_HC_1 0x8c0
-#define MC_MIN_LENGTH_DC_3 0xb20
-#define MC_MIN_LENGTH_AVPC_0 0x890
-#define MC_MIN_LENGTH_VIC_0 0x940
-#define MC_MIN_LENGTH_ISP2_0 0x91c
-#define MC_MIN_LENGTH_HC_0 0x8bc
-#define MC_MIN_LENGTH_SE_0 0xb38
-#define MC_MIN_LENGTH_NVDEC_0 0xb30
-#define MC_MIN_LENGTH_SATA_0 0x8fc
-#define MC_MIN_LENGTH_DC_0 0x894
-#define MC_MIN_LENGTH_XUSB_1 0x92c
-#define MC_MIN_LENGTH_DC_2 0x89c
-#define MC_MIN_LENGTH_SDMMCAA_0 0xb14
-#define MC_MIN_LENGTH_GPU_0 0xb04
-#define MC_MIN_LENGTH_ETR_0 0xb44
-#define MC_MIN_LENGTH_AFI_0 0x88c
-#define MC_MIN_LENGTH_PPCS_0 0x8f0
-#define MC_MIN_LENGTH_ISP2_1 0x920
-#define MC_MIN_LENGTH_XUSB_0 0x928
-#define MC_MIN_LENGTH_MPCORE_0 0x8cc
-#define MC_MIN_LENGTH_TSECB_0 0xb48
-#define MC_MIN_LENGTH_SDMMCA_0 0xb10
-#define MC_MIN_LENGTH_GPU2_0 0xb40
-#define MC_MIN_LENGTH_SDMMCAB_0 0xb1c
-#define MC_MIN_LENGTH_PTC_0 0x8f8
-#define MC_EMEM_ARB_OVERRIDE_1 0x968
-#define MC_VIDEO_PROTECT_GPU_OVERRIDE_0 0x984
-#define MC_VIDEO_PROTECT_GPU_OVERRIDE_1 0x988
-#define MC_EMEM_ARB_STATS_0 0x990
-#define MC_EMEM_ARB_STATS_1 0x994
-#define MC_MTS_CARVEOUT_BOM 0x9a0
-#define MC_MTS_CARVEOUT_SIZE_MB 0x9a4
-#define MC_MTS_CARVEOUT_ADR_HI 0x9a8
-#define MC_MTS_CARVEOUT_REG_CTRL 0x9ac
-#define MC_ERR_MTS_STATUS 0x9b0
-#define MC_ERR_MTS_ADR 0x9b4
-#define MC_ERR_GENERALIZED_CARVEOUT_STATUS 0xc00
-#define MC_ERR_GENERALIZED_CARVEOUT_ADR 0xc04
-#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS2 0xd74
-#define MC_SECURITY_CARVEOUT4_CFG0 0xcf8
-#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS2 0xd10
-#define MC_SECURITY_CARVEOUT4_SIZE_128KB 0xd04
-#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4 0xc28
-#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1 0xc30
-#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS4 0xc8c
-#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS0 0xd1c
-#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS1 0xd70
-#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0 0xc2c
-#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS4 0xd7c
-#define MC_SECURITY_CARVEOUT3_SIZE_128KB 0xcb4
-#define MC_SECURITY_CARVEOUT2_CFG0 0xc58
-#define MC_SECURITY_CARVEOUT1_CFG0 0xc08
-#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS2 0xc84
-#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS0 0xc68
-#define MC_SECURITY_CARVEOUT3_BOM 0xcac
-#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2 0xc70
-#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS3 0xd78
-#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS0 0xc7c
-#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS4 0xd18
-#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS1 0xcbc
-#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3 0xc38
-#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2 0xc34
-#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS2 0xcc0
-#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS2 0xd60
-#define MC_SECURITY_CARVEOUT3_CFG0 0xca8
-#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS0 0xcb8
-#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS3 0xc88
-#define MC_SECURITY_CARVEOUT2_SIZE_128KB 0xc64
-#define MC_SECURITY_CARVEOUT5_BOM_HI 0xd50
-#define MC_SECURITY_CARVEOUT1_SIZE_128KB 0xc14
-#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS3 0xd14
-#define MC_SECURITY_CARVEOUT1_BOM 0xc0c
-#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS4 0xd2c
-#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS4 0xd68
-#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS4 0xcc8
-#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS0 0xd58
-#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS2 0xd24
-#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS3 0xcc4
-#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS4 0xc78
-#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS1 0xc1c
-#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS0 0xc18
-#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS3 0xd28
-#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS1 0xd5c
-#define MC_SECURITY_CARVEOUT3_BOM_HI 0xcb0
-#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS3 0xcd8
-#define MC_SECURITY_CARVEOUT2_BOM_HI 0xc60
-#define MC_SECURITY_CARVEOUT4_BOM_HI 0xd00
-#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS3 0xd64
-#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS4 0xcdc
-#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS1 0xc80
-#define MC_SECURITY_CARVEOUT5_SIZE_128KB 0xd54
-#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS1 0xd20
-#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS2 0xcd4
-#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS1 0xd0c
-#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS3 0xc74
-#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS0 0xccc
-#define MC_SECURITY_CARVEOUT4_BOM 0xcfc
-#define MC_SECURITY_CARVEOUT5_CFG0 0xd48
-#define MC_SECURITY_CARVEOUT2_BOM 0xc5c
-#define MC_SECURITY_CARVEOUT5_BOM 0xd4c
-#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3 0xc24
-#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS0 0xd6c
-#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS1 0xcd0
-#define MC_SECURITY_CARVEOUT1_BOM_HI 0xc10
-#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2 0xc20
-#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4 0xc3c
-#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS1 0xc6c
-#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS0 0xd08
-#define MC_ERR_APB_ASID_UPDATE_STATUS 0x9d0
-#define MC_DA_CONFIG0 0x9dc
-
-// MC_SECURITY_CARVEOUTX_CFG0
-// Mode of LOCK_MODE.
-#define PROTECT_MODE_SHIFT 0
-#define SEC_CARVEOUT_CFG_SECURE (0 << PROTECT_MODE_SHIFT0)
-#define SEC_CARVEOUT_CFG_TZ_SECURE (1 << PROTECT_MODE_SHIFT0)
-// Enables PROTECT_MODE.
-#define LOCK_MODE_SHIFT 1
-#define SEC_CARVEOUT_CFG_UNLOCKED (0 << LOCK_MODE_SHIFT)
-#define SEC_CARVEOUT_CFG_LOCKED (1 << LOCK_MODE_SHIFT)
-
-#define ADDRESS_TYPE_SHIFT 2
-#define SEC_CARVEOUT_CFG_ANY_ADDRESS (0 << ADDRESS_TYPE_SHIFT)
-#define SEC_CARVEOUT_CFG_UNTRANSLATED_ONLY (1 << ADDRESS_TYPE_SHIFT)
-
-#define READ_ACCESS_LEVEL_SHIFT 3
-#define SEC_CARVEOUT_CFG_RD_ALL (1 << READ_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_RD_UNK (2 << READ_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_RD_FALCON_LS (4 << READ_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_RD_FALCON_HS (8 << READ_ACCESS_LEVEL_SHIFT)
-
-#define WRITE_ACCESS_LEVEL_SHIFT 7
-#define SEC_CARVEOUT_CFG_WR_ALL (1 << WRITE_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_WR_UNK (2 << WRITE_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_WR_FALCON_LS (4 << WRITE_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_WR_FALCON_HS (8 << WRITE_ACCESS_LEVEL_SHIFT)
-
-#define SEC_CARVEOUT_CFG_APERTURE_ID_MASK (3 << 11)
-
-#define DISABLE_READ_CHECK_ACCESS_LEVEL_SHIFT 14
-#define SEC_CARVEOUT_CFG_DIS_RD_CHECK_L0 (1 << DISABLE_READ_CHECK_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_DIS_RD_CHECK_L1 (2 << DISABLE_READ_CHECK_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_DIS_RD_CHECK_L2 (4 << DISABLE_READ_CHECK_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_DIS_RD_CHECK_L3 (8 << DISABLE_READ_CHECK_ACCESS_LEVEL_SHIFT)
-
-#define DISABLE_WRITE_CHECK_ACCESS_LEVEL_SHIFT 18
-#define SEC_CARVEOUT_CFG_DIS_WR_CHECK_L0 (1 << DISABLE_WRITE_CHECK_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_DIS_WR_CHECK_L1 (2 << DISABLE_WRITE_CHECK_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_DIS_WR_CHECK_L2 (4 << DISABLE_WRITE_CHECK_ACCESS_LEVEL_SHIFT)
-#define SEC_CARVEOUT_CFG_DIS_WR_CHECK_L3 (8 << DISABLE_WRITE_CHECK_ACCESS_LEVEL_SHIFT)
-
-#define SEC_CARVEOUT_CFG_SEND_CFG_TO_GPU (1 << 22)
-
-#define SEC_CARVEOUT_CFG_TZ_GLOBAL_WR_EN_BYPASS_CHECK (1 << 23)
-#define SEC_CARVEOUT_CFG_TZ_GLOBAL_RD_EN_BYPASS_CHECK (1 << 24)
-
-#define SEC_CARVEOUT_CFG_ALLOW_APERTURE_ID_MISMATCH (1 << 25)
-#define SEC_CARVEOUT_CFG_FORCE_APERTURE_ID_MATCH (1 << 26)
-
-#define SEC_CARVEOUT_CFG_IS_WPR (1 << 27)
-
-#endif
diff --git a/nyx/nyx_gui/mem/minerva.c b/nyx/nyx_gui/mem/minerva.c
deleted file mode 100644
index e30fa56..0000000
--- a/nyx/nyx_gui/mem/minerva.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-#include
-
-#include "minerva.h"
-#include "../soc/fuse.h"
-#include "../utils/util.h"
-
-#include "../soc/clock.h"
-#include "../ianos/ianos.h"
-#include "../soc/fuse.h"
-#include "../soc/t210.h"
-
-extern volatile nyx_storage_t *nyx_str;
-
-void (*minerva_cfg)(mtc_config_t *mtc_cfg, void *);
-
-u32 minerva_init()
-{
- u32 curr_ram_idx = 0;
-
- minerva_cfg = NULL;
- mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
-
-#ifdef NYX
- // Set table to nyx storage.
- mtc_cfg->mtc_table = (emc_table_t *)nyx_str->mtc_table;
-
- // Check if Minerva is already initialized.
- if (mtc_cfg->init_done == MTC_INIT_MAGIC)
- {
- mtc_cfg->train_mode = OP_PERIODIC_TRAIN; // Retrain if needed.
- u32 ep_addr = ianos_loader("bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
- minerva_cfg = (void *)ep_addr;
-
- return 0;
- }
- else
- {
- mtc_config_t mtc_tmp;
-
- mtc_tmp.mtc_table = mtc_cfg->mtc_table;
- mtc_tmp.sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
- mtc_tmp.init_done = MTC_NEW_MAGIC;
-
- u32 ep_addr = ianos_loader("bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_tmp);
-
- // Ensure that Minerva is new.
- if (mtc_tmp.init_done == MTC_INIT_MAGIC)
- minerva_cfg = (void *)ep_addr;
- else
- mtc_cfg->init_done = 0;
-
- // Copy Minerva context to Nyx storage.
- if (minerva_cfg)
- memcpy(mtc_cfg, (void *)&mtc_tmp, sizeof(mtc_config_t));
- }
-#else
- memset(mtc_cfg, 0, sizeof(mtc_config_t));
-
- // Set table to nyx storage.
- mtc_cfg->mtc_table = (emc_table_t *)nyx_str->mtc_table;
-
- mtc_cfg->sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
- mtc_cfg->init_done = MTC_NEW_MAGIC; // Initialize mtc table.
-
- u32 ep_addr = ianos_loader("bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
-
- // Ensure that Minerva is new.
- if (mtc_cfg->init_done == MTC_INIT_MAGIC)
- minerva_cfg = (void *)ep_addr;
- else
- mtc_cfg->init_done = 0;
-#endif
-
- if (!minerva_cfg)
- return 1;
-
- // Get current frequency
- for (curr_ram_idx = 0; curr_ram_idx < 10; curr_ram_idx++)
- {
- if (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) == mtc_cfg->mtc_table[curr_ram_idx].clk_src_emc)
- break;
- }
-
- mtc_cfg->rate_from = mtc_cfg->mtc_table[curr_ram_idx].rate_khz;
- mtc_cfg->rate_to = 204000;
- mtc_cfg->train_mode = OP_TRAIN;
- minerva_cfg(mtc_cfg, NULL);
- mtc_cfg->rate_to = 800000;
- minerva_cfg(mtc_cfg, NULL);
- mtc_cfg->rate_to = 1600000;
- minerva_cfg(mtc_cfg, NULL);
-
- // FSP WAR.
- mtc_cfg->train_mode = OP_SWITCH;
- mtc_cfg->rate_to = 800000;
- minerva_cfg(mtc_cfg, NULL);
-
- // Switch to max.
- mtc_cfg->rate_to = 1600000;
- minerva_cfg(mtc_cfg, NULL);
-
- return 0;
-}
-
-void minerva_change_freq(minerva_freq_t freq)
-{
- if (!minerva_cfg)
- return;
-
- mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
- if (mtc_cfg->rate_from != freq)
- {
- mtc_cfg->rate_to = freq;
- mtc_cfg->train_mode = OP_SWITCH;
- minerva_cfg(mtc_cfg, NULL);
- }
-}
-
-void minerva_periodic_training()
-{
- if (!minerva_cfg)
- return;
-
- mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
- if (mtc_cfg->rate_from == FREQ_1600)
- {
- mtc_cfg->train_mode = OP_PERIODIC_TRAIN;
- minerva_cfg(mtc_cfg, NULL);
- }
-}
\ No newline at end of file
diff --git a/nyx/nyx_gui/mem/minerva.h b/nyx/nyx_gui/mem/minerva.h
deleted file mode 100644
index 9be55c9..0000000
--- a/nyx/nyx_gui/mem/minerva.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _FE_MINERVA_H_
-#define _FE_MINERVA_H_
-
-#include "mtc_table.h"
-#include "../utils/types.h"
-
-#define MTC_INIT_MAGIC 0x3043544D
-#define MTC_NEW_MAGIC 0x5243544D
-
-#define EMC_PERIODIC_TRAIN_MS 250
-
-typedef struct
-{
- s32 rate_to;
- s32 rate_from;
- emc_table_t *mtc_table;
- u32 table_entries;
- emc_table_t *current_emc_table;
- u32 train_mode;
- u32 sdram_id;
- u32 prev_temp;
- bool emc_2X_clk_src_is_pllmb;
- bool fsp_for_src_freq;
- bool train_ram_patterns;
- bool init_done;
-} mtc_config_t;
-
-enum train_mode_t
-{
- OP_SWITCH = 0,
- OP_TRAIN = 1,
- OP_TRAIN_SWITCH = 2,
- OP_PERIODIC_TRAIN = 3,
- OP_TEMP_COMP = 4
-};
-
-typedef enum
-{
- FREQ_204 = 204000,
- FREQ_800 = 800000,
- FREQ_1600 = 1600000
-} minerva_freq_t;
-
-extern void (*minerva_cfg)(mtc_config_t *mtc_cfg, void *);
-u32 minerva_init();
-void minerva_change_freq(minerva_freq_t freq);
-void minerva_periodic_training();
-
-#endif
diff --git a/nyx/nyx_gui/mem/mtc_table.h b/nyx/nyx_gui/mem/mtc_table.h
deleted file mode 100644
index 38a3e2f..0000000
--- a/nyx/nyx_gui/mem/mtc_table.h
+++ /dev/null
@@ -1,560 +0,0 @@
-/*
- * Minerva Training Cell
- * DRAM Training for Tegra X1 SoC. Supports DDR2/3 and LPDDR3/4.
- *
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _MTC_TABLE_H_
-#define _MTC_TABLE_H_
-
-#include "../utils/types.h"
-
-typedef struct
-{
- s32 pll_osc_in;
- s32 pll_out;
- u32 pll_feedback_div;
- u32 pll_input_div;
- u32 pll_post_div;
-} pllm_clk_config_t;
-
-typedef struct
-{
- u32 emc_rc_idx;
- u32 emc_rfc_idx;
- u32 emc_rfcpb_idx;
- u32 emc_refctrl2_idx;
- u32 emc_rfc_slr_idx;
- u32 emc_ras_idx;
- u32 emc_rp_idx;
- u32 emc_r2w_idx;
- u32 emc_w2r_idx;
- u32 emc_r2p_idx;
- u32 emc_w2p_idx;
- u32 emc_r2r_idx;
- u32 emc_tppd_idx;
- u32 emc_ccdmw_idx;
- u32 emc_rd_rcd_idx;
- u32 emc_wr_rcd_idx;
- u32 emc_rrd_idx;
- u32 emc_rext_idx;
- u32 emc_wext_idx;
- u32 emc_wdv_chk_idx;
- u32 emc_wdv_idx;
- u32 emc_wsv_idx;
- u32 emc_wev_idx;
- u32 emc_wdv_mask_idx;
- u32 emc_ws_duration_idx;
- u32 emc_we_duration_idx;
- u32 emc_quse_idx;
- u32 emc_quse_width_idx;
- u32 emc_ibdly_idx;
- u32 emc_obdly_idx;
- u32 emc_einput_idx;
- u32 emc_mrw6_idx;
- u32 emc_einput_duration_idx;
- u32 emc_puterm_extra_idx;
- u32 emc_puterm_width_idx;
- u32 emc_qrst_idx;
- u32 emc_qsafe_idx;
- u32 emc_rdv_idx;
- u32 emc_rdv_mask_idx;
- u32 emc_rdv_early_idx;
- u32 emc_rdv_early_mask_idx;
- u32 emc_refresh_idx;
- u32 emc_burst_refresh_num_idx;
- u32 emc_pre_refresh_req_cnt_idx;
- u32 emc_pdex2wr_idx;
- u32 emc_pdex2rd_idx;
- u32 emc_pchg2pden_idx;
- u32 emc_act2pden_idx;
- u32 emc_ar2pden_idx;
- u32 emc_rw2pden_idx;
- u32 emc_cke2pden_idx;
- u32 emc_pdex2cke_idx;
- u32 emc_pdex2mrr_idx;
- u32 emc_txsr_idx;
- u32 emc_txsrdll_idx;
- u32 emc_tcke_idx;
- u32 emc_tckesr_idx;
- u32 emc_tpd_idx;
- u32 emc_tfaw_idx;
- u32 emc_trpab_idx;
- u32 emc_tclkstable_idx;
- u32 emc_tclkstop_idx;
- u32 emc_mrw7_idx;
- u32 emc_trefbw_idx;
- u32 emc_odt_write_idx;
- u32 emc_fbio_cfg5_idx;
- u32 emc_fbio_cfg7_idx;
- u32 emc_cfg_dig_dll_idx;
- u32 emc_cfg_dig_dll_period_idx;
- u32 emc_pmacro_ib_rxrt_idx;
- u32 emc_cfg_pipe_1_idx;
- u32 emc_cfg_pipe_2_idx;
- u32 emc_pmacro_quse_ddll_rank0_4_idx;
- u32 emc_pmacro_quse_ddll_rank0_5_idx;
- u32 emc_pmacro_quse_ddll_rank1_4_idx;
- u32 emc_pmacro_quse_ddll_rank1_5_idx;
- u32 emc_mrw8_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_4_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_5_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_0_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_1_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_2_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_3_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_4_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_5_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_0_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_1_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_2_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_3_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_4_idx;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_5_idx;
- u32 emc_pmacro_ddll_long_cmd_0_idx;
- u32 emc_pmacro_ddll_long_cmd_1_idx;
- u32 emc_pmacro_ddll_long_cmd_2_idx;
- u32 emc_pmacro_ddll_long_cmd_3_idx;
- u32 emc_pmacro_ddll_long_cmd_4_idx;
- u32 emc_pmacro_ddll_short_cmd_0_idx;
- u32 emc_pmacro_ddll_short_cmd_1_idx;
- u32 emc_pmacro_ddll_short_cmd_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte0_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte1_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte2_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte3_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte4_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte5_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte6_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte7_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd0_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd1_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd2_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd3_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte0_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte1_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte2_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte3_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte4_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte5_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte6_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte7_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd0_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd0_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd0_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd0_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd1_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd1_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd1_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd1_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd2_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd2_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd2_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd2_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd3_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd3_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd3_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_cmd3_3_idx;
- u32 emc_txdsrvttgen_idx;
- u32 emc_fdpd_ctrl_dq_idx;
- u32 emc_fdpd_ctrl_cmd_idx;
- u32 emc_fbio_spare_idx;
- u32 emc_zcal_interval_idx;
- u32 emc_zcal_wait_cnt_idx;
- u32 emc_mrs_wait_cnt_idx;
- u32 emc_mrs_wait_cnt2_idx;
- u32 emc_auto_cal_channel_idx;
- u32 emc_dll_cfg_0_idx;
- u32 emc_dll_cfg_1_idx;
- u32 emc_pmacro_autocal_cfg_common_idx;
- u32 emc_pmacro_zctrl_idx;
- u32 emc_cfg_idx;
- u32 emc_cfg_pipe_idx;
- u32 emc_dyn_self_ref_control_idx;
- u32 emc_qpop_idx;
- u32 emc_dqs_brlshft_0_idx;
- u32 emc_dqs_brlshft_1_idx;
- u32 emc_cmd_brlshft_2_idx;
- u32 emc_cmd_brlshft_3_idx;
- u32 emc_pmacro_pad_cfg_ctrl_idx;
- u32 emc_pmacro_data_pad_rx_ctrl_idx;
- u32 emc_pmacro_cmd_pad_rx_ctrl_idx;
- u32 emc_pmacro_data_rx_term_mode_idx;
- u32 emc_pmacro_cmd_rx_term_mode_idx;
- u32 emc_pmacro_cmd_pad_tx_ctrl_idx;
- u32 emc_pmacro_data_pad_tx_ctrl_idx;
- u32 emc_pmacro_common_pad_tx_ctrl_idx;
- u32 emc_pmacro_vttgen_ctrl_0_idx;
- u32 emc_pmacro_vttgen_ctrl_1_idx;
- u32 emc_pmacro_vttgen_ctrl_2_idx;
- u32 emc_pmacro_brick_ctrl_rfu1_idx;
- u32 emc_pmacro_cmd_brick_ctrl_fdpd_idx;
- u32 emc_pmacro_brick_ctrl_rfu2_idx;
- u32 emc_pmacro_data_brick_ctrl_fdpd_idx;
- u32 emc_pmacro_bg_bias_ctrl_0_idx;
- u32 emc_cfg_3_idx;
- u32 emc_pmacro_tx_pwrd_0_idx;
- u32 emc_pmacro_tx_pwrd_1_idx;
- u32 emc_pmacro_tx_pwrd_2_idx;
- u32 emc_pmacro_tx_pwrd_3_idx;
- u32 emc_pmacro_tx_pwrd_4_idx;
- u32 emc_pmacro_tx_pwrd_5_idx;
- u32 emc_config_sample_delay_idx;
- u32 emc_pmacro_tx_sel_clk_src_0_idx;
- u32 emc_pmacro_tx_sel_clk_src_1_idx;
- u32 emc_pmacro_tx_sel_clk_src_2_idx;
- u32 emc_pmacro_tx_sel_clk_src_3_idx;
- u32 emc_pmacro_tx_sel_clk_src_4_idx;
- u32 emc_pmacro_tx_sel_clk_src_5_idx;
- u32 emc_pmacro_ddll_bypass_idx;
- u32 emc_pmacro_ddll_pwrd_0_idx;
- u32 emc_pmacro_ddll_pwrd_1_idx;
- u32 emc_pmacro_ddll_pwrd_2_idx;
- u32 emc_pmacro_cmd_ctrl_0_idx;
- u32 emc_pmacro_cmd_ctrl_1_idx;
- u32 emc_pmacro_cmd_ctrl_2_idx;
- u32 emc_tr_timing_0_idx;
- u32 emc_tr_dvfs_idx;
- u32 emc_tr_ctrl_1_idx;
- u32 emc_tr_rdv_idx;
- u32 emc_tr_qpop_idx;
- u32 emc_tr_rdv_mask_idx;
- u32 emc_mrw14_idx;
- u32 emc_tr_qsafe_idx;
- u32 emc_tr_qrst_idx;
- u32 emc_training_ctrl_idx;
- u32 emc_training_settle_idx;
- u32 emc_training_vref_settle_idx;
- u32 emc_training_ca_fine_ctrl_idx;
- u32 emc_training_ca_ctrl_misc_idx;
- u32 emc_training_ca_ctrl_misc1_idx;
- u32 emc_training_ca_vref_ctrl_idx;
- u32 emc_training_quse_cors_ctrl_idx;
- u32 emc_training_quse_fine_ctrl_idx;
- u32 emc_training_quse_ctrl_misc_idx;
- u32 emc_training_quse_vref_ctrl_idx;
- u32 emc_training_read_fine_ctrl_idx;
- u32 emc_training_read_ctrl_misc_idx;
- u32 emc_training_read_vref_ctrl_idx;
- u32 emc_training_write_fine_ctrl_idx;
- u32 emc_training_write_ctrl_misc_idx;
- u32 emc_training_write_vref_ctrl_idx;
- u32 emc_training_mpc_idx;
- u32 emc_mrw15_idx;
-} burst_regs_t;
-
-
-typedef struct
-{
- u32 burst_regs[221];
- u32 burst_reg_per_ch[8];
- u32 shadow_regs_ca_train[221];
- u32 shadow_regs_quse_train[221];
- u32 shadow_regs_rdwr_train[221];
-} burst_regs_table_t;
-
-typedef struct
-{
- u32 ptfv_dqsosc_movavg_c0d0u0_idx;
- u32 ptfv_dqsosc_movavg_c0d0u1_idx;
- u32 ptfv_dqsosc_movavg_c0d1u0_idx;
- u32 ptfv_dqsosc_movavg_c0d1u1_idx;
- u32 ptfv_dqsosc_movavg_c1d0u0_idx;
- u32 ptfv_dqsosc_movavg_c1d0u1_idx;
- u32 ptfv_dqsosc_movavg_c1d1u0_idx;
- u32 ptfv_dqsosc_movavg_c1d1u1_idx;
- u32 ptfv_write_samples_idx;
- u32 ptfv_dvfs_samples_idx;
- u32 ptfv_movavg_weight_idx;
- u32 ptfv_config_ctrl_idx;
-} ptfv_list_table_t;
-
-typedef struct
-{
- u32 emc0_mrw10_idx;
- u32 emc1_mrw10_idx;
- u32 emc0_mrw11_idx;
- u32 emc1_mrw11_idx;
- u32 emc0_mrw12_idx;
- u32 emc1_mrw12_idx;
- u32 emc0_mrw13_idx;
- u32 emc1_mrw13_idx;
-} burst_reg_per_ch_t;
-
-typedef struct
-{
- u32 emc_pmacro_ib_ddll_long_dqs_rank0_0_idx;
- u32 emc_pmacro_ib_ddll_long_dqs_rank0_1_idx;
- u32 emc_pmacro_ib_ddll_long_dqs_rank0_2_idx;
- u32 emc_pmacro_ib_ddll_long_dqs_rank0_3_idx;
- u32 emc_pmacro_ib_ddll_long_dqs_rank1_0_idx;
- u32 emc_pmacro_ib_ddll_long_dqs_rank1_1_idx;
- u32 emc_pmacro_ib_ddll_long_dqs_rank1_2_idx;
- u32 emc_pmacro_ib_ddll_long_dqs_rank1_3_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte0_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte0_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte0_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte1_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte1_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte1_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte2_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte2_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte2_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte3_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte3_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte3_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte4_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte4_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte4_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte5_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte5_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte5_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte6_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte6_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte6_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte7_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte7_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank0_byte7_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte0_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte0_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte0_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte1_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte1_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte1_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte2_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte2_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte2_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte3_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte3_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte3_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte4_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte4_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte4_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte5_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte5_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte5_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte6_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte6_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte6_2_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte7_0_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte7_1_idx;
- u32 emc_pmacro_ib_ddll_short_dq_rank1_byte7_2_idx;
- u32 emc_pmacro_ib_vref_dqs_0_idx;
- u32 emc_pmacro_ib_vref_dqs_1_idx;
- u32 emc_pmacro_ib_vref_dq_0_idx;
- u32 emc_pmacro_ib_vref_dq_1_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank0_0_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank0_1_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank0_2_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank0_3_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank0_4_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank0_5_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_0_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_1_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_2_idx;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_3_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte0_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte0_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte0_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte1_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte1_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte1_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte2_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte2_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte2_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte3_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte3_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte3_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte4_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte4_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte4_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte5_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte5_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte5_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte6_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte6_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte6_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte7_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte7_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_byte7_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd0_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd0_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd0_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd1_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd1_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd1_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd2_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd2_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd2_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd3_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd3_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank0_cmd3_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte0_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte0_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte0_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte1_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte1_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte1_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte2_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte2_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte2_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte3_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte3_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte3_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte4_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte4_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte4_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte5_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte5_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte5_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte6_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte6_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte6_2_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte7_0_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte7_1_idx;
- u32 emc_pmacro_ob_ddll_short_dq_rank1_byte7_2_idx;
- u32 emc_pmacro_quse_ddll_rank0_0_idx;
- u32 emc_pmacro_quse_ddll_rank0_1_idx;
- u32 emc_pmacro_quse_ddll_rank0_2_idx;
- u32 emc_pmacro_quse_ddll_rank0_3_idx;
- u32 emc_pmacro_quse_ddll_rank1_0_idx;
- u32 emc_pmacro_quse_ddll_rank1_1_idx;
- u32 emc_pmacro_quse_ddll_rank1_2_idx;
- u32 emc_pmacro_quse_ddll_rank1_3_idx;
-} trim_regs_t;
-
-typedef struct
-{
- u32 emc_cmd_brlshft_0_idx;
- u32 emc_cmd_brlshft_1_idx;
- u32 emc0_data_brlshft_0_idx;
- u32 emc1_data_brlshft_0_idx;
- u32 emc0_data_brlshft_1_idx;
- u32 emc1_data_brlshft_1_idx;
- u32 emc_quse_brlshft_0_idx;
- u32 emc_quse_brlshft_1_idx;
- u32 emc_quse_brlshft_2_idx;
- u32 emc_quse_brlshft_3_idx;
-} trim_perch_regs_t;
-
-typedef struct
-{
- u32 t_rp;
- u32 t_fc_lpddr4;
- u32 t_rfc;
- u32 t_pdex;
- u32 rl;
-} dram_timings_t;
-
-typedef struct
-{
- u32 emc0_training_opt_dqs_ib_vref_rank0_idx;
- u32 emc1_training_opt_dqs_ib_vref_rank0_idx;
- u32 emc0_training_opt_dqs_ib_vref_rank1_idx;
- u32 emc1_training_opt_dqs_ib_vref_rank1_idx;
-} vref_perch_regs_t;
-
-typedef struct
-{
- u32 trim_regs[138];
- u32 trim_perch_regs[10];
- u32 vref_perch_regs[4];
-} trim_regs_table_t;
-
-typedef struct
-{
- u32 rev;
- char dvfs_ver[60];
- u32 rate_khz;
- u32 min_volt;
- u32 gpu_min_volt;
- char clock_src[32];
- u32 clk_src_emc;
- u32 needs_training;
- u32 training_pattern;
- u32 trained;
- u32 periodic_training;
- u32 trained_dram_clktree_c0d0u0;
- u32 trained_dram_clktree_c0d0u1;
- u32 trained_dram_clktree_c0d1u0;
- u32 trained_dram_clktree_c0d1u1;
- u32 trained_dram_clktree_c1d0u0;
- u32 trained_dram_clktree_c1d0u1;
- u32 trained_dram_clktree_c1d1u0;
- u32 trained_dram_clktree_c1d1u1;
- u32 current_dram_clktree_c0d0u0;
- u32 current_dram_clktree_c0d0u1;
- u32 current_dram_clktree_c0d1u0;
- u32 current_dram_clktree_c0d1u1;
- u32 current_dram_clktree_c1d0u0;
- u32 current_dram_clktree_c1d0u1;
- u32 current_dram_clktree_c1d1u0;
- u32 current_dram_clktree_c1d1u1;
- u32 run_clocks;
- u32 tree_margin;
- u32 num_burst;
- u32 num_burst_per_ch;
- u32 num_trim;
- u32 num_trim_per_ch;
- u32 num_mc_regs;
- u32 num_up_down;
- u32 vref_num;
- u32 training_mod_num;
- u32 dram_timing_num;
-
- ptfv_list_table_t ptfv_list;
-
- burst_regs_t burst_regs;
- burst_reg_per_ch_t burst_reg_per_ch;
- burst_regs_t shadow_regs_ca_train;
- burst_regs_t shadow_regs_quse_train;
- burst_regs_t shadow_regs_rdwr_train;
- trim_regs_t trim_regs;
- trim_perch_regs_t trim_perch_regs;
- vref_perch_regs_t vref_perch_regs;
- dram_timings_t dram_timings;
-
- u32 training_mod_regs[20];
- u32 save_restore_mod_regs[12];
- u32 burst_mc_regs[33];
- u32 la_scale_regs[24];
-
- u32 min_mrs_wait;
- u32 emc_mrw;
- u32 emc_mrw2;
- u32 emc_mrw3;
- u32 emc_mrw4;
- u32 emc_mrw9;
- u32 emc_mrs;
- u32 emc_emrs;
- u32 emc_emrs2;
- u32 emc_auto_cal_config;
- u32 emc_auto_cal_config2;
- u32 emc_auto_cal_config3;
- u32 emc_auto_cal_config4;
- u32 emc_auto_cal_config5;
- u32 emc_auto_cal_config6;
- u32 emc_auto_cal_config7;
- u32 emc_auto_cal_config8;
- u32 emc_cfg_2;
- u32 emc_sel_dpd_ctrl;
- u32 emc_fdpd_ctrl_cmd_no_ramp;
- u32 dll_clk_src;
- u32 clk_out_enb_x_0_clk_enb_emc_dll;
- u32 latency;
-} emc_table_t;
-
-#endif
\ No newline at end of file
diff --git a/nyx/nyx_gui/mem/sdram.c b/nyx/nyx_gui/mem/sdram.c
deleted file mode 100644
index 5a3dab0..0000000
--- a/nyx/nyx_gui/mem/sdram.c
+++ /dev/null
@@ -1,805 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 balika011
- * Copyright (c) 2019-2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "mc.h"
-#include "emc.h"
-#include "sdram_param_t210.h"
-#include "../../../common/memory_map.h"
-#include "../power/max77620.h"
-#include "../power/max7762x.h"
-#include "../soc/clock.h"
-#include "../soc/fuse.h"
-#include "../soc/i2c.h"
-#include "../soc/pmc.h"
-#include "../soc/t210.h"
-#include "../utils/util.h"
-
-#define CONFIG_SDRAM_KEEP_ALIVE
-
-#ifdef CONFIG_SDRAM_COMPRESS_CFG
-#include "../libs/compr/lz.h"
-#include "sdram_config_lz.inl"
-#else
-#include "sdram_config.inl"
-#endif
-
-static u32 _get_sdram_id()
-{
- return ((fuse_read_odm(4) & 0xF8) >> 3);
-}
-
-static bool _sdram_wait_emc_status(u32 reg_offset, u32 bit_mask, bool updated_state, s32 emc_channel)
-{
- bool err = true;
-
- for (s32 i = 0; i < EMC_STATUS_UPDATE_TIMEOUT; i++)
- {
- if (emc_channel)
- {
- if (emc_channel != 1)
- goto done;
-
- if (((EMC_CH1(reg_offset) & bit_mask) != 0) == updated_state)
- {
- err = false;
- break;
- }
- }
- else if (((EMC(reg_offset) & bit_mask) != 0) == updated_state)
- {
- err = false;
- break;
- }
- usleep(1);
- }
-
-done:
- return err;
-}
-
-static void _sdram_req_mrr_data(u32 data, bool dual_channel)
-{
- EMC(EMC_MRR) = data;
- _sdram_wait_emc_status(EMC_EMC_STATUS, EMC_STATUS_MRR_DIVLD, true, EMC_CHAN0);
- if (dual_channel)
- _sdram_wait_emc_status(EMC_EMC_STATUS, EMC_STATUS_MRR_DIVLD, true, EMC_CHAN1);
-}
-
-emc_mr_data_t sdram_read_mrx(emc_mr_t mrx)
-{
- emc_mr_data_t data;
- _sdram_req_mrr_data((1 << 31) | (mrx << 16), EMC_CHAN0);
- data.dev0_ch0 = EMC(EMC_MRR) & 0xFF;
- data.dev0_ch1 = (EMC(EMC_MRR) & 0xFF00 >> 8);
- _sdram_req_mrr_data((1 << 30) | (mrx << 16), EMC_CHAN1);
- data.dev1_ch0 = EMC(EMC_MRR) & 0xFF;
- data.dev1_ch1 = (EMC(EMC_MRR) & 0xFF00 >> 8);
-
- return data;
-}
-
-static void _sdram_config(const sdram_params_t *params)
-{
- // Program DPD3/DPD4 regs (coldboot path).
- // Enable sel_dpd on unused pins.
- u32 dpd_req = (params->emc_pmc_scratch1 & 0x3FFFFFFF) | 0x80000000;
- PMC(APBDEV_PMC_IO_DPD3_REQ) = (dpd_req ^ 0xFFFF) & 0xC000FFFF;
- usleep(params->pmc_io_dpd3_req_wait);
-
- // Disable e_dpd_vttgen.
- dpd_req = (params->emc_pmc_scratch2 & 0x3FFFFFFF) | 0x80000000;
- PMC(APBDEV_PMC_IO_DPD4_REQ) = (dpd_req & 0xFFFF0000) ^ 0x3FFF0000;
- usleep(params->pmc_io_dpd4_req_wait);
-
- // Disable e_dpd_bg.
- PMC(APBDEV_PMC_IO_DPD4_REQ) = (dpd_req ^ 0xFFFF) & 0xC000FFFF;
- usleep(params->pmc_io_dpd4_req_wait);
-
- PMC(APBDEV_PMC_WEAK_BIAS) = 0;
- usleep(1);
-
- // Start clocks.
- CLOCK(CLK_RST_CONTROLLER_PLLM_MISC1) = params->pllm_setup_control;
- CLOCK(CLK_RST_CONTROLLER_PLLM_MISC2) = 0;
-
-#ifdef CONFIG_SDRAM_KEEP_ALIVE
- CLOCK(CLK_RST_CONTROLLER_PLLM_BASE) =
- (params->pllm_feedback_divider << 8) | params->pllm_input_divider | ((params->pllm_post_divider & 0xFFFF) << 20) | PLLCX_BASE_ENABLE;
-#else
- u32 pllm_div = (params->pllm_feedback_divider << 8) | params->pllm_input_divider | ((params->pllm_post_divider & 0xFFFF) << 20);
- CLOCK(CLK_RST_CONTROLLER_PLLM_BASE) = pllm_div;
- CLOCK(CLK_RST_CONTROLLER_PLLM_BASE) = pllm_div | PLLCX_BASE_ENABLE;
-#endif
-
- u32 wait_end = get_tmr_us() + 300;
- while (!(CLOCK(CLK_RST_CONTROLLER_PLLM_BASE) & 0x8000000))
- {
- if (get_tmr_us() >= wait_end)
- goto break_nosleep;
- }
- usleep(10);
-
-break_nosleep:
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = ((params->mc_emem_arb_misc0 >> 11) & 0x10000) | (params->emc_clock_source & 0xFFFEFFFF);
- if (params->emc_clock_source_dll)
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC_DLL) = params->emc_clock_source_dll;
- if (params->clear_clock2_mc1)
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = 0x40000000; // Clear Reset to MC1.
-
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = 0x2000001; // Enable EMC and MEM clocks.
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) = 0x4000; // Enable EMC_DLL clock.
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_CLR) = 0x2000001; // Clear EMC and MEM resets.
-
- // Set pad macros.
- EMC(EMC_PMACRO_VTTGEN_CTRL_0) = params->emc_pmacro_vttgen_ctrl0;
- EMC(EMC_PMACRO_VTTGEN_CTRL_1) = params->emc_pmacro_vttgen_ctrl1;
- EMC(EMC_PMACRO_VTTGEN_CTRL_2) = params->emc_pmacro_vttgen_ctrl2;
-
- EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place.
- usleep(10); // Ensure the regulators settle.
-
- // Select EMC write mux.
- EMC(EMC_DBG) = (params->emc_dbg_write_mux << 1) | params->emc_dbg;
-
- // Patch 2 using BCT spare variables.
- if (params->emc_bct_spare2)
- *(vu32 *)params->emc_bct_spare2 = params->emc_bct_spare3;
-
- // Program CMD mapping. Required before brick mapping, else
- // we can't guarantee CK will be differential at all times.
- EMC(EMC_FBIO_CFG7) = params->emc_fbio_cfg7;
- EMC(EMC_CMD_MAPPING_CMD0_0) = params->emc_cmd_mapping_cmd0_0;
- EMC(EMC_CMD_MAPPING_CMD0_1) = params->emc_cmd_mapping_cmd0_1;
- EMC(EMC_CMD_MAPPING_CMD0_2) = params->emc_cmd_mapping_cmd0_2;
- EMC(EMC_CMD_MAPPING_CMD1_0) = params->emc_cmd_mapping_cmd1_0;
- EMC(EMC_CMD_MAPPING_CMD1_1) = params->emc_cmd_mapping_cmd1_1;
- EMC(EMC_CMD_MAPPING_CMD1_2) = params->emc_cmd_mapping_cmd1_2;
- EMC(EMC_CMD_MAPPING_CMD2_0) = params->emc_cmd_mapping_cmd2_0;
- EMC(EMC_CMD_MAPPING_CMD2_1) = params->emc_cmd_mapping_cmd2_1;
- EMC(EMC_CMD_MAPPING_CMD2_2) = params->emc_cmd_mapping_cmd2_2;
- EMC(EMC_CMD_MAPPING_CMD3_0) = params->emc_cmd_mapping_cmd3_0;
- EMC(EMC_CMD_MAPPING_CMD3_1) = params->emc_cmd_mapping_cmd3_1;
- EMC(EMC_CMD_MAPPING_CMD3_2) = params->emc_cmd_mapping_cmd3_2;
- EMC(EMC_CMD_MAPPING_BYTE) = params->emc_cmd_mapping_byte;
-
- // Program brick mapping.
- EMC(EMC_PMACRO_BRICK_MAPPING_0) = params->emc_pmacro_brick_mapping0;
- EMC(EMC_PMACRO_BRICK_MAPPING_1) = params->emc_pmacro_brick_mapping1;
- EMC(EMC_PMACRO_BRICK_MAPPING_2) = params->emc_pmacro_brick_mapping2;
-
- EMC(EMC_PMACRO_BRICK_CTRL_RFU1) = (params->emc_pmacro_brick_ctrl_rfu1 & 0x1120112) | 0x1EED1EED;
-
- // This is required to do any reads from the pad macros.
- EMC(EMC_CONFIG_SAMPLE_DELAY) = params->emc_config_sample_delay;
-
- EMC(EMC_FBIO_CFG8) = params->emc_fbio_cfg8;
-
- // Set swizzle for Rank 0.
- EMC(EMC_SWIZZLE_RANK0_BYTE0) = params->emc_swizzle_rank0_byte0;
- EMC(EMC_SWIZZLE_RANK0_BYTE1) = params->emc_swizzle_rank0_byte1;
- EMC(EMC_SWIZZLE_RANK0_BYTE2) = params->emc_swizzle_rank0_byte2;
- EMC(EMC_SWIZZLE_RANK0_BYTE3) = params->emc_swizzle_rank0_byte3;
- // Set swizzle for Rank 1.
- EMC(EMC_SWIZZLE_RANK1_BYTE0) = params->emc_swizzle_rank1_byte0;
- EMC(EMC_SWIZZLE_RANK1_BYTE1) = params->emc_swizzle_rank1_byte1;
- EMC(EMC_SWIZZLE_RANK1_BYTE2) = params->emc_swizzle_rank1_byte2;
- EMC(EMC_SWIZZLE_RANK1_BYTE3) = params->emc_swizzle_rank1_byte3;
-
- // Patch 3 using BCT spare variables.
- if (params->emc_bct_spare6)
- *(vu32 *)params->emc_bct_spare6 = params->emc_bct_spare7;
-
- // Set pad controls.
- EMC(EMC_XM2COMPPADCTRL) = params->emc_xm2_comp_pad_ctrl;
- EMC(EMC_XM2COMPPADCTRL2) = params->emc_xm2_comp_pad_ctrl2;
- EMC(EMC_XM2COMPPADCTRL3) = params->emc_xm2_comp_pad_ctrl3;
-
- // Program Autocal controls with shadowed register fields.
- EMC(EMC_AUTO_CAL_CONFIG2) = params->emc_auto_cal_config2;
- EMC(EMC_AUTO_CAL_CONFIG3) = params->emc_auto_cal_config3;
- EMC(EMC_AUTO_CAL_CONFIG4) = params->emc_auto_cal_config4;
- EMC(EMC_AUTO_CAL_CONFIG5) = params->emc_auto_cal_config5;
- EMC(EMC_AUTO_CAL_CONFIG6) = params->emc_auto_cal_config6;
- EMC(EMC_AUTO_CAL_CONFIG7) = params->emc_auto_cal_config7;
- EMC(EMC_AUTO_CAL_CONFIG8) = params->emc_auto_cal_config8;
-
- EMC(EMC_PMACRO_RX_TERM) = params->emc_pmacro_rx_term;
- EMC(EMC_PMACRO_DQ_TX_DRV) = params->emc_pmacro_dq_tx_drive;
- EMC(EMC_PMACRO_CA_TX_DRV) = params->emc_pmacro_ca_tx_drive;
- EMC(EMC_PMACRO_CMD_TX_DRV) = params->emc_pmacro_cmd_tx_drive;
- EMC(EMC_PMACRO_AUTOCAL_CFG_COMMON) = params->emc_pmacro_auto_cal_common;
- EMC(EMC_AUTO_CAL_CHANNEL) = params->emc_auto_cal_channel;
- EMC(EMC_PMACRO_ZCTRL) = params->emc_pmacro_zcrtl;
-
- EMC(EMC_DLL_CFG_0) = params->emc_dll_cfg0;
- EMC(EMC_DLL_CFG_1) = params->emc_dll_cfg1;
- EMC(EMC_CFG_DIG_DLL_1) = params->emc_cfg_dig_dll_1;
-
- EMC(EMC_DATA_BRLSHFT_0) = params->emc_data_brlshft0;
- EMC(EMC_DATA_BRLSHFT_1) = params->emc_data_brlshft1;
- EMC(EMC_DQS_BRLSHFT_0) = params->emc_dqs_brlshft0;
- EMC(EMC_DQS_BRLSHFT_1) = params->emc_dqs_brlshft1;
- EMC(EMC_CMD_BRLSHFT_0) = params->emc_cmd_brlshft0;
- EMC(EMC_CMD_BRLSHFT_1) = params->emc_cmd_brlshft1;
- EMC(EMC_CMD_BRLSHFT_2) = params->emc_cmd_brlshft2;
- EMC(EMC_CMD_BRLSHFT_3) = params->emc_cmd_brlshft3;
- EMC(EMC_QUSE_BRLSHFT_0) = params->emc_quse_brlshft0;
- EMC(EMC_QUSE_BRLSHFT_1) = params->emc_quse_brlshft1;
- EMC(EMC_QUSE_BRLSHFT_2) = params->emc_quse_brlshft2;
- EMC(EMC_QUSE_BRLSHFT_3) = params->emc_quse_brlshft3;
-
- EMC(EMC_PMACRO_BRICK_CTRL_RFU1) = (params->emc_pmacro_brick_ctrl_rfu1 & 0x1BF01BF) | 0x1E401E40;
- EMC(EMC_PMACRO_PAD_CFG_CTRL) = params->emc_pmacro_pad_cfg_ctrl;
-
- EMC(EMC_PMACRO_CMD_BRICK_CTRL_FDPD) = params->emc_pmacro_cmd_brick_ctrl_fdpd;
- EMC(EMC_PMACRO_BRICK_CTRL_RFU2) = params->emc_pmacro_brick_ctrl_rfu2 & 0xFF7FFF7F;
- EMC(EMC_PMACRO_DATA_BRICK_CTRL_FDPD) = params->emc_pmacro_data_brick_ctrl_fdpd;
- EMC(EMC_PMACRO_BG_BIAS_CTRL_0) = params->emc_pmacro_bg_bias_ctrl0;
- EMC(EMC_PMACRO_DATA_PAD_RX_CTRL) = params->emc_pmacro_data_pad_rx_ctrl;
- EMC(EMC_PMACRO_CMD_PAD_RX_CTRL) = params->emc_pmacro_cmd_pad_rx_ctrl;
- EMC(EMC_PMACRO_DATA_PAD_TX_CTRL) = params->emc_pmacro_data_pad_tx_ctrl;
- EMC(EMC_PMACRO_DATA_RX_TERM_MODE) = params->emc_pmacro_data_rx_term_mode;
- EMC(EMC_PMACRO_CMD_RX_TERM_MODE) = params->emc_pmacro_cmd_rx_term_mode;
- EMC(EMC_PMACRO_CMD_PAD_TX_CTRL) = params->emc_pmacro_cmd_pad_tx_ctrl;
-
- EMC(EMC_CFG_3) = params->emc_cfg3;
- EMC(EMC_PMACRO_TX_PWRD_0) = params->emc_pmacro_tx_pwrd0;
- EMC(EMC_PMACRO_TX_PWRD_1) = params->emc_pmacro_tx_pwrd1;
- EMC(EMC_PMACRO_TX_PWRD_2) = params->emc_pmacro_tx_pwrd2;
- EMC(EMC_PMACRO_TX_PWRD_3) = params->emc_pmacro_tx_pwrd3;
- EMC(EMC_PMACRO_TX_PWRD_4) = params->emc_pmacro_tx_pwrd4;
- EMC(EMC_PMACRO_TX_PWRD_5) = params->emc_pmacro_tx_pwrd5;
- EMC(EMC_PMACRO_TX_SEL_CLK_SRC_0) = params->emc_pmacro_tx_sel_clk_src0;
- EMC(EMC_PMACRO_TX_SEL_CLK_SRC_1) = params->emc_pmacro_tx_sel_clk_src1;
- EMC(EMC_PMACRO_TX_SEL_CLK_SRC_2) = params->emc_pmacro_tx_sel_clk_src2;
- EMC(EMC_PMACRO_TX_SEL_CLK_SRC_3) = params->emc_pmacro_tx_sel_clk_src3;
- EMC(EMC_PMACRO_TX_SEL_CLK_SRC_4) = params->emc_pmacro_tx_sel_clk_src4;
- EMC(EMC_PMACRO_TX_SEL_CLK_SRC_5) = params->emc_pmacro_tx_sel_clk_src5;
- EMC(EMC_PMACRO_DDLL_BYPASS) = params->emc_pmacro_ddll_bypass;
- EMC(EMC_PMACRO_DDLL_PWRD_0) = params->emc_pmacro_ddll_pwrd0;
- EMC(EMC_PMACRO_DDLL_PWRD_1) = params->emc_pmacro_ddll_pwrd1;
- EMC(EMC_PMACRO_DDLL_PWRD_2) = params->emc_pmacro_ddll_pwrd2;
- EMC(EMC_PMACRO_CMD_CTRL_0) = params->emc_pmacro_cmd_ctrl0;
- EMC(EMC_PMACRO_CMD_CTRL_1) = params->emc_pmacro_cmd_ctrl1;
- EMC(EMC_PMACRO_CMD_CTRL_2) = params->emc_pmacro_cmd_ctrl2;
- EMC(EMC_PMACRO_IB_VREF_DQ_0) = params->emc_pmacro_ib_vref_dq_0;
- EMC(EMC_PMACRO_IB_VREF_DQ_1) = params->emc_pmacro_ib_vref_dq_1;
- EMC(EMC_PMACRO_IB_VREF_DQS_0) = params->emc_pmacro_ib_vref_dqs_0;
- EMC(EMC_PMACRO_IB_VREF_DQS_1) = params->emc_pmacro_ib_vref_dqs_1;
- EMC(EMC_PMACRO_IB_RXRT) = params->emc_pmacro_ib_rxrt;
-
- EMC(EMC_PMACRO_QUSE_DDLL_RANK0_0) = params->emc_pmacro_quse_ddll_rank0_0;
- EMC(EMC_PMACRO_QUSE_DDLL_RANK0_1) = params->emc_pmacro_quse_ddll_rank0_1;
- EMC(EMC_PMACRO_QUSE_DDLL_RANK0_2) = params->emc_pmacro_quse_ddll_rank0_2;
- EMC(EMC_PMACRO_QUSE_DDLL_RANK0_3) = params->emc_pmacro_quse_ddll_rank0_3;
- EMC(EMC_PMACRO_QUSE_DDLL_RANK0_4) = params->emc_pmacro_quse_ddll_rank0_4;
- EMC(EMC_PMACRO_QUSE_DDLL_RANK0_5) = params->emc_pmacro_quse_ddll_rank0_5;
- EMC(EMC_PMACRO_QUSE_DDLL_RANK1_0) = params->emc_pmacro_quse_ddll_rank1_0;
- EMC(EMC_PMACRO_QUSE_DDLL_RANK1_1) = params->emc_pmacro_quse_ddll_rank1_1;
- EMC(EMC_PMACRO_QUSE_DDLL_RANK1_2) = params->emc_pmacro_quse_ddll_rank1_2;
- EMC(EMC_PMACRO_QUSE_DDLL_RANK1_3) = params->emc_pmacro_quse_ddll_rank1_3;
- EMC(EMC_PMACRO_QUSE_DDLL_RANK1_4) = params->emc_pmacro_quse_ddll_rank1_4;
- EMC(EMC_PMACRO_QUSE_DDLL_RANK1_5) = params->emc_pmacro_quse_ddll_rank1_5;
- EMC(EMC_PMACRO_BRICK_CTRL_RFU1) = params->emc_pmacro_brick_ctrl_rfu1;
-
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0) = params->emc_pmacro_ob_ddll_long_dq_rank0_0;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1) = params->emc_pmacro_ob_ddll_long_dq_rank0_1;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2) = params->emc_pmacro_ob_ddll_long_dq_rank0_2;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3) = params->emc_pmacro_ob_ddll_long_dq_rank0_3;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4) = params->emc_pmacro_ob_ddll_long_dq_rank0_4;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5) = params->emc_pmacro_ob_ddll_long_dq_rank0_5;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0) = params->emc_pmacro_ob_ddll_long_dq_rank1_0;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1) = params->emc_pmacro_ob_ddll_long_dq_rank1_1;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2) = params->emc_pmacro_ob_ddll_long_dq_rank1_2;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3) = params->emc_pmacro_ob_ddll_long_dq_rank1_3;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_4) = params->emc_pmacro_ob_ddll_long_dq_rank1_4;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_5) = params->emc_pmacro_ob_ddll_long_dq_rank1_5;
-
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_0) = params->emc_pmacro_ob_ddll_long_dqs_rank0_0;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_1) = params->emc_pmacro_ob_ddll_long_dqs_rank0_1;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_2) = params->emc_pmacro_ob_ddll_long_dqs_rank0_2;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_3) = params->emc_pmacro_ob_ddll_long_dqs_rank0_3;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_4) = params->emc_pmacro_ob_ddll_long_dqs_rank0_4;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_5) = params->emc_pmacro_ob_ddll_long_dqs_rank0_5;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_0) = params->emc_pmacro_ob_ddll_long_dqs_rank1_0;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_1) = params->emc_pmacro_ob_ddll_long_dqs_rank1_1;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_2) = params->emc_pmacro_ob_ddll_long_dqs_rank1_2;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_3) = params->emc_pmacro_ob_ddll_long_dqs_rank1_3;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_4) = params->emc_pmacro_ob_ddll_long_dqs_rank1_4;
- EMC(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_5) = params->emc_pmacro_ob_ddll_long_dqs_rank1_5;
- EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0) = params->emc_pmacro_ib_ddll_long_dqs_rank0_0;
- EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1) = params->emc_pmacro_ib_ddll_long_dqs_rank0_1;
- EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2) = params->emc_pmacro_ib_ddll_long_dqs_rank0_2;
- EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3) = params->emc_pmacro_ib_ddll_long_dqs_rank0_3;
- EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0) = params->emc_pmacro_ib_ddll_long_dqs_rank1_0;
- EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1) = params->emc_pmacro_ib_ddll_long_dqs_rank1_1;
- EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2) = params->emc_pmacro_ib_ddll_long_dqs_rank1_2;
- EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3) = params->emc_pmacro_ib_ddll_long_dqs_rank1_3;
-
- EMC(EMC_PMACRO_DDLL_LONG_CMD_0) = params->emc_pmacro_ddll_long_cmd_0;
- EMC(EMC_PMACRO_DDLL_LONG_CMD_1) = params->emc_pmacro_ddll_long_cmd_1;
- EMC(EMC_PMACRO_DDLL_LONG_CMD_2) = params->emc_pmacro_ddll_long_cmd_2;
- EMC(EMC_PMACRO_DDLL_LONG_CMD_3) = params->emc_pmacro_ddll_long_cmd_3;
- EMC(EMC_PMACRO_DDLL_LONG_CMD_4) = params->emc_pmacro_ddll_long_cmd_4;
- EMC(EMC_PMACRO_DDLL_SHORT_CMD_0) = params->emc_pmacro_ddll_short_cmd_0;
- EMC(EMC_PMACRO_DDLL_SHORT_CMD_1) = params->emc_pmacro_ddll_short_cmd_1;
- EMC(EMC_PMACRO_DDLL_SHORT_CMD_2) = params->emc_pmacro_ddll_short_cmd_2;
-
- // Common pad macro (cpm).
- EMC(EMC_PMACRO_COMMON_PAD_TX_CTRL) = (params->emc_pmacro_common_pad_tx_ctrl & 1) | 0xE;
-
- // Patch 4 using BCT spare variables.
- if (params->emc_bct_spare4)
- *(vu32 *)params->emc_bct_spare4 = params->emc_bct_spare5;
-
- EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place.
-
- // Initialize MC VPR settings.
- MC(MC_VIDEO_PROTECT_BOM) = params->mc_video_protect_bom;
- MC(MC_VIDEO_PROTECT_BOM_ADR_HI) = params->mc_video_protect_bom_adr_hi;
- MC(MC_VIDEO_PROTECT_SIZE_MB) = params->mc_video_protect_size_mb;
- MC(MC_VIDEO_PROTECT_VPR_OVERRIDE) = params->mc_video_protect_vpr_override;
- MC(MC_VIDEO_PROTECT_VPR_OVERRIDE1) = params->mc_video_protect_vpr_override1;
- MC(MC_VIDEO_PROTECT_GPU_OVERRIDE_0) = params->mc_video_protect_gpu_override0;
- MC(MC_VIDEO_PROTECT_GPU_OVERRIDE_1) = params->mc_video_protect_gpu_override1;
-
- // Program SDRAM geometry parameters.
- MC(MC_EMEM_ADR_CFG) = params->mc_emem_adr_cfg;
- MC(MC_EMEM_ADR_CFG_DEV0) = params->mc_emem_adr_cfg_dev0;
- MC(MC_EMEM_ADR_CFG_DEV1) = params->mc_emem_adr_cfg_dev1;
- MC(MC_EMEM_ADR_CFG_CHANNEL_MASK) = params->mc_emem_adr_cfg_channel_mask;
-
- // Program bank swizzling.
- MC(MC_EMEM_ADR_CFG_BANK_MASK_0) = params->mc_emem_adr_cfg_bank_mask0;
- MC(MC_EMEM_ADR_CFG_BANK_MASK_1) = params->mc_emem_adr_cfg_bank_mask1;
- MC(MC_EMEM_ADR_CFG_BANK_MASK_2) = params->mc_emem_adr_cfg_bank_mask2;
-
- // Program external memory aperture (base and size).
- MC(MC_EMEM_CFG) = params->mc_emem_cfg;
-
- // Program SEC carveout (base and size).
- MC(MC_SEC_CARVEOUT_BOM) = params->mc_sec_carveout_bom;
- MC(MC_SEC_CARVEOUT_ADR_HI) = params->mc_sec_carveout_adr_hi;
- MC(MC_SEC_CARVEOUT_SIZE_MB) = params->mc_sec_carveout_size_mb;
-
- // Program MTS carveout (base and size).
- MC(MC_MTS_CARVEOUT_BOM) = params->mc_mts_carveout_bom;
- MC(MC_MTS_CARVEOUT_ADR_HI) = params->mc_mts_carveout_adr_hi;
- MC(MC_MTS_CARVEOUT_SIZE_MB) = params->mc_mts_carveout_size_mb;
-
- // Program the memory arbiter.
- MC(MC_EMEM_ARB_CFG) = params->mc_emem_arb_cfg;
- MC(MC_EMEM_ARB_OUTSTANDING_REQ) = params->mc_emem_arb_outstanding_req;
- MC(MC_EMEM_ARB_REFPB_HP_CTRL) = params->emc_emem_arb_refpb_hp_ctrl;
- MC(MC_EMEM_ARB_REFPB_BANK_CTRL) = params->emc_emem_arb_refpb_bank_ctrl;
- MC(MC_EMEM_ARB_TIMING_RCD) = params->mc_emem_arb_timing_rcd;
- MC(MC_EMEM_ARB_TIMING_RP) = params->mc_emem_arb_timing_rp;
- MC(MC_EMEM_ARB_TIMING_RC) = params->mc_emem_arb_timing_rc;
- MC(MC_EMEM_ARB_TIMING_RAS) = params->mc_emem_arb_timing_ras;
- MC(MC_EMEM_ARB_TIMING_FAW) = params->mc_emem_arb_timing_faw;
- MC(MC_EMEM_ARB_TIMING_RRD) = params->mc_emem_arb_timing_rrd;
- MC(MC_EMEM_ARB_TIMING_RAP2PRE) = params->mc_emem_arb_timing_rap2pre;
- MC(MC_EMEM_ARB_TIMING_WAP2PRE) = params->mc_emem_arb_timing_wap2pre;
- MC(MC_EMEM_ARB_TIMING_R2R) = params->mc_emem_arb_timing_r2r;
- MC(MC_EMEM_ARB_TIMING_W2W) = params->mc_emem_arb_timing_w2w;
- MC(MC_EMEM_ARB_TIMING_CCDMW) = params->mc_emem_arb_timing_ccdmw;
- MC(MC_EMEM_ARB_TIMING_R2W) = params->mc_emem_arb_timing_r2w;
- MC(MC_EMEM_ARB_TIMING_W2R) = params->mc_emem_arb_timing_w2r;
- MC(MC_EMEM_ARB_TIMING_RFCPB) = params->mc_emem_arb_timing_rfcpb;
- MC(MC_EMEM_ARB_DA_TURNS) = params->mc_emem_arb_da_turns;
- MC(MC_EMEM_ARB_DA_COVERS) = params->mc_emem_arb_da_covers;
- MC(MC_EMEM_ARB_MISC0) = params->mc_emem_arb_misc0;
- MC(MC_EMEM_ARB_MISC1) = params->mc_emem_arb_misc1;
- MC(MC_EMEM_ARB_MISC2) = params->mc_emem_arb_misc2;
- MC(MC_EMEM_ARB_RING1_THROTTLE) = params->mc_emem_arb_ring1_throttle;
- MC(MC_EMEM_ARB_OVERRIDE) = params->mc_emem_arb_override;
- MC(MC_EMEM_ARB_OVERRIDE_1) = params->mc_emem_arb_override1;
- MC(MC_EMEM_ARB_RSV) = params->mc_emem_arb_rsv;
- MC(MC_DA_CONFIG0) = params->mc_da_cfg0;
-
- MC(MC_TIMING_CONTROL) = 1; // Trigger MC timing update.
-
- // Program second-level clock enable overrides.
- MC(MC_CLKEN_OVERRIDE) = params->mc_clken_override;
-
- // Program statistics gathering.
- MC(MC_STAT_CONTROL) = params->mc_stat_control;
-
- // Program SDRAM geometry parameters.
- EMC(EMC_ADR_CFG) = params->emc_adr_cfg;
-
- // Program second-level clock enable overrides.
- EMC(EMC_CLKEN_OVERRIDE) = params->emc_clken_override;
-
- // Program EMC pad auto calibration.
- EMC(EMC_PMACRO_AUTOCAL_CFG_0) = params->emc_pmacro_auto_cal_cfg0;
- EMC(EMC_PMACRO_AUTOCAL_CFG_1) = params->emc_pmacro_auto_cal_cfg1;
- EMC(EMC_PMACRO_AUTOCAL_CFG_2) = params->emc_pmacro_auto_cal_cfg2;
-
- EMC(EMC_AUTO_CAL_VREF_SEL_0) = params->emc_auto_cal_vref_sel0;
- EMC(EMC_AUTO_CAL_VREF_SEL_1) = params->emc_auto_cal_vref_sel1;
-
- EMC(EMC_AUTO_CAL_INTERVAL) = params->emc_auto_cal_interval;
- EMC(EMC_AUTO_CAL_CONFIG) = params->emc_auto_cal_config;
- usleep(params->emc_auto_cal_wait);
-
- // Patch 5 using BCT spare variables.
- if (params->emc_bct_spare8)
- *(vu32 *)params->emc_bct_spare8 = params->emc_bct_spare9;
-
- // Program EMC timing configuration.
- EMC(EMC_CFG_2) = params->emc_cfg2;
- EMC(EMC_CFG_PIPE) = params->emc_cfg_pipe;
- EMC(EMC_CFG_PIPE_1) = params->emc_cfg_pipe1;
- EMC(EMC_CFG_PIPE_2) = params->emc_cfg_pipe2;
- EMC(EMC_CMDQ) = params->emc_cmd_q;
- EMC(EMC_MC2EMCQ) = params->emc_mc2emc_q;
- EMC(EMC_MRS_WAIT_CNT) = params->emc_mrs_wait_cnt;
- EMC(EMC_MRS_WAIT_CNT2) = params->emc_mrs_wait_cnt2;
- EMC(EMC_FBIO_CFG5) = params->emc_fbio_cfg5;
- EMC(EMC_RC) = params->emc_rc;
- EMC(EMC_RFC) = params->emc_rfc;
- EMC(EMC_RFCPB) = params->emc_rfc_pb;
- EMC(EMC_REFCTRL2) = params->emc_ref_ctrl2;
- EMC(EMC_RFC_SLR) = params->emc_rfc_slr;
- EMC(EMC_RAS) = params->emc_ras;
- EMC(EMC_RP) = params->emc_rp;
- EMC(EMC_TPPD) = params->emc_tppd;
- EMC(EMC_R2R) = params->emc_r2r;
- EMC(EMC_W2W) = params->emc_w2w;
- EMC(EMC_R2W) = params->emc_r2w;
- EMC(EMC_W2R) = params->emc_w2r;
- EMC(EMC_R2P) = params->emc_r2p;
- EMC(EMC_W2P) = params->emc_w2p;
- EMC(EMC_CCDMW) = params->emc_ccdmw;
- EMC(EMC_RD_RCD) = params->emc_rd_rcd;
- EMC(EMC_WR_RCD) = params->emc_wr_rcd;
- EMC(EMC_RRD) = params->emc_rrd;
- EMC(EMC_REXT) = params->emc_rext;
- EMC(EMC_WEXT) = params->emc_wext;
- EMC(EMC_WDV) = params->emc_wdv;
- EMC(EMC_WDV_CHK) = params->emc_wdv_chk;
- EMC(EMC_WSV) = params->emc_wsv;
- EMC(EMC_WEV) = params->emc_wev;
- EMC(EMC_WDV_MASK) = params->emc_wdv_mask;
- EMC(EMC_WS_DURATION) = params->emc_ws_duration;
- EMC(EMC_WE_DURATION) = params->emc_we_duration;
- EMC(EMC_QUSE) = params->emc_quse;
- EMC(EMC_QUSE_WIDTH) = params->emc_quse_width;
- EMC(EMC_IBDLY) = params->emc_ibdly;
- EMC(EMC_OBDLY) = params->emc_obdly;
- EMC(EMC_EINPUT) = params->emc_einput;
- EMC(EMC_EINPUT_DURATION) = params->emc_einput_duration;
- EMC(EMC_PUTERM_EXTRA) = params->emc_puterm_extra;
- EMC(EMC_PUTERM_WIDTH) = params->emc_puterm_width;
-
- EMC(EMC_PMACRO_COMMON_PAD_TX_CTRL) = params->emc_pmacro_common_pad_tx_ctrl;
- EMC(EMC_DBG) = params->emc_dbg;
- EMC(EMC_QRST) = params->emc_qrst;
- EMC(EMC_ISSUE_QRST) = 1;
- EMC(EMC_ISSUE_QRST) = 0;
- EMC(EMC_QSAFE) = params->emc_qsafe;
- EMC(EMC_RDV) = params->emc_rdv;
- EMC(EMC_RDV_MASK) = params->emc_rdv_mask;
- EMC(EMC_RDV_EARLY) = params->emc_rdv_early;
- EMC(EMC_RDV_EARLY_MASK) = params->emc_rdv_early_mask;
- EMC(EMC_QPOP) = params->emc_qpop;
- EMC(EMC_REFRESH) = params->emc_refresh;
- EMC(EMC_BURST_REFRESH_NUM) = params->emc_burst_refresh_num;
- EMC(EMC_PRE_REFRESH_REQ_CNT) = params->emc_prerefresh_req_cnt;
- EMC(EMC_PDEX2WR) = params->emc_pdex2wr;
- EMC(EMC_PDEX2RD) = params->emc_pdex2rd;
- EMC(EMC_PCHG2PDEN) = params->emc_pchg2pden;
- EMC(EMC_ACT2PDEN) = params->emc_act2pden;
- EMC(EMC_AR2PDEN) = params->emc_ar2pden;
- EMC(EMC_RW2PDEN) = params->emc_rw2pden;
- EMC(EMC_CKE2PDEN) = params->emc_cke2pden;
- EMC(EMC_PDEX2CKE) = params->emc_pdex2che;
- EMC(EMC_PDEX2MRR) = params->emc_pdex2mrr;
- EMC(EMC_TXSR) = params->emc_txsr;
- EMC(EMC_TXSRDLL) = params->emc_txsr_dll;
- EMC(EMC_TCKE) = params->emc_tcke;
- EMC(EMC_TCKESR) = params->emc_tckesr;
- EMC(EMC_TPD) = params->emc_tpd;
- EMC(EMC_TFAW) = params->emc_tfaw;
- EMC(EMC_TRPAB) = params->emc_trpab;
- EMC(EMC_TCLKSTABLE) = params->emc_tclkstable;
- EMC(EMC_TCLKSTOP) = params->emc_tclkstop;
- EMC(EMC_TREFBW) = params->emc_trefbw;
- EMC(EMC_ODT_WRITE) = params->emc_odt_write;
- EMC(EMC_CFG_DIG_DLL) = params->emc_cfg_dig_dll;
- EMC(EMC_CFG_DIG_DLL_PERIOD) = params->emc_cfg_dig_dll_period;
-
- // Don't write CFG_ADR_EN (bit 1) here - lock bit written later.
- EMC(EMC_FBIO_SPARE) = params->emc_fbio_spare & 0xFFFFFFFD;
- EMC(EMC_CFG_RSV) = params->emc_cfg_rsv;
- EMC(EMC_PMC_SCRATCH1) = params->emc_pmc_scratch1;
- EMC(EMC_PMC_SCRATCH2) = params->emc_pmc_scratch2;
- EMC(EMC_PMC_SCRATCH3) = params->emc_pmc_scratch3;
- EMC(EMC_ACPD_CONTROL) = params->emc_acpd_control;
- EMC(EMC_TXDSRVTTGEN) = params->emc_txdsrvttgen;
-
- // Set pipe bypass enable bits before sending any DRAM commands.
- EMC(EMC_CFG) = (params->emc_cfg & 0xE) | 0x3C00000;
-
- // Patch BootROM.
- if (params->boot_rom_patch_control & (1 << 31))
- {
- *(vu32 *)(APB_MISC_BASE + params->boot_rom_patch_control * 4) = params->boot_rom_patch_data;
- MC(MC_TIMING_CONTROL) = 1; // Trigger MC timing update.
- }
-
- // Release SEL_DPD_CMD.
- PMC(APBDEV_PMC_IO_DPD3_REQ) = ((params->emc_pmc_scratch1 & 0x3FFFFFFF) | 0x40000000) & 0xCFFF0000;
- usleep(params->pmc_io_dpd3_req_wait);
-
- // Set autocal interval if not configured.
- if (!params->emc_auto_cal_interval)
- EMC(EMC_AUTO_CAL_CONFIG) = params->emc_auto_cal_config | 0x200;
-
- EMC(EMC_PMACRO_BRICK_CTRL_RFU2) = params->emc_pmacro_brick_ctrl_rfu2;
-
- // ZQ CAL setup (not actually issuing ZQ CAL now).
- if (params->emc_zcal_warm_cold_boot_enables & 1)
- {
- if (params->memory_type == MEMORY_TYPE_DDR3L)
- EMC(EMC_ZCAL_WAIT_CNT) = params->emc_zcal_wait_cnt << 3;
- if (params->memory_type == MEMORY_TYPE_LPDDR4)
- {
- EMC(EMC_ZCAL_WAIT_CNT) = params->emc_zcal_wait_cnt;
- EMC(EMC_ZCAL_MRW_CMD) = params->emc_zcal_mrw_cmd;
- }
- }
-
- EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place.
- usleep(params->emc_timing_control_wait);
-
- // Deassert HOLD_CKE_LOW.
- PMC(APBDEV_PMC_DDR_CNTRL) &= 0xFFF8007F;
- usleep(params->pmc_ddr_ctrl_wait);
-
- // Set clock enable signal.
- u32 pin_gpio_cfg = (params->emc_pin_gpio_enable << 16) | (params->emc_pin_gpio << 12);
- if (params->memory_type == MEMORY_TYPE_DDR3L || params->memory_type == MEMORY_TYPE_LPDDR4)
- {
- EMC(EMC_PIN) = pin_gpio_cfg;
- (void)EMC(EMC_PIN);
- usleep(params->emc_pin_extra_wait + 200);
- EMC(EMC_PIN) = pin_gpio_cfg | 0x100;
- (void)EMC(EMC_PIN);
- }
-
- if (params->memory_type == MEMORY_TYPE_LPDDR4)
- usleep(params->emc_pin_extra_wait + 2000);
- else if (params->memory_type == MEMORY_TYPE_DDR3L)
- usleep(params->emc_pin_extra_wait + 500);
-
- // Enable clock enable signal.
- EMC(EMC_PIN) = pin_gpio_cfg | 0x101;
- (void)EMC(EMC_PIN);
- usleep(params->emc_pin_program_wait);
-
- // Send NOP (trigger just needs to be non-zero).
- if (params->memory_type != MEMORY_TYPE_LPDDR4)
- EMC(EMC_NOP) = (params->emc_dev_select << 30) + 1;
-
- // On coldboot w/LPDDR2/3, wait 200 uSec after asserting CKE high.
- if (params->memory_type == MEMORY_TYPE_LPDDR2)
- usleep(params->emc_pin_extra_wait + 200);
-
- // Init zq calibration,
- if (params->memory_type == MEMORY_TYPE_LPDDR4)
- {
- // Patch 6 using BCT spare variables.
- if (params->emc_bct_spare10)
- *(vu32 *)params->emc_bct_spare10 = params->emc_bct_spare11;
-
- // Write mode registers.
- EMC(EMC_MRW2) = params->emc_mrw2;
- EMC(EMC_MRW) = params->emc_mrw1;
- EMC(EMC_MRW3) = params->emc_mrw3;
- EMC(EMC_MRW4) = params->emc_mrw4;
- EMC(EMC_MRW6) = params->emc_mrw6;
- EMC(EMC_MRW14) = params->emc_mrw14;
-
- EMC(EMC_MRW8) = params->emc_mrw8;
- EMC(EMC_MRW12) = params->emc_mrw12;
- EMC(EMC_MRW9) = params->emc_mrw9;
- EMC(EMC_MRW13) = params->emc_mrw13;
-
- if (params->emc_zcal_warm_cold_boot_enables & 1)
- {
- // Issue ZQCAL start, device 0.
- EMC(EMC_ZQ_CAL) = params->emc_zcal_init_dev0;
- usleep(params->emc_zcal_init_wait);
-
- // Issue ZQCAL latch.
- EMC(EMC_ZQ_CAL) = params->emc_zcal_init_dev0 ^ 3;
- // Same for device 1.
- if (!(params->emc_dev_select & 2))
- {
- EMC(EMC_ZQ_CAL) = params->emc_zcal_init_dev1;
- usleep(params->emc_zcal_init_wait);
- EMC(EMC_ZQ_CAL) = params->emc_zcal_init_dev1 ^ 3;
- }
- }
- }
-
- // Set package and DPD pad control.
- PMC(APBDEV_PMC_DDR_CFG) = params->pmc_ddr_cfg;
-
- // Start periodic ZQ calibration (LPDDRx only).
- if (params->memory_type && params->memory_type <= MEMORY_TYPE_LPDDR4)
- {
- EMC(EMC_ZCAL_INTERVAL) = params->emc_zcal_interval;
- EMC(EMC_ZCAL_WAIT_CNT) = params->emc_zcal_wait_cnt;
- EMC(EMC_ZCAL_MRW_CMD) = params->emc_zcal_mrw_cmd;
- }
-
- // Patch 7 using BCT spare variables.
- if (params->emc_bct_spare12)
- *(vu32 *)params->emc_bct_spare12 = params->emc_bct_spare13;
-
- EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place.
-
- if (params->emc_extra_refresh_num)
- EMC(EMC_REF) = (((1 << params->emc_extra_refresh_num) - 1) << 8) | (params->emc_dev_select << 30) | 3;
-
- // Enable refresh.
- EMC(EMC_REFCTRL) = params->emc_dev_select | 0x80000000;
-
- EMC(EMC_DYN_SELF_REF_CONTROL) = params->emc_dyn_self_ref_control;
- EMC(EMC_CFG_UPDATE) = params->emc_cfg_update;
- EMC(EMC_CFG) = params->emc_cfg;
- EMC(EMC_FDPD_CTRL_DQ) = params->emc_fdpd_ctrl_dq;
- EMC(EMC_FDPD_CTRL_CMD) = params->emc_fdpd_ctrl_cmd;
- EMC(EMC_SEL_DPD_CTRL) = params->emc_sel_dpd_ctrl;
-
- // Write addr swizzle lock bit.
- EMC(EMC_FBIO_SPARE) = params->emc_fbio_spare | 2;
-
- EMC(EMC_TIMING_CONTROL) = 1; // Re-trigger timing to latch power saving functions.
-
- // Enable EMC pipe clock gating.
- EMC(EMC_CFG_PIPE_CLK) = params->emc_cfg_pipe_clk;
-
- // Depending on freqency, enable CMD/CLK fdpd.
- EMC(EMC_FDPD_CTRL_CMD_NO_RAMP) = params->emc_fdpd_ctrl_cmd_no_ramp;
-
- // Enable arbiter.
- SYSREG(AHB_ARBITRATION_XBAR_CTRL) = (SYSREG(AHB_ARBITRATION_XBAR_CTRL) & 0xFFFEFFFF) | (params->ahb_arbitration_xbar_ctrl_meminit_done << 16);
-
- // Lock carveouts per BCT cfg.
- MC(MC_VIDEO_PROTECT_REG_CTRL) = params->mc_video_protect_write_access;
- MC(MC_SEC_CARVEOUT_REG_CTRL) = params->mc_sec_carveout_protect_write_access;
- MC(MC_MTS_CARVEOUT_REG_CTRL) = params->mc_mts_carveout_reg_ctrl;
-
- // Disable write access to a bunch of EMC registers.
- MC(MC_EMEM_CFG_ACCESS_CTRL) = 1;
-}
-
-#ifndef CONFIG_SDRAM_COMPRESS_CFG
-static void _sdram_patch_model_params(u32 dramid, u32 *params)
-{
- for (u32 i = 0; i < sizeof(sdram_cfg_vendor_patches) / sizeof(sdram_vendor_patch_t); i++)
- if (sdram_cfg_vendor_patches[i].dramid & DRAM_ID(dramid))
- params[sdram_cfg_vendor_patches[i].addr] = sdram_cfg_vendor_patches[i].val;
-}
-#endif
-
-sdram_params_t *sdram_get_params()
-{
- // Check if id is proper.
- u32 dramid = _get_sdram_id();
- if (dramid > 6)
- dramid = 0;
-
-#ifdef CONFIG_SDRAM_COMPRESS_CFG
- u8 *buf = (u8 *)SDRAM_PARAMS_ADDR;
- LZ_Uncompress(_dram_cfg_lz, buf, sizeof(_dram_cfg_lz));
- return (sdram_params_t *)&buf[sizeof(sdram_params_t) * dramid];
-#else
- sdram_params_t *buf = (sdram_params_t *)SDRAM_PARAMS_ADDR;
- memcpy(buf, &_dram_cfg_0_samsung_4gb, sizeof(sdram_params_t));
- switch (dramid)
- {
- case DRAM_4GB_SAMSUNG_K4F6E304HB_MGCH:
- case DRAM_4GB_MICRON_MT53B512M32D2NP_062_WT:
- break;
-
- case DRAM_4GB_HYNIX_H9HCNNNBPUMLHR_NLN:
- case DRAM_6GB_SAMSUNG_K4FHE3D4HM_MFCH:
-#ifdef CONFIG_SDRAM_COPPER_SUPPORT
- case DRAM_4GB_COPPER_SAMSUNG:
- case DRAM_4GB_COPPER_HYNIX:
- case DRAM_4GB_COPPER_MICRON:
-#endif
- _sdram_patch_model_params(dramid, (u32 *)buf);
- break;
- }
- return buf;
-#endif
-}
-
-/*
- * Function: sdram_get_params_patched
- *
- * This code implements a warmboot exploit. Warmboot, that is actually so hot, it burns Nvidia once again.
- * If the boot_rom_patch_control's MSB is set, it uses it as an index to
- * APB_MISC_BASE (u32 array) and sets it to the value of boot_rom_patch_data.
- * (The MSB falls out when it gets multiplied by sizeof(u32)).
- * Because the bootrom does not do any boundary checks, it lets us write anywhere and anything.
- * Ipatch hardware let us apply 12 changes to the bootrom and can be changed any time.
- * The first patch is not needed any more when the exploit is triggered, so we overwrite that.
- * 0x10459E is the address where it returns an error when the signature is not valid.
- * We change that to MOV R0, #0, so we pass the check.
- *
- * Note: The modulus in the header must match and validated.
- */
-
-sdram_params_t *sdram_get_params_patched()
-{
- #define IPATCH_CONFIG(addr, data) (((addr - 0x100000) / 2) << 16 | (data & 0xffff))
- sdram_params_t *sdram_params = sdram_get_params();
-
- // Disable Warmboot signature check.
- sdram_params->boot_rom_patch_control = (1 << 31) | (((IPATCH_BASE + 4) - APB_MISC_BASE) / 4);
- sdram_params->boot_rom_patch_data = IPATCH_CONFIG(0x10459E, 0x2000);
-/*
- // Disable SBK lock.
- sdram_params->emc_bct_spare8 = (IPATCH_BASE + 7 * 4);
- sdram_params->emc_bct_spare9 = IPATCH_CONFIG(0x10210E, 0x2000);
-
- // Disable bootrom read lock.
- sdram_params->emc_bct_spare10 = (IPATCH_BASE + 10 * 4);
- sdram_params->emc_bct_spare11 = IPATCH_CONFIG(0x100FDC, 0xF000);
- sdram_params->emc_bct_spare12 = (IPATCH_BASE + 11 * 4);
- sdram_params->emc_bct_spare13 = IPATCH_CONFIG(0x100FDE, 0xE320);
-*/
- return sdram_params;
-}
-
-void sdram_init()
-{
- const sdram_params_t *params = (const sdram_params_t *)sdram_get_params();
-
- // Set DRAM voltage.
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_SD_CFG2, 0x05);
- max77620_regulator_set_voltage(REGULATOR_SD1, 1100000);
-
- // VDDP Select.
- PMC(APBDEV_PMC_VDDP_SEL) = params->pmc_vddp_sel;
- usleep(params->pmc_vddp_sel_wait);
-
- // Set DDR pad voltage.
- PMC(APBDEV_PMC_DDR_PWR) = PMC(APBDEV_PMC_DDR_PWR);
-
- // Turn on MEM IO Power.
- PMC(APBDEV_PMC_NO_IOPOWER) = params->pmc_no_io_power;
- PMC(APBDEV_PMC_REG_SHORT) = params->pmc_reg_short;
-
- PMC(APBDEV_PMC_DDR_CNTRL) = params->pmc_ddr_ctrl;
-
- // Patch 1 using BCT spare variables
- if (params->emc_bct_spare0)
- *(vu32 *)params->emc_bct_spare0 = params->emc_bct_spare1;
-
- _sdram_config(params);
-}
diff --git a/nyx/nyx_gui/mem/sdram.h b/nyx/nyx_gui/mem/sdram.h
deleted file mode 100644
index 059bc9c..0000000
--- a/nyx/nyx_gui/mem/sdram.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _SDRAM_H_
-#define _SDRAM_H_
-
-#include "emc.h"
-#include "sdram_param_t210.h"
-
-void sdram_init();
-sdram_params_t *sdram_get_params();
-sdram_params_t *sdram_get_params_patched();
-void sdram_lp0_save_params(const void *params);
-emc_mr_data_t sdram_read_mrx(emc_mr_t mrx);
-
-#endif
diff --git a/nyx/nyx_gui/mem/sdram_config.inl b/nyx/nyx_gui/mem/sdram_config.inl
deleted file mode 100644
index 42e0555..0000000
--- a/nyx/nyx_gui/mem/sdram_config.inl
+++ /dev/null
@@ -1,706 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#define DRAM_CFG_SIZE 1896
-
-#define DRAM_ID(x) (1 << (x))
-
-#define DRAM_4GB_SAMSUNG_K4F6E304HB_MGCH 0
-#define DRAM_4GB_HYNIX_H9HCNNNBPUMLHR_NLN 1
-#define DRAM_4GB_MICRON_MT53B512M32D2NP_062_WT 2
-#define DRAM_4GB_COPPER_SAMSUNG 3
-#define DRAM_6GB_SAMSUNG_K4FHE3D4HM_MFCH 4
-#define DRAM_4GB_COPPER_HYNIX 5
-#define DRAM_4GB_COPPER_MICRON 6
-
-typedef struct _sdram_vendor_patch_t
-{
- u32 val;
- u16 addr:9;
- u16 dramid:7;
-} sdram_vendor_patch_t;
-
-static const sdram_params_t _dram_cfg_0_samsung_4gb = {
- /* Specifies the type of memory device */
- .memory_type = MEMORY_TYPE_LPDDR4,
-
- /* MC/EMC clock source configuration */
- .pllm_input_divider = 0x00000001, // M div.
- .pllm_feedback_divider = 0x00000022, // N div.
- .pllm_stable_time = 0x0000012C,
- .pllm_setup_control = 0x00000000,
- .pllm_post_divider = 0x00000000, // P div.
- .pllm_kcp = 0x00000000,
- .pllm_kvco = 0x00000000,
-
- /* Spare BCT params */
- .emc_bct_spare0 = 0x00000000,
- .emc_bct_spare1 = 0x00000000,
- .emc_bct_spare2 = 0x00000000,
- .emc_bct_spare3 = 0x00000000,
- .emc_bct_spare4 = 0x7001BC68, // EMC_PMACRO_COMMON_PAD_TX_CTRL.
- .emc_bct_spare5 = 0x0000000A,
- .emc_bct_spare6 = 0x7001B404, // EMC_SWIZZLE_RANK0_BYTE0.
- .emc_bct_spare7 = 0x76543201,
- .emc_bct_spare8 = 0x7000E6C8, // APBDEV_PMC_WEAK_BIAS.
- .emc_bct_spare9 = 0x00000000,
- .emc_bct_spare10 = 0x00000000,
- .emc_bct_spare11 = 0x00000000,
- .emc_bct_spare12 = 0x00000000, // Used to hold EMC_PMACRO_BG_BIAS_CTRL.
- .emc_bct_spare13 = 0x00000034,
-
- /* EMC clock configuration */
- .emc_clock_source = 0x40188002,
- .emc_clock_source_dll = 0x40000000,
-
- .clk_rst_pllm_misc20_override = 0x00000000,
- .clk_rst_pllm_misc20_override_enable = 0x00000000,
-
- .clear_clock2_mc1 = 0x00000000,
-
- /* Auto-calibration of EMC pads */
- .emc_auto_cal_interval = 0x001FFFFF,
-
- .emc_auto_cal_config = 0xA01A51D8,
- .emc_auto_cal_config2 = 0x05500000,
- .emc_auto_cal_config3 = 0x00770000,
-
- .emc_auto_cal_config4 = 0x00770000,
- .emc_auto_cal_config5 = 0x00770000,
- .emc_auto_cal_config6 = 0x00770000,
- .emc_auto_cal_config7 = 0x00770000,
- .emc_auto_cal_config8 = 0x00770000,
-
- .emc_auto_cal_vref_sel0 = 0xB3AFA6A6,
- .emc_auto_cal_vref_sel1 = 0x00009E3C,
-
- .emc_auto_cal_channel = 0xC1E00303,
-
- .emc_pmacro_auto_cal_cfg0 = 0x04040404,
- .emc_pmacro_auto_cal_cfg1 = 0x04040404,
- .emc_pmacro_auto_cal_cfg2 = 0x00000000,
-
- .emc_pmacro_rx_term = 0x1F1F1F1F,
- .emc_pmacro_dq_tx_drive = 0x1F1F1F1F,
- .emc_pmacro_ca_tx_drive = 0x1F1F1F1F,
- .emc_pmacro_cmd_tx_drive = 0x00001F1F,
- .emc_pmacro_auto_cal_common = 0x00000804,
- .emc_pmacro_zcrtl = 0x00000550,
-
- /* Specifies the time for the calibration to stabilize (in microseconds) */
- .emc_auto_cal_wait = 0x000001A1,
-
- .emc_xm2_comp_pad_ctrl = 0x00000032,
- .emc_xm2_comp_pad_ctrl2 = 0x00000000,
- .emc_xm2_comp_pad_ctrl3 = 0x00000000,
-
- /*
- * DRAM size information
- * Specifies the value for EMC_ADR_CFG
- */
- .emc_adr_cfg = 0x00000001,
-
- /*
- * Specifies the time to wait after asserting pin
- * CKE (in microseconds)
- */
- .emc_pin_program_wait = 0x00000002,
- /* Specifies the extra delay before/after pin RESET/CKE command */
- .emc_pin_extra_wait = 0x00000000,
-
- .emc_pin_gpio_enable = 0x00000003,
- .emc_pin_gpio = 0x00000003,
-
- /* Specifies the extra delay after the first writing of EMC_TIMING_CONTROL */
- .emc_timing_control_wait = 0x0000001E,
-
- /* Timing parameters required for the SDRAM */
- .emc_rc = 0x0000000D,
- .emc_rfc = 0x00000025,
- .emc_rfc_pb = 0x00000013,
- .emc_ref_ctrl2 = 0x00000000,
- .emc_rfc_slr = 0x00000000,
- .emc_ras = 0x00000009,
- .emc_rp = 0x00000004,
- .emc_r2r = 0x00000000,
- .emc_w2w = 0x00000000,
- .emc_r2w = 0x0000000B,
- .emc_w2r = 0x0000000D,
- .emc_r2p = 0x00000008,
- .emc_w2p = 0x0000000B,
- .emc_tppd = 0x00000004,
- .emc_ccdmw = 0x00000020,
- .emc_rd_rcd = 0x00000006,
- .emc_wr_rcd = 0x00000006,
- .emc_rrd = 0x00000006,
- .emc_rext = 0x00000003,
- .emc_wext = 0x00000000,
- .emc_wdv = 0x00000004,
- .emc_wdv_chk = 0x00000006,
- .emc_wsv = 0x00000002,
- .emc_wev = 0x00000000,
- .emc_wdv_mask = 0x00000004,
- .emc_ws_duration = 0x00000008,
- .emc_we_duration = 0x0000000D,
- .emc_quse = 0x00000005,
- .emc_quse_width = 0x00000006,
- .emc_ibdly = 0x00000000,
- .emc_obdly = 0x00000000,
- .emc_einput = 0x00000002,
- .emc_einput_duration = 0x0000000D,
- .emc_puterm_extra = 0x00000000,
- .emc_puterm_width = 0x0000000B,
- .emc_qrst = 0x00010000,
- .emc_qsafe = 0x00000012,
- .emc_rdv = 0x00000014,
- .emc_rdv_mask = 0x00000016,
- .emc_rdv_early = 0x00000012,
- .emc_rdv_early_mask = 0x00000014,
- .emc_qpop = 0x0000000A,
- .emc_refresh = 0x00000304,
- .emc_burst_refresh_num = 0x00000000,
- .emc_prerefresh_req_cnt = 0x000000C1,
- .emc_pdex2wr = 0x00000008,
- .emc_pdex2rd = 0x00000008,
- .emc_pchg2pden = 0x00000003,
- .emc_act2pden = 0x00000003,
- .emc_ar2pden = 0x00000003,
- .emc_rw2pden = 0x00000014,
- .emc_cke2pden = 0x00000005,
- .emc_pdex2che = 0x00000002,
- .emc_pdex2mrr = 0x0000000D,
- .emc_txsr = 0x00000027,
- .emc_txsr_dll = 0x00000027,
- .emc_tcke = 0x00000005,
- .emc_tckesr = 0x00000005,
- .emc_tpd = 0x00000004,
- .emc_tfaw = 0x00000009,
- .emc_trpab = 0x00000005,
- .emc_tclkstable = 0x00000004,
- .emc_tclkstop = 0x00000009,
- .emc_trefbw = 0x0000031C,
-
- /* FBIO configuration values */
- .emc_fbio_cfg5 = 0x9160A00D,
- .emc_fbio_cfg7 = 0x00003BBF,
- .emc_fbio_cfg8 = 0x0CF30000,
-
- /* Command mapping for CMD brick 0 */
- .emc_cmd_mapping_cmd0_0 = 0x061B0504,
- .emc_cmd_mapping_cmd0_1 = 0x1C070302,
- .emc_cmd_mapping_cmd0_2 = 0x05252523,
- .emc_cmd_mapping_cmd1_0 = 0x0A091D08,
- .emc_cmd_mapping_cmd1_1 = 0x0D1E0B24,
- .emc_cmd_mapping_cmd1_2 = 0x0326260C,
- .emc_cmd_mapping_cmd2_0 = 0x231C1B02,
- .emc_cmd_mapping_cmd2_1 = 0x05070403,
- .emc_cmd_mapping_cmd2_2 = 0x02252506,
- .emc_cmd_mapping_cmd3_0 = 0x0D1D0B0A,
- .emc_cmd_mapping_cmd3_1 = 0x1E090C08,
- .emc_cmd_mapping_cmd3_2 = 0x08262624,
- .emc_cmd_mapping_byte = 0x9A070624,
-
- .emc_fbio_spare = 0x00000012,
- .emc_cfg_rsv = 0xFF00FF00,
-
- /* MRS command values */
- .emc_mrs = 0x00000000,
- .emc_emrs = 0x00000000,
- .emc_emrs2 = 0x00000000,
- .emc_emrs3 = 0x00000000,
- .emc_mrw1 = 0x08010004,
- .emc_mrw2 = 0x08020000,
- .emc_mrw3 = 0x080D0000,
- .emc_mrw4 = 0xC0000000,
- .emc_mrw6 = 0x08037171,
- .emc_mrw8 = 0x080B0000,
- .emc_mrw9 = 0x0C0E7272,
- .emc_mrw10 = 0x00000000,
- .emc_mrw12 = 0x0C0D0808,
- .emc_mrw13 = 0x0C0D0000,
- .emc_mrw14 = 0x08161414,
- .emc_mrw_extra = 0x08010004,
- .emc_warm_boot_mrw_extra = 0x08110000,
- .emc_warm_boot_extramode_reg_write_enable = 0x00000001,
- .emc_extramode_reg_write_enable = 0x00000000,
- .emc_mrw_reset_command = 0x00000000,
- .emc_mrw_reset_ninit_wait = 0x00000000,
- .emc_mrs_wait_cnt = 0x00CC0015,
- .emc_mrs_wait_cnt2 = 0x0033000A,
-
- /* EMC miscellaneous configurations */
- .emc_cfg = 0xF3200000,
- .emc_cfg2 = 0x00110805,
- .emc_cfg_pipe = 0x0FFF0FFF,
- .emc_cfg_pipe_clk = 0x00000000,
- .emc_fdpd_ctrl_cmd_no_ramp = 0x00000001,
- .emc_cfg_update = 0x70000301,
- .emc_dbg = 0x01000C00,
- .emc_dbg_write_mux = 0x00000001,
- .emc_cmd_q = 0x10004408,
- .emc_mc2emc_q = 0x06000404,
- .emc_dyn_self_ref_control = 0x80000713,
- .ahb_arbitration_xbar_ctrl_meminit_done = 0x00000001,
- .emc_cfg_dig_dll = 0x002C00A0,
- .emc_cfg_dig_dll_1 = 0x00003701,
- .emc_cfg_dig_dll_period = 0x00008000,
- .emc_dev_select = 0x00000000,
- .emc_sel_dpd_ctrl = 0x00040008,
-
- /* Pads trimmer delays */
- .emc_fdpd_ctrl_dq = 0x8020221F,
- .emc_fdpd_ctrl_cmd = 0x0220F40F,
- .emc_pmacro_ib_vref_dq_0 = 0x28282828,
- .emc_pmacro_ib_vref_dq_1 = 0x28282828,
- .emc_pmacro_ib_vref_dqs_0 = 0x11111111,
- .emc_pmacro_ib_vref_dqs_1 = 0x11111111,
- .emc_pmacro_ib_rxrt = 0x000000BE,
- .emc_cfg_pipe1 = 0x0FFF0FFF,
- .emc_cfg_pipe2 = 0x0FFF0FFF,
-
- .emc_pmacro_quse_ddll_rank0_0 = 0x00000000,
- .emc_pmacro_quse_ddll_rank0_1 = 0x00000000,
- .emc_pmacro_quse_ddll_rank0_2 = 0x00000000,
- .emc_pmacro_quse_ddll_rank0_3 = 0x00000000,
- .emc_pmacro_quse_ddll_rank0_4 = 0x00000000,
- .emc_pmacro_quse_ddll_rank0_5 = 0x00000000,
- .emc_pmacro_quse_ddll_rank1_0 = 0x00000000,
- .emc_pmacro_quse_ddll_rank1_1 = 0x00000000,
- .emc_pmacro_quse_ddll_rank1_2 = 0x00000000,
- .emc_pmacro_quse_ddll_rank1_3 = 0x00000000,
- .emc_pmacro_quse_ddll_rank1_4 = 0x00000000,
- .emc_pmacro_quse_ddll_rank1_5 = 0x00000000,
-
- .emc_pmacro_ob_ddll_long_dq_rank0_0 = 0x00000000,
- .emc_pmacro_ob_ddll_long_dq_rank0_1 = 0x00000000,
- .emc_pmacro_ob_ddll_long_dq_rank0_2 = 0x00000000,
- .emc_pmacro_ob_ddll_long_dq_rank0_3 = 0x00000000,
- .emc_pmacro_ob_ddll_long_dq_rank0_4 = 0x00120014,
- .emc_pmacro_ob_ddll_long_dq_rank0_5 = 0x00140010,
- .emc_pmacro_ob_ddll_long_dq_rank1_0 = 0x00000000,
- .emc_pmacro_ob_ddll_long_dq_rank1_1 = 0x00000000,
- .emc_pmacro_ob_ddll_long_dq_rank1_2 = 0x00000000,
- .emc_pmacro_ob_ddll_long_dq_rank1_3 = 0x00000000,
- .emc_pmacro_ob_ddll_long_dq_rank1_4 = 0x00120014,
- .emc_pmacro_ob_ddll_long_dq_rank1_5 = 0x00140010,
-
- .emc_pmacro_ob_ddll_long_dqs_rank0_0 = 0x002E0030,
- .emc_pmacro_ob_ddll_long_dqs_rank0_1 = 0x00300033,
- .emc_pmacro_ob_ddll_long_dqs_rank0_2 = 0x00350033,
- .emc_pmacro_ob_ddll_long_dqs_rank0_3 = 0x00320030,
- .emc_pmacro_ob_ddll_long_dqs_rank0_4 = 0x00000005,
- .emc_pmacro_ob_ddll_long_dqs_rank0_5 = 0x00000000,
- .emc_pmacro_ob_ddll_long_dqs_rank1_0 = 0x002E0030,
- .emc_pmacro_ob_ddll_long_dqs_rank1_1 = 0x00300033,
- .emc_pmacro_ob_ddll_long_dqs_rank1_2 = 0x00350033,
- .emc_pmacro_ob_ddll_long_dqs_rank1_3 = 0x00320030,
- .emc_pmacro_ob_ddll_long_dqs_rank1_4 = 0x00000005,
- .emc_pmacro_ob_ddll_long_dqs_rank1_5 = 0x00000000,
-
- .emc_pmacro_ib_ddll_long_dqs_rank0_0 = 0x00280028,
- .emc_pmacro_ib_ddll_long_dqs_rank0_1 = 0x00280028,
- .emc_pmacro_ib_ddll_long_dqs_rank0_2 = 0x00280028,
- .emc_pmacro_ib_ddll_long_dqs_rank0_3 = 0x00280028,
- .emc_pmacro_ib_ddll_long_dqs_rank1_0 = 0x00280028,
- .emc_pmacro_ib_ddll_long_dqs_rank1_1 = 0x00280028,
- .emc_pmacro_ib_ddll_long_dqs_rank1_2 = 0x00280028,
- .emc_pmacro_ib_ddll_long_dqs_rank1_3 = 0x00280028,
-
- .emc_pmacro_ddll_long_cmd_0 = 0x00140014,
- .emc_pmacro_ddll_long_cmd_1 = 0x00120012,
- .emc_pmacro_ddll_long_cmd_2 = 0x00100010,
- .emc_pmacro_ddll_long_cmd_3 = 0x00140014,
- .emc_pmacro_ddll_long_cmd_4 = 0x00000014,
- .emc_pmacro_ddll_short_cmd_0 = 0x00000000,
- .emc_pmacro_ddll_short_cmd_1 = 0x00000000,
- .emc_pmacro_ddll_short_cmd_2 = 0x00000000,
-
- /*
- * Specifies the delay after asserting CKE pin during a WarmBoot0
- * sequence (in microseconds)
- */
- .warm_boot_wait = 0x00000001,
-
- .emc_odt_write = 0x00000000,
-
- /* Periodic ZQ calibration */
-
- /*
- * Specifies the value for EMC_ZCAL_INTERVAL
- * Value 0 disables ZQ calibration
- */
- .emc_zcal_interval = 0x00064000,
- .emc_zcal_wait_cnt = 0x000900CC,
- .emc_zcal_mrw_cmd = 0x0051004F,
-
- /* DRAM initialization sequence flow control */
- .emc_mrs_reset_dll = 0x00000000,
- .emc_zcal_init_dev0 = 0x80000001,
- .emc_zcal_init_dev1 = 0x40000001,
- /*
- * Specifies the wait time after programming a ZQ initialization
- * command (in microseconds)
- */
- .emc_zcal_init_wait = 0x00000001,
- /*
- * Specifies the enable for ZQ calibration at cold boot [bit 0]
- * and warm boot [bit 1]
- */
- .emc_zcal_warm_cold_boot_enables = 0x00000003,
-
- /*
- * Specifies the MRW command to LPDDR2 for ZQ calibration
- * on warmboot
- */
- /* Is issued to both devices separately */
- .emc_mrw_lpddr2zcal_warm_boot = 0x040A00AB,
- /*
- * Specifies the ZQ command to DDR3 for ZQ calibration on warmboot
- * Is issued to both devices separately
- */
- .emc_zqcal_ddr3_warm_boot = 0x00000011,
- .emc_zqcal_lpddr4_warm_boot = 0x00000001,
-
- /*
- * Specifies the wait time for ZQ calibration on warmboot
- * (in microseconds)
- */
- .emc_zcal_warm_boot_wait = 0x00000001,
- /*
- * Specifies the enable for DRAM Mode Register programming
- * at warm boot
- */
- .emc_mrs_warm_boot_enable = 0x00000001,
- .emc_mrs_reset_dll_wait = 0x00000000,
- .emc_mrs_extra = 0x00000000,
- .emc_warm_boot_mrs_extra = 0x00000000,
- .emc_emrs_ddr2_dll_enable = 0x00000000,
- .emc_mrs_ddr2_dll_reset = 0x00000000,
- .emc_emrs_ddr2_ocd_calib = 0x00000000,
- /*
- * Specifies the wait between initializing DDR and setting OCD
- * calibration (in microseconds)
- */
- .emc_ddr2_wait = 0x00000000,
- .emc_clken_override = 0x00000000,
- /*
- * Specifies LOG2 of the extra refresh numbers after booting
- * Program 0 to disable
- */
- .emc_extra_refresh_num = 0x00000002,
- .emc_clken_override_allwarm_boot = 0x00000000,
- .mc_clken_override_allwarm_boot = 0x00000000,
- /* Specifies digital dll period, choosing between 4 to 64 ms */
- .emc_cfg_dig_dll_period_warm_boot = 0x00000003,
-
- /* Pad controls */
- .pmc_vddp_sel = 0x00000001,
- .pmc_vddp_sel_wait = 0x00000002,
- .pmc_ddr_pwr = 0x0000000F,
- .pmc_ddr_cfg = 0x04220100,
- .pmc_io_dpd3_req = 0x4FAFFFFF,
- .pmc_io_dpd3_req_wait = 0x00000001,
- .pmc_io_dpd4_req_wait = 0x00000002,
- .pmc_reg_short = 0x00000000,
- .pmc_no_io_power = 0x00000000,
- .pmc_ddr_ctrl_wait = 0x00000000,
- .pmc_ddr_ctrl = 0x0007FF8B,
- .emc_acpd_control = 0x00000000,
-
- .emc_swizzle_rank0_byte0 = 0x76543201,
- .emc_swizzle_rank0_byte1 = 0x65324710,
- .emc_swizzle_rank0_byte2 = 0x25763410,
- .emc_swizzle_rank0_byte3 = 0x25673401,
- .emc_swizzle_rank1_byte0 = 0x32647501,
- .emc_swizzle_rank1_byte1 = 0x34567201,
- .emc_swizzle_rank1_byte2 = 0x56742310,
- .emc_swizzle_rank1_byte3 = 0x67324501,
-
- .emc_txdsrvttgen = 0x00000000,
-
- .emc_data_brlshft0 = 0x00249249,
- .emc_data_brlshft1 = 0x00249249,
-
- .emc_dqs_brlshft0 = 0x00000000,
- .emc_dqs_brlshft1 = 0x00000000,
-
- .emc_cmd_brlshft0 = 0x00000000,
- .emc_cmd_brlshft1 = 0x00000000,
- .emc_cmd_brlshft2 = 0x0000001B,
- .emc_cmd_brlshft3 = 0x0000001B,
-
- .emc_quse_brlshft0 = 0x00000000,
- .emc_quse_brlshft1 = 0x00000000,
- .emc_quse_brlshft2 = 0x00000000,
- .emc_quse_brlshft3 = 0x00000000,
-
- .emc_dll_cfg0 = 0x1F13412F,
- .emc_dll_cfg1 = 0x00010014,
-
- .emc_pmc_scratch1 = 0x4FAFFFFF,
- .emc_pmc_scratch2 = 0x7FFFFFFF,
- .emc_pmc_scratch3 = 0x4006D70B,
-
- .emc_pmacro_pad_cfg_ctrl = 0x00020000,
- .emc_pmacro_vttgen_ctrl0 = 0x00030808,
- .emc_pmacro_vttgen_ctrl1 = 0x00015C00,
- .emc_pmacro_vttgen_ctrl2 = 0x00101010,
- .emc_pmacro_brick_ctrl_rfu1 = 0x00001600,
- .emc_pmacro_cmd_brick_ctrl_fdpd = 0x00000000,
- .emc_pmacro_brick_ctrl_rfu2 = 0x00000000,
- .emc_pmacro_data_brick_ctrl_fdpd = 0x00000000,
- .emc_pmacro_bg_bias_ctrl0 = 0x00000034,
- .emc_pmacro_data_pad_rx_ctrl = 0x00050037,
- .emc_pmacro_cmd_pad_rx_ctrl = 0x00000000,
- .emc_pmacro_data_rx_term_mode = 0x00000010,
- .emc_pmacro_cmd_rx_term_mode = 0x00003000,
- .emc_pmacro_data_pad_tx_ctrl = 0x02000111,
- .emc_pmacro_common_pad_tx_ctrl = 0x00000008,
- .emc_pmacro_cmd_pad_tx_ctrl = 0x0A000000,
-
- .emc_cfg3 = 0x00000040,
-
- .emc_pmacro_tx_pwrd0 = 0x10000000,
- .emc_pmacro_tx_pwrd1 = 0x08000000,
- .emc_pmacro_tx_pwrd2 = 0x08000000,
- .emc_pmacro_tx_pwrd3 = 0x00000000,
- .emc_pmacro_tx_pwrd4 = 0x00000000,
- .emc_pmacro_tx_pwrd5 = 0x00001000,
-
- .emc_config_sample_delay = 0x00000020,
-
- .emc_pmacro_brick_mapping0 = 0x28091081,
- .emc_pmacro_brick_mapping1 = 0x44A53293,
- .emc_pmacro_brick_mapping2 = 0x76678A5B,
-
- .emc_pmacro_tx_sel_clk_src0 = 0x00000000,
- .emc_pmacro_tx_sel_clk_src1 = 0x00000000,
- .emc_pmacro_tx_sel_clk_src2 = 0x00000000,
- .emc_pmacro_tx_sel_clk_src3 = 0x00000000,
- .emc_pmacro_tx_sel_clk_src4 = 0x00000000,
- .emc_pmacro_tx_sel_clk_src5 = 0x00000000,
-
- .emc_pmacro_ddll_bypass = 0xEFFFEFFF,
-
- .emc_pmacro_ddll_pwrd0 = 0xC0C0C0C0,
- .emc_pmacro_ddll_pwrd1 = 0xC0C0C0C0,
- .emc_pmacro_ddll_pwrd2 = 0xDCDCDCDC,
-
- .emc_pmacro_cmd_ctrl0 = 0x0A0A0A0A,
- .emc_pmacro_cmd_ctrl1 = 0x0A0A0A0A,
- .emc_pmacro_cmd_ctrl2 = 0x0A0A0A0A,
-
- /* DRAM size information */
- .mc_emem_adr_cfg = 0x00000001,
- .mc_emem_adr_cfg_dev0 = 0x00070302,
- .mc_emem_adr_cfg_dev1 = 0x00070302,
- .mc_emem_adr_cfg_channel_mask = 0xFFFF2400,
- .mc_emem_adr_cfg_bank_mask0 = 0x6E574400,
- .mc_emem_adr_cfg_bank_mask1 = 0x39722800,
- .mc_emem_adr_cfg_bank_mask2 = 0x4B9C1000,
- /*
- * Specifies the value for MC_EMEM_CFG which holds the external memory
- * size (in KBytes)
- */
- .mc_emem_cfg = 0x00001000,
-
- /* MC arbitration configuration */
- .mc_emem_arb_cfg = 0x08000001,
- .mc_emem_arb_outstanding_req = 0x8000004C,
- .emc_emem_arb_refpb_hp_ctrl = 0x000A1020,
- .emc_emem_arb_refpb_bank_ctrl = 0x80001028,
-
- .mc_emem_arb_timing_rcd = 0x00000001,
- .mc_emem_arb_timing_rp = 0x00000000,
- .mc_emem_arb_timing_rc = 0x00000003,
- .mc_emem_arb_timing_ras = 0x00000001,
- .mc_emem_arb_timing_faw = 0x00000002,
- .mc_emem_arb_timing_rrd = 0x00000001,
- .mc_emem_arb_timing_rap2pre = 0x00000002,
- .mc_emem_arb_timing_wap2pre = 0x00000005,
- .mc_emem_arb_timing_r2r = 0x00000002,
- .mc_emem_arb_timing_w2w = 0x00000001,
- .mc_emem_arb_timing_r2w = 0x00000004,
- .mc_emem_arb_timing_w2r = 0x00000005,
- .mc_emem_arb_timing_rfcpb = 0x00000004,
-
- .mc_emem_arb_da_turns = 0x02020001,
- .mc_emem_arb_da_covers = 0x00030201,
- .mc_emem_arb_misc0 = 0x71C30504,
- .mc_emem_arb_misc1 = 0x70000F0F,
- .mc_emem_arb_misc2 = 0x00000000,
-
- .mc_emem_arb_ring1_throttle = 0x001F0000,
- .mc_emem_arb_override = 0x10000000,
- .mc_emem_arb_override1 = 0x00000000,
- .mc_emem_arb_rsv = 0xFF00FF00,
-
- .mc_da_cfg0 = 0x00000001,
- .mc_emem_arb_timing_ccdmw = 0x00000008,
-
- .mc_clken_override = 0x00008000,
-
- .mc_stat_control = 0x00000000,
- .mc_video_protect_bom = 0xFFF00000,
- .mc_video_protect_bom_adr_hi = 0x00000000,
- .mc_video_protect_size_mb = 0x00000000,
- .mc_video_protect_vpr_override = 0xE4BAC343,
- .mc_video_protect_vpr_override1 = 0x00001ED3,
- .mc_video_protect_gpu_override0 = 0x00000000,
- .mc_video_protect_gpu_override1 = 0x00000000,
- .mc_sec_carveout_bom = 0xFFF00000,
- .mc_sec_carveout_adr_hi = 0x00000000,
- .mc_sec_carveout_size_mb = 0x00000000,
- .mc_video_protect_write_access = 0x00000000,
- .mc_sec_carveout_protect_write_access = 0x00000000,
-
- .mc_generalized_carveout1_bom = 0x00000000,
- .mc_generalized_carveout1_bom_hi = 0x00000000,
- .mc_generalized_carveout1_size_128kb = 0x00000008,
- .mc_generalized_carveout1_access0 = 0x00000000,
- .mc_generalized_carveout1_access1 = 0x00000000,
- .mc_generalized_carveout1_access2 = 0x00300000,
- .mc_generalized_carveout1_access3 = 0x03000000,
- .mc_generalized_carveout1_access4 = 0x00000000,
- .mc_generalized_carveout1_force_internal_access0 = 0x00000000,
- .mc_generalized_carveout1_force_internal_access1 = 0x00000000,
- .mc_generalized_carveout1_force_internal_access2 = 0x00000000,
- .mc_generalized_carveout1_force_internal_access3 = 0x00000000,
- .mc_generalized_carveout1_force_internal_access4 = 0x00000000,
- .mc_generalized_carveout1_cfg0 = 0x04000C76,
-
- .mc_generalized_carveout2_bom = 0x00000000,
- .mc_generalized_carveout2_bom_hi = 0x00000000,
- .mc_generalized_carveout2_size_128kb = 0x00000002,
- .mc_generalized_carveout2_access0 = 0x00000000,
- .mc_generalized_carveout2_access1 = 0x00000000,
- .mc_generalized_carveout2_access2 = 0x03000000,
- .mc_generalized_carveout2_access3 = 0x00000000,
- .mc_generalized_carveout2_access4 = 0x00000300,
- .mc_generalized_carveout2_force_internal_access0 = 0x00000000,
- .mc_generalized_carveout2_force_internal_access1 = 0x00000000,
- .mc_generalized_carveout2_force_internal_access2 = 0x00000000,
- .mc_generalized_carveout2_force_internal_access3 = 0x00000000,
- .mc_generalized_carveout2_force_internal_access4 = 0x00000000,
- .mc_generalized_carveout2_cfg0 = 0x0440167E,
-
- .mc_generalized_carveout3_bom = 0x00000000,
- .mc_generalized_carveout3_bom_hi = 0x00000000,
- .mc_generalized_carveout3_size_128kb = 0x00000000,
- .mc_generalized_carveout3_access0 = 0x00000000,
- .mc_generalized_carveout3_access1 = 0x00000000,
- .mc_generalized_carveout3_access2 = 0x03000000,
- .mc_generalized_carveout3_access3 = 0x00000000,
- .mc_generalized_carveout3_access4 = 0x00000300,
- .mc_generalized_carveout3_force_internal_access0 = 0x00000000,
- .mc_generalized_carveout3_force_internal_access1 = 0x00000000,
- .mc_generalized_carveout3_force_internal_access2 = 0x00000000,
- .mc_generalized_carveout3_force_internal_access3 = 0x00000000,
- .mc_generalized_carveout3_force_internal_access4 = 0x00000000,
- .mc_generalized_carveout3_cfg0 = 0x04401E7E,
-
- .mc_generalized_carveout4_bom = 0x00000000,
- .mc_generalized_carveout4_bom_hi = 0x00000000,
- .mc_generalized_carveout4_size_128kb = 0x00000008,
- .mc_generalized_carveout4_access0 = 0x00000000,
- .mc_generalized_carveout4_access1 = 0x00000000,
- .mc_generalized_carveout4_access2 = 0x00300000,
- .mc_generalized_carveout4_access3 = 0x00000000,
- .mc_generalized_carveout4_access4 = 0x000000C0,
- .mc_generalized_carveout4_force_internal_access0 = 0x00000000,
- .mc_generalized_carveout4_force_internal_access1 = 0x00000000,
- .mc_generalized_carveout4_force_internal_access2 = 0x00000000,
- .mc_generalized_carveout4_force_internal_access3 = 0x00000000,
- .mc_generalized_carveout4_force_internal_access4 = 0x00000000,
- .mc_generalized_carveout4_cfg0 = 0x04002446,
-
- .mc_generalized_carveout5_bom = 0x00000000,
- .mc_generalized_carveout5_bom_hi = 0x00000000,
- .mc_generalized_carveout5_size_128kb = 0x00000008,
- .mc_generalized_carveout5_access0 = 0x00000000,
- .mc_generalized_carveout5_access1 = 0x00000000,
- .mc_generalized_carveout5_access2 = 0x00300000,
- .mc_generalized_carveout5_access3 = 0x00000000,
- .mc_generalized_carveout5_access4 = 0x00000000,
- .mc_generalized_carveout5_force_internal_access0 = 0x00000000,
- .mc_generalized_carveout5_force_internal_access1 = 0x00000000,
- .mc_generalized_carveout5_force_internal_access2 = 0x00000000,
- .mc_generalized_carveout5_force_internal_access3 = 0x00000000,
- .mc_generalized_carveout5_force_internal_access4 = 0x00000000,
- .mc_generalized_carveout5_cfg0 = 0x04002C46,
-
- /* Specifies enable for CA training */
- .emc_ca_training_enable = 0x00000000,
- /* Set if bit 6 select is greater than bit 7 select; uses aremc.spec packet SWIZZLE_BIT6_GT_BIT7 */
- .swizzle_rank_byte_encode = 0x000000EC,
-
- /* Specifies enable and offset for patched boot rom write */
- .boot_rom_patch_control = 0x00000000,
- /* Specifies data for patched boot rom write */
- .boot_rom_patch_data = 0x00000000,
-
- .mc_mts_carveout_bom = 0xFFF00000,
- .mc_mts_carveout_adr_hi = 0x00000000,
- .mc_mts_carveout_size_mb = 0x00000000,
- .mc_mts_carveout_reg_ctrl = 0x00000000
-};
-
-static const sdram_vendor_patch_t sdram_cfg_vendor_patches[] = {
- // Hynix timing config.
- { 0x0000000D, 67, DRAM_ID(1) | DRAM_ID(5) }, // emc_r2w.
- { 0x00000001, 91, DRAM_ID(1) | DRAM_ID(5) }, // emc_puterm_extra.
- { 0x80000000, 92, DRAM_ID(1) | DRAM_ID(5) }, // emc_puterm_width.
- { 0x00000210, 317, DRAM_ID(1) | DRAM_ID(5) }, // emc_pmacro_data_rx_term_mode.
- { 0x00000005, 368, DRAM_ID(1) | DRAM_ID(5) }, // mc_emem_arb_timing_r2w.
-
- // Samsung 6GB density config.
- { 0x000C0302, 347, DRAM_ID(4) }, // mc_emem_adr_cfg_dev0. 768MB sub-partition density.
- { 0x000C0302, 348, DRAM_ID(4) }, // mc_emem_adr_cfg_dev1. 768MB sub-partition density.
- { 0x00001800, 353, DRAM_ID(4) }, // mc_emem_cfg. 6GB total density.
-
-#ifdef CONFIG_SDRAM_COPPER_SUPPORT
- // Copper prototype Samsung/Hynix/Micron timing configs.
- { 0x0000003A, 59, DRAM_ID(6) }, // emc_rfc. Auto refresh.
- { 0x0000001D, 60, DRAM_ID(6) }, // emc_rfc_pb. Bank Auto refresh.
- { 0x00000012, 108, DRAM_ID(3) | DRAM_ID(5) | DRAM_ID(6) }, // emc_rw2pden.
- { 0x0000003B, 112, DRAM_ID(6) }, // emc_txsr.
- { 0x0000003B, 113, DRAM_ID(6) }, // emc_txsr_dll.
- { 0x00000003, 119, DRAM_ID(3) | DRAM_ID(5) | DRAM_ID(6) }, // emc_tclkstable.
- { 0x00120015, 205, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dq_rank0_4.
- { 0x00160012, 206, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dq_rank0_5.
- { 0x00120015, 211, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dq_rank1_4.
- { 0x00160012, 212, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dq_rank1_5.
- { 0x002F0032, 213, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dqs_rank0_0.
- { 0x00310032, 214, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dqs_rank0_1.
- { 0x00360034, 215, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dqs_rank0_2.
- { 0x0033002F, 216, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dqs_rank0_3.
- { 0x00000006, 217, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dqs_rank0_4.
- { 0x002F0032, 219, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dqs_rank1_0.
- { 0x00310032, 220, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dqs_rank1_1.
- { 0x00360034, 221, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dqs_rank1_2.
- { 0x0033002F, 222, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dqs_rank1_3.
- { 0x00000006, 223, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ob_ddll_long_dqs_rank1_4.
- { 0x00150015, 233, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ddll_long_cmd_0.
- { 0x00120012, 235, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ddll_long_cmd_2.
- { 0x00160016, 236, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ddll_long_cmd_3.
- { 0x00000015, 237, DRAM_ID(5) | DRAM_ID(6) }, // emc_pmacro_ddll_long_cmd_4.
- { 0x00000012, 295, DRAM_ID(3) | DRAM_ID(5) | DRAM_ID(6) }, // emc_cmd_brlshft2.
- { 0x00000012, 296, DRAM_ID(3) | DRAM_ID(5) | DRAM_ID(6) }, // emc_cmd_brlshft3.
- { 0x00000007, 370, DRAM_ID(6) }, // mc_emem_arb_timing_rfcpb. Bank refresh.
- { 0x72A30504, 373, DRAM_ID(6) }, // mc_emem_arb_misc0.
-#endif
-};
diff --git a/nyx/nyx_gui/mem/sdram_config_lz.inl b/nyx/nyx_gui/mem/sdram_config_lz.inl
deleted file mode 100644
index 832b5b4..0000000
--- a/nyx/nyx_gui/mem/sdram_config_lz.inl
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-static const u8 _dram_cfg_lz[1262] = {
- 0x17, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00,
- 0x00, 0x2C, 0x17, 0x04, 0x09, 0x00, 0x17, 0x04, 0x04, 0x17, 0x08, 0x08,
- 0x17, 0x10, 0x10, 0x00, 0x00, 0x68, 0xBC, 0x01, 0x70, 0x0A, 0x00, 0x00,
- 0x00, 0x04, 0xB4, 0x01, 0x70, 0x01, 0x32, 0x54, 0x76, 0xC8, 0xE6, 0x00,
- 0x70, 0x17, 0x10, 0x24, 0x34, 0x00, 0x00, 0x00, 0x02, 0x80, 0x18, 0x40,
- 0x00, 0x00, 0x00, 0x17, 0x04, 0x04, 0x17, 0x09, 0x18, 0xFF, 0xFF, 0x1F,
- 0x00, 0xD8, 0x51, 0x1A, 0xA0, 0x00, 0x00, 0x50, 0x05, 0x00, 0x00, 0x77,
- 0x00, 0x17, 0x04, 0x04, 0x17, 0x08, 0x08, 0x17, 0x08, 0x08, 0xA6, 0xA6,
- 0xAF, 0xB3, 0x3C, 0x9E, 0x00, 0x00, 0x03, 0x03, 0xE0, 0xC1, 0x04, 0x04,
- 0x04, 0x04, 0x17, 0x04, 0x04, 0x17, 0x04, 0x3C, 0x1F, 0x1F, 0x1F, 0x1F,
- 0x17, 0x04, 0x04, 0x17, 0x06, 0x06, 0x00, 0x00, 0x04, 0x08, 0x17, 0x06,
- 0x46, 0xA1, 0x01, 0x00, 0x00, 0x32, 0x17, 0x0B, 0x64, 0x01, 0x17, 0x04,
- 0x7C, 0x17, 0x07, 0x0C, 0x03, 0x17, 0x04, 0x04, 0x00, 0x00, 0x00, 0x1E,
- 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x13,
- 0x17, 0x0B, 0x2C, 0x09, 0x00, 0x00, 0x00, 0x17, 0x05, 0x5D, 0x17, 0x07,
- 0x10, 0x0B, 0x17, 0x07, 0x28, 0x08, 0x17, 0x07, 0x0C, 0x17, 0x04, 0x1C,
- 0x20, 0x00, 0x00, 0x00, 0x06, 0x17, 0x04, 0x04, 0x17, 0x07, 0x08, 0x17,
- 0x04, 0x50, 0x17, 0x04, 0x2C, 0x17, 0x04, 0x1C, 0x17, 0x04, 0x10, 0x17,
- 0x08, 0x6C, 0x17, 0x04, 0x10, 0x17, 0x04, 0x38, 0x17, 0x04, 0x40, 0x05,
- 0x17, 0x07, 0x1C, 0x17, 0x08, 0x58, 0x17, 0x04, 0x24, 0x17, 0x04, 0x18,
- 0x17, 0x08, 0x64, 0x00, 0x00, 0x01, 0x00, 0x12, 0x00, 0x00, 0x00, 0x14,
- 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x17, 0x09, 0x0C, 0x17, 0x05, 0x82,
- 0x58, 0x17, 0x07, 0x61, 0xC1, 0x17, 0x07, 0x50, 0x17, 0x04, 0x04, 0x17,
- 0x08, 0x81, 0x48, 0x17, 0x04, 0x04, 0x17, 0x04, 0x28, 0x17, 0x04, 0x60,
- 0x17, 0x08, 0x54, 0x27, 0x17, 0x04, 0x04, 0x17, 0x07, 0x14, 0x17, 0x04,
- 0x04, 0x04, 0x17, 0x07, 0x81, 0x58, 0x17, 0x0C, 0x0C, 0x1C, 0x03, 0x00,
- 0x00, 0x0D, 0xA0, 0x60, 0x91, 0xBF, 0x3B, 0x17, 0x04, 0x5A, 0xF3, 0x0C,
- 0x04, 0x05, 0x1B, 0x06, 0x02, 0x03, 0x07, 0x1C, 0x23, 0x25, 0x25, 0x05,
- 0x08, 0x1D, 0x09, 0x0A, 0x24, 0x0B, 0x1E, 0x0D, 0x0C, 0x26, 0x26, 0x03,
- 0x02, 0x1B, 0x1C, 0x23, 0x03, 0x04, 0x07, 0x05, 0x06, 0x25, 0x25, 0x02,
- 0x0A, 0x0B, 0x1D, 0x0D, 0x08, 0x0C, 0x09, 0x1E, 0x24, 0x26, 0x26, 0x08,
- 0x24, 0x06, 0x07, 0x9A, 0x12, 0x17, 0x05, 0x83, 0x41, 0x00, 0xFF, 0x17,
- 0x10, 0x83, 0x6C, 0x04, 0x00, 0x01, 0x08, 0x00, 0x00, 0x02, 0x08, 0x00,
- 0x00, 0x0D, 0x08, 0x00, 0x00, 0x00, 0xC0, 0x71, 0x71, 0x03, 0x08, 0x00,
- 0x00, 0x0B, 0x08, 0x72, 0x72, 0x0E, 0x0C, 0x17, 0x04, 0x20, 0x08, 0x08,
- 0x0D, 0x0C, 0x00, 0x00, 0x0D, 0x0C, 0x14, 0x14, 0x16, 0x08, 0x17, 0x06,
- 0x2C, 0x11, 0x08, 0x17, 0x10, 0x84, 0x67, 0x15, 0x00, 0xCC, 0x00, 0x0A,
- 0x00, 0x33, 0x00, 0x00, 0x00, 0x20, 0xF3, 0x05, 0x08, 0x11, 0x00, 0xFF,
- 0x0F, 0xFF, 0x0F, 0x17, 0x08, 0x83, 0x4C, 0x01, 0x03, 0x00, 0x70, 0x00,
- 0x0C, 0x00, 0x01, 0x17, 0x04, 0x0C, 0x08, 0x44, 0x00, 0x10, 0x04, 0x04,
- 0x00, 0x06, 0x13, 0x07, 0x00, 0x80, 0x17, 0x04, 0x10, 0xA0, 0x00, 0x2C,
- 0x00, 0x01, 0x37, 0x00, 0x00, 0x00, 0x80, 0x17, 0x06, 0x48, 0x08, 0x00,
- 0x04, 0x00, 0x1F, 0x22, 0x20, 0x80, 0x0F, 0xF4, 0x20, 0x02, 0x28, 0x28,
- 0x28, 0x28, 0x17, 0x04, 0x04, 0x11, 0x11, 0x11, 0x11, 0x17, 0x04, 0x04,
- 0xBE, 0x00, 0x00, 0x17, 0x05, 0x58, 0x17, 0x08, 0x5C, 0x17, 0x22, 0x85,
- 0x6A, 0x17, 0x1A, 0x1A, 0x14, 0x00, 0x12, 0x00, 0x10, 0x17, 0x05, 0x83,
- 0x0A, 0x17, 0x16, 0x18, 0x30, 0x00, 0x2E, 0x00, 0x33, 0x00, 0x30, 0x00,
- 0x33, 0x00, 0x35, 0x00, 0x30, 0x00, 0x32, 0x17, 0x05, 0x83, 0x0C, 0x17,
- 0x04, 0x20, 0x17, 0x18, 0x18, 0x28, 0x00, 0x28, 0x17, 0x04, 0x04, 0x17,
- 0x08, 0x08, 0x17, 0x10, 0x10, 0x00, 0x14, 0x17, 0x05, 0x5A, 0x17, 0x04,
- 0x5C, 0x17, 0x04, 0x5E, 0x17, 0x04, 0x0E, 0x17, 0x0E, 0x78, 0x17, 0x09,
- 0x82, 0x50, 0x40, 0x06, 0x00, 0xCC, 0x00, 0x09, 0x00, 0x4F, 0x00, 0x51,
- 0x17, 0x08, 0x18, 0x80, 0x01, 0x00, 0x00, 0x40, 0x17, 0x04, 0x20, 0x03,
- 0x00, 0x00, 0x00, 0xAB, 0x00, 0x0A, 0x04, 0x11, 0x17, 0x08, 0x82, 0x58,
- 0x17, 0x0C, 0x38, 0x17, 0x1B, 0x81, 0x6C, 0x17, 0x08, 0x85, 0x60, 0x17,
- 0x08, 0x86, 0x50, 0x17, 0x08, 0x86, 0x60, 0x17, 0x06, 0x83, 0x21, 0x22,
- 0x04, 0xFF, 0xFF, 0xAF, 0x4F, 0x17, 0x0C, 0x86, 0x74, 0x17, 0x08, 0x2C,
- 0x8B, 0xFF, 0x07, 0x17, 0x06, 0x81, 0x04, 0x32, 0x54, 0x76, 0x10, 0x47,
- 0x32, 0x65, 0x10, 0x34, 0x76, 0x25, 0x01, 0x34, 0x67, 0x25, 0x01, 0x75,
- 0x64, 0x32, 0x01, 0x72, 0x56, 0x34, 0x10, 0x23, 0x74, 0x56, 0x01, 0x45,
- 0x32, 0x67, 0x17, 0x04, 0x24, 0x49, 0x92, 0x24, 0x17, 0x04, 0x04, 0x17,
- 0x11, 0x7C, 0x1B, 0x17, 0x04, 0x04, 0x17, 0x13, 0x81, 0x14, 0x2F, 0x41,
- 0x13, 0x1F, 0x14, 0x00, 0x01, 0x00, 0x17, 0x04, 0x7C, 0xFF, 0xFF, 0xFF,
- 0x7F, 0x0B, 0xD7, 0x06, 0x40, 0x00, 0x00, 0x02, 0x00, 0x08, 0x08, 0x03,
- 0x00, 0x00, 0x5C, 0x01, 0x00, 0x10, 0x10, 0x10, 0x17, 0x06, 0x86, 0x59,
- 0x17, 0x0F, 0x89, 0x14, 0x37, 0x17, 0x07, 0x82, 0x72, 0x10, 0x17, 0x06,
- 0x83, 0x0D, 0x00, 0x11, 0x01, 0x17, 0x05, 0x85, 0x39, 0x17, 0x04, 0x0E,
- 0x0A, 0x17, 0x07, 0x89, 0x29, 0x17, 0x04, 0x1B, 0x17, 0x08, 0x86, 0x77,
- 0x17, 0x09, 0x12, 0x20, 0x00, 0x00, 0x00, 0x81, 0x10, 0x09, 0x28, 0x93,
- 0x32, 0xA5, 0x44, 0x5B, 0x8A, 0x67, 0x76, 0x17, 0x18, 0x82, 0x2C, 0xFF,
- 0xEF, 0xFF, 0xEF, 0xC0, 0xC0, 0xC0, 0xC0, 0x17, 0x04, 0x04, 0xDC, 0xDC,
- 0xDC, 0xDC, 0x0A, 0x0A, 0x0A, 0x0A, 0x17, 0x04, 0x04, 0x17, 0x04, 0x04,
- 0x17, 0x05, 0x82, 0x24, 0x03, 0x07, 0x17, 0x04, 0x04, 0x00, 0x00, 0x24,
- 0xFF, 0xFF, 0x00, 0x44, 0x57, 0x6E, 0x00, 0x28, 0x72, 0x39, 0x00, 0x10,
- 0x9C, 0x4B, 0x17, 0x04, 0x64, 0x01, 0x00, 0x00, 0x08, 0x4C, 0x00, 0x00,
- 0x80, 0x20, 0x10, 0x0A, 0x00, 0x28, 0x10, 0x17, 0x06, 0x85, 0x60, 0x17,
- 0x10, 0x82, 0x74, 0x17, 0x08, 0x08, 0x17, 0x08, 0x88, 0x00, 0x17, 0x04,
- 0x10, 0x04, 0x17, 0x0B, 0x87, 0x6C, 0x01, 0x00, 0x02, 0x02, 0x01, 0x02,
- 0x03, 0x00, 0x04, 0x05, 0xC3, 0x71, 0x0F, 0x0F, 0x17, 0x08, 0x8B, 0x18,
- 0x1F, 0x17, 0x09, 0x81, 0x73, 0x00, 0xFF, 0x00, 0xFF, 0x17, 0x05, 0x86,
- 0x48, 0x17, 0x04, 0x0C, 0x17, 0x07, 0x86, 0x34, 0x00, 0x00, 0xF0, 0x17,
- 0x09, 0x87, 0x54, 0x43, 0xC3, 0xBA, 0xE4, 0xD3, 0x1E, 0x17, 0x0C, 0x81,
- 0x52, 0x17, 0x0A, 0x1C, 0x17, 0x10, 0x81, 0x6C, 0x17, 0x0A, 0x82, 0x21,
- 0x17, 0x07, 0x82, 0x4D, 0x17, 0x0A, 0x8A, 0x1B, 0x17, 0x11, 0x2C, 0x76,
- 0x0C, 0x17, 0x0A, 0x8A, 0x67, 0x17, 0x0F, 0x84, 0x28, 0x17, 0x06, 0x34,
- 0x17, 0x17, 0x3A, 0x7E, 0x16, 0x40, 0x17, 0x0C, 0x8B, 0x1F, 0x17, 0x2A,
- 0x38, 0x1E, 0x17, 0x0A, 0x38, 0x17, 0x13, 0x81, 0x28, 0x00, 0xC0, 0x17,
- 0x17, 0x55, 0x46, 0x24, 0x17, 0x0A, 0x81, 0x28, 0x17, 0x14, 0x38, 0x17,
- 0x18, 0x81, 0x60, 0x46, 0x2C, 0x17, 0x06, 0x38, 0xEC, 0x17, 0x0D, 0x16,
- 0x17, 0x0E, 0x82, 0x3C, 0x17, 0x82, 0x0C, 0x8E, 0x68, 0x17, 0x04, 0x24,
- 0x17, 0x5C, 0x8E, 0x68, 0x17, 0x07, 0x82, 0x5F, 0x80, 0x17, 0x87, 0x01,
- 0x8E, 0x68, 0x02, 0x17, 0x81, 0x4A, 0x8E, 0x68, 0x17, 0x0C, 0x87, 0x78,
- 0x17, 0x85, 0x28, 0x8E, 0x68, 0x17, 0x8E, 0x68, 0x9D, 0x50, 0x17, 0x81,
- 0x24, 0x8E, 0x68, 0x17, 0x04, 0x2C, 0x17, 0x28, 0x8E, 0x68, 0x17, 0x04,
- 0x30, 0x17, 0x85, 0x3C, 0x8E, 0x68, 0x12, 0x17, 0x07, 0x85, 0x70, 0x17,
- 0x88, 0x74, 0x8E, 0x68, 0x17, 0x87, 0x3E, 0x9D, 0x50, 0x0C, 0x17, 0x04,
- 0x04, 0x17, 0x12, 0x8E, 0x68, 0x18, 0x17, 0x87, 0x12, 0xBB, 0x20, 0x17,
- 0x83, 0x04, 0x9D, 0x50, 0x15, 0x17, 0x05, 0x8D, 0x76, 0x17, 0x0F, 0x8B,
- 0x49, 0x17, 0x0B, 0x18, 0x32, 0x00, 0x2F, 0x00, 0x32, 0x00, 0x31, 0x00,
- 0x34, 0x00, 0x36, 0x00, 0x2F, 0x00, 0x33, 0x17, 0x09, 0x84, 0x0C, 0x17,
- 0x18, 0x18, 0x17, 0x20, 0x8E, 0x68, 0x15, 0x17, 0x07, 0x5A, 0x17, 0x06,
- 0x5E, 0x16, 0x00, 0x15, 0x17, 0x82, 0x40, 0x9D, 0x50, 0x17, 0x86, 0x5F,
- 0xBB, 0x20, 0x3A, 0x00, 0x00, 0x00, 0x1D, 0x17, 0x81, 0x4F, 0xAC, 0x38,
- 0x3B, 0x17, 0x04, 0x04, 0x17, 0x86, 0x30, 0x8E, 0x68, 0x17, 0x81, 0x53,
- 0xAC, 0x38, 0x07, 0x17, 0x0D, 0x8E, 0x68, 0xA3, 0x72, 0x17, 0x83, 0x10,
- 0x8E, 0x68
-};
diff --git a/nyx/nyx_gui/mem/sdram_lp0.c b/nyx/nyx_gui/mem/sdram_lp0.c
deleted file mode 100644
index 869e85a..0000000
--- a/nyx/nyx_gui/mem/sdram_lp0.c
+++ /dev/null
@@ -1,1126 +0,0 @@
-/*
- * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
- * Copyright 2014 Google Inc.
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- */
-
-#include "../soc/t210.h"
-#include "../soc/pmc_lp0_t210.h"
-#include "sdram_lp0_param_t210.h"
-
-/*
- * This function reads SDRAM parameters from the common BCT format and
- * writes them into PMC scratch registers (where the BootROM expects them
- * on LP0 resume).
- */
-void sdram_lp0_save_params(const void *params)
-{
- struct sdram_params *sdram = (struct sdram_params *)params;
- struct tegra_pmc_regs *pmc = (struct tegra_pmc_regs *)PMC_BASE;
-
-#define pack(src, src_bits, dst, dst_bits) { \
- u32 mask = 0xffffffff >> (31 - ((1 ? src_bits) - (0 ? src_bits))); \
- dst &= ~(mask << (0 ? dst_bits)); \
- dst |= ((src >> (0 ? src_bits)) & mask) << (0 ? dst_bits); \
-}
-
-#define s(param, src_bits, pmcreg, dst_bits) \
- pack(sdram->param, src_bits, pmc->pmcreg, dst_bits)
-
-#define c(value, pmcreg, dst_bits) \
- pack(value, (1 ? dst_bits) - (0 ? dst_bits) : 0, pmc->pmcreg, dst_bits)
-
-/* 32 bits version of s macro */
-#define s32(param, pmcreg) pmc->pmcreg = sdram->param
-
-/* 32 bits version c macro */
-#define c32(value, pmcreg) pmc->pmcreg = value
-
- //TODO: pkg1.1 (1.X - 3.X) reads them from MC.
- // Patch carveout parameters.
- /*sdram->McGeneralizedCarveout1Bom = 0;
- sdram->McGeneralizedCarveout1BomHi = 0;
- sdram->McGeneralizedCarveout1Size128kb = 0;
- sdram->McGeneralizedCarveout1Access0 = 0;
- sdram->McGeneralizedCarveout1Access1 = 0;
- sdram->McGeneralizedCarveout1Access2 = 0;
- sdram->McGeneralizedCarveout1Access3 = 0;
- sdram->McGeneralizedCarveout1Access4 = 0;
- sdram->McGeneralizedCarveout1ForceInternalAccess0 = 0;
- sdram->McGeneralizedCarveout1ForceInternalAccess1 = 0;
- sdram->McGeneralizedCarveout1ForceInternalAccess2 = 0;
- sdram->McGeneralizedCarveout1ForceInternalAccess3 = 0;
- sdram->McGeneralizedCarveout1ForceInternalAccess4 = 0;
- sdram->McGeneralizedCarveout1Cfg0 = 0;
- sdram->McGeneralizedCarveout2Bom = 0x80020000;
- sdram->McGeneralizedCarveout2BomHi = 0;
- sdram->McGeneralizedCarveout2Size128kb = 2;
- sdram->McGeneralizedCarveout2Access0 = 0;
- sdram->McGeneralizedCarveout2Access1 = 0;
- sdram->McGeneralizedCarveout2Access2 = 0x3000000;
- sdram->McGeneralizedCarveout2Access3 = 0;
- sdram->McGeneralizedCarveout2Access4 = 0x300;
- sdram->McGeneralizedCarveout2ForceInternalAccess0 = 0;
- sdram->McGeneralizedCarveout2ForceInternalAccess1 = 0;
- sdram->McGeneralizedCarveout2ForceInternalAccess2 = 0;
- sdram->McGeneralizedCarveout2ForceInternalAccess3 = 0;
- sdram->McGeneralizedCarveout2ForceInternalAccess4 = 0;
- sdram->McGeneralizedCarveout2Cfg0 = 0x440167E;
- sdram->McGeneralizedCarveout3Bom = 0;
- sdram->McGeneralizedCarveout3BomHi = 0;
- sdram->McGeneralizedCarveout3Size128kb = 0;
- sdram->McGeneralizedCarveout3Access0 = 0;
- sdram->McGeneralizedCarveout3Access1 = 0;
- sdram->McGeneralizedCarveout3Access2 = 0x3000000;
- sdram->McGeneralizedCarveout3Access3 = 0;
- sdram->McGeneralizedCarveout3Access4 = 0x300;
- sdram->McGeneralizedCarveout3ForceInternalAccess0 = 0;
- sdram->McGeneralizedCarveout3ForceInternalAccess1 = 0;
- sdram->McGeneralizedCarveout3ForceInternalAccess2 = 0;
- sdram->McGeneralizedCarveout3ForceInternalAccess3 = 0;
- sdram->McGeneralizedCarveout3ForceInternalAccess4 = 0;
- sdram->McGeneralizedCarveout3Cfg0 = 0x4401E7E;
- sdram->McGeneralizedCarveout4Bom = 0;
- sdram->McGeneralizedCarveout4BomHi = 0;
- sdram->McGeneralizedCarveout4Size128kb = 0;
- sdram->McGeneralizedCarveout4Access0 = 0;
- sdram->McGeneralizedCarveout4Access1 = 0;
- sdram->McGeneralizedCarveout4Access2 = 0;
- sdram->McGeneralizedCarveout4Access3 = 0;
- sdram->McGeneralizedCarveout4Access4 = 0;
- sdram->McGeneralizedCarveout4ForceInternalAccess0 = 0;
- sdram->McGeneralizedCarveout4ForceInternalAccess1 = 0;
- sdram->McGeneralizedCarveout4ForceInternalAccess2 = 0;
- sdram->McGeneralizedCarveout4ForceInternalAccess3 = 0;
- sdram->McGeneralizedCarveout4ForceInternalAccess4 = 0;
- sdram->McGeneralizedCarveout4Cfg0 = 0x8F;
- sdram->McGeneralizedCarveout5Bom = 0;
- sdram->McGeneralizedCarveout5BomHi = 0;
- sdram->McGeneralizedCarveout5Size128kb = 0;
- sdram->McGeneralizedCarveout5Access0 = 0;
- sdram->McGeneralizedCarveout5Access1 = 0;
- sdram->McGeneralizedCarveout5Access2 = 0;
- sdram->McGeneralizedCarveout5Access3 = 0;
- sdram->McGeneralizedCarveout5Access4 = 0;
- sdram->McGeneralizedCarveout5ForceInternalAccess0 = 0;
- sdram->McGeneralizedCarveout5ForceInternalAccess1 = 0;
- sdram->McGeneralizedCarveout5ForceInternalAccess2 = 0;
- sdram->McGeneralizedCarveout5ForceInternalAccess3 = 0;
- sdram->McGeneralizedCarveout5ForceInternalAccess4 = 0;
- sdram->McGeneralizedCarveout5Cfg0 = 0x8F;*/
-
- //TODO: this is 4.X+ behaviour which seems to work fine for < 4.X.
- // Patch carveout parameters.
- sdram->McGeneralizedCarveout1Cfg0 = 0;
- sdram->McGeneralizedCarveout2Cfg0 = 0;
- sdram->McGeneralizedCarveout3Cfg0 = 0;
- sdram->McGeneralizedCarveout4Cfg0 = 0;
- sdram->McGeneralizedCarveout5Cfg0 = 0;
-
- // Patch SDRAM parameters.
- u32 t0 = sdram->EmcSwizzleRank0Byte0 << 5 >> 29 > sdram->EmcSwizzleRank0Byte0 << 1 >> 29;
- u32 t1 = (t0 & 0xFFFFFFEF) | ((sdram->EmcSwizzleRank1Byte0 << 5 >> 29 > sdram->EmcSwizzleRank1Byte0 << 1 >> 29) << 4);
- u32 t2 = (t1 & 0xFFFFFFFD) | ((sdram->EmcSwizzleRank0Byte1 << 5 >> 29 > sdram->EmcSwizzleRank0Byte1 << 1 >> 29) << 1);
- u32 t3 = (t2 & 0xFFFFFFDF) | ((sdram->EmcSwizzleRank1Byte1 << 5 >> 29 > sdram->EmcSwizzleRank1Byte1 << 1 >> 29) << 5);
- u32 t4 = (t3 & 0xFFFFFFFB) | ((sdram->EmcSwizzleRank0Byte2 << 5 >> 29 > sdram->EmcSwizzleRank0Byte2 << 1 >> 29) << 2);
- u32 t5 = (t4 & 0xFFFFFFBF) | ((sdram->EmcSwizzleRank1Byte2 << 5 >> 29 > sdram->EmcSwizzleRank1Byte2 << 1 >> 29) << 6);
- u32 t6 = (t5 & 0xFFFFFFF7) | ((sdram->EmcSwizzleRank0Byte3 << 5 >> 29 > sdram->EmcSwizzleRank0Byte3 << 1 >> 29) << 3);
- u32 t7 = (t6 & 0xFFFFFF7F) | ((sdram->EmcSwizzleRank1Byte3 << 5 >> 29 > sdram->EmcSwizzleRank1Byte3 << 1 >> 29) << 7);
- sdram->SwizzleRankByteEncode = t7;
- sdram->EmcBctSpare2 = 0x40000DD8;
- sdram->EmcBctSpare3 = t7;
-
- s(EmcClockSource, 7:0, scratch6, 15:8);
- s(EmcClockSourceDll, 7:0, scratch6, 23:16);
- s(EmcClockSource, 31:29, scratch6, 26:24);
- s(EmcClockSourceDll, 31:29, scratch6, 29:27);
- s(EmcClockSourceDll, 11:10, scratch6, 31:30);
- s(ClkRstControllerPllmMisc2Override, 9:8, scratch7, 1:0);
- s(ClkRstControllerPllmMisc2Override, 2:1, scratch7, 3:2);
- s(EmcZqCalLpDdr4WarmBoot, 31:30, scratch7, 5:4);
- s(EmcClockSource, 15:15, scratch7, 6:6);
- s(EmcClockSource, 26:26, scratch7, 7:7);
- s(EmcClockSource, 20:20, scratch7, 8:8);
- s(EmcClockSource, 19:19, scratch7, 9:9);
- s(ClkRstControllerPllmMisc2Override, 13:13, scratch7, 10:10);
- s(ClkRstControllerPllmMisc2Override, 12:12, scratch7, 11:11);
- s(ClkRstControllerPllmMisc2Override, 11:11, scratch7, 12:12);
- s(ClkRstControllerPllmMisc2Override, 10:10, scratch7, 13:13);
- s(ClkRstControllerPllmMisc2Override, 5:5, scratch7, 14:14);
- s(ClkRstControllerPllmMisc2Override, 4:4, scratch7, 15:15);
- s(ClkRstControllerPllmMisc2Override, 3:3, scratch7, 16:16);
- s(ClkRstControllerPllmMisc2Override, 0:0, scratch7, 17:17);
- s(EmcZqCalLpDdr4WarmBoot, 1:0, scratch7, 19:18);
- s(EmcZqCalLpDdr4WarmBoot, 4:4, scratch7, 20:20);
- s(EmcOdtWrite, 5:0, scratch7, 26:21);
- s(EmcOdtWrite, 11:8, scratch7, 30:27);
- s(EmcOdtWrite, 31:31, scratch7, 31:31);
- s(EmcFdpdCtrlCmdNoRamp, 0:0, scratch13, 30:30);
- s(EmcCfgPipeClk, 0:0, scratch13, 31:31);
- s(McEmemArbMisc2, 0:0, scratch14, 30:30);
- s(McDaCfg0, 0:0, scratch14, 31:31);
- s(EmcQRst, 6:0, scratch15, 26:20);
- s(EmcQRst, 20:16, scratch15, 31:27);
- s(EmcPmacroCmdTxDrv, 5:0, scratch16, 25:20);
- s(EmcPmacroCmdTxDrv, 13:8, scratch16, 31:26);
- s(EmcPmacroAutocalCfg0, 2:0, scratch17, 22:20);
- s(EmcPmacroAutocalCfg0, 10:8, scratch17, 25:23);
- s(EmcPmacroAutocalCfg0, 18:16, scratch17, 28:26);
- s(EmcPmacroAutocalCfg0, 26:24, scratch17, 31:29);
- s(EmcPmacroAutocalCfg1, 2:0, scratch18, 22:20);
- s(EmcPmacroAutocalCfg1, 10:8, scratch18, 25:23);
- s(EmcPmacroAutocalCfg1, 18:16, scratch18, 28:26);
- s(EmcPmacroAutocalCfg1, 26:24, scratch18, 31:29);
- s(EmcPmacroAutocalCfg2, 2:0, scratch19, 22:20);
- s(EmcPmacroAutocalCfg2, 10:8, scratch19, 25:23);
- s(EmcPmacroAutocalCfg2, 18:16, scratch19, 28:26);
- s(EmcPmacroAutocalCfg2, 26:24, scratch19, 31:29);
- s32(EmcCfgRsv,scratch22);
- s32(EmcAutoCalConfig, scratch23);
- s32(EmcAutoCalVrefSel0, scratch24);
- s32(EmcPmacroBrickCtrlRfu1, scratch25);
- s32(EmcPmacroBrickCtrlRfu2, scratch26);
- s32(EmcPmcScratch1, scratch27);
- s32(EmcPmcScratch2, scratch28);
- s32(EmcPmcScratch3, scratch29);
- s32(McEmemArbDaTurns, scratch30);
- s(EmcFbioSpare, 31:24, scratch58, 7:0);
- s(EmcFbioSpare, 23:16, scratch58, 15:8);
- s(EmcFbioSpare, 15:8, scratch58, 23:16);
- s(EmcFbioSpare, 7:2, scratch58, 29:24);
- s(EmcFbioSpare, 0:0, scratch58, 30:30);
- s(EmcDllCfg0, 29:0, scratch59, 29:0);
- s(EmcPmacroDdllBypass, 11:0, scratch60, 11:0);
- s(EmcPmacroDdllBypass, 27:13, scratch60, 26:12);
- s(EmcPmacroDdllBypass, 31:29, scratch60, 29:27);
- s(McEmemArbMisc0, 14:0, scratch61, 14:0);
- s(McEmemArbMisc0, 30:16, scratch61, 29:15);
- s(EmcFdpdCtrlCmd, 16:0, scratch62, 16:0);
- s(EmcFdpdCtrlCmd, 31:20, scratch62, 28:17);
- s(EmcAutoCalConfig2, 27:0, scratch63, 27:0);
- s(EmcBurstRefreshNum, 3:0, scratch63, 31:28);
- s(EmcPmacroZctrl, 27:0, scratch64, 27:0);
- s(EmcTppd, 3:0, scratch64, 31:28);
- s(EmcCfgDigDll, 10:0, scratch65, 10:0);
- s(EmcCfgDigDll, 25:12, scratch65, 24:11);
- s(EmcCfgDigDll, 27:27, scratch65, 25:25);
- s(EmcCfgDigDll, 31:30, scratch65, 27:26);
- s(EmcR2r, 3:0, scratch65, 31:28);
- s(EmcFdpdCtrlDq, 16:0, scratch66, 16:0);
- s(EmcFdpdCtrlDq, 28:20, scratch66, 25:17);
- s(EmcFdpdCtrlDq, 31:30, scratch66, 27:26);
- s(EmcW2w, 3:0, scratch66, 31:28);
- s(EmcPmacroTxPwrd4, 13:0, scratch67, 13:0);
- s(EmcPmacroTxPwrd4, 29:16, scratch67, 27:14);
- s(EmcPmacroCommonPadTxCtrl, 3:0, scratch67, 31:28);
- s(EmcPmacroTxPwrd5, 13:0, scratch68, 13:0);
- s(EmcPmacroTxPwrd5, 29:16, scratch68, 27:14);
- s(EmcPmacroDdllPwrd0, 4:0, scratch69, 4:0);
- s(EmcPmacroDdllPwrd0, 12:6, scratch69, 11:5);
- s(EmcPmacroDdllPwrd0, 20:14, scratch69, 18:12);
- s(EmcPmacroDdllPwrd0, 28:22, scratch69, 25:19);
- s(EmcPmacroDdllPwrd0, 31:30, scratch69, 27:26);
- s(EmcCfg, 4:4, scratch69, 31:31);
- s(EmcPmacroDdllPwrd1, 4:0, scratch70, 4:0);
- s(EmcPmacroDdllPwrd1, 12:6, scratch70, 11:5);
- s(EmcPmacroDdllPwrd1, 20:14, scratch70, 18:12);
- s(EmcPmacroDdllPwrd1, 28:22, scratch70, 25:19);
- s(EmcPmacroDdllPwrd1, 31:30, scratch70, 27:26);
- s(EmcCfg, 5:5, scratch70, 31:31);
- s(EmcPmacroDdllPwrd2, 4:0, scratch71, 4:0);
- s(EmcPmacroDdllPwrd2, 12:6, scratch71, 11:5);
- s(EmcPmacroDdllPwrd2, 20:14, scratch71, 18:12);
- s(EmcPmacroDdllPwrd2, 28:22, scratch71, 25:19);
- s(EmcPmacroDdllPwrd2, 31:30, scratch71, 27:26);
- s(EmcFbioCfg5, 23:20, scratch71, 31:28);
- s(EmcPmacroIbVrefDq_0, 6:0, scratch72, 6:0);
- s(EmcPmacroIbVrefDq_0, 14:8, scratch72, 13:7);
- s(EmcPmacroIbVrefDq_0, 22:16, scratch72, 20:14);
- s(EmcPmacroIbVrefDq_0, 30:24, scratch72, 27:21);
- s(EmcFbioCfg5, 15:13, scratch72, 30:28);
- s(EmcCfg, 6:6, scratch72, 31:31);
- s(EmcPmacroIbVrefDq_1, 6:0, scratch73, 6:0);
- s(EmcPmacroIbVrefDq_1, 14:8, scratch73, 13:7);
- s(EmcPmacroIbVrefDq_1, 22:16, scratch73, 20:14);
- s(EmcPmacroIbVrefDq_1, 30:24, scratch73, 27:21);
- s(EmcCfg2, 5:3, scratch73, 30:28);
- s(EmcCfg, 7:7, scratch73, 31:31);
- s(EmcPmacroIbVrefDqs_0, 6:0, scratch74, 6:0);
- s(EmcPmacroIbVrefDqs_0, 14:8, scratch74, 13:7);
- s(EmcPmacroIbVrefDqs_0, 22:16, scratch74, 20:14);
- s(EmcPmacroIbVrefDqs_0, 30:24, scratch74, 27:21);
- s(EmcCfg, 17:16, scratch74, 29:28);
- s(EmcFbioCfg5, 1:0, scratch74, 31:30);
- s(EmcPmacroIbVrefDqs_1, 6:0, scratch75, 6:0);
- s(EmcPmacroIbVrefDqs_1, 14:8, scratch75, 13:7);
- s(EmcPmacroIbVrefDqs_1, 22:16, scratch75, 20:14);
- s(EmcPmacroIbVrefDqs_1, 30:24, scratch75, 27:21);
- s(EmcFbioCfg5, 3:2, scratch75, 29:28);
- s(EmcCfg2, 27:26, scratch75, 31:30);
- s(EmcPmacroDdllShortCmd_0, 6:0, scratch76, 6:0);
- s(EmcPmacroDdllShortCmd_0, 14:8, scratch76, 13:7);
- s(EmcPmacroDdllShortCmd_0, 22:16, scratch76, 20:14);
- s(EmcPmacroDdllShortCmd_0, 30:24, scratch76, 27:21);
- s(EmcPmacroCmdPadTxCtrl, 3:2, scratch76, 29:28);
- s(EmcPmacroCmdPadTxCtrl, 7:6, scratch76, 31:30);
- s(EmcPmacroDdllShortCmd_1, 6:0, scratch77, 6:0);
- s(EmcPmacroDdllShortCmd_1, 14:8, scratch77, 13:7);
- s(EmcPmacroDdllShortCmd_1, 22:16, scratch77, 20:14);
- s(EmcPmacroDdllShortCmd_1, 30:24, scratch77, 27:21);
- s(EmcPmacroCmdPadTxCtrl, 11:10, scratch77, 29:28);
- s(EmcPmacroCmdPadTxCtrl, 15:14, scratch77, 31:30);
- s(EmcAutoCalChannel, 5:0, scratch78, 5:0);
- s(EmcAutoCalChannel, 11:8, scratch78, 9:6);
- s(EmcAutoCalChannel, 27:16, scratch78, 21:10);
- s(EmcAutoCalChannel, 31:29, scratch78, 24:22);
- s(EmcConfigSampleDelay, 6:0, scratch78, 31:25);
- s(EmcPmacroRxTerm, 5:0, scratch79, 5:0);
- s(EmcPmacroRxTerm, 13:8, scratch79, 11:6);
- s(EmcPmacroRxTerm, 21:16, scratch79, 17:12);
- s(EmcPmacroRxTerm, 29:24, scratch79, 23:18);
- s(EmcRc, 7:0, scratch79, 31:24);
- s(EmcPmacroDqTxDrv, 5:0, scratch80, 5:0);
- s(EmcPmacroDqTxDrv, 13:8, scratch80, 11:6);
- s(EmcPmacroDqTxDrv, 21:16, scratch80, 17:12);
- s(EmcPmacroDqTxDrv, 29:24, scratch80, 23:18);
- s(EmcSelDpdCtrl, 5:2, scratch80, 27:24);
- s(EmcSelDpdCtrl, 8:8, scratch80, 28:28);
- s(EmcSelDpdCtrl, 18:16, scratch80, 31:29);
- s(EmcPmacroCaTxDrv, 5:0, scratch81, 5:0);
- s(EmcPmacroCaTxDrv, 13:8, scratch81, 11:6);
- s(EmcPmacroCaTxDrv, 21:16, scratch81, 17:12);
- s(EmcPmacroCaTxDrv, 29:24, scratch81, 23:18);
- s(EmcObdly, 5:0, scratch81, 29:24);
- s(EmcObdly, 29:28, scratch81, 31:30);
- s(EmcZcalInterval, 23:10, scratch82, 13:0);
- s(EmcZcalInterval, 9:0, scratch82, 23:14);
- s(EmcPmacroCmdRxTermMode, 1:0, scratch82, 25:24);
- s(EmcPmacroCmdRxTermMode, 5:4, scratch82, 27:26);
- s(EmcPmacroCmdRxTermMode, 9:8, scratch82, 29:28);
- s(EmcPmacroCmdRxTermMode, 13:12, scratch82, 31:30);
- s(EmcDataBrlshft0, 23:0, scratch83, 23:0);
- s(EmcPmacroDataRxTermMode, 1:0, scratch83, 25:24);
- s(EmcPmacroDataRxTermMode, 5:4, scratch83, 27:26);
- s(EmcPmacroDataRxTermMode, 9:8, scratch83, 29:28);
- s(EmcPmacroDataRxTermMode, 13:12, scratch83, 31:30);
- s(EmcDataBrlshft1, 23:0, scratch84, 23:0);
- s(McEmemArbTimingRc, 7:0, scratch84, 31:24);
- s(EmcDqsBrlshft0, 23:0, scratch85, 23:0);
- s(McEmemArbRsv, 7:0, scratch85, 31:24);
- s(EmcDqsBrlshft1, 23:0, scratch86, 23:0);
- s(EmcCfgPipe2, 11:0, scratch87, 11:0);
- s(EmcCfgPipe2, 27:16, scratch87, 23:12);
- s(EmcCfgPipe1, 11:0, scratch88, 11:0);
- s(EmcCfgPipe1, 27:16, scratch88, 23:12);
- s(EmcPmacroCmdCtrl0, 5:0, scratch89, 5:0);
- s(EmcPmacroCmdCtrl0, 13:8, scratch89, 11:6);
- s(EmcPmacroCmdCtrl0, 21:16, scratch89, 17:12);
- s(EmcPmacroCmdCtrl0, 29:24, scratch89, 23:18);
- s(EmcPmacroCmdCtrl1, 5:0, scratch90, 5:0);
- s(EmcPmacroCmdCtrl1, 13:8, scratch90, 11:6);
- s(EmcPmacroCmdCtrl1, 21:16, scratch90, 17:12);
- s(EmcPmacroCmdCtrl1, 29:24, scratch90, 23:18);
- s(EmcRas, 6:0, scratch90, 30:24);
- s(EmcCfg, 8:8, scratch90, 31:31);
- s(EmcPmacroVttgenCtrl2, 23:0, scratch91, 23:0);
- s(EmcW2p, 6:0, scratch91, 30:24);
- s(EmcCfg, 9:9, scratch91, 31:31);
- s(EmcPmacroCmdPadRxCtrl, 2:0, scratch92, 2:0);
- s(EmcPmacroCmdPadRxCtrl, 5:4, scratch92, 4:3);
- s(EmcPmacroCmdPadRxCtrl, 10:8, scratch92, 7:5);
- s(EmcPmacroCmdPadRxCtrl, 22:12, scratch92, 18:8);
- s(EmcPmacroCmdPadRxCtrl, 28:24, scratch92, 23:19);
- s(EmcQSafe, 6:0, scratch92, 30:24);
- s(EmcCfg, 18:18, scratch92, 31:31);
- s(EmcPmacroDataPadRxCtrl, 2:0, scratch93, 2:0);
- s(EmcPmacroDataPadRxCtrl, 5:4, scratch93, 4:3);
- s(EmcPmacroDataPadRxCtrl, 10:8, scratch93, 7:5);
- s(EmcPmacroDataPadRxCtrl, 22:12, scratch93, 18:8);
- s(EmcPmacroDataPadRxCtrl, 28:24, scratch93, 23:19);
- s(EmcRdv, 6:0, scratch93, 30:24);
- s(EmcCfg, 21:21, scratch93, 31:31);
- s(McEmemArbDaCovers, 23:0, scratch94, 23:0);
- s(EmcRw2Pden, 6:0, scratch94, 30:24);
- s(EmcCfg, 22:22, scratch94, 31:31);
- s(EmcPmacroCmdCtrl2, 5:0, scratch95, 5:0);
- s(EmcPmacroCmdCtrl2, 13:9, scratch95, 10:6);
- s(EmcPmacroCmdCtrl2, 21:16, scratch95, 16:11);
- s(EmcPmacroCmdCtrl2, 29:24, scratch95, 22:17);
- s(EmcRfcPb, 8:0, scratch95, 31:23);
- s(EmcPmacroQuseDdllRank0_0, 10:0, scratch96, 10:0);
- s(EmcPmacroQuseDdllRank0_0, 26:16, scratch96, 21:11);
- s(EmcCfgUpdate, 2:0, scratch96, 24:22);
- s(EmcCfgUpdate, 10:8, scratch96, 27:25);
- s(EmcCfgUpdate, 31:28, scratch96, 31:28);
- s(EmcPmacroQuseDdllRank0_1, 10:0, scratch97, 10:0);
- s(EmcPmacroQuseDdllRank0_1, 26:16, scratch97, 21:11);
- s(EmcRfc, 9:0, scratch97, 31:22);
- s(EmcPmacroQuseDdllRank0_2, 10:0, scratch98, 10:0);
- s(EmcPmacroQuseDdllRank0_2, 26:16, scratch98, 21:11);
- s(EmcTxsr, 9:0, scratch98, 31:22);
- s(EmcPmacroQuseDdllRank0_3, 10:0, scratch99, 10:0);
- s(EmcPmacroQuseDdllRank0_3, 26:16, scratch99, 21:11);
- s(EmcMc2EmcQ, 2:0, scratch99, 24:22);
- s(EmcMc2EmcQ, 10:8, scratch99, 27:25);
- s(EmcMc2EmcQ, 27:24, scratch99, 31:28);
- s(EmcPmacroQuseDdllRank0_4, 10:0, scratch100, 10:0);
- s(EmcPmacroQuseDdllRank0_4, 26:16, scratch100, 21:11);
- s(McEmemArbRing1Throttle, 4:0, scratch100, 26:22);
- s(McEmemArbRing1Throttle, 20:16, scratch100, 31:27);
- s(EmcPmacroQuseDdllRank0_5, 10:0, scratch101, 10:0);
- s(EmcPmacroQuseDdllRank0_5, 26:16, scratch101, 21:11);
- s(EmcPmacroQuseDdllRank1_0, 10:0, scratch102, 10:0);
- s(EmcPmacroQuseDdllRank1_0, 26:16, scratch102, 21:11);
- s(EmcAr2Pden, 8:0, scratch102, 30:22);
- s(EmcCfg, 23:23, scratch102, 31:31);
- s(EmcPmacroQuseDdllRank1_1, 10:0, scratch103, 10:0);
- s(EmcPmacroQuseDdllRank1_1, 26:16, scratch103, 21:11);
- s(EmcRfcSlr, 8:0, scratch103, 30:22);
- s(EmcCfg, 24:24, scratch103, 31:31);
- s(EmcPmacroQuseDdllRank1_2, 10:0, scratch104, 10:0);
- s(EmcPmacroQuseDdllRank1_2, 26:16, scratch104, 21:11);
- s(EmcIbdly, 6:0, scratch104, 28:22);
- s(EmcIbdly, 29:28, scratch104, 30:29);
- s(EmcCfg, 25:25, scratch104, 31:31);
- s(EmcPmacroQuseDdllRank1_3, 10:0, scratch105, 10:0);
- s(EmcPmacroQuseDdllRank1_3, 26:16, scratch105, 21:11);
- s(McEmemArbTimingRFCPB, 8:0, scratch105, 30:22);
- s(EmcCfg, 26:26, scratch105, 31:31);
- s(EmcPmacroQuseDdllRank1_4, 10:0, scratch106, 10:0);
- s(EmcPmacroQuseDdllRank1_4, 26:16, scratch106, 21:11);
- s(EmcTfaw, 6:0, scratch106, 28:22);
- s(EmcPmacroDataPadTxCtrl, 3:2, scratch106, 30:29);
- s(EmcCfg, 28:28, scratch106, 31:31);
- s(EmcPmacroQuseDdllRank1_5, 10:0, scratch107, 10:0);
- s(EmcPmacroQuseDdllRank1_5, 26:16, scratch107, 21:11);
- s(EmcTClkStable, 6:0, scratch107, 28:22);
- s(EmcPmacroDataPadTxCtrl, 7:6, scratch107, 30:29);
- s(EmcCfg, 29:29, scratch107, 31:31);
- s(EmcPmacroObDdllLongDqRank0_0, 10:0, scratch108, 10:0);
- s(EmcPmacroObDdllLongDqRank0_0, 26:16, scratch108, 21:11);
- s(EmcPdex2Mrr, 6:0, scratch108, 28:22);
- s(EmcPmacroDataPadTxCtrl, 11:10, scratch108, 30:29);
- s(EmcCfg, 30:30, scratch108, 31:31);
- s(EmcPmacroObDdllLongDqRank0_1, 10:0, scratch109, 10:0);
- s(EmcPmacroObDdllLongDqRank0_1, 26:16, scratch109, 21:11);
- s(EmcRdvMask, 6:0, scratch109, 28:22);
- s(EmcPmacroDataPadTxCtrl, 15:14, scratch109, 30:29);
- s(EmcCfg, 31:31, scratch109, 31:31);
- s(EmcPmacroObDdllLongDqRank0_2, 10:0, scratch110, 10:0);
- s(EmcPmacroObDdllLongDqRank0_2, 26:16, scratch110, 21:11);
- s(EmcRdvEarlyMask, 6:0, scratch110, 28:22);
- s(EmcFbioCfg5, 4:4, scratch110, 29:29);
- s(EmcFbioCfg5, 8:8, scratch110, 30:30);
- s(EmcFbioCfg5, 10:10, scratch110, 31:31);
- s(EmcPmacroObDdllLongDqRank0_3, 10:0, scratch111, 10:0);
- s(EmcPmacroObDdllLongDqRank0_3, 26:16, scratch111, 21:11);
- s(EmcRdvEarly, 6:0, scratch111, 28:22);
- s(EmcFbioCfg5, 12:12, scratch111, 29:29);
- s(EmcFbioCfg5, 25:24, scratch111, 31:30);
- s(EmcPmacroObDdllLongDqRank0_4, 10:0, scratch112, 10:0);
- s(EmcPmacroObDdllLongDqRank0_4, 26:16, scratch112, 21:11);
- s(EmcPmacroDdllShortCmd_2, 6:0, scratch112, 28:22);
- s(EmcFbioCfg5, 28:26, scratch112, 31:29);
- s(EmcPmacroObDdllLongDqRank0_5, 10:0, scratch113, 10:0);
- s(EmcPmacroObDdllLongDqRank0_5, 26:16, scratch113, 21:11);
- s(McEmemArbTimingRp, 6:0, scratch113, 28:22);
- s(EmcFbioCfg5, 31:30, scratch113, 30:29);
- s(EmcCfg2, 0:0, scratch113, 31:31);
- s(EmcPmacroObDdllLongDqRank1_0, 10:0, scratch114, 10:0);
- s(EmcPmacroObDdllLongDqRank1_0, 26:16, scratch114, 21:11);
- s(McEmemArbTimingRas, 6:0, scratch114, 28:22);
- s(EmcCfg2, 2:1, scratch114, 30:29);
- s(EmcCfg2, 7:7, scratch114, 31:31);
- s(EmcPmacroObDdllLongDqRank1_1, 10:0, scratch115, 10:0);
- s(EmcPmacroObDdllLongDqRank1_1, 26:16, scratch115, 21:11);
- s(McEmemArbTimingFaw, 6:0, scratch115, 28:22);
- s(EmcCfg2, 11:10, scratch115, 30:29);
- s(EmcCfg2, 14:14, scratch115, 31:31);
- s(EmcPmacroObDdllLongDqRank1_2, 10:0, scratch123, 10:0);
- s(EmcPmacroObDdllLongDqRank1_2, 26:16, scratch123, 21:11);
- s(McEmemArbTimingRap2Pre, 6:0, scratch123, 28:22);
- s(EmcCfg2, 16:15, scratch123, 30:29);
- s(EmcCfg2, 20:20, scratch123, 31:31);
- s(EmcPmacroObDdllLongDqRank1_3, 10:0, scratch124, 10:0);
- s(EmcPmacroObDdllLongDqRank1_3, 26:16, scratch124, 21:11);
- s(McEmemArbTimingWap2Pre, 6:0, scratch124, 28:22);
- s(EmcCfg2, 24:22, scratch124, 31:29);
- s(EmcPmacroObDdllLongDqRank1_4, 10:0, scratch125, 10:0);
- s(EmcPmacroObDdllLongDqRank1_4, 26:16, scratch125, 21:11);
- s(McEmemArbTimingR2W, 6:0, scratch125, 28:22);
- s(EmcCfg2, 25:25, scratch125, 29:29);
- s(EmcCfg2, 29:28, scratch125, 31:30);
- s(EmcPmacroObDdllLongDqRank1_5, 10:0, scratch126, 10:0);
- s(EmcPmacroObDdllLongDqRank1_5, 26:16, scratch126, 21:11);
- s(McEmemArbTimingW2R, 6:0, scratch126, 28:22);
- s(EmcCfg2, 31:30, scratch126, 30:29);
- s(EmcCfgPipe, 0:0, scratch126, 31:31);
- s(EmcPmacroObDdllLongDqsRank0_0, 10:0, scratch127, 10:0);
- s(EmcPmacroObDdllLongDqsRank0_0, 26:16, scratch127, 21:11);
- s(EmcRp, 5:0, scratch127, 27:22);
- s(EmcCfgPipe, 4:1, scratch127, 31:28);
- s(EmcPmacroObDdllLongDqsRank0_1, 10:0, scratch128, 10:0);
- s(EmcPmacroObDdllLongDqsRank0_1, 26:16, scratch128, 21:11);
- s(EmcR2w, 5:0, scratch128, 27:22);
- s(EmcCfgPipe, 8:5, scratch128, 31:28);
- s(EmcPmacroObDdllLongDqsRank0_2, 10:0, scratch129, 10:0);
- s(EmcPmacroObDdllLongDqsRank0_2, 26:16, scratch129, 21:11);
- s(EmcW2r, 5:0, scratch129, 27:22);
- s(EmcCfgPipe, 11:9, scratch129, 30:28);
- s(EmcCfgPipe, 16:16, scratch129, 31:31);
- s(EmcPmacroObDdllLongDqsRank0_3, 10:0, scratch130, 10:0);
- s(EmcPmacroObDdllLongDqsRank0_3, 26:16, scratch130, 21:11);
- s(EmcR2p, 5:0, scratch130, 27:22);
- s(EmcCfgPipe, 20:17, scratch130, 31:28);
- s(EmcPmacroObDdllLongDqsRank0_4, 10:0, scratch131, 10:0);
- s(EmcPmacroObDdllLongDqsRank0_4, 26:16, scratch131, 21:11);
- s(EmcCcdmw, 5:0, scratch131, 27:22);
- s(EmcCfgPipe, 24:21, scratch131, 31:28);
- s(EmcPmacroObDdllLongDqsRank0_5, 10:0, scratch132, 10:0);
- s(EmcPmacroObDdllLongDqsRank0_5, 26:16, scratch132, 21:11);
- s(EmcRdRcd, 5:0, scratch132, 27:22);
- s(EmcCfgPipe, 27:25, scratch132, 30:28);
- s(EmcPmacroTxPwrd0, 0:0, scratch132, 31:31);
- s(EmcPmacroObDdllLongDqsRank1_0, 10:0, scratch133, 10:0);
- s(EmcPmacroObDdllLongDqsRank1_0, 26:16, scratch133, 21:11);
- s(EmcWrRcd, 5:0, scratch133, 27:22);
- s(EmcPmacroTxPwrd0, 4:1, scratch133, 31:28);
- s(EmcPmacroObDdllLongDqsRank1_1, 10:0, scratch134, 10:0);
- s(EmcPmacroObDdllLongDqsRank1_1, 26:16, scratch134, 21:11);
- s(EmcWdv, 5:0, scratch134, 27:22);
- s(EmcPmacroTxPwrd0, 8:5, scratch134, 31:28);
- s(EmcPmacroObDdllLongDqsRank1_2, 10:0, scratch135, 10:0);
- s(EmcPmacroObDdllLongDqsRank1_2, 26:16, scratch135, 21:11);
- s(EmcQUse, 5:0, scratch135, 27:22);
- s(EmcPmacroTxPwrd0, 12:9, scratch135, 31:28);
- s(EmcPmacroObDdllLongDqsRank1_3, 10:0, scratch136, 10:0);
- s(EmcPmacroObDdllLongDqsRank1_3, 26:16, scratch136, 21:11);
- s(EmcPdEx2Wr, 5:0, scratch136, 27:22);
- s(EmcPmacroTxPwrd0, 13:13, scratch136, 28:28);
- s(EmcPmacroTxPwrd0, 18:16, scratch136, 31:29);
- s(EmcPmacroObDdllLongDqsRank1_4, 10:0, scratch137, 10:0);
- s(EmcPmacroObDdllLongDqsRank1_4, 26:16, scratch137, 21:11);
- s(EmcPdEx2Rd, 5:0, scratch137, 27:22);
- s(EmcPmacroTxPwrd0, 22:19, scratch137, 31:28);
- s(EmcPmacroObDdllLongDqsRank1_5, 10:0, scratch138, 10:0);
- s(EmcPmacroObDdllLongDqsRank1_5, 26:16, scratch138, 21:11);
- s(EmcPdex2Cke, 5:0, scratch138, 27:22);
- s(EmcPmacroTxPwrd0, 26:23, scratch138, 31:28);
- s(EmcPmacroIbDdllLongDqsRank0_0, 10:0, scratch139, 10:0);
- s(EmcPmacroIbDdllLongDqsRank0_0, 26:16, scratch139, 21:11);
- s(EmcPChg2Pden, 5:0, scratch139, 27:22);
- s(EmcPmacroTxPwrd0, 29:27, scratch139, 30:28);
- s(EmcPmacroTxPwrd1, 0:0, scratch139, 31:31);
- s(EmcPmacroIbDdllLongDqsRank0_1, 10:0, scratch140, 10:0);
- s(EmcPmacroIbDdllLongDqsRank0_1, 26:16, scratch140, 21:11);
- s(EmcAct2Pden, 5:0, scratch140, 27:22);
- s(EmcPmacroTxPwrd1, 4:1, scratch140, 31:28);
- s(EmcPmacroIbDdllLongDqsRank0_2, 10:0, scratch141, 10:0);
- s(EmcPmacroIbDdllLongDqsRank0_2, 26:16, scratch141, 21:11);
- s(EmcCke2Pden, 5:0, scratch141, 27:22);
- s(EmcPmacroTxPwrd1, 8:5, scratch141, 31:28);
- s(EmcPmacroIbDdllLongDqsRank0_3, 10:0, scratch142, 10:0);
- s(EmcPmacroIbDdllLongDqsRank0_3, 26:16, scratch142, 21:11);
- s(EmcTcke, 5:0, scratch142, 27:22);
- s(EmcPmacroTxPwrd1, 12:9, scratch142, 31:28);
- s(EmcPmacroIbDdllLongDqsRank1_0, 10:0, scratch143, 10:0);
- s(EmcPmacroIbDdllLongDqsRank1_0, 26:16, scratch143, 21:11);
- s(EmcTrpab, 5:0, scratch143, 27:22);
- s(EmcPmacroTxPwrd1, 13:13, scratch143, 28:28);
- s(EmcPmacroTxPwrd1, 18:16, scratch143, 31:29);
- s(EmcPmacroIbDdllLongDqsRank1_1, 10:0, scratch144, 10:0);
- s(EmcPmacroIbDdllLongDqsRank1_1, 26:16, scratch144, 21:11);
- s(EmcClkenOverride, 3:1, scratch144, 24:22);
- s(EmcClkenOverride, 8:6, scratch144, 27:25);
- s(EmcPmacroTxPwrd1, 22:19, scratch144, 31:28);
- s(EmcPmacroIbDdllLongDqsRank1_2, 10:0, scratch145, 10:0);
- s(EmcPmacroIbDdllLongDqsRank1_2, 26:16, scratch145, 21:11);
- s(EmcEInput, 5:0, scratch145, 27:22);
- s(EmcPmacroTxPwrd1, 26:23, scratch145, 31:28);
- s(EmcPmacroIbDdllLongDqsRank1_3, 10:0, scratch146, 10:0);
- s(EmcPmacroIbDdllLongDqsRank1_3, 26:16, scratch146, 21:11);
- s(EmcEInputDuration, 5:0, scratch146, 27:22);
- s(EmcPmacroTxPwrd1, 29:27, scratch146, 30:28);
- s(EmcPmacroTxPwrd2, 0:0, scratch146, 31:31);
- s(EmcPmacroDdllLongCmd_0, 10:0, scratch147, 10:0);
- s(EmcPmacroDdllLongCmd_0, 26:16, scratch147, 21:11);
- s(EmcPutermExtra, 5:0, scratch147, 27:22);
- s(EmcPmacroTxPwrd2, 4:1, scratch147, 31:28);
- s(EmcPmacroDdllLongCmd_1, 10:0, scratch148, 10:0);
- s(EmcPmacroDdllLongCmd_1, 26:16, scratch148, 21:11);
- s(EmcTckesr, 5:0, scratch148, 27:22);
- s(EmcPmacroTxPwrd2, 8:5, scratch148, 31:28);
- s(EmcPmacroDdllLongCmd_2, 10:0, scratch149, 10:0);
- s(EmcPmacroDdllLongCmd_2, 26:16, scratch149, 21:11);
- s(EmcTpd, 5:0, scratch149, 27:22);
- s(EmcPmacroTxPwrd2, 12:9, scratch149, 31:28);
- s(EmcPmacroDdllLongCmd_3, 10:0, scratch150, 10:0);
- s(EmcPmacroDdllLongCmd_3, 26:16, scratch150, 21:11);
- s(EmcWdvMask, 5:0, scratch150, 27:22);
- s(EmcPmacroTxPwrd2, 13:13, scratch150, 28:28);
- s(EmcPmacroTxPwrd2, 18:16, scratch150, 31:29);
- s(McEmemArbCfg, 8:0, scratch151, 8:0);
- s(McEmemArbCfg, 20:16, scratch151, 13:9);
- s(McEmemArbCfg, 31:24, scratch151, 21:14);
- s(EmcWdvChk, 5:0, scratch151, 27:22);
- s(EmcPmacroTxPwrd2, 22:19, scratch151, 31:28);
- s(McEmemArbMisc1, 12:0, scratch152, 12:0);
- s(McEmemArbMisc1, 25:21, scratch152, 17:13);
- s(McEmemArbMisc1, 31:28, scratch152, 21:18);
- s(EmcCmdBrlshft0, 5:0, scratch152, 27:22);
- s(EmcPmacroTxPwrd2, 26:23, scratch152, 31:28);
- s(EmcMrsWaitCnt2, 9:0, scratch153, 9:0);
- s(EmcMrsWaitCnt2, 26:16, scratch153, 20:10);
- s(EmcPmacroIbRxrt, 10:0, scratch153, 31:21);
- s(EmcMrsWaitCnt, 9:0, scratch154, 9:0);
- s(EmcMrsWaitCnt, 26:16, scratch154, 20:10);
- s(EmcPmacroDdllLongCmd_4, 10:0, scratch154, 31:21);
- s(EmcAutoCalInterval, 20:0, scratch155, 20:0);
- s(McEmemArbOutstandingReq, 8:0, scratch155, 29:21);
- s(McEmemArbOutstandingReq, 31:30, scratch155, 31:30);
- s(McEmemArbRefpbHpCtrl, 6:0, scratch156, 6:0);
- s(McEmemArbRefpbHpCtrl, 14:8, scratch156, 13:7);
- s(McEmemArbRefpbHpCtrl, 22:16, scratch156, 20:14);
- s(EmcCmdBrlshft1, 5:0, scratch156, 26:21);
- s(EmcRrd, 4:0, scratch156, 31:27);
- s(EmcQuseBrlshft0, 19:0, scratch157, 19:0);
- s(EmcFbioCfg8, 27:16, scratch157, 31:20);
- s(EmcQuseBrlshft1, 19:0, scratch158, 19:0);
- s(EmcTxsrDll, 11:0, scratch158, 31:20);
- s(EmcQuseBrlshft2, 19:0, scratch159, 19:0);
- s(EmcTxdsrvttgen, 11:0, scratch159, 31:20);
- s(EmcQuseBrlshft3, 19:0, scratch160, 19:0);
- s(EmcPmacroVttgenCtrl0, 3:0, scratch160, 23:20);
- s(EmcPmacroVttgenCtrl0, 11:8, scratch160, 27:24);
- s(EmcPmacroVttgenCtrl0, 19:16, scratch160, 31:28);
- s(EmcPmacroVttgenCtrl1, 19:0, scratch161, 19:0);
- s(EmcCmdBrlshft2, 5:0, scratch161, 25:20);
- s(EmcCmdBrlshft3, 5:0, scratch161, 31:26);
- s(EmcAutoCalConfig3, 5:0, scratch162, 5:0);
- s(EmcAutoCalConfig3, 13:8, scratch162, 11:6);
- s(EmcAutoCalConfig3, 18:16, scratch162, 14:12);
- s(EmcAutoCalConfig3, 22:20, scratch162, 17:15);
- s(EmcTRefBw, 13:0, scratch162, 31:18);
- s(EmcAutoCalConfig4, 5:0, scratch163, 5:0);
- s(EmcAutoCalConfig4, 13:8, scratch163, 11:6);
- s(EmcAutoCalConfig4, 18:16, scratch163, 14:12);
- s(EmcAutoCalConfig4, 22:20, scratch163, 17:15);
- s(EmcQpop, 6:0, scratch163, 24:18);
- s(EmcQpop, 22:16, scratch163, 31:25);
- s(EmcAutoCalConfig5, 5:0, scratch164, 5:0);
- s(EmcAutoCalConfig5, 13:8, scratch164, 11:6);
- s(EmcAutoCalConfig5, 18:16, scratch164, 14:12);
- s(EmcAutoCalConfig5, 22:20, scratch164, 17:15);
- s(EmcPmacroAutocalCfgCommon, 5:0, scratch164, 23:18);
- s(EmcPmacroAutocalCfgCommon, 13:8, scratch164, 29:24);
- s(EmcPmacroAutocalCfgCommon, 16:16, scratch164, 30:30);
- s(EmcPmacroTxPwrd2, 27:27, scratch164, 31:31);
- s(EmcAutoCalConfig6, 5:0, scratch165, 5:0);
- s(EmcAutoCalConfig6, 13:8, scratch165, 11:6);
- s(EmcAutoCalConfig6, 18:16, scratch165, 14:12);
- s(EmcAutoCalConfig6, 22:20, scratch165, 17:15);
- s(EmcWev, 5:0, scratch165, 23:18);
- s(EmcWsv, 5:0, scratch165, 29:24);
- s(EmcPmacroTxPwrd2, 29:28, scratch165, 31:30);
- s(EmcAutoCalConfig7, 5:0, scratch166, 5:0);
- s(EmcAutoCalConfig7, 13:8, scratch166, 11:6);
- s(EmcAutoCalConfig7, 18:16, scratch166, 14:12);
- s(EmcAutoCalConfig7, 22:20, scratch166, 17:15);
- s(EmcCfg3, 2:0, scratch166, 20:18);
- s(EmcCfg3, 6:4, scratch166, 23:21);
- s(EmcQuseWidth, 3:0, scratch166, 27:24);
- s(EmcQuseWidth, 29:28, scratch166, 29:28);
- s(EmcPmacroTxPwrd3, 1:0, scratch166, 31:30);
- s(EmcAutoCalConfig8, 5:0, scratch167, 5:0);
- s(EmcAutoCalConfig8, 13:8, scratch167, 11:6);
- s(EmcAutoCalConfig8, 18:16, scratch167, 14:12);
- s(EmcAutoCalConfig8, 22:20, scratch167, 17:15);
- s(EmcPmacroBgBiasCtrl0, 2:0, scratch167, 20:18);
- s(EmcPmacroBgBiasCtrl0, 6:4, scratch167, 23:21);
- s(McEmemArbTimingRcd, 5:0, scratch167, 29:24);
- s(EmcPmacroTxPwrd3, 3:2, scratch167, 31:30);
- s(EmcXm2CompPadCtrl2, 17:0, scratch168, 17:0);
- s(McEmemArbTimingCcdmw, 5:0, scratch168, 23:18);
- s(McEmemArbOverride, 27:27, scratch168, 24:24);
- s(McEmemArbOverride, 26:26, scratch168, 25:25);
- s(McEmemArbOverride, 16:16, scratch168, 26:26);
- s(McEmemArbOverride, 10:10, scratch168, 27:27);
- s(McEmemArbOverride, 4:4, scratch168, 28:28);
- s(McEmemArbOverride, 3:3, scratch168, 29:29);
- s(EmcPmacroTxPwrd3, 5:4, scratch168, 31:30);
- s(EmcXm2CompPadCtrl3, 17:0, scratch169, 17:0);
- s(EmcRext, 4:0, scratch169, 22:18);
- s(EmcTClkStop, 4:0, scratch169, 27:23);
- s(EmcPmacroTxPwrd3, 9:6, scratch169, 31:28);
- s(EmcZcalWaitCnt, 10:0, scratch170, 10:0);
- s(EmcZcalWaitCnt, 21:16, scratch170, 16:11);
- s(EmcZcalWaitCnt, 31:31, scratch170, 17:17);
- s(EmcWext, 4:0, scratch170, 22:18);
- s(EmcRefctrl2, 0:0, scratch170, 23:23);
- s(EmcRefctrl2, 26:24, scratch170, 26:24);
- s(EmcRefctrl2, 31:31, scratch170, 27:27);
- s(EmcPmacroTxPwrd3, 13:10, scratch170, 31:28);
- s(EmcZcalMrwCmd, 7:0, scratch171, 7:0);
- s(EmcZcalMrwCmd, 23:16, scratch171, 15:8);
- s(EmcZcalMrwCmd, 31:30, scratch171, 17:16);
- s(EmcWeDuration, 4:0, scratch171, 22:18);
- s(EmcWsDuration, 4:0, scratch171, 27:23);
- s(EmcPmacroTxPwrd3, 19:16, scratch171, 31:28);
- s(EmcSwizzleRank0Byte0, 2:0, scratch172, 2:0);
- s(EmcSwizzleRank0Byte0, 6:4, scratch172, 5:3);
- s(EmcSwizzleRank0Byte0, 10:8, scratch172, 8:6);
- s(EmcSwizzleRank0Byte0, 14:12, scratch172, 11:9);
- s(EmcSwizzleRank0Byte0, 18:16, scratch172, 14:12);
- s(EmcSwizzleRank0Byte0, 22:20, scratch172, 17:15);
- s(EmcPutermWidth, 31:31, scratch172, 18:18);
- s(EmcPutermWidth, 3:0, scratch172, 22:19);
- s(McEmemArbTimingRrd, 4:0, scratch172, 27:23);
- s(EmcPmacroTxPwrd3, 23:20, scratch172, 31:28);
- s(EmcSwizzleRank0Byte1, 2:0, scratch173, 2:0);
- s(EmcSwizzleRank0Byte1, 6:4, scratch173, 5:3);
- s(EmcSwizzleRank0Byte1, 10:8, scratch173, 8:6);
- s(EmcSwizzleRank0Byte1, 14:12, scratch173, 11:9);
- s(EmcSwizzleRank0Byte1, 18:16, scratch173, 14:12);
- s(EmcSwizzleRank0Byte1, 22:20, scratch173, 17:15);
- s(McEmemArbTimingR2R, 4:0, scratch173, 22:18);
- s(McEmemArbTimingW2W, 4:0, scratch173, 27:23);
- s(EmcPmacroTxPwrd3, 27:24, scratch173, 31:28);
- s(EmcSwizzleRank0Byte2, 2:0, scratch174, 2:0);
- s(EmcSwizzleRank0Byte2, 6:4, scratch174, 5:3);
- s(EmcSwizzleRank0Byte2, 10:8, scratch174, 8:6);
- s(EmcSwizzleRank0Byte2, 14:12, scratch174, 11:9);
- s(EmcSwizzleRank0Byte2, 18:16, scratch174, 14:12);
- s(EmcSwizzleRank0Byte2, 22:20, scratch174, 17:15);
- s(EmcPmacroTxPwrd3, 29:28, scratch174, 19:18);
- s(EmcPmacroTxSelClkSrc0, 11:0, scratch174, 31:20);
- s(EmcSwizzleRank0Byte3, 2:0, scratch175, 2:0);
- s(EmcSwizzleRank0Byte3, 6:4, scratch175, 5:3);
- s(EmcSwizzleRank0Byte3, 10:8, scratch175, 8:6);
- s(EmcSwizzleRank0Byte3, 14:12, scratch175, 11:9);
- s(EmcSwizzleRank0Byte3, 18:16, scratch175, 14:12);
- s(EmcSwizzleRank0Byte3, 22:20, scratch175, 17:15);
- s(EmcPmacroTxSelClkSrc0, 27:16, scratch175, 29:18);
- s(EmcPmacroTxSelClkSrc1, 1:0, scratch175, 31:30);
- s(EmcSwizzleRank1Byte0, 2:0, scratch176, 2:0);
- s(EmcSwizzleRank1Byte0, 6:4, scratch176, 5:3);
- s(EmcSwizzleRank1Byte0, 10:8, scratch176, 8:6);
- s(EmcSwizzleRank1Byte0, 14:12, scratch176, 11:9);
- s(EmcSwizzleRank1Byte0, 18:16, scratch176, 14:12);
- s(EmcSwizzleRank1Byte0, 22:20, scratch176, 17:15);
- s(EmcPmacroTxSelClkSrc1, 11:2, scratch176, 27:18);
- s(EmcPmacroTxSelClkSrc1, 19:16, scratch176, 31:28);
- s(EmcSwizzleRank1Byte1, 2:0, scratch177, 2:0);
- s(EmcSwizzleRank1Byte1, 6:4, scratch177, 5:3);
- s(EmcSwizzleRank1Byte1, 10:8, scratch177, 8:6);
- s(EmcSwizzleRank1Byte1, 14:12, scratch177, 11:9);
- s(EmcSwizzleRank1Byte1, 18:16, scratch177, 14:12);
- s(EmcSwizzleRank1Byte1, 22:20, scratch177, 17:15);
- s(EmcPmacroTxSelClkSrc1, 27:20, scratch177, 25:18);
- s(EmcPmacroTxSelClkSrc3, 5:0, scratch177, 31:26);
- s(EmcSwizzleRank1Byte2, 2:0, scratch178, 2:0);
- s(EmcSwizzleRank1Byte2, 6:4, scratch178, 5:3);
- s(EmcSwizzleRank1Byte2, 10:8, scratch178, 8:6);
- s(EmcSwizzleRank1Byte2, 14:12, scratch178, 11:9);
- s(EmcSwizzleRank1Byte2, 18:16, scratch178, 14:12);
- s(EmcSwizzleRank1Byte2, 22:20, scratch178, 17:15);
- s(EmcPmacroTxSelClkSrc3, 11:6, scratch178, 23:18);
- s(EmcPmacroTxSelClkSrc3, 23:16, scratch178, 31:24);
- s(EmcSwizzleRank1Byte3, 2:0, scratch179, 2:0);
- s(EmcSwizzleRank1Byte3, 6:4, scratch179, 5:3);
- s(EmcSwizzleRank1Byte3, 10:8, scratch179, 8:6);
- s(EmcSwizzleRank1Byte3, 14:12, scratch179, 11:9);
- s(EmcSwizzleRank1Byte3, 18:16, scratch179, 14:12);
- s(EmcSwizzleRank1Byte3, 22:20, scratch179, 17:15);
- s(EmcPmacroTxSelClkSrc3, 27:24, scratch179, 21:18);
- s(EmcPmacroTxSelClkSrc2, 9:0, scratch179, 31:22);
- s(EmcPmacroCmdBrickCtrlFdpd, 17:0, scratch180, 17:0);
- s(EmcPmacroTxSelClkSrc2, 11:10, scratch180, 19:18);
- s(EmcPmacroTxSelClkSrc2, 27:16, scratch180, 31:20);
- s(EmcPmacroDataBrickCtrlFdpd, 17:0, scratch181, 17:0);
- s(EmcPmacroTxSelClkSrc4, 11:0, scratch181, 29:18);
- s(EmcPmacroTxSelClkSrc4, 17:16, scratch181, 31:30);
- s(EmcFbioCfg7, 16:0, scratch182, 16:0);
- s(McEmemArbRefpbBankCtrl, 6:0, scratch182, 23:17);
- s(McEmemArbRefpbBankCtrl, 14:8, scratch182, 30:24);
- s(McEmemArbRefpbBankCtrl, 31:31, scratch182, 31:31);
- s(EmcDynSelfRefControl, 15:0, scratch183, 15:0);
- s(EmcDynSelfRefControl, 31:31, scratch183, 16:16);
- s(EmcPmacroTxSelClkSrc4, 27:18, scratch183, 26:17);
- s(EmcPmacroTxSelClkSrc5, 4:0, scratch183, 31:27);
- s(EmcDllCfg1, 16:0, scratch184, 16:0);
- s(EmcPmacroTxSelClkSrc5, 11:5, scratch184, 23:17);
- s(EmcPmacroTxSelClkSrc5, 23:16, scratch184, 31:24);
- s(EmcPmacroPadCfgCtrl, 1:0, scratch185, 1:0);
- s(EmcPmacroPadCfgCtrl, 6:5, scratch185, 3:2);
- s(EmcPmacroPadCfgCtrl, 11:9, scratch185, 6:4);
- s(EmcPmacroPadCfgCtrl, 13:13, scratch185, 7:7);
- s(EmcPmacroPadCfgCtrl, 17:16, scratch185, 9:8);
- s(EmcPmacroPadCfgCtrl, 21:20, scratch185, 11:10);
- s(EmcPmacroPadCfgCtrl, 25:24, scratch185, 13:12);
- s(EmcPmacroPadCfgCtrl, 30:28, scratch185, 16:14);
- s(EmcPmacroTxSelClkSrc5, 27:24, scratch185, 20:17);
- s(EmcPmacroCmdPadTxCtrl, 1:0, scratch185, 22:21);
- s(EmcPmacroCmdPadTxCtrl, 5:4, scratch185, 24:23);
- s(EmcPmacroCmdPadTxCtrl, 9:8, scratch185, 26:25);
- s(EmcPmacroCmdPadTxCtrl, 13:12, scratch185, 28:27);
- s(EmcPmacroCmdPadTxCtrl, 16:16, scratch185, 29:29);
- s(EmcPmacroCmdPadTxCtrl, 21:20, scratch185, 31:30);
- s(EmcRefresh, 15:0, scratch186, 15:0);
- s(EmcCmdQ, 4:0, scratch186, 20:16);
- s(EmcCmdQ, 10:8, scratch186, 23:21);
- s(EmcCmdQ, 14:12, scratch186, 26:24);
- s(EmcCmdQ, 28:24, scratch186, 31:27);
- s(EmcAcpdControl, 15:0, scratch187, 15:0);
- s(EmcAutoCalVrefSel1, 15:0, scratch187, 31:16);
- s(EmcXm2CompPadCtrl, 1:0, scratch188, 1:0);
- s(EmcXm2CompPadCtrl, 6:3, scratch188, 5:2);
- s(EmcXm2CompPadCtrl, 9:9, scratch188, 6:6);
- s(EmcXm2CompPadCtrl, 19:11, scratch188, 15:7);
- s(EmcCfgDigDllPeriod, 15:0, scratch188, 31:16);
- s(EmcCfgDigDll_1, 15:0, scratch189, 15:0);
- s(EmcPreRefreshReqCnt, 15:0, scratch189, 31:16);
- s(EmcPmacroCmdPadTxCtrl, 27:24, scratch190, 19:16);
- s(EmcPmacroDataPadTxCtrl, 1:0, scratch190, 21:20);
- s(EmcPmacroDataPadTxCtrl, 5:4, scratch190, 23:22);
- s(EmcPmacroDataPadTxCtrl, 9:8, scratch190, 25:24);
- s(EmcPmacroDataPadTxCtrl, 13:12, scratch190, 27:26);
- s(EmcPmacroDataPadTxCtrl, 16:16, scratch190, 28:28);
- s(EmcPmacroDataPadTxCtrl, 21:20, scratch190, 30:29);
- s(EmcPmacroDataPadTxCtrl, 24:24, scratch190, 31:31);
- s(EmcPmacroDataPadTxCtrl, 27:25, scratch191, 2:0);
-
- s(EmcPinGpio, 1:0, scratch8, 31:30);
- s(EmcPinGpioEn, 1:0, scratch9, 31:30);
- s(EmcDevSelect, 1:0, scratch10, 31:30);
- s(EmcZcalWarmColdBootEnables, 1:0, scratch11, 31:30);
- s(EmcCfgDigDllPeriodWarmBoot, 1:0, scratch12, 31:30);
- s32(EmcBctSpare13, scratch31);
- s32(EmcBctSpare12, scratch32);
- s32(EmcBctSpare7, scratch33);
- s32(EmcBctSpare6, scratch40);
- s32(EmcBctSpare5, scratch42);
- s32(EmcBctSpare4, scratch44);
- s32(EmcBctSpare3, scratch45);
- s32(EmcBctSpare2, scratch46);
- s32(EmcBctSpare1, scratch47);
- s32(EmcBctSpare0, scratch48);
- s32(EmcBctSpare9, scratch50);
- s32(EmcBctSpare8, scratch51);
- s32(BootRomPatchData, scratch56);
- s32(BootRomPatchControl, scratch57);
- s(McClkenOverrideAllWarmBoot, 0:0, scratch58, 31:31);
- s(EmcClkenOverrideAllWarmBoot, 0:0, scratch59, 30:30);
- s(EmcMrsWarmBootEnable, 0:0, scratch59, 31:31);
- s(ClearClk2Mc1, 0:0, scratch60, 30:30);
- s(EmcWarmBootExtraModeRegWriteEnable, 0:0, scratch60, 31:31);
- s(ClkRstControllerPllmMisc2OverrideEnable, 0:0, scratch61, 30:30);
- s(EmcDbgWriteMux, 0:0, scratch61, 31:31);
- s(EmcExtraRefreshNum, 2:0, scratch62, 31:29);
- s(PmcIoDpd3ReqWait, 2:0, scratch68, 30:28);
- s(AhbArbitrationXbarCtrlMemInitDone, 0:0, scratch68, 31:31);
- s(MemoryType, 2:0, scratch69, 30:28);
- s(PmcIoDpd4ReqWait, 2:0, scratch70, 30:28);
- s(EmcTimingControlWait, 7:0, scratch86, 31:24);
- s(EmcZcalWarmBootWait, 7:0, scratch87, 31:24);
- s(WarmBootWait, 7:0, scratch88, 31:24);
- s(EmcPinProgramWait, 7:0, scratch89, 31:24);
- s(EmcAutoCalWait, 9:0, scratch101, 31:22);
- s(SwizzleRankByteEncode, 15:0, scratch190, 15:0);
-
- switch (sdram->MemoryType)
- {
- case NvBootMemoryType_LpDdr2:
- case NvBootMemoryType_LpDdr4:
- s(EmcMrwLpddr2ZcalWarmBoot, 23:16, scratch5, 7:0);
- s(EmcMrwLpddr2ZcalWarmBoot, 7:0, scratch5, 15:8);
- s(EmcWarmBootMrwExtra, 23:16, scratch5, 23:16);
- s(EmcWarmBootMrwExtra, 7:0, scratch5, 31:24);
- s(EmcMrwLpddr2ZcalWarmBoot, 31:30, scratch6, 1:0);
- s(EmcWarmBootMrwExtra, 31:30, scratch6, 3:2);
- s(EmcMrwLpddr2ZcalWarmBoot, 27:26, scratch6, 5:4);
- s(EmcWarmBootMrwExtra, 27:26, scratch6, 7:6);
- s(EmcMrw6, 27:0, scratch8, 27:0);
- s(EmcMrw6, 31:30, scratch8, 29:28);
- s(EmcMrw8, 27:0, scratch9, 27:0);
- s(EmcMrw8, 31:30, scratch9, 29:28);
- s(EmcMrw9, 27:0, scratch10, 27:0);
- s(EmcMrw9, 31:30, scratch10, 29:28);
- s(EmcMrw10, 27:0, scratch11, 27:0);
- s(EmcMrw10, 31:30, scratch11, 29:28);
- s(EmcMrw12, 27:0, scratch12, 27:0);
- s(EmcMrw12, 31:30, scratch12, 29:28);
- s(EmcMrw13, 27:0, scratch13, 27:0);
- s(EmcMrw13, 31:30, scratch13, 29:28);
- s(EmcMrw14, 27:0, scratch14, 27:0);
- s(EmcMrw14, 31:30, scratch14, 29:28);
- s(EmcMrw1, 7:0, scratch15, 7:0);
- s(EmcMrw1, 23:16, scratch15, 15:8);
- s(EmcMrw1, 27:26, scratch15, 17:16);
- s(EmcMrw1, 31:30, scratch15, 19:18);
- s(EmcWarmBootMrwExtra, 7:0, scratch16, 7:0);
- s(EmcWarmBootMrwExtra, 23:16, scratch16, 15:8);
- s(EmcWarmBootMrwExtra, 27:26, scratch16, 17:16);
- s(EmcWarmBootMrwExtra, 31:30, scratch16, 19:18);
- s(EmcMrw2, 7:0, scratch17, 7:0);
- s(EmcMrw2, 23:16, scratch17, 15:8);
- s(EmcMrw2, 27:26, scratch17, 17:16);
- s(EmcMrw2, 31:30, scratch17, 19:18);
- s(EmcMrw3, 7:0, scratch18, 7:0);
- s(EmcMrw3, 23:16, scratch18, 15:8);
- s(EmcMrw3, 27:26, scratch18, 17:16);
- s(EmcMrw3, 31:30, scratch18, 19:18);
- s(EmcMrw4, 7:0, scratch19, 7:0);
- s(EmcMrw4, 23:16, scratch19, 15:8);
- s(EmcMrw4, 27:26, scratch19, 17:16);
- s(EmcMrw4, 31:30, scratch19, 19:18);
- break;
- case NvBootMemoryType_Ddr3:
- s(EmcMrs, 13:0, scratch5, 13:0);
- s(EmcEmrs, 13:0, scratch5, 27:14);
- s(EmcMrs, 21:20, scratch5, 29:28);
- s(EmcMrs, 31:30, scratch5, 31:30);
- s(EmcEmrs2, 13:0, scratch8, 13:0);
- s(EmcEmrs3, 13:0, scratch8, 27:14);
- s(EmcEmrs, 21:20, scratch8, 29:28);
- s(EmcWarmBootMrsExtra, 13:0, scratch9, 13:0);
- s(EmcEmrs, 31:30, scratch9, 15:14);
- s(EmcEmrs2, 21:20, scratch9, 17:16);
- s(EmcEmrs2, 31:30, scratch9, 19:18);
- s(EmcEmrs3, 21:20, scratch9, 21:20);
- s(EmcEmrs3, 31:30, scratch9, 23:22);
- s(EmcWarmBootMrsExtra, 31:30, scratch9, 25:24);
- s(EmcWarmBootMrsExtra, 21:20, scratch9, 27:26);
- s(EmcZqCalDdr3WarmBoot, 31:30, scratch9, 29:28);
- s(EmcMrs, 27:26, scratch10, 1:0);
- s(EmcEmrs, 27:26, scratch10, 3:2);
- s(EmcEmrs2, 27:26, scratch10, 5:4);
- s(EmcEmrs3, 27:26, scratch10, 7:6);
- s(EmcWarmBootMrsExtra, 27:27, scratch10, 8:8);
- s(EmcWarmBootMrsExtra, 26:26, scratch10, 9:9);
- s(EmcZqCalDdr3WarmBoot, 0:0, scratch10, 10:10);
- s(EmcZqCalDdr3WarmBoot, 4:4, scratch10, 11:11);
- break;
- }
-
- s32(EmcCmdMappingByte, secure_scratch8);
- s32(EmcPmacroBrickMapping0, secure_scratch9);
- s32(EmcPmacroBrickMapping1, secure_scratch10);
- s32(EmcPmacroBrickMapping2, secure_scratch11);
- s32(McVideoProtectGpuOverride0, secure_scratch12);
- s(EmcCmdMappingCmd0_0, 6:0, secure_scratch13, 6:0);
- s(EmcCmdMappingCmd0_0, 14:8, secure_scratch13, 13:7);
- s(EmcCmdMappingCmd0_0, 22:16, secure_scratch13, 20:14);
- s(EmcCmdMappingCmd0_0, 30:24, secure_scratch13, 27:21);
- s(McVideoProtectBomAdrHi, 1:0, secure_scratch13, 29:28);
- s(McVideoProtectWriteAccess, 1:0, secure_scratch13, 31:30);
- s(EmcCmdMappingCmd0_1, 6:0, secure_scratch14, 6:0);
- s(EmcCmdMappingCmd0_1, 14:8, secure_scratch14, 13:7);
- s(EmcCmdMappingCmd0_1, 22:16, secure_scratch14, 20:14);
- s(EmcCmdMappingCmd0_1, 30:24, secure_scratch14, 27:21);
- s(McSecCarveoutAdrHi, 1:0, secure_scratch14, 29:28);
- s(McMtsCarveoutAdrHi, 1:0, secure_scratch14, 31:30);
- s(EmcCmdMappingCmd1_0, 6:0, secure_scratch15, 6:0);
- s(EmcCmdMappingCmd1_0, 14:8, secure_scratch15, 13:7);
- s(EmcCmdMappingCmd1_0, 22:16, secure_scratch15, 20:14);
- s(EmcCmdMappingCmd1_0, 30:24, secure_scratch15, 27:21);
- s(McGeneralizedCarveout5BomHi, 1:0, secure_scratch15, 29:28);
- s(McGeneralizedCarveout3BomHi, 1:0, secure_scratch15, 31:30);
- s(EmcCmdMappingCmd1_1, 6:0, secure_scratch16, 6:0);
- s(EmcCmdMappingCmd1_1, 14:8, secure_scratch16, 13:7);
- s(EmcCmdMappingCmd1_1, 22:16, secure_scratch16, 20:14);
- s(EmcCmdMappingCmd1_1, 30:24, secure_scratch16, 27:21);
- s(McGeneralizedCarveout2BomHi, 1:0, secure_scratch16, 29:28);
- s(McGeneralizedCarveout4BomHi, 1:0, secure_scratch16, 31:30);
- s(EmcCmdMappingCmd2_0, 6:0, secure_scratch17, 6:0);
- s(EmcCmdMappingCmd2_0, 14:8, secure_scratch17, 13:7);
- s(EmcCmdMappingCmd2_0, 22:16, secure_scratch17, 20:14);
- s(EmcCmdMappingCmd2_0, 30:24, secure_scratch17, 27:21);
- s(McGeneralizedCarveout1BomHi, 1:0, secure_scratch17, 29:28);
- s(EmcAdrCfg, 0:0, secure_scratch17, 30:30);
- s(EmcFbioSpare, 1:1, secure_scratch17, 31:31);
- s(EmcCmdMappingCmd2_1, 6:0, secure_scratch18, 6:0);
- s(EmcCmdMappingCmd2_1, 14:8, secure_scratch18, 13:7);
- s(EmcCmdMappingCmd2_1, 22:16, secure_scratch18, 20:14);
- s(EmcCmdMappingCmd2_1, 30:24, secure_scratch18, 27:21);
- s(EmcFbioCfg8, 15:15, secure_scratch18, 28:28);
- s(McEmemAdrCfg, 0:0, secure_scratch18, 29:29);
- s(McSecCarveoutProtectWriteAccess, 0:0, secure_scratch18, 30:30);
- s(McMtsCarveoutRegCtrl, 0:0, secure_scratch18, 31:31);
- s(EmcCmdMappingCmd3_0, 6:0, secure_scratch19, 6:0);
- s(EmcCmdMappingCmd3_0, 14:8, secure_scratch19, 13:7);
- s(EmcCmdMappingCmd3_0, 22:16, secure_scratch19, 20:14);
- s(EmcCmdMappingCmd3_0, 30:24, secure_scratch19, 27:21);
- s(McGeneralizedCarveout2Cfg0, 6:3, secure_scratch19, 31:28);
- s(EmcCmdMappingCmd3_1, 6:0, secure_scratch20, 6:0);
- s(EmcCmdMappingCmd3_1, 14:8, secure_scratch20, 13:7);
- s(EmcCmdMappingCmd3_1, 22:16, secure_scratch20, 20:14);
- s(EmcCmdMappingCmd3_1, 30:24, secure_scratch20, 27:21);
- s(McGeneralizedCarveout2Cfg0, 10:7, secure_scratch20, 31:28);
- s(McGeneralizedCarveout4Cfg0, 26:0, secure_scratch39, 26:0);
- s(McGeneralizedCarveout2Cfg0, 17:14, secure_scratch39, 30:27);
- s(McVideoProtectVprOverride, 0:0, secure_scratch39, 31:31);
- s(McGeneralizedCarveout5Cfg0, 26:0, secure_scratch40, 26:0);
- s(McGeneralizedCarveout2Cfg0, 21:18, secure_scratch40, 30:27);
- s(McVideoProtectVprOverride, 1:1, secure_scratch40, 31:31);
- s(EmcCmdMappingCmd0_2, 6:0, secure_scratch41, 6:0);
- s(EmcCmdMappingCmd0_2, 14:8, secure_scratch41, 13:7);
- s(EmcCmdMappingCmd0_2, 22:16, secure_scratch41, 20:14);
- s(EmcCmdMappingCmd0_2, 27:24, secure_scratch41, 24:21);
- s(McGeneralizedCarveout1Cfg0, 6:3, secure_scratch41, 28:25);
- s(McGeneralizedCarveout2Cfg0, 13:11, secure_scratch41, 31:29);
- s(EmcCmdMappingCmd1_2, 6:0, secure_scratch42, 6:0);
- s(EmcCmdMappingCmd1_2, 14:8, secure_scratch42, 13:7);
- s(EmcCmdMappingCmd1_2, 22:16, secure_scratch42, 20:14);
- s(EmcCmdMappingCmd1_2, 27:24, secure_scratch42, 24:21);
- s(McGeneralizedCarveout1Cfg0, 13:7, secure_scratch42, 31:25);
- s(EmcCmdMappingCmd2_2, 6:0, secure_scratch43, 6:0);
- s(EmcCmdMappingCmd2_2, 14:8, secure_scratch43, 13:7);
- s(EmcCmdMappingCmd2_2, 22:16, secure_scratch43, 20:14);
- s(EmcCmdMappingCmd2_2, 27:24, secure_scratch43, 24:21);
- s(McGeneralizedCarveout1Cfg0, 17:14, secure_scratch43, 28:25);
- s(McGeneralizedCarveout3Cfg0, 13:11, secure_scratch43, 31:29);
- s(EmcCmdMappingCmd3_2, 6:0, secure_scratch44, 6:0);
- s(EmcCmdMappingCmd3_2, 14:8, secure_scratch44, 13:7);
- s(EmcCmdMappingCmd3_2, 22:16, secure_scratch44, 20:14);
- s(EmcCmdMappingCmd3_2, 27:24, secure_scratch44, 24:21);
- s(McGeneralizedCarveout1Cfg0, 21:18, secure_scratch44, 28:25);
- s(McVideoProtectVprOverride, 3:2, secure_scratch44, 30:29);
- s(McVideoProtectVprOverride, 6:6, secure_scratch44, 31:31);
- s(McEmemAdrCfgChannelMask, 31:9, secure_scratch45, 22:0);
- s(McEmemAdrCfgDev0, 2:0, secure_scratch45, 25:23);
- s(McEmemAdrCfgDev0, 9:8, secure_scratch45, 27:26);
- s(McEmemAdrCfgDev0, 19:16, secure_scratch45, 31:28);
- s(McEmemAdrCfgBankMask0, 31:10, secure_scratch46, 21:0);
- s(McEmemAdrCfgDev1, 2:0, secure_scratch46, 24:22);
- s(McEmemAdrCfgDev1, 9:8, secure_scratch46, 26:25);
- s(McEmemAdrCfgDev1, 19:16, secure_scratch46, 30:27);
- s(McVideoProtectVprOverride, 7:7, secure_scratch46, 31:31);
- s(McEmemAdrCfgBankMask1, 31:10, secure_scratch47, 21:0);
- s(McGeneralizedCarveout3Cfg0, 10:3, secure_scratch47, 29:22);
- s(McVideoProtectVprOverride, 9:8, secure_scratch47, 31:30);
- s(McEmemAdrCfgBankMask2, 31:10, secure_scratch48, 21:0);
- s(McGeneralizedCarveout3Cfg0, 21:14, secure_scratch48, 29:22);
- s(McVideoProtectVprOverride, 11:11, secure_scratch48, 30:30);
- s(McVideoProtectVprOverride, 14:14, secure_scratch48, 31:31);
- s(McVideoProtectGpuOverride1, 15:0, secure_scratch49, 15:0);
- s(McEmemCfg, 13:0, secure_scratch49, 29:16);
- s(McEmemCfg, 31:31, secure_scratch49, 30:30);
- s(McVideoProtectVprOverride, 15:15, secure_scratch49, 31:31);
- s(McGeneralizedCarveout3Bom, 31:17, secure_scratch50, 14:0);
- s(McGeneralizedCarveout1Bom, 31:17, secure_scratch50, 29:15);
- s(McVideoProtectVprOverride, 18:17, secure_scratch50, 31:30);
- s(McGeneralizedCarveout4Bom, 31:17, secure_scratch51, 14:0);
- s(McGeneralizedCarveout2Bom, 31:17, secure_scratch51, 29:15);
- s(McVideoProtectVprOverride, 20:19, secure_scratch51, 31:30);
- s(McGeneralizedCarveout5Bom, 31:17, secure_scratch52, 14:0);
- s(McVideoProtectBom, 31:20, secure_scratch52, 26:15);
- s(McVideoProtectVprOverride, 23:21, secure_scratch52, 29:27);
- s(McVideoProtectVprOverride, 26:26, secure_scratch52, 30:30);
- s(McVideoProtectVprOverride, 29:29, secure_scratch52, 31:31);
- s(McVideoProtectSizeMb, 11:0, secure_scratch53, 11:0);
- s(McSecCarveoutBom, 31:20, secure_scratch53, 23:12);
- s(McVideoProtectVprOverride, 31:30, secure_scratch53, 25:24);
- s(McVideoProtectVprOverride1, 1:0, secure_scratch53, 27:26);
- s(McVideoProtectVprOverride1, 7:4, secure_scratch53, 31:28);
- s(McSecCarveoutSizeMb, 11:0, secure_scratch54, 11:0);
- s(McMtsCarveoutBom, 31:20, secure_scratch54, 23:12);
- s(McVideoProtectVprOverride1, 15:8, secure_scratch54, 31:24);
- s(McMtsCarveoutSizeMb, 11:0, secure_scratch55, 11:0);
- s(McGeneralizedCarveout4Size128kb, 11:0, secure_scratch55, 23:12);
- s(McVideoProtectVprOverride1, 16:16, secure_scratch55, 24:24);
- s(McGeneralizedCarveout2Cfg0, 2:0, secure_scratch55, 27:25);
- s(McGeneralizedCarveout2Cfg0, 25:22, secure_scratch55, 31:28);
- s(McGeneralizedCarveout3Size128kb, 11:0, secure_scratch56, 11:0);
- s(McGeneralizedCarveout2Size128kb, 11:0, secure_scratch56, 23:12);
- s(McGeneralizedCarveout2Cfg0, 26:26, secure_scratch56, 24:24);
- s(McGeneralizedCarveout1Cfg0, 2:0, secure_scratch56, 27:25);
- s(McGeneralizedCarveout1Cfg0, 25:22, secure_scratch56, 31:28);
- s(McGeneralizedCarveout1Size128kb, 11:0, secure_scratch57, 11:0);
- s(McGeneralizedCarveout5Size128kb, 11:0, secure_scratch57, 23:12);
- s(McGeneralizedCarveout1Cfg0, 26:26, secure_scratch57, 24:24);
- s(McGeneralizedCarveout3Cfg0, 2:0, secure_scratch57, 27:25);
- s(McGeneralizedCarveout3Cfg0, 25:22, secure_scratch57, 31:28);
- s(McGeneralizedCarveout3Cfg0, 26:26, secure_scratch58, 0:0);
-
- s32(McGeneralizedCarveout1Access0, secure_scratch59);
- s32(McGeneralizedCarveout1Access1, secure_scratch60);
- s32(McGeneralizedCarveout1Access2, secure_scratch61);
- s32(McGeneralizedCarveout1Access3, secure_scratch62);
- s32(McGeneralizedCarveout1Access4, secure_scratch63);
- s32(McGeneralizedCarveout2Access0, secure_scratch64);
- s32(McGeneralizedCarveout2Access1, secure_scratch65);
- s32(McGeneralizedCarveout2Access2, secure_scratch66);
- s32(McGeneralizedCarveout2Access3, secure_scratch67);
- s32(McGeneralizedCarveout2Access4, secure_scratch68);
- s32(McGeneralizedCarveout3Access0, secure_scratch69);
- s32(McGeneralizedCarveout3Access1, secure_scratch70);
- s32(McGeneralizedCarveout3Access2, secure_scratch71);
- s32(McGeneralizedCarveout3Access3, secure_scratch72);
- s32(McGeneralizedCarveout3Access4, secure_scratch73);
- s32(McGeneralizedCarveout4Access0, secure_scratch74);
- s32(McGeneralizedCarveout4Access1, secure_scratch75);
- s32(McGeneralizedCarveout4Access2, secure_scratch76);
- s32(McGeneralizedCarveout4Access3, secure_scratch77);
- s32(McGeneralizedCarveout4Access4, secure_scratch78);
- s32(McGeneralizedCarveout5Access0, secure_scratch79);
- s32(McGeneralizedCarveout5Access1, secure_scratch80);
- s32(McGeneralizedCarveout5Access2, secure_scratch81);
- s32(McGeneralizedCarveout5Access3, secure_scratch82);
- s32(McGeneralizedCarveout1ForceInternalAccess0, secure_scratch84);
- s32(McGeneralizedCarveout1ForceInternalAccess1, secure_scratch85);
- s32(McGeneralizedCarveout1ForceInternalAccess2, secure_scratch86);
- s32(McGeneralizedCarveout1ForceInternalAccess3, secure_scratch87);
- s32(McGeneralizedCarveout1ForceInternalAccess4, secure_scratch88);
- s32(McGeneralizedCarveout2ForceInternalAccess0, secure_scratch89);
- s32(McGeneralizedCarveout2ForceInternalAccess1, secure_scratch90);
- s32(McGeneralizedCarveout2ForceInternalAccess2, secure_scratch91);
- s32(McGeneralizedCarveout2ForceInternalAccess3, secure_scratch92);
- s32(McGeneralizedCarveout2ForceInternalAccess4, secure_scratch93);
- s32(McGeneralizedCarveout3ForceInternalAccess0, secure_scratch94);
- s32(McGeneralizedCarveout3ForceInternalAccess1, secure_scratch95);
- s32(McGeneralizedCarveout3ForceInternalAccess2, secure_scratch96);
- s32(McGeneralizedCarveout3ForceInternalAccess3, secure_scratch97);
- s32(McGeneralizedCarveout3ForceInternalAccess4, secure_scratch98);
- s32(McGeneralizedCarveout4ForceInternalAccess0, secure_scratch99);
- s32(McGeneralizedCarveout4ForceInternalAccess1, secure_scratch100);
- s32(McGeneralizedCarveout4ForceInternalAccess2, secure_scratch101);
- s32(McGeneralizedCarveout4ForceInternalAccess3, secure_scratch102);
- s32(McGeneralizedCarveout4ForceInternalAccess4, secure_scratch103);
- s32(McGeneralizedCarveout5ForceInternalAccess0, secure_scratch104);
- s32(McGeneralizedCarveout5ForceInternalAccess1, secure_scratch105);
- s32(McGeneralizedCarveout5ForceInternalAccess2, secure_scratch106);
- s32(McGeneralizedCarveout5ForceInternalAccess3, secure_scratch107);
-
- c32(0, scratch2);
- s(PllMInputDivider, 7:0, scratch2, 7:0);
- s(PllMFeedbackDivider, 7:0, scratch2, 15:8);
- s(PllMPostDivider, 4:0, scratch2, 20:16);
- s(PllMKVCO, 0:0, scratch2, 21:21);
- s(PllMKCP, 1:0, scratch2, 23:22);
-
- c32(0, scratch35);
- s(PllMSetupControl, 15:0, scratch35, 15:0);
-
- c32(0, scratch3);
- s(PllMInputDivider, 7:0, scratch3, 7:0);
- c(0x3e, scratch3, 15:8);
- c(0, scratch3, 20:16);
- s(PllMKVCO, 0:0, scratch3, 21:21);
- s(PllMKCP, 1:0, scratch3, 23:22);
-
- c32(0, scratch36);
- s(PllMSetupControl, 23:0, scratch36, 23:0);
-
- c32(0, scratch4);
- s(PllMStableTime, 9:0, scratch4, 9:0);
-}
diff --git a/nyx/nyx_gui/mem/sdram_lp0_param_t210.h b/nyx/nyx_gui/mem/sdram_lp0_param_t210.h
deleted file mode 100644
index 9028990..0000000
--- a/nyx/nyx_gui/mem/sdram_lp0_param_t210.h
+++ /dev/null
@@ -1,964 +0,0 @@
-/*
- * Copyright (c) 2013-2015, NVIDIA CORPORATION. All rights reserved.
- * Copyright 2014 Google Inc.
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- */
-
-/**
- * Defines the SDRAM parameter structure.
- *
- * Note that PLLM is used by EMC. The field names are in camel case to ease
- * directly converting BCT config files (*.cfg) into C structure.
- */
-
-#ifndef __SOC_NVIDIA_TEGRA210_SDRAM_PARAM_H__
-#define __SOC_NVIDIA_TEGRA210_SDRAM_PARAM_H__
-
-#include "../utils/types.h"
-
-enum
-{
- /* Specifies the memory type to be undefined */
- NvBootMemoryType_None = 0,
-
- /* Specifies the memory type to be DDR SDRAM */
- NvBootMemoryType_Ddr = 0,
-
- /* Specifies the memory type to be LPDDR SDRAM */
- NvBootMemoryType_LpDdr = 0,
-
- /* Specifies the memory type to be DDR2 SDRAM */
- NvBootMemoryType_Ddr2 = 0,
-
- /* Specifies the memory type to be LPDDR2 SDRAM */
- NvBootMemoryType_LpDdr2,
-
- /* Specifies the memory type to be DDR3 SDRAM */
- NvBootMemoryType_Ddr3,
-
- /* Specifies the memory type to be LPDDR4 SDRAM */
- NvBootMemoryType_LpDdr4,
-
- NvBootMemoryType_Num,
-
- /* Specifies an entry in the ram_code table that's not in use */
- NvBootMemoryType_Unused = 0X7FFFFFF,
-};
-
-/**
- * Defines the SDRAM parameter structure
- */
-struct sdram_params
-{
-
- /* Specifies the type of memory device */
- u32 MemoryType;
-
- /* MC/EMC clock source configuration */
-
- /* Specifies the M value for PllM */
- u32 PllMInputDivider;
- /* Specifies the N value for PllM */
- u32 PllMFeedbackDivider;
- /* Specifies the time to wait for PLLM to lock (in microseconds) */
- u32 PllMStableTime;
- /* Specifies misc. control bits */
- u32 PllMSetupControl;
- /* Specifies the P value for PLLM */
- u32 PllMPostDivider;
- /* Specifies value for Charge Pump Gain Control */
- u32 PllMKCP;
- /* Specifies VCO gain */
- u32 PllMKVCO;
- /* Spare BCT param */
- u32 EmcBctSpare0;
- /* Spare BCT param */
- u32 EmcBctSpare1;
- /* Spare BCT param */
- u32 EmcBctSpare2;
- /* Spare BCT param */
- u32 EmcBctSpare3;
- /* Spare BCT param */
- u32 EmcBctSpare4;
- /* Spare BCT param */
- u32 EmcBctSpare5;
- /* Spare BCT param */
- u32 EmcBctSpare6;
- /* Spare BCT param */
- u32 EmcBctSpare7;
- /* Spare BCT param */
- u32 EmcBctSpare8;
- /* Spare BCT param */
- u32 EmcBctSpare9;
- /* Spare BCT param */
- u32 EmcBctSpare10;
- /* Spare BCT param */
- u32 EmcBctSpare11;
- /* Spare BCT param */
- u32 EmcBctSpare12;
- /* Spare BCT param */
- u32 EmcBctSpare13;
-
- /* Defines EMC_2X_CLK_SRC, EMC_2X_CLK_DIVISOR, EMC_INVERT_DCD */
- u32 EmcClockSource;
- u32 EmcClockSourceDll;
-
- /* Defines possible override for PLLLM_MISC2 */
- u32 ClkRstControllerPllmMisc2Override;
- /* enables override for PLLLM_MISC2 */
- u32 ClkRstControllerPllmMisc2OverrideEnable;
- /* defines CLK_ENB_MC1 in register clk_rst_controller_clk_enb_w_clr */
- u32 ClearClk2Mc1;
-
- /* Auto-calibration of EMC pads */
-
- /* Specifies the value for EMC_AUTO_CAL_INTERVAL */
- u32 EmcAutoCalInterval;
- /*
- * Specifies the value for EMC_AUTO_CAL_CONFIG
- * Note: Trigger bits are set by the SDRAM code.
- */
- u32 EmcAutoCalConfig;
-
- /* Specifies the value for EMC_AUTO_CAL_CONFIG2 */
- u32 EmcAutoCalConfig2;
-
- /* Specifies the value for EMC_AUTO_CAL_CONFIG3 */
- u32 EmcAutoCalConfig3;
-
- /* Specifies the values for EMC_AUTO_CAL_CONFIG4-8 */
- u32 EmcAutoCalConfig4;
- u32 EmcAutoCalConfig5;
- u32 EmcAutoCalConfig6;
- u32 EmcAutoCalConfig7;
- u32 EmcAutoCalConfig8;
-
- /* Specifies the value for EMC_AUTO_CAL_VREF_SEL_0 */
- u32 EmcAutoCalVrefSel0;
- u32 EmcAutoCalVrefSel1;
-
- /* Specifies the value for EMC_AUTO_CAL_CHANNEL */
- u32 EmcAutoCalChannel;
-
- /* Specifies the value for EMC_PMACRO_AUTOCAL_CFG_0 */
- u32 EmcPmacroAutocalCfg0;
- u32 EmcPmacroAutocalCfg1;
- u32 EmcPmacroAutocalCfg2;
- u32 EmcPmacroRxTerm;
- u32 EmcPmacroDqTxDrv;
- u32 EmcPmacroCaTxDrv;
- u32 EmcPmacroCmdTxDrv;
- u32 EmcPmacroAutocalCfgCommon;
- u32 EmcPmacroZctrl;
-
- /*
- * Specifies the time for the calibration
- * to stabilize (in microseconds)
- */
- u32 EmcAutoCalWait;
-
- u32 EmcXm2CompPadCtrl;
- u32 EmcXm2CompPadCtrl2;
- u32 EmcXm2CompPadCtrl3;
-
- /*
- * DRAM size information
- * Specifies the value for EMC_ADR_CFG
- */
- u32 EmcAdrCfg;
-
- /*
- * Specifies the time to wait after asserting pin
- * CKE (in microseconds)
- */
- u32 EmcPinProgramWait;
- /* Specifies the extra delay before/after pin RESET/CKE command */
- u32 EmcPinExtraWait;
-
- u32 EmcPinGpioEn;
- u32 EmcPinGpio;
-
- /*
- * Specifies the extra delay after the first writing
- * of EMC_TIMING_CONTROL
- */
- u32 EmcTimingControlWait;
-
- /* Timing parameters required for the SDRAM */
-
- /* Specifies the value for EMC_RC */
- u32 EmcRc;
- /* Specifies the value for EMC_RFC */
- u32 EmcRfc;
- /* Specifies the value for EMC_RFC_PB */
- u32 EmcRfcPb;
- /* Specifies the value for EMC_RFC_CTRL2 */
- u32 EmcRefctrl2;
- /* Specifies the value for EMC_RFC_SLR */
- u32 EmcRfcSlr;
- /* Specifies the value for EMC_RAS */
- u32 EmcRas;
- /* Specifies the value for EMC_RP */
- u32 EmcRp;
- /* Specifies the value for EMC_R2R */
- u32 EmcR2r;
- /* Specifies the value for EMC_W2W */
- u32 EmcW2w;
- /* Specifies the value for EMC_R2W */
- u32 EmcR2w;
- /* Specifies the value for EMC_W2R */
- u32 EmcW2r;
- /* Specifies the value for EMC_R2P */
- u32 EmcR2p;
- /* Specifies the value for EMC_W2P */
- u32 EmcW2p;
-
- u32 EmcTppd;
- u32 EmcCcdmw;
-
- /* Specifies the value for EMC_RD_RCD */
- u32 EmcRdRcd;
- /* Specifies the value for EMC_WR_RCD */
- u32 EmcWrRcd;
- /* Specifies the value for EMC_RRD */
- u32 EmcRrd;
- /* Specifies the value for EMC_REXT */
- u32 EmcRext;
- /* Specifies the value for EMC_WEXT */
- u32 EmcWext;
- /* Specifies the value for EMC_WDV */
- u32 EmcWdv;
-
- u32 EmcWdvChk;
- u32 EmcWsv;
- u32 EmcWev;
-
- /* Specifies the value for EMC_WDV_MASK */
- u32 EmcWdvMask;
-
- u32 EmcWsDuration;
- u32 EmcWeDuration;
-
- /* Specifies the value for EMC_QUSE */
- u32 EmcQUse;
- /* Specifies the value for EMC_QUSE_WIDTH */
- u32 EmcQuseWidth;
- /* Specifies the value for EMC_IBDLY */
- u32 EmcIbdly;
- /* Specifies the value for EMC_OBDLY */
- u32 EmcObdly;
- /* Specifies the value for EMC_EINPUT */
- u32 EmcEInput;
- /* Specifies the value for EMC_EINPUT_DURATION */
- u32 EmcEInputDuration;
- /* Specifies the value for EMC_PUTERM_EXTRA */
- u32 EmcPutermExtra;
- /* Specifies the value for EMC_PUTERM_WIDTH */
- u32 EmcPutermWidth;
- /* Specifies the value for EMC_PUTERM_ADJ */
- ////u32 EmcPutermAdj;
-
- /* Specifies the value for EMC_QRST */
- u32 EmcQRst;
- /* Specifies the value for EMC_QSAFE */
- u32 EmcQSafe;
- /* Specifies the value for EMC_RDV */
- u32 EmcRdv;
- /* Specifies the value for EMC_RDV_MASK */
- u32 EmcRdvMask;
- /* Specifies the value for EMC_RDV_EARLY */
- u32 EmcRdvEarly;
- /* Specifies the value for EMC_RDV_EARLY_MASK */
- u32 EmcRdvEarlyMask;
- /* Specifies the value for EMC_QPOP */
- u32 EmcQpop;
-
- /* Specifies the value for EMC_REFRESH */
- u32 EmcRefresh;
- /* Specifies the value for EMC_BURST_REFRESH_NUM */
- u32 EmcBurstRefreshNum;
- /* Specifies the value for EMC_PRE_REFRESH_REQ_CNT */
- u32 EmcPreRefreshReqCnt;
- /* Specifies the value for EMC_PDEX2WR */
- u32 EmcPdEx2Wr;
- /* Specifies the value for EMC_PDEX2RD */
- u32 EmcPdEx2Rd;
- /* Specifies the value for EMC_PCHG2PDEN */
- u32 EmcPChg2Pden;
- /* Specifies the value for EMC_ACT2PDEN */
- u32 EmcAct2Pden;
- /* Specifies the value for EMC_AR2PDEN */
- u32 EmcAr2Pden;
- /* Specifies the value for EMC_RW2PDEN */
- u32 EmcRw2Pden;
- /* Specifies the value for EMC_CKE2PDEN */
- u32 EmcCke2Pden;
- /* Specifies the value for EMC_PDEX2CKE */
- u32 EmcPdex2Cke;
- /* Specifies the value for EMC_PDEX2MRR */
- u32 EmcPdex2Mrr;
- /* Specifies the value for EMC_TXSR */
- u32 EmcTxsr;
- /* Specifies the value for EMC_TXSRDLL */
- u32 EmcTxsrDll;
- /* Specifies the value for EMC_TCKE */
- u32 EmcTcke;
- /* Specifies the value for EMC_TCKESR */
- u32 EmcTckesr;
- /* Specifies the value for EMC_TPD */
- u32 EmcTpd;
- /* Specifies the value for EMC_TFAW */
- u32 EmcTfaw;
- /* Specifies the value for EMC_TRPAB */
- u32 EmcTrpab;
- /* Specifies the value for EMC_TCLKSTABLE */
- u32 EmcTClkStable;
- /* Specifies the value for EMC_TCLKSTOP */
- u32 EmcTClkStop;
- /* Specifies the value for EMC_TREFBW */
- u32 EmcTRefBw;
-
- /* FBIO configuration values */
-
- /* Specifies the value for EMC_FBIO_CFG5 */
- u32 EmcFbioCfg5;
- /* Specifies the value for EMC_FBIO_CFG7 */
- u32 EmcFbioCfg7;
- /* Specifies the value for EMC_FBIO_CFG8 */
- u32 EmcFbioCfg8;
-
- /* Command mapping for CMD brick 0 */
- u32 EmcCmdMappingCmd0_0;
- u32 EmcCmdMappingCmd0_1;
- u32 EmcCmdMappingCmd0_2;
- u32 EmcCmdMappingCmd1_0;
- u32 EmcCmdMappingCmd1_1;
- u32 EmcCmdMappingCmd1_2;
- u32 EmcCmdMappingCmd2_0;
- u32 EmcCmdMappingCmd2_1;
- u32 EmcCmdMappingCmd2_2;
- u32 EmcCmdMappingCmd3_0;
- u32 EmcCmdMappingCmd3_1;
- u32 EmcCmdMappingCmd3_2;
- u32 EmcCmdMappingByte;
-
- /* Specifies the value for EMC_FBIO_SPARE */
- u32 EmcFbioSpare;
-
- /* Specifies the value for EMC_CFG_RSV */
- u32 EmcCfgRsv;
-
- /* MRS command values */
-
- /* Specifies the value for EMC_MRS */
- u32 EmcMrs;
- /* Specifies the MP0 command to initialize mode registers */
- u32 EmcEmrs;
- /* Specifies the MP2 command to initialize mode registers */
- u32 EmcEmrs2;
- /* Specifies the MP3 command to initialize mode registers */
- u32 EmcEmrs3;
- /* Specifies the programming to LPDDR2 Mode Register 1 at cold boot */
- u32 EmcMrw1;
- /* Specifies the programming to LPDDR2 Mode Register 2 at cold boot */
- u32 EmcMrw2;
- /* Specifies the programming to LPDDR2 Mode Register 3 at cold boot */
- u32 EmcMrw3;
- /* Specifies the programming to LPDDR2 Mode Register 11 at cold boot */
- u32 EmcMrw4;
- /* Specifies the programming to LPDDR2 Mode Register 3? at cold boot */
- u32 EmcMrw6;
- /* Specifies the programming to LPDDR2 Mode Register 11 at cold boot */
- u32 EmcMrw8;
- /* Specifies the programming to LPDDR2 Mode Register 11? at cold boot */
- u32 EmcMrw9;
- /* Specifies the programming to LPDDR2 Mode Register 12 at cold boot */
- u32 EmcMrw10;
- /* Specifies the programming to LPDDR2 Mode Register 14 at cold boot */
- u32 EmcMrw12;
- /* Specifies the programming to LPDDR2 Mode Register 14? at cold boot */
- u32 EmcMrw13;
- /* Specifies the programming to LPDDR2 Mode Register 22 at cold boot */
- u32 EmcMrw14;
- /*
- * Specifies the programming to extra LPDDR2 Mode Register
- * at cold boot
- */
- u32 EmcMrwExtra;
- /*
- * Specifies the programming to extra LPDDR2 Mode Register
- * at warm boot
- */
- u32 EmcWarmBootMrwExtra;
- /*
- * Specify the enable of extra Mode Register programming at
- * warm boot
- */
- u32 EmcWarmBootExtraModeRegWriteEnable;
- /*
- * Specify the enable of extra Mode Register programming at
- * cold boot
- */
- u32 EmcExtraModeRegWriteEnable;
-
- /* Specifies the EMC_MRW reset command value */
- u32 EmcMrwResetCommand;
- /* Specifies the EMC Reset wait time (in microseconds) */
- u32 EmcMrwResetNInitWait;
- /* Specifies the value for EMC_MRS_WAIT_CNT */
- u32 EmcMrsWaitCnt;
- /* Specifies the value for EMC_MRS_WAIT_CNT2 */
- u32 EmcMrsWaitCnt2;
-
- /* EMC miscellaneous configurations */
-
- /* Specifies the value for EMC_CFG */
- u32 EmcCfg;
- /* Specifies the value for EMC_CFG_2 */
- u32 EmcCfg2;
- /* Specifies the pipe bypass controls */
- u32 EmcCfgPipe;
- u32 EmcCfgPipeClk;
- u32 EmcFdpdCtrlCmdNoRamp;
- u32 EmcCfgUpdate;
-
- /* Specifies the value for EMC_DBG */
- u32 EmcDbg;
- u32 EmcDbgWriteMux;
-
- /* Specifies the value for EMC_CMDQ */
- u32 EmcCmdQ;
- /* Specifies the value for EMC_MC2EMCQ */
- u32 EmcMc2EmcQ;
- /* Specifies the value for EMC_DYN_SELF_REF_CONTROL */
- u32 EmcDynSelfRefControl;
-
- /* Specifies the value for MEM_INIT_DONE */
- u32 AhbArbitrationXbarCtrlMemInitDone;
-
- /* Specifies the value for EMC_CFG_DIG_DLL */
- u32 EmcCfgDigDll;
- u32 EmcCfgDigDll_1;
- /* Specifies the value for EMC_CFG_DIG_DLL_PERIOD */
- u32 EmcCfgDigDllPeriod;
- /* Specifies the value of *DEV_SELECTN of various EMC registers */
- u32 EmcDevSelect;
-
- /* Specifies the value for EMC_SEL_DPD_CTRL */
- u32 EmcSelDpdCtrl;
-
- /* Pads trimmer delays */
- u32 EmcFdpdCtrlDq;
- u32 EmcFdpdCtrlCmd;
- u32 EmcPmacroIbVrefDq_0;
- u32 EmcPmacroIbVrefDq_1;
- u32 EmcPmacroIbVrefDqs_0;
- u32 EmcPmacroIbVrefDqs_1;
- u32 EmcPmacroIbRxrt;
- u32 EmcCfgPipe1;
- u32 EmcCfgPipe2;
-
- /* Specifies the value for EMC_PMACRO_QUSE_DDLL_RANK0_0 */
- u32 EmcPmacroQuseDdllRank0_0;
- u32 EmcPmacroQuseDdllRank0_1;
- u32 EmcPmacroQuseDdllRank0_2;
- u32 EmcPmacroQuseDdllRank0_3;
- u32 EmcPmacroQuseDdllRank0_4;
- u32 EmcPmacroQuseDdllRank0_5;
- u32 EmcPmacroQuseDdllRank1_0;
- u32 EmcPmacroQuseDdllRank1_1;
- u32 EmcPmacroQuseDdllRank1_2;
- u32 EmcPmacroQuseDdllRank1_3;
- u32 EmcPmacroQuseDdllRank1_4;
- u32 EmcPmacroQuseDdllRank1_5;
-
- u32 EmcPmacroObDdllLongDqRank0_0;
- u32 EmcPmacroObDdllLongDqRank0_1;
- u32 EmcPmacroObDdllLongDqRank0_2;
- u32 EmcPmacroObDdllLongDqRank0_3;
- u32 EmcPmacroObDdllLongDqRank0_4;
- u32 EmcPmacroObDdllLongDqRank0_5;
- u32 EmcPmacroObDdllLongDqRank1_0;
- u32 EmcPmacroObDdllLongDqRank1_1;
- u32 EmcPmacroObDdllLongDqRank1_2;
- u32 EmcPmacroObDdllLongDqRank1_3;
- u32 EmcPmacroObDdllLongDqRank1_4;
- u32 EmcPmacroObDdllLongDqRank1_5;
-
- u32 EmcPmacroObDdllLongDqsRank0_0;
- u32 EmcPmacroObDdllLongDqsRank0_1;
- u32 EmcPmacroObDdllLongDqsRank0_2;
- u32 EmcPmacroObDdllLongDqsRank0_3;
- u32 EmcPmacroObDdllLongDqsRank0_4;
- u32 EmcPmacroObDdllLongDqsRank0_5;
- u32 EmcPmacroObDdllLongDqsRank1_0;
- u32 EmcPmacroObDdllLongDqsRank1_1;
- u32 EmcPmacroObDdllLongDqsRank1_2;
- u32 EmcPmacroObDdllLongDqsRank1_3;
- u32 EmcPmacroObDdllLongDqsRank1_4;
- u32 EmcPmacroObDdllLongDqsRank1_5;
-
- u32 EmcPmacroIbDdllLongDqsRank0_0;
- u32 EmcPmacroIbDdllLongDqsRank0_1;
- u32 EmcPmacroIbDdllLongDqsRank0_2;
- u32 EmcPmacroIbDdllLongDqsRank0_3;
- u32 EmcPmacroIbDdllLongDqsRank1_0;
- u32 EmcPmacroIbDdllLongDqsRank1_1;
- u32 EmcPmacroIbDdllLongDqsRank1_2;
- u32 EmcPmacroIbDdllLongDqsRank1_3;
-
- u32 EmcPmacroDdllLongCmd_0;
- u32 EmcPmacroDdllLongCmd_1;
- u32 EmcPmacroDdllLongCmd_2;
- u32 EmcPmacroDdllLongCmd_3;
- u32 EmcPmacroDdllLongCmd_4;
- u32 EmcPmacroDdllShortCmd_0;
- u32 EmcPmacroDdllShortCmd_1;
- u32 EmcPmacroDdllShortCmd_2;
-
- /*
- * Specifies the delay after asserting CKE pin during a WarmBoot0
- * sequence (in microseconds)
- */
- u32 WarmBootWait;
-
- /* Specifies the value for EMC_ODT_WRITE */
- u32 EmcOdtWrite;
-
- /* Periodic ZQ calibration */
-
- /*
- * Specifies the value for EMC_ZCAL_INTERVAL
- * Value 0 disables ZQ calibration
- */
- u32 EmcZcalInterval;
- /* Specifies the value for EMC_ZCAL_WAIT_CNT */
- u32 EmcZcalWaitCnt;
- /* Specifies the value for EMC_ZCAL_MRW_CMD */
- u32 EmcZcalMrwCmd;
-
- /* DRAM initialization sequence flow control */
-
- /* Specifies the MRS command value for resetting DLL */
- u32 EmcMrsResetDll;
- /* Specifies the command for ZQ initialization of device 0 */
- u32 EmcZcalInitDev0;
- /* Specifies the command for ZQ initialization of device 1 */
- u32 EmcZcalInitDev1;
- /*
- * Specifies the wait time after programming a ZQ initialization
- * command (in microseconds)
- */
- u32 EmcZcalInitWait;
- /*
- * Specifies the enable for ZQ calibration at cold boot [bit 0]
- * and warm boot [bit 1]
- */
- u32 EmcZcalWarmColdBootEnables;
-
- /*
- * Specifies the MRW command to LPDDR2 for ZQ calibration
- * on warmboot
- */
- /* Is issued to both devices separately */
- u32 EmcMrwLpddr2ZcalWarmBoot;
- /*
- * Specifies the ZQ command to DDR3 for ZQ calibration on warmboot
- * Is issued to both devices separately
- */
- u32 EmcZqCalDdr3WarmBoot;
- u32 EmcZqCalLpDdr4WarmBoot;
- /*
- * Specifies the wait time for ZQ calibration on warmboot
- * (in microseconds)
- */
- u32 EmcZcalWarmBootWait;
- /*
- * Specifies the enable for DRAM Mode Register programming
- * at warm boot
- */
- u32 EmcMrsWarmBootEnable;
- /*
- * Specifies the wait time after sending an MRS DLL reset command
- * in microseconds)
- */
- u32 EmcMrsResetDllWait;
- /* Specifies the extra MRS command to initialize mode registers */
- u32 EmcMrsExtra;
- /* Specifies the extra MRS command at warm boot */
- u32 EmcWarmBootMrsExtra;
- /* Specifies the EMRS command to enable the DDR2 DLL */
- u32 EmcEmrsDdr2DllEnable;
- /* Specifies the MRS command to reset the DDR2 DLL */
- u32 EmcMrsDdr2DllReset;
- /* Specifies the EMRS command to set OCD calibration */
- u32 EmcEmrsDdr2OcdCalib;
- /*
- * Specifies the wait between initializing DDR and setting OCD
- * calibration (in microseconds)
- */
- u32 EmcDdr2Wait;
- /* Specifies the value for EMC_CLKEN_OVERRIDE */
- u32 EmcClkenOverride;
-
- /*
- * Specifies LOG2 of the extra refresh numbers after booting
- * Program 0 to disable
- */
- u32 EmcExtraRefreshNum;
- /* Specifies the master override for all EMC clocks */
- u32 EmcClkenOverrideAllWarmBoot;
- /* Specifies the master override for all MC clocks */
- u32 McClkenOverrideAllWarmBoot;
- /* Specifies digital dll period, choosing between 4 to 64 ms */
- u32 EmcCfgDigDllPeriodWarmBoot;
-
- /* Pad controls */
-
- /* Specifies the value for PMC_VDDP_SEL */
- u32 PmcVddpSel;
- /* Specifies the wait time after programming PMC_VDDP_SEL */
- u32 PmcVddpSelWait;
- /* Specifies the value for PMC_DDR_PWR */
- u32 PmcDdrPwr;
- /* Specifies the value for PMC_DDR_CFG */
- u32 PmcDdrCfg;
- /* Specifies the value for PMC_IO_DPD3_REQ */
- u32 PmcIoDpd3Req;
- /* Specifies the wait time after programming PMC_IO_DPD3_REQ */
- u32 PmcIoDpd3ReqWait;
- u32 PmcIoDpd4ReqWait;
-
- /* Specifies the value for PMC_REG_SHORT */
- u32 PmcRegShort;
- /* Specifies the value for PMC_NO_IOPOWER */
- u32 PmcNoIoPower;
-
- u32 PmcDdrCntrlWait;
- u32 PmcDdrCntrl;
-
- /* Specifies the value for EMC_ACPD_CONTROL */
- u32 EmcAcpdControl;
-
- /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE_CFG */
- ////u32 EmcSwizzleRank0ByteCfg;
- /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE0 */
- u32 EmcSwizzleRank0Byte0;
- /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE1 */
- u32 EmcSwizzleRank0Byte1;
- /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE2 */
- u32 EmcSwizzleRank0Byte2;
- /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE3 */
- u32 EmcSwizzleRank0Byte3;
- /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE_CFG */
- ////u32 EmcSwizzleRank1ByteCfg;
- /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE0 */
- u32 EmcSwizzleRank1Byte0;
- /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE1 */
- u32 EmcSwizzleRank1Byte1;
- /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE2 */
- u32 EmcSwizzleRank1Byte2;
- /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE3 */
- u32 EmcSwizzleRank1Byte3;
-
- /* Specifies the value for EMC_TXDSRVTTGEN */
- u32 EmcTxdsrvttgen;
-
- /* Specifies the value for EMC_DATA_BRLSHFT_0 */
- u32 EmcDataBrlshft0;
- u32 EmcDataBrlshft1;
-
- u32 EmcDqsBrlshft0;
- u32 EmcDqsBrlshft1;
-
- u32 EmcCmdBrlshft0;
- u32 EmcCmdBrlshft1;
- u32 EmcCmdBrlshft2;
- u32 EmcCmdBrlshft3;
-
- u32 EmcQuseBrlshft0;
- u32 EmcQuseBrlshft1;
- u32 EmcQuseBrlshft2;
- u32 EmcQuseBrlshft3;
-
- u32 EmcDllCfg0;
- u32 EmcDllCfg1;
-
- u32 EmcPmcScratch1;
- u32 EmcPmcScratch2;
- u32 EmcPmcScratch3;
-
- u32 EmcPmacroPadCfgCtrl;
-
- u32 EmcPmacroVttgenCtrl0;
- u32 EmcPmacroVttgenCtrl1;
- u32 EmcPmacroVttgenCtrl2;
-
- u32 EmcPmacroBrickCtrlRfu1;
- u32 EmcPmacroCmdBrickCtrlFdpd;
- u32 EmcPmacroBrickCtrlRfu2;
- u32 EmcPmacroDataBrickCtrlFdpd;
- u32 EmcPmacroBgBiasCtrl0;
- u32 EmcPmacroDataPadRxCtrl;
- u32 EmcPmacroCmdPadRxCtrl;
- u32 EmcPmacroDataRxTermMode;
- u32 EmcPmacroCmdRxTermMode;
- u32 EmcPmacroDataPadTxCtrl;
- u32 EmcPmacroCommonPadTxCtrl;
- u32 EmcPmacroCmdPadTxCtrl;
- u32 EmcCfg3;
-
- u32 EmcPmacroTxPwrd0;
- u32 EmcPmacroTxPwrd1;
- u32 EmcPmacroTxPwrd2;
- u32 EmcPmacroTxPwrd3;
- u32 EmcPmacroTxPwrd4;
- u32 EmcPmacroTxPwrd5;
-
- u32 EmcConfigSampleDelay;
-
- u32 EmcPmacroBrickMapping0;
- u32 EmcPmacroBrickMapping1;
- u32 EmcPmacroBrickMapping2;
-
- u32 EmcPmacroTxSelClkSrc0;
- u32 EmcPmacroTxSelClkSrc1;
- u32 EmcPmacroTxSelClkSrc2;
- u32 EmcPmacroTxSelClkSrc3;
- u32 EmcPmacroTxSelClkSrc4;
- u32 EmcPmacroTxSelClkSrc5;
-
- u32 EmcPmacroDdllBypass;
-
- u32 EmcPmacroDdllPwrd0;
- u32 EmcPmacroDdllPwrd1;
- u32 EmcPmacroDdllPwrd2;
-
- u32 EmcPmacroCmdCtrl0;
- u32 EmcPmacroCmdCtrl1;
- u32 EmcPmacroCmdCtrl2;
-
- /* DRAM size information */
-
- /* Specifies the value for MC_EMEM_ADR_CFG */
- u32 McEmemAdrCfg;
- /* Specifies the value for MC_EMEM_ADR_CFG_DEV0 */
- u32 McEmemAdrCfgDev0;
- /* Specifies the value for MC_EMEM_ADR_CFG_DEV1 */
- u32 McEmemAdrCfgDev1;
- u32 McEmemAdrCfgChannelMask;
-
- /* Specifies the value for MC_EMEM_BANK_SWIZZLECfg0 */
- u32 McEmemAdrCfgBankMask0;
- /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG1 */
- u32 McEmemAdrCfgBankMask1;
- /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG2 */
- u32 McEmemAdrCfgBankMask2;
-
- /*
- * Specifies the value for MC_EMEM_CFG which holds the external memory
- * size (in KBytes)
- */
- u32 McEmemCfg;
-
- /* MC arbitration configuration */
-
- /* Specifies the value for MC_EMEM_ARB_CFG */
- u32 McEmemArbCfg;
- /* Specifies the value for MC_EMEM_ARB_OUTSTANDING_REQ */
- u32 McEmemArbOutstandingReq;
-
- u32 McEmemArbRefpbHpCtrl;
- u32 McEmemArbRefpbBankCtrl;
-
- /* Specifies the value for MC_EMEM_ARB_TIMING_RCD */
- u32 McEmemArbTimingRcd;
- /* Specifies the value for MC_EMEM_ARB_TIMING_RP */
- u32 McEmemArbTimingRp;
- /* Specifies the value for MC_EMEM_ARB_TIMING_RC */
- u32 McEmemArbTimingRc;
- /* Specifies the value for MC_EMEM_ARB_TIMING_RAS */
- u32 McEmemArbTimingRas;
- /* Specifies the value for MC_EMEM_ARB_TIMING_FAW */
- u32 McEmemArbTimingFaw;
- /* Specifies the value for MC_EMEM_ARB_TIMING_RRD */
- u32 McEmemArbTimingRrd;
- /* Specifies the value for MC_EMEM_ARB_TIMING_RAP2PRE */
- u32 McEmemArbTimingRap2Pre;
- /* Specifies the value for MC_EMEM_ARB_TIMING_WAP2PRE */
- u32 McEmemArbTimingWap2Pre;
- /* Specifies the value for MC_EMEM_ARB_TIMING_R2R */
- u32 McEmemArbTimingR2R;
- /* Specifies the value for MC_EMEM_ARB_TIMING_W2W */
- u32 McEmemArbTimingW2W;
- /* Specifies the value for MC_EMEM_ARB_TIMING_R2W */
- u32 McEmemArbTimingR2W;
- /* Specifies the value for MC_EMEM_ARB_TIMING_W2R */
- u32 McEmemArbTimingW2R;
-
- u32 McEmemArbTimingRFCPB;
-
- /* Specifies the value for MC_EMEM_ARB_DA_TURNS */
- u32 McEmemArbDaTurns;
- /* Specifies the value for MC_EMEM_ARB_DA_COVERS */
- u32 McEmemArbDaCovers;
- /* Specifies the value for MC_EMEM_ARB_MISC0 */
- u32 McEmemArbMisc0;
- /* Specifies the value for MC_EMEM_ARB_MISC1 */
- u32 McEmemArbMisc1;
- u32 McEmemArbMisc2;
-
- /* Specifies the value for MC_EMEM_ARB_RING1_THROTTLE */
- u32 McEmemArbRing1Throttle;
- /* Specifies the value for MC_EMEM_ARB_OVERRIDE */
- u32 McEmemArbOverride;
- /* Specifies the value for MC_EMEM_ARB_OVERRIDE_1 */
- u32 McEmemArbOverride1;
- /* Specifies the value for MC_EMEM_ARB_RSV */
- u32 McEmemArbRsv;
-
- u32 McDaCfg0;
- u32 McEmemArbTimingCcdmw;
-
- /* Specifies the value for MC_CLKEN_OVERRIDE */
- u32 McClkenOverride;
-
- /* Specifies the value for MC_STAT_CONTROL */
- u32 McStatControl;
-
- /* Specifies the value for MC_VIDEO_PROTECT_BOM */
- u32 McVideoProtectBom;
- /* Specifies the value for MC_VIDEO_PROTECT_BOM_ADR_HI */
- u32 McVideoProtectBomAdrHi;
- /* Specifies the value for MC_VIDEO_PROTECT_SIZE_MB */
- u32 McVideoProtectSizeMb;
- /* Specifies the value for MC_VIDEO_PROTECT_VPR_OVERRIDE */
- u32 McVideoProtectVprOverride;
- /* Specifies the value for MC_VIDEO_PROTECT_VPR_OVERRIDE1 */
- u32 McVideoProtectVprOverride1;
- /* Specifies the value for MC_VIDEO_PROTECT_GPU_OVERRIDE_0 */
- u32 McVideoProtectGpuOverride0;
- /* Specifies the value for MC_VIDEO_PROTECT_GPU_OVERRIDE_1 */
- u32 McVideoProtectGpuOverride1;
- /* Specifies the value for MC_SEC_CARVEOUT_BOM */
- u32 McSecCarveoutBom;
- /* Specifies the value for MC_SEC_CARVEOUT_ADR_HI */
- u32 McSecCarveoutAdrHi;
- /* Specifies the value for MC_SEC_CARVEOUT_SIZE_MB */
- u32 McSecCarveoutSizeMb;
- /* Specifies the value for MC_VIDEO_PROTECT_REG_CTRL.
- VIDEO_PROTECT_WRITEAccess */
- u32 McVideoProtectWriteAccess;
- /* Specifies the value for MC_SEC_CARVEOUT_REG_CTRL.
- SEC_CARVEOUT_WRITEAccess */
- u32 McSecCarveoutProtectWriteAccess;
-
- /* Write-Protect Regions (WPR) */
- u32 McGeneralizedCarveout1Bom;
- u32 McGeneralizedCarveout1BomHi;
- u32 McGeneralizedCarveout1Size128kb;
- u32 McGeneralizedCarveout1Access0;
- u32 McGeneralizedCarveout1Access1;
- u32 McGeneralizedCarveout1Access2;
- u32 McGeneralizedCarveout1Access3;
- u32 McGeneralizedCarveout1Access4;
- u32 McGeneralizedCarveout1ForceInternalAccess0;
- u32 McGeneralizedCarveout1ForceInternalAccess1;
- u32 McGeneralizedCarveout1ForceInternalAccess2;
- u32 McGeneralizedCarveout1ForceInternalAccess3;
- u32 McGeneralizedCarveout1ForceInternalAccess4;
- u32 McGeneralizedCarveout1Cfg0;
-
- u32 McGeneralizedCarveout2Bom;
- u32 McGeneralizedCarveout2BomHi;
- u32 McGeneralizedCarveout2Size128kb;
- u32 McGeneralizedCarveout2Access0;
- u32 McGeneralizedCarveout2Access1;
- u32 McGeneralizedCarveout2Access2;
- u32 McGeneralizedCarveout2Access3;
- u32 McGeneralizedCarveout2Access4;
- u32 McGeneralizedCarveout2ForceInternalAccess0;
- u32 McGeneralizedCarveout2ForceInternalAccess1;
- u32 McGeneralizedCarveout2ForceInternalAccess2;
- u32 McGeneralizedCarveout2ForceInternalAccess3;
- u32 McGeneralizedCarveout2ForceInternalAccess4;
- u32 McGeneralizedCarveout2Cfg0;
-
- u32 McGeneralizedCarveout3Bom;
- u32 McGeneralizedCarveout3BomHi;
- u32 McGeneralizedCarveout3Size128kb;
- u32 McGeneralizedCarveout3Access0;
- u32 McGeneralizedCarveout3Access1;
- u32 McGeneralizedCarveout3Access2;
- u32 McGeneralizedCarveout3Access3;
- u32 McGeneralizedCarveout3Access4;
- u32 McGeneralizedCarveout3ForceInternalAccess0;
- u32 McGeneralizedCarveout3ForceInternalAccess1;
- u32 McGeneralizedCarveout3ForceInternalAccess2;
- u32 McGeneralizedCarveout3ForceInternalAccess3;
- u32 McGeneralizedCarveout3ForceInternalAccess4;
- u32 McGeneralizedCarveout3Cfg0;
-
- u32 McGeneralizedCarveout4Bom;
- u32 McGeneralizedCarveout4BomHi;
- u32 McGeneralizedCarveout4Size128kb;
- u32 McGeneralizedCarveout4Access0;
- u32 McGeneralizedCarveout4Access1;
- u32 McGeneralizedCarveout4Access2;
- u32 McGeneralizedCarveout4Access3;
- u32 McGeneralizedCarveout4Access4;
- u32 McGeneralizedCarveout4ForceInternalAccess0;
- u32 McGeneralizedCarveout4ForceInternalAccess1;
- u32 McGeneralizedCarveout4ForceInternalAccess2;
- u32 McGeneralizedCarveout4ForceInternalAccess3;
- u32 McGeneralizedCarveout4ForceInternalAccess4;
- u32 McGeneralizedCarveout4Cfg0;
-
- u32 McGeneralizedCarveout5Bom;
- u32 McGeneralizedCarveout5BomHi;
- u32 McGeneralizedCarveout5Size128kb;
- u32 McGeneralizedCarveout5Access0;
- u32 McGeneralizedCarveout5Access1;
- u32 McGeneralizedCarveout5Access2;
- u32 McGeneralizedCarveout5Access3;
- u32 McGeneralizedCarveout5Access4;
- u32 McGeneralizedCarveout5ForceInternalAccess0;
- u32 McGeneralizedCarveout5ForceInternalAccess1;
- u32 McGeneralizedCarveout5ForceInternalAccess2;
- u32 McGeneralizedCarveout5ForceInternalAccess3;
- u32 McGeneralizedCarveout5ForceInternalAccess4;
- u32 McGeneralizedCarveout5Cfg0;
-
- /* Specifies enable for CA training */
- u32 EmcCaTrainingEnable;
-
- /* Set if bit 6 select is greater than bit 7 select; uses aremc.
- spec packet SWIZZLE_BIT6_GT_BIT7 */
- u32 SwizzleRankByteEncode;
- /* Specifies enable and offset for patched boot ROM write */
- u32 BootRomPatchControl;
- /* Specifies data for patched boot ROM write */
- u32 BootRomPatchData;
-
- /* Specifies the value for MC_MTS_CARVEOUT_BOM */
- u32 McMtsCarveoutBom;
- /* Specifies the value for MC_MTS_CARVEOUT_ADR_HI */
- u32 McMtsCarveoutAdrHi;
- /* Specifies the value for MC_MTS_CARVEOUT_SIZE_MB */
- u32 McMtsCarveoutSizeMb;
- /* Specifies the value for MC_MTS_CARVEOUT_REG_CTRL */
- u32 McMtsCarveoutRegCtrl;
-
- /* End */
-};
-
-#endif /* __SOC_NVIDIA_TEGRA210_SDRAM_PARAM_H__ */
diff --git a/nyx/nyx_gui/mem/sdram_param_t210.h b/nyx/nyx_gui/mem/sdram_param_t210.h
deleted file mode 100644
index 4c6c60a..0000000
--- a/nyx/nyx_gui/mem/sdram_param_t210.h
+++ /dev/null
@@ -1,930 +0,0 @@
-/*
- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- */
-
-/**
- * Defines the SDRAM parameter structure.
- *
- * Note that PLLM is used by EMC.
- */
-
-#ifndef _SDRAM_PARAM_T210_H_
-#define _SDRAM_PARAM_T210_H_
-
-#define MEMORY_TYPE_NONE 0
-#define MEMORY_TYPE_DDR 0
-#define MEMORY_TYPE_LPDDR 0
-#define MEMORY_TYPE_DDR2 0
-#define MEMORY_TYPE_LPDDR2 1
-#define MEMORY_TYPE_DDR3L 2
-#define MEMORY_TYPE_LPDDR4 3
-
-/**
- * Defines the SDRAM parameter structure
- */
-typedef struct _sdram_params
-{
- /* Specifies the type of memory device */
- u32 memory_type;
-
- /* MC/EMC clock source configuration */
-
- /* Specifies the M value for PllM */
- u32 pllm_input_divider;
- /* Specifies the N value for PllM */
- u32 pllm_feedback_divider;
- /* Specifies the time to wait for PLLM to lock (in microseconds) */
- u32 pllm_stable_time;
- /* Specifies misc. control bits */
- u32 pllm_setup_control;
- /* Specifies the P value for PLLM */
- u32 pllm_post_divider;
- /* Specifies value for Charge Pump Gain Control */
- u32 pllm_kcp;
- /* Specifies VCO gain */
- u32 pllm_kvco;
- /* Spare BCT param */
- u32 emc_bct_spare0;
- /* Spare BCT param */
- u32 emc_bct_spare1;
- /* Spare BCT param */
- u32 emc_bct_spare2;
- /* Spare BCT param */
- u32 emc_bct_spare3;
- /* Spare BCT param */
- u32 emc_bct_spare4;
- /* Spare BCT param */
- u32 emc_bct_spare5;
- /* Spare BCT param */
- u32 emc_bct_spare6;
- /* Spare BCT param */
- u32 emc_bct_spare7;
- /* Spare BCT param */
- u32 emc_bct_spare8;
- /* Spare BCT param */
- u32 emc_bct_spare9;
- /* Spare BCT param */
- u32 emc_bct_spare10;
- /* Spare BCT param */
- u32 emc_bct_spare11;
- /* Spare BCT param */
- u32 emc_bct_spare12;
- /* Spare BCT param */
- u32 emc_bct_spare13;
-
- /* Defines EMC_2X_CLK_SRC, EMC_2X_CLK_DIVISOR, EMC_INVERT_DCD */
- u32 emc_clock_source;
- u32 emc_clock_source_dll;
-
- /* Defines possible override for PLLLM_MISC2 */
- u32 clk_rst_pllm_misc20_override;
- /* enables override for PLLLM_MISC2 */
- u32 clk_rst_pllm_misc20_override_enable;
- /* defines CLK_ENB_MC1 in register clk_rst_controller_clk_enb_w_clr */
- u32 clear_clock2_mc1;
-
- /* Auto-calibration of EMC pads */
-
- /* Specifies the value for EMC_AUTO_CAL_INTERVAL */
- u32 emc_auto_cal_interval;
- /*
- * Specifies the value for EMC_AUTO_CAL_CONFIG
- * Note: Trigger bits are set by the SDRAM code.
- */
- u32 emc_auto_cal_config;
-
- /* Specifies the value for EMC_AUTO_CAL_CONFIG2 */
- u32 emc_auto_cal_config2;
-
- /* Specifies the value for EMC_AUTO_CAL_CONFIG3 */
- u32 emc_auto_cal_config3;
- u32 emc_auto_cal_config4;
- u32 emc_auto_cal_config5;
- u32 emc_auto_cal_config6;
- u32 emc_auto_cal_config7;
- u32 emc_auto_cal_config8;
- /* Specifies the value for EMC_AUTO_CAL_VREF_SEL_0 */
- u32 emc_auto_cal_vref_sel0;
- u32 emc_auto_cal_vref_sel1;
-
- /* Specifies the value for EMC_AUTO_CAL_CHANNEL */
- u32 emc_auto_cal_channel;
-
- /* Specifies the value for EMC_PMACRO_AUTOCAL_CFG_0 */
- u32 emc_pmacro_auto_cal_cfg0;
- u32 emc_pmacro_auto_cal_cfg1;
- u32 emc_pmacro_auto_cal_cfg2;
-
- u32 emc_pmacro_rx_term;
- u32 emc_pmacro_dq_tx_drive;
- u32 emc_pmacro_ca_tx_drive;
- u32 emc_pmacro_cmd_tx_drive;
- u32 emc_pmacro_auto_cal_common;
- u32 emc_pmacro_zcrtl;
-
- /*
- * Specifies the time for the calibration
- * to stabilize (in microseconds)
- */
- u32 emc_auto_cal_wait;
-
- u32 emc_xm2_comp_pad_ctrl;
- u32 emc_xm2_comp_pad_ctrl2;
- u32 emc_xm2_comp_pad_ctrl3;
-
- /*
- * DRAM size information
- * Specifies the value for EMC_ADR_CFG
- */
- u32 emc_adr_cfg;
-
- /*
- * Specifies the time to wait after asserting pin
- * CKE (in microseconds)
- */
- u32 emc_pin_program_wait;
- /* Specifies the extra delay before/after pin RESET/CKE command */
- u32 emc_pin_extra_wait;
-
- u32 emc_pin_gpio_enable;
- u32 emc_pin_gpio;
-
- /*
- * Specifies the extra delay after the first writing
- * of EMC_TIMING_CONTROL
- */
- u32 emc_timing_control_wait;
-
- /* Timing parameters required for the SDRAM */
-
- /* Specifies the value for EMC_RC */
- u32 emc_rc;
- /* Specifies the value for EMC_RFC */
- u32 emc_rfc;
-
- u32 emc_rfc_pb;
- u32 emc_ref_ctrl2;
-
- /* Specifies the value for EMC_RFC_SLR */
- u32 emc_rfc_slr;
- /* Specifies the value for EMC_RAS */
- u32 emc_ras;
- /* Specifies the value for EMC_RP */
- u32 emc_rp;
- /* Specifies the value for EMC_R2R */
- u32 emc_r2r;
- /* Specifies the value for EMC_W2W */
- u32 emc_w2w;
- /* Specifies the value for EMC_R2W */
- u32 emc_r2w;
- /* Specifies the value for EMC_W2R */
- u32 emc_w2r;
- /* Specifies the value for EMC_R2P */
- u32 emc_r2p;
- /* Specifies the value for EMC_W2P */
- u32 emc_w2p;
- /* Specifies the value for EMC_RD_RCD */
-
- u32 emc_tppd;
- u32 emc_ccdmw;
-
- u32 emc_rd_rcd;
- /* Specifies the value for EMC_WR_RCD */
- u32 emc_wr_rcd;
- /* Specifies the value for EMC_RRD */
- u32 emc_rrd;
- /* Specifies the value for EMC_REXT */
- u32 emc_rext;
- /* Specifies the value for EMC_WEXT */
- u32 emc_wext;
- /* Specifies the value for EMC_WDV */
- u32 emc_wdv;
-
- u32 emc_wdv_chk;
- u32 emc_wsv;
- u32 emc_wev;
-
- /* Specifies the value for EMC_WDV_MASK */
- u32 emc_wdv_mask;
-
- u32 emc_ws_duration;
- u32 emc_we_duration;
-
- /* Specifies the value for EMC_QUSE */
- u32 emc_quse;
- /* Specifies the value for EMC_QUSE_WIDTH */
- u32 emc_quse_width;
- /* Specifies the value for EMC_IBDLY */
- u32 emc_ibdly;
-
- u32 emc_obdly;
-
- /* Specifies the value for EMC_EINPUT */
- u32 emc_einput;
- /* Specifies the value for EMC_EINPUT_DURATION */
- u32 emc_einput_duration;
- /* Specifies the value for EMC_PUTERM_EXTRA */
- u32 emc_puterm_extra;
- /* Specifies the value for EMC_PUTERM_WIDTH */
- u32 emc_puterm_width;
-
- u32 emc_qrst;
- u32 emc_qsafe;
- u32 emc_rdv;
- u32 emc_rdv_mask;
-
- u32 emc_rdv_early;
- u32 emc_rdv_early_mask;
-
- /* Specifies the value for EMC_QPOP */
- u32 emc_qpop;
-
- /* Specifies the value for EMC_REFRESH */
- u32 emc_refresh;
- /* Specifies the value for EMC_BURST_REFRESH_NUM */
- u32 emc_burst_refresh_num;
- /* Specifies the value for EMC_PRE_REFRESH_REQ_CNT */
- u32 emc_prerefresh_req_cnt;
- /* Specifies the value for EMC_PDEX2WR */
- u32 emc_pdex2wr;
- /* Specifies the value for EMC_PDEX2RD */
- u32 emc_pdex2rd;
- /* Specifies the value for EMC_PCHG2PDEN */
- u32 emc_pchg2pden;
- /* Specifies the value for EMC_ACT2PDEN */
- u32 emc_act2pden;
- /* Specifies the value for EMC_AR2PDEN */
- u32 emc_ar2pden;
- /* Specifies the value for EMC_RW2PDEN */
- u32 emc_rw2pden;
-
- u32 emc_cke2pden;
- u32 emc_pdex2che;
- u32 emc_pdex2mrr;
-
- /* Specifies the value for EMC_TXSR */
- u32 emc_txsr;
- /* Specifies the value for EMC_TXSRDLL */
- u32 emc_txsr_dll;
- /* Specifies the value for EMC_TCKE */
- u32 emc_tcke;
- /* Specifies the value for EMC_TCKESR */
- u32 emc_tckesr;
- /* Specifies the value for EMC_TPD */
- u32 emc_tpd;
- /* Specifies the value for EMC_TFAW */
- u32 emc_tfaw;
- /* Specifies the value for EMC_TRPAB */
- u32 emc_trpab;
- /* Specifies the value for EMC_TCLKSTABLE */
- u32 emc_tclkstable;
- /* Specifies the value for EMC_TCLKSTOP */
- u32 emc_tclkstop;
- /* Specifies the value for EMC_TREFBW */
- u32 emc_trefbw;
-
- /* FBIO configuration values */
-
- /* Specifies the value for EMC_FBIO_CFG5 */
- u32 emc_fbio_cfg5;
- /* Specifies the value for EMC_FBIO_CFG7 */
- u32 emc_fbio_cfg7;
- u32 emc_fbio_cfg8;
-
- /* Command mapping for CMD brick 0 */
- u32 emc_cmd_mapping_cmd0_0;
- u32 emc_cmd_mapping_cmd0_1;
- u32 emc_cmd_mapping_cmd0_2;
- u32 emc_cmd_mapping_cmd1_0;
- u32 emc_cmd_mapping_cmd1_1;
- u32 emc_cmd_mapping_cmd1_2;
- u32 emc_cmd_mapping_cmd2_0;
- u32 emc_cmd_mapping_cmd2_1;
- u32 emc_cmd_mapping_cmd2_2;
- u32 emc_cmd_mapping_cmd3_0;
- u32 emc_cmd_mapping_cmd3_1;
- u32 emc_cmd_mapping_cmd3_2;
- u32 emc_cmd_mapping_byte;
-
- /* Specifies the value for EMC_FBIO_SPARE */
- u32 emc_fbio_spare;
-
- /* Specifies the value for EMC_CFG_RSV */
- u32 emc_cfg_rsv;
-
- /* MRS command values */
-
- /* Specifies the value for EMC_MRS */
- u32 emc_mrs;
- /* Specifies the MP0 command to initialize mode registers */
- u32 emc_emrs;
- /* Specifies the MP2 command to initialize mode registers */
- u32 emc_emrs2;
- /* Specifies the MP3 command to initialize mode registers */
- u32 emc_emrs3;
- /* Specifies the programming to LPDDR2 Mode Register 1 at cold boot */
- u32 emc_mrw1;
- /* Specifies the programming to LPDDR2 Mode Register 2 at cold boot */
- u32 emc_mrw2;
- /* Specifies the programming to LPDDR2 Mode Register 3 at cold boot */
- u32 emc_mrw3;
- /* Specifies the programming to LPDDR2 Mode Register 11 at cold boot */
- u32 emc_mrw4;
-
- /* Specifies the programming to LPDDR4 Mode Register 3 at cold boot */
- u32 emc_mrw6;
- /* Specifies the programming to LPDDR4 Mode Register 11 at cold boot */
- u32 emc_mrw8;
- /* Specifies the programming to LPDDR4 Mode Register 11 at cold boot */
- u32 emc_mrw9;
- /* Specifies the programming to LPDDR4 Mode Register 12 at cold boot */
- u32 emc_mrw10;
- /* Specifies the programming to LPDDR4 Mode Register 14 at cold boot */
- u32 emc_mrw12;
- /* Specifies the programming to LPDDR4 Mode Register 14 at cold boot */
- u32 emc_mrw13;
- /* Specifies the programming to LPDDR4 Mode Register 22 at cold boot */
- u32 emc_mrw14;
-
- /*
- * Specifies the programming to extra LPDDR2 Mode Register
- * at cold boot
- */
- u32 emc_mrw_extra;
- /*
- * Specifies the programming to extra LPDDR2 Mode Register
- * at warm boot
- */
- u32 emc_warm_boot_mrw_extra;
- /*
- * Specify the enable of extra Mode Register programming at
- * warm boot
- */
- u32 emc_warm_boot_extramode_reg_write_enable;
- /*
- * Specify the enable of extra Mode Register programming at
- * cold boot
- */
- u32 emc_extramode_reg_write_enable;
-
- /* Specifies the EMC_MRW reset command value */
- u32 emc_mrw_reset_command;
- /* Specifies the EMC Reset wait time (in microseconds) */
- u32 emc_mrw_reset_ninit_wait;
- /* Specifies the value for EMC_MRS_WAIT_CNT */
- u32 emc_mrs_wait_cnt;
- /* Specifies the value for EMC_MRS_WAIT_CNT2 */
- u32 emc_mrs_wait_cnt2;
-
- /* EMC miscellaneous configurations */
-
- /* Specifies the value for EMC_CFG */
- u32 emc_cfg;
- /* Specifies the value for EMC_CFG_2 */
- u32 emc_cfg2;
- /* Specifies the pipe bypass controls */
- u32 emc_cfg_pipe;
-
- u32 emc_cfg_pipe_clk;
- u32 emc_fdpd_ctrl_cmd_no_ramp;
- u32 emc_cfg_update;
-
- /* Specifies the value for EMC_DBG */
- u32 emc_dbg;
-
- u32 emc_dbg_write_mux;
-
- /* Specifies the value for EMC_CMDQ */
- u32 emc_cmd_q;
- /* Specifies the value for EMC_MC2EMCQ */
- u32 emc_mc2emc_q;
- /* Specifies the value for EMC_DYN_SELF_REF_CONTROL */
- u32 emc_dyn_self_ref_control;
-
- /* Specifies the value for MEM_INIT_DONE */
- u32 ahb_arbitration_xbar_ctrl_meminit_done;
-
- /* Specifies the value for EMC_CFG_DIG_DLL */
- u32 emc_cfg_dig_dll;
- u32 emc_cfg_dig_dll_1;
-
- /* Specifies the value for EMC_CFG_DIG_DLL_PERIOD */
- u32 emc_cfg_dig_dll_period;
- /* Specifies the value of *DEV_SELECTN of various EMC registers */
- u32 emc_dev_select;
-
- /* Specifies the value for EMC_SEL_DPD_CTRL */
- u32 emc_sel_dpd_ctrl;
-
- /* Pads trimmer delays */
- u32 emc_fdpd_ctrl_dq;
- u32 emc_fdpd_ctrl_cmd;
- u32 emc_pmacro_ib_vref_dq_0;
- u32 emc_pmacro_ib_vref_dq_1;
- u32 emc_pmacro_ib_vref_dqs_0;
- u32 emc_pmacro_ib_vref_dqs_1;
- u32 emc_pmacro_ib_rxrt;
- u32 emc_cfg_pipe1;
- u32 emc_cfg_pipe2;
-
- /* Specifies the value for EMC_PMACRO_QUSE_DDLL_RANK0_0 */
- u32 emc_pmacro_quse_ddll_rank0_0;
- u32 emc_pmacro_quse_ddll_rank0_1;
- u32 emc_pmacro_quse_ddll_rank0_2;
- u32 emc_pmacro_quse_ddll_rank0_3;
- u32 emc_pmacro_quse_ddll_rank0_4;
- u32 emc_pmacro_quse_ddll_rank0_5;
- u32 emc_pmacro_quse_ddll_rank1_0;
- u32 emc_pmacro_quse_ddll_rank1_1;
- u32 emc_pmacro_quse_ddll_rank1_2;
- u32 emc_pmacro_quse_ddll_rank1_3;
- u32 emc_pmacro_quse_ddll_rank1_4;
- u32 emc_pmacro_quse_ddll_rank1_5;
-
- u32 emc_pmacro_ob_ddll_long_dq_rank0_0;
- u32 emc_pmacro_ob_ddll_long_dq_rank0_1;
- u32 emc_pmacro_ob_ddll_long_dq_rank0_2;
- u32 emc_pmacro_ob_ddll_long_dq_rank0_3;
- u32 emc_pmacro_ob_ddll_long_dq_rank0_4;
- u32 emc_pmacro_ob_ddll_long_dq_rank0_5;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_0;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_1;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_2;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_3;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_4;
- u32 emc_pmacro_ob_ddll_long_dq_rank1_5;
-
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_0;
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_1;
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_2;
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_3;
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_4;
- u32 emc_pmacro_ob_ddll_long_dqs_rank0_5;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_0;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_1;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_2;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_3;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_4;
- u32 emc_pmacro_ob_ddll_long_dqs_rank1_5;
-
- u32 emc_pmacro_ib_ddll_long_dqs_rank0_0;
- u32 emc_pmacro_ib_ddll_long_dqs_rank0_1;
- u32 emc_pmacro_ib_ddll_long_dqs_rank0_2;
- u32 emc_pmacro_ib_ddll_long_dqs_rank0_3;
- u32 emc_pmacro_ib_ddll_long_dqs_rank1_0;
- u32 emc_pmacro_ib_ddll_long_dqs_rank1_1;
- u32 emc_pmacro_ib_ddll_long_dqs_rank1_2;
- u32 emc_pmacro_ib_ddll_long_dqs_rank1_3;
-
- u32 emc_pmacro_ddll_long_cmd_0;
- u32 emc_pmacro_ddll_long_cmd_1;
- u32 emc_pmacro_ddll_long_cmd_2;
- u32 emc_pmacro_ddll_long_cmd_3;
- u32 emc_pmacro_ddll_long_cmd_4;
- u32 emc_pmacro_ddll_short_cmd_0;
- u32 emc_pmacro_ddll_short_cmd_1;
- u32 emc_pmacro_ddll_short_cmd_2;
-
- /*
- * Specifies the delay after asserting CKE pin during a WarmBoot0
- * sequence (in microseconds)
- */
- u32 warm_boot_wait;
-
- /* Specifies the value for EMC_ODT_WRITE */
- u32 emc_odt_write;
-
- /* Periodic ZQ calibration */
-
- /*
- * Specifies the value for EMC_ZCAL_INTERVAL
- * Value 0 disables ZQ calibration
- */
- u32 emc_zcal_interval;
- /* Specifies the value for EMC_ZCAL_WAIT_CNT */
- u32 emc_zcal_wait_cnt;
- /* Specifies the value for EMC_ZCAL_MRW_CMD */
- u32 emc_zcal_mrw_cmd;
-
- /* DRAM initialization sequence flow control */
-
- /* Specifies the MRS command value for resetting DLL */
- u32 emc_mrs_reset_dll;
- /* Specifies the command for ZQ initialization of device 0 */
- u32 emc_zcal_init_dev0;
- /* Specifies the command for ZQ initialization of device 1 */
- u32 emc_zcal_init_dev1;
- /*
- * Specifies the wait time after programming a ZQ initialization
- * command (in microseconds)
- */
- u32 emc_zcal_init_wait;
- /*
- * Specifies the enable for ZQ calibration at cold boot [bit 0]
- * and warm boot [bit 1]
- */
- u32 emc_zcal_warm_cold_boot_enables;
-
- /*
- * Specifies the MRW command to LPDDR2 for ZQ calibration
- * on warmboot
- */
- /* Is issued to both devices separately */
- u32 emc_mrw_lpddr2zcal_warm_boot;
- /*
- * Specifies the ZQ command to DDR3 for ZQ calibration on warmboot
- * Is issued to both devices separately
- */
- u32 emc_zqcal_ddr3_warm_boot;
-
- u32 emc_zqcal_lpddr4_warm_boot;
-
- /*
- * Specifies the wait time for ZQ calibration on warmboot
- * (in microseconds)
- */
- u32 emc_zcal_warm_boot_wait;
- /*
- * Specifies the enable for DRAM Mode Register programming
- * at warm boot
- */
- u32 emc_mrs_warm_boot_enable;
- /*
- * Specifies the wait time after sending an MRS DLL reset command
- * in microseconds)
- */
- u32 emc_mrs_reset_dll_wait;
- /* Specifies the extra MRS command to initialize mode registers */
- u32 emc_mrs_extra;
- /* Specifies the extra MRS command at warm boot */
- u32 emc_warm_boot_mrs_extra;
- /* Specifies the EMRS command to enable the DDR2 DLL */
- u32 emc_emrs_ddr2_dll_enable;
- /* Specifies the MRS command to reset the DDR2 DLL */
- u32 emc_mrs_ddr2_dll_reset;
- /* Specifies the EMRS command to set OCD calibration */
- u32 emc_emrs_ddr2_ocd_calib;
- /*
- * Specifies the wait between initializing DDR and setting OCD
- * calibration (in microseconds)
- */
- u32 emc_ddr2_wait;
- /* Specifies the value for EMC_CLKEN_OVERRIDE */
- u32 emc_clken_override;
- /*
- * Specifies LOG2 of the extra refresh numbers after booting
- * Program 0 to disable
- */
- u32 emc_extra_refresh_num;
- /* Specifies the master override for all EMC clocks */
- u32 emc_clken_override_allwarm_boot;
- /* Specifies the master override for all MC clocks */
- u32 mc_clken_override_allwarm_boot;
- /* Specifies digital dll period, choosing between 4 to 64 ms */
- u32 emc_cfg_dig_dll_period_warm_boot;
-
- /* Pad controls */
-
- /* Specifies the value for PMC_VDDP_SEL */
- u32 pmc_vddp_sel;
- /* Specifies the wait time after programming PMC_VDDP_SEL */
- u32 pmc_vddp_sel_wait;
- /* Specifies the value for PMC_DDR_PWR */
- u32 pmc_ddr_pwr;
- /* Specifies the value for PMC_DDR_CFG */
- u32 pmc_ddr_cfg;
- /* Specifies the value for PMC_IO_DPD3_REQ */
- u32 pmc_io_dpd3_req;
- /* Specifies the wait time after programming PMC_IO_DPD3_REQ */
- u32 pmc_io_dpd3_req_wait;
-
- u32 pmc_io_dpd4_req_wait;
-
- /* Specifies the value for PMC_REG_SHORT */
- u32 pmc_reg_short;
- /* Specifies the value for PMC_NO_IOPOWER */
- u32 pmc_no_io_power;
-
- u32 pmc_ddr_ctrl_wait;
- u32 pmc_ddr_ctrl;
-
- /* Specifies the value for EMC_ACPD_CONTROL */
- u32 emc_acpd_control;
-
- /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE0 */
- u32 emc_swizzle_rank0_byte0;
- /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE1 */
- u32 emc_swizzle_rank0_byte1;
- /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE2 */
- u32 emc_swizzle_rank0_byte2;
- /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE3 */
- u32 emc_swizzle_rank0_byte3;
- /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE0 */
- u32 emc_swizzle_rank1_byte0;
- /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE1 */
- u32 emc_swizzle_rank1_byte1;
- /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE2 */
- u32 emc_swizzle_rank1_byte2;
- /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE3 */
- u32 emc_swizzle_rank1_byte3;
-
- /* Specifies the value for EMC_TXDSRVTTGEN */
- u32 emc_txdsrvttgen;
-
- /* Specifies the value for EMC_DATA_BRLSHFT_0 */
- u32 emc_data_brlshft0;
- u32 emc_data_brlshft1;
-
- u32 emc_dqs_brlshft0;
- u32 emc_dqs_brlshft1;
-
- u32 emc_cmd_brlshft0;
- u32 emc_cmd_brlshft1;
- u32 emc_cmd_brlshft2;
- u32 emc_cmd_brlshft3;
-
- u32 emc_quse_brlshft0;
- u32 emc_quse_brlshft1;
- u32 emc_quse_brlshft2;
- u32 emc_quse_brlshft3;
-
- u32 emc_dll_cfg0;
- u32 emc_dll_cfg1;
-
- u32 emc_pmc_scratch1;
- u32 emc_pmc_scratch2;
- u32 emc_pmc_scratch3;
-
- u32 emc_pmacro_pad_cfg_ctrl;
-
- u32 emc_pmacro_vttgen_ctrl0;
- u32 emc_pmacro_vttgen_ctrl1;
- u32 emc_pmacro_vttgen_ctrl2;
-
- u32 emc_pmacro_brick_ctrl_rfu1;
- u32 emc_pmacro_cmd_brick_ctrl_fdpd;
- u32 emc_pmacro_brick_ctrl_rfu2;
- u32 emc_pmacro_data_brick_ctrl_fdpd;
- u32 emc_pmacro_bg_bias_ctrl0;
- u32 emc_pmacro_data_pad_rx_ctrl;
- u32 emc_pmacro_cmd_pad_rx_ctrl;
- u32 emc_pmacro_data_rx_term_mode;
- u32 emc_pmacro_cmd_rx_term_mode;
- u32 emc_pmacro_data_pad_tx_ctrl;
- u32 emc_pmacro_common_pad_tx_ctrl;
- u32 emc_pmacro_cmd_pad_tx_ctrl;
- u32 emc_cfg3;
-
- u32 emc_pmacro_tx_pwrd0;
- u32 emc_pmacro_tx_pwrd1;
- u32 emc_pmacro_tx_pwrd2;
- u32 emc_pmacro_tx_pwrd3;
- u32 emc_pmacro_tx_pwrd4;
- u32 emc_pmacro_tx_pwrd5;
-
- u32 emc_config_sample_delay;
-
- u32 emc_pmacro_brick_mapping0;
- u32 emc_pmacro_brick_mapping1;
- u32 emc_pmacro_brick_mapping2;
-
- u32 emc_pmacro_tx_sel_clk_src0;
- u32 emc_pmacro_tx_sel_clk_src1;
- u32 emc_pmacro_tx_sel_clk_src2;
- u32 emc_pmacro_tx_sel_clk_src3;
- u32 emc_pmacro_tx_sel_clk_src4;
- u32 emc_pmacro_tx_sel_clk_src5;
-
- u32 emc_pmacro_ddll_bypass;
-
- u32 emc_pmacro_ddll_pwrd0;
- u32 emc_pmacro_ddll_pwrd1;
- u32 emc_pmacro_ddll_pwrd2;
-
- u32 emc_pmacro_cmd_ctrl0;
- u32 emc_pmacro_cmd_ctrl1;
- u32 emc_pmacro_cmd_ctrl2;
-
- /* DRAM size information */
-
- /* Specifies the value for MC_EMEM_ADR_CFG */
- u32 mc_emem_adr_cfg;
- /* Specifies the value for MC_EMEM_ADR_CFG_DEV0 */
- u32 mc_emem_adr_cfg_dev0;
- /* Specifies the value for MC_EMEM_ADR_CFG_DEV1 */
- u32 mc_emem_adr_cfg_dev1;
-
- u32 mc_emem_adr_cfg_channel_mask;
-
- /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG0 */
- u32 mc_emem_adr_cfg_bank_mask0;
- /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG1 */
- u32 mc_emem_adr_cfg_bank_mask1;
- /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG2 */
- u32 mc_emem_adr_cfg_bank_mask2;
-
- /*
- * Specifies the value for MC_EMEM_CFG which holds the external memory
- * size (in KBytes)
- */
- u32 mc_emem_cfg;
-
- /* MC arbitration configuration */
-
- /* Specifies the value for MC_EMEM_ARB_CFG */
- u32 mc_emem_arb_cfg;
- /* Specifies the value for MC_EMEM_ARB_OUTSTANDING_REQ */
- u32 mc_emem_arb_outstanding_req;
-
- u32 emc_emem_arb_refpb_hp_ctrl;
- u32 emc_emem_arb_refpb_bank_ctrl;
-
- /* Specifies the value for MC_EMEM_ARB_TIMING_RCD */
- u32 mc_emem_arb_timing_rcd;
- /* Specifies the value for MC_EMEM_ARB_TIMING_RP */
- u32 mc_emem_arb_timing_rp;
- /* Specifies the value for MC_EMEM_ARB_TIMING_RC */
- u32 mc_emem_arb_timing_rc;
- /* Specifies the value for MC_EMEM_ARB_TIMING_RAS */
- u32 mc_emem_arb_timing_ras;
- /* Specifies the value for MC_EMEM_ARB_TIMING_FAW */
- u32 mc_emem_arb_timing_faw;
- /* Specifies the value for MC_EMEM_ARB_TIMING_RRD */
- u32 mc_emem_arb_timing_rrd;
- /* Specifies the value for MC_EMEM_ARB_TIMING_RAP2PRE */
- u32 mc_emem_arb_timing_rap2pre;
- /* Specifies the value for MC_EMEM_ARB_TIMING_WAP2PRE */
- u32 mc_emem_arb_timing_wap2pre;
- /* Specifies the value for MC_EMEM_ARB_TIMING_R2R */
- u32 mc_emem_arb_timing_r2r;
- /* Specifies the value for MC_EMEM_ARB_TIMING_W2W */
- u32 mc_emem_arb_timing_w2w;
- /* Specifies the value for MC_EMEM_ARB_TIMING_R2W */
- u32 mc_emem_arb_timing_r2w;
- /* Specifies the value for MC_EMEM_ARB_TIMING_W2R */
- u32 mc_emem_arb_timing_w2r;
-
- u32 mc_emem_arb_timing_rfcpb;
-
- /* Specifies the value for MC_EMEM_ARB_DA_TURNS */
- u32 mc_emem_arb_da_turns;
- /* Specifies the value for MC_EMEM_ARB_DA_COVERS */
- u32 mc_emem_arb_da_covers;
- /* Specifies the value for MC_EMEM_ARB_MISC0 */
- u32 mc_emem_arb_misc0;
- /* Specifies the value for MC_EMEM_ARB_MISC1 */
- u32 mc_emem_arb_misc1;
- u32 mc_emem_arb_misc2;
-
- /* Specifies the value for MC_EMEM_ARB_RING1_THROTTLE */
- u32 mc_emem_arb_ring1_throttle;
- /* Specifies the value for MC_EMEM_ARB_OVERRIDE */
- u32 mc_emem_arb_override;
- /* Specifies the value for MC_EMEM_ARB_OVERRIDE_1 */
- u32 mc_emem_arb_override1;
- /* Specifies the value for MC_EMEM_ARB_RSV */
- u32 mc_emem_arb_rsv;
-
- u32 mc_da_cfg0;
- u32 mc_emem_arb_timing_ccdmw;
-
- /* Specifies the value for MC_CLKEN_OVERRIDE */
- u32 mc_clken_override;
-
- /* Specifies the value for MC_STAT_CONTROL */
- u32 mc_stat_control;
- /* Specifies the value for MC_VIDEO_PROTECT_BOM */
- u32 mc_video_protect_bom;
- /* Specifies the value for MC_VIDEO_PROTECT_BOM_ADR_HI */
- u32 mc_video_protect_bom_adr_hi;
- /* Specifies the value for MC_VIDEO_PROTECT_SIZE_MB */
- u32 mc_video_protect_size_mb;
- /* Specifies the value for MC_VIDEO_PROTECT_VPR_OVERRIDE */
- u32 mc_video_protect_vpr_override;
- /* Specifies the value for MC_VIDEO_PROTECT_VPR_OVERRIDE1 */
- u32 mc_video_protect_vpr_override1;
- /* Specifies the value for MC_VIDEO_PROTECT_GPU_OVERRIDE_0 */
- u32 mc_video_protect_gpu_override0;
- /* Specifies the value for MC_VIDEO_PROTECT_GPU_OVERRIDE_1 */
- u32 mc_video_protect_gpu_override1;
- /* Specifies the value for MC_SEC_CARVEOUT_BOM */
- u32 mc_sec_carveout_bom;
- /* Specifies the value for MC_SEC_CARVEOUT_ADR_HI */
- u32 mc_sec_carveout_adr_hi;
- /* Specifies the value for MC_SEC_CARVEOUT_SIZE_MB */
- u32 mc_sec_carveout_size_mb;
- /* Specifies the value for MC_VIDEO_PROTECT_REG_CTRL.VIDEO_PROTECT_WRITE_ACCESS */
- u32 mc_video_protect_write_access;
- /* Specifies the value for MC_SEC_CARVEOUT_REG_CTRL.SEC_CARVEOUT_WRITE_ACCESS */
- u32 mc_sec_carveout_protect_write_access;
-
- u32 mc_generalized_carveout1_bom;
- u32 mc_generalized_carveout1_bom_hi;
- u32 mc_generalized_carveout1_size_128kb;
- u32 mc_generalized_carveout1_access0;
- u32 mc_generalized_carveout1_access1;
- u32 mc_generalized_carveout1_access2;
- u32 mc_generalized_carveout1_access3;
- u32 mc_generalized_carveout1_access4;
- u32 mc_generalized_carveout1_force_internal_access0;
- u32 mc_generalized_carveout1_force_internal_access1;
- u32 mc_generalized_carveout1_force_internal_access2;
- u32 mc_generalized_carveout1_force_internal_access3;
- u32 mc_generalized_carveout1_force_internal_access4;
- u32 mc_generalized_carveout1_cfg0;
-
- u32 mc_generalized_carveout2_bom;
- u32 mc_generalized_carveout2_bom_hi;
- u32 mc_generalized_carveout2_size_128kb;
- u32 mc_generalized_carveout2_access0;
- u32 mc_generalized_carveout2_access1;
- u32 mc_generalized_carveout2_access2;
- u32 mc_generalized_carveout2_access3;
- u32 mc_generalized_carveout2_access4;
- u32 mc_generalized_carveout2_force_internal_access0;
- u32 mc_generalized_carveout2_force_internal_access1;
- u32 mc_generalized_carveout2_force_internal_access2;
- u32 mc_generalized_carveout2_force_internal_access3;
- u32 mc_generalized_carveout2_force_internal_access4;
- u32 mc_generalized_carveout2_cfg0;
-
- u32 mc_generalized_carveout3_bom;
- u32 mc_generalized_carveout3_bom_hi;
- u32 mc_generalized_carveout3_size_128kb;
- u32 mc_generalized_carveout3_access0;
- u32 mc_generalized_carveout3_access1;
- u32 mc_generalized_carveout3_access2;
- u32 mc_generalized_carveout3_access3;
- u32 mc_generalized_carveout3_access4;
- u32 mc_generalized_carveout3_force_internal_access0;
- u32 mc_generalized_carveout3_force_internal_access1;
- u32 mc_generalized_carveout3_force_internal_access2;
- u32 mc_generalized_carveout3_force_internal_access3;
- u32 mc_generalized_carveout3_force_internal_access4;
- u32 mc_generalized_carveout3_cfg0;
-
- u32 mc_generalized_carveout4_bom;
- u32 mc_generalized_carveout4_bom_hi;
- u32 mc_generalized_carveout4_size_128kb;
- u32 mc_generalized_carveout4_access0;
- u32 mc_generalized_carveout4_access1;
- u32 mc_generalized_carveout4_access2;
- u32 mc_generalized_carveout4_access3;
- u32 mc_generalized_carveout4_access4;
- u32 mc_generalized_carveout4_force_internal_access0;
- u32 mc_generalized_carveout4_force_internal_access1;
- u32 mc_generalized_carveout4_force_internal_access2;
- u32 mc_generalized_carveout4_force_internal_access3;
- u32 mc_generalized_carveout4_force_internal_access4;
- u32 mc_generalized_carveout4_cfg0;
-
- u32 mc_generalized_carveout5_bom;
- u32 mc_generalized_carveout5_bom_hi;
- u32 mc_generalized_carveout5_size_128kb;
- u32 mc_generalized_carveout5_access0;
- u32 mc_generalized_carveout5_access1;
- u32 mc_generalized_carveout5_access2;
- u32 mc_generalized_carveout5_access3;
- u32 mc_generalized_carveout5_access4;
- u32 mc_generalized_carveout5_force_internal_access0;
- u32 mc_generalized_carveout5_force_internal_access1;
- u32 mc_generalized_carveout5_force_internal_access2;
- u32 mc_generalized_carveout5_force_internal_access3;
- u32 mc_generalized_carveout5_force_internal_access4;
- u32 mc_generalized_carveout5_cfg0;
-
- /* Specifies enable for CA training */
- u32 emc_ca_training_enable;
- /* Set if bit 6 select is greater than bit 7 select; uses aremc.spec packet SWIZZLE_BIT6_GT_BIT7 */
- u32 swizzle_rank_byte_encode;
- /* Specifies enable and offset for patched boot rom write */
- u32 boot_rom_patch_control;
- /* Specifies data for patched boot rom write */
- u32 boot_rom_patch_data;
-
- /* Specifies the value for MC_MTS_CARVEOUT_BOM */
- u32 mc_mts_carveout_bom;
- /* Specifies the value for MC_MTS_CARVEOUT_ADR_HI */
- u32 mc_mts_carveout_adr_hi;
- /* Specifies the value for MC_MTS_CARVEOUT_SIZE_MB */
- u32 mc_mts_carveout_size_mb;
- /* Specifies the value for MC_MTS_CARVEOUT_REG_CTRL */
- u32 mc_mts_carveout_reg_ctrl;
-} sdram_params_t;
-
-#endif
diff --git a/nyx/nyx_gui/power/bq24193.c b/nyx/nyx_gui/power/bq24193.c
deleted file mode 100644
index 0ade8da..0000000
--- a/nyx/nyx_gui/power/bq24193.c
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
- * Battery charger driver for Nintendo Switch's TI BQ24193
- *
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "bq24193.h"
-#include "../soc/i2c.h"
-#include "../utils/util.h"
-
-static u8 bq24193_get_reg(u8 reg)
-{
- return i2c_recv_byte(I2C_1, BQ24193_I2C_ADDR, reg);
-}
-
-int bq24193_get_property(enum BQ24193_reg_prop prop, int *value)
-{
- u8 data;
-
- switch (prop) {
- case BQ24193_InputVoltageLimit: // Input voltage limit (mV).
- data = bq24193_get_reg(BQ24193_InputSource);
- data = (data & BQ24193_INCONFIG_VINDPM_MASK) >> 3;
- *value = 0;
- *value += ((data >> 0) & 1) ? 80 : 0;
- *value += ((data >> 1) & 1) ? 160 : 0;
- *value += ((data >> 2) & 1) ? 320 : 0;
- *value += ((data >> 3) & 1) ? 640 : 0;
- *value += 3880;
- break;
- case BQ24193_InputCurrentLimit: // Input current limit (mA).
- data = bq24193_get_reg(BQ24193_InputSource);
- data &= BQ24193_INCONFIG_INLIMIT_MASK;
- switch (data)
- {
- case 0:
- *value = 100;
- break;
- case 1:
- *value = 150;
- break;
- case 2:
- *value = 500;
- break;
- case 3:
- *value = 900;
- break;
- case 4:
- *value = 1200;
- break;
- case 5:
- *value = 1500;
- break;
- case 6:
- *value = 2000;
- break;
- case 7:
- *value = 3000;
- break;
- }
- break;
- case BQ24193_SystemMinimumVoltage: // Minimum system voltage limit (mV).
- data = bq24193_get_reg(BQ24193_PORConfig);
- *value = (data & BQ24193_PORCONFIG_SYSMIN_MASK) >> 1;
- *value *= 100;
- *value += 3000;
- break;
- case BQ24193_FastChargeCurrentLimit: // Fast charge current limit (mA).
- data = bq24193_get_reg(BQ24193_ChrgCurr);
- data = (data & BQ24193_CHRGCURR_ICHG_MASK) >> 2;
- *value = 0;
- *value += ((data >> 0) & 1) ? 64 : 0;
- *value += ((data >> 1) & 1) ? 128 : 0;
- *value += ((data >> 2) & 1) ? 256 : 0;
- *value += ((data >> 3) & 1) ? 512 : 0;
- *value += ((data >> 4) & 1) ? 1024 : 0;
- *value += ((data >> 5) & 1) ? 2048 : 0;
- *value += 512;
- data = bq24193_get_reg(BQ24193_ChrgCurr);
- data &= BQ24193_CHRGCURR_20PCT_MASK;
- if (data)
- *value = *value * 20 / 100; // Fast charge current limit is 20%.
- break;
- case BQ24193_ChargeVoltageLimit: // Charge voltage limit (mV).
- data = bq24193_get_reg(BQ24193_ChrgVolt);
- data = (data & BQ24193_CHRGVOLT_VREG) >> 2;
- *value = 0;
- *value += ((data >> 0) & 1) ? 16 : 0;
- *value += ((data >> 1) & 1) ? 32 : 0;
- *value += ((data >> 2) & 1) ? 64 : 0;
- *value += ((data >> 3) & 1) ? 128 : 0;
- *value += ((data >> 4) & 1) ? 256 : 0;
- *value += ((data >> 5) & 1) ? 512 : 0;
- *value += 3504;
- break;
- case BQ24193_RechargeThreshold: // Recharge voltage threshold less than voltage limit (mV).
- data = bq24193_get_reg(BQ24193_ChrgVolt);
- data &= BQ24193_IRTHERMAL_THERM_MASK;
- if (data)
- *value = 300;
- else
- *value = 100;
- break;
- case BQ24193_ThermalRegulation: // Thermal regulation threshold (oC).
- data = bq24193_get_reg(BQ24193_IRCompThermal);
- data &= BQ24193_IRTHERMAL_THERM_MASK;
- switch (data)
- {
- case 0:
- *value = 60;
- break;
- case 1:
- *value = 80;
- break;
- case 2:
- *value = 100;
- break;
- case 3:
- *value = 120;
- break;
- }
- break;
- case BQ24193_ChargeStatus: // 0: Not charging, 1: Pre-charge, 2: Fast charging, 3: Charge termination done
- data = bq24193_get_reg(BQ24193_Status);
- *value = (data & BQ24193_STATUS_CHRG_MASK) >> 4;
- break;
- case BQ24193_TempStatus: // 0: Normal, 2: Warm, 3: Cool, 5: Cold, 6: Hot.
- data = bq24193_get_reg(BQ24193_FaultReg);
- *value = data & BQ24193_FAULT_THERM_MASK;
- break;
- case BQ24193_DevID: // Dev ID.
- data = bq24193_get_reg(BQ24193_VendorPart);
- *value = data & BQ24193_VENDORPART_DEV_MASK;
- break;
- case BQ24193_ProductNumber: // Product number.
- data = bq24193_get_reg(BQ24193_VendorPart);
- *value = (data & BQ24193_VENDORPART_PN_MASK) >> 3;
- break;
- default:
- return -1;
- }
- return 0;
-}
-
-void bq24193_enable_charger()
-{
- u8 reg = bq24193_get_reg(BQ24193_PORConfig);
-
- reg &= ~BQ24193_PORCONFIG_CHGCONFIG_MASK;
- reg |= BQ24193_PORCONFIG_CHGCONFIG_CHARGER_EN;
-
- i2c_send_byte(I2C_1, BQ24193_I2C_ADDR, BQ24193_PORConfig, reg);
-}
-
-void bq24193_fake_battery_removal()
-{
- // Disable watchdog to keep BATFET disabled.
- u8 value = bq24193_get_reg(BQ24193_ChrgTermTimer);
- value &= ~BQ24193_CHRGTERM_WATCHDOG_MASK;
- i2c_send_byte(I2C_1, BQ24193_I2C_ADDR, BQ24193_ChrgTermTimer, value);
-
- // Force BATFET to disabled state. This disconnects the battery from the system.
- value = bq24193_get_reg(BQ24193_Misc);
- value |= BQ24193_MISC_BATFET_DI_MASK;
- i2c_send_byte(I2C_1, BQ24193_I2C_ADDR, BQ24193_Misc, value);
-}
diff --git a/nyx/nyx_gui/power/bq24193.h b/nyx/nyx_gui/power/bq24193.h
deleted file mode 100644
index 1b6e717..0000000
--- a/nyx/nyx_gui/power/bq24193.h
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * Battery charger driver for Nintendo Switch's TI BQ24193
- *
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef __BQ24193_H_
-#define __BQ24193_H_
-
-#define BQ24193_I2C_ADDR 0x6B
-
-// REG 0 masks.
-#define BQ24193_INCONFIG_INLIMIT_MASK (7<<0)
-#define BQ24193_INCONFIG_VINDPM_MASK 0x78
-#define BQ24193_INCONFIG_HIZ_EN_MASK (1<<7)
-
-// REG 1 masks.
-#define BQ24193_PORCONFIG_BOOST_MASK (1<<0)
-#define BQ24193_PORCONFIG_SYSMIN_MASK (7<<1)
-#define BQ24193_PORCONFIG_CHGCONFIG_MASK (3<<4)
-#define BQ24193_PORCONFIG_CHGCONFIG_CHARGER_EN (1<<4)
-#define BQ24193_PORCONFIG_I2CWATCHDOG_MASK (1<<6)
-#define BQ24193_PORCONFIG_RESET_MASK (1<<7)
-
-// REG 2 masks.
-#define BQ24193_CHRGCURR_20PCT_MASK (1<<0)
-#define BQ24193_CHRGCURR_ICHG_MASK 0xFC
-
-// REG 3 masks.
-#define BQ24193_PRECHRG_ITERM 0x0F
-#define BQ24193_PRECHRG_IPRECHG 0xF0
-
-// REG 4 masks.
-#define BQ24193_CHRGVOLT_VTHRES (1<<0)
-#define BQ24193_CHRGVOLT_BATTLOW (1<<1)
-#define BQ24193_CHRGVOLT_VREG 0xFC
-
-// REG 5 masks.
-#define BQ24193_CHRGTERM_ISET_MASK (1<<0)
-#define BQ24193_CHRGTERM_CHGTIMER_MASK (3<<1)
-#define BQ24193_CHRGTERM_ENTIMER_MASK (1<<3)
-#define BQ24193_CHRGTERM_WATCHDOG_MASK (3<<4)
-#define BQ24193_CHRGTERM_TERM_ST_MASK (1<<6)
-#define BQ24193_CHRGTERM_TERM_EN_MASK (1<<7)
-
-// REG 6 masks.
-#define BQ24193_IRTHERMAL_THERM_MASK (3<<0)
-#define BQ24193_IRTHERMAL_VCLAMP_MASK (7<<2)
-#define BQ24193_IRTHERMAL_BATTCOMP_MASK (7<<5)
-
-// REG 7 masks.
-#define BQ24193_MISC_INT_MASK (3<<0)
-#define BQ24193_MISC_VSET_MASK (1<<4)
-#define BQ24193_MISC_BATFET_DI_MASK (1<<5)
-#define BQ24193_MISC_TMR2X_EN_MASK (1<<6)
-#define BQ24193_MISC_DPDM_EN_MASK (1<<7)
-
-// REG 8 masks.
-#define BQ24193_STATUS_VSYS_MASK (1<<0)
-#define BQ24193_STATUS_THERM_MASK (1<<1)
-#define BQ24193_STATUS_PG_MASK (1<<2)
-#define BQ24193_STATUS_DPM_MASK (1<<3)
-#define BQ24193_STATUS_CHRG_MASK (3<<4)
-#define BQ24193_STATUS_VBUS_MASK (3<<6)
-
-// REG 9 masks.
-#define BQ24193_FAULT_THERM_MASK (7<<0)
-#define BQ24193_FAULT_BATT_OVP_MASK (1<<3)
-#define BQ24193_FAULT_CHARGE_MASK (3<<4)
-#define BQ24193_FAULT_BOOST_MASK (1<<6)
-#define BQ24193_FAULT_WATCHDOG_MASK (1<<7)
-
-// REG A masks.
-#define BQ24193_VENDORPART_DEV_MASK (3<<0)
-#define BQ24193_VENDORPART_PN_MASK (7<<3)
-
-enum BQ24193_reg {
- BQ24193_InputSource = 0x00,
- BQ24193_PORConfig = 0x01,
- BQ24193_ChrgCurr = 0x02,
- BQ24193_PreChrgTerm = 0x03,
- BQ24193_ChrgVolt = 0x04,
- BQ24193_ChrgTermTimer = 0x05,
- BQ24193_IRCompThermal = 0x06,
- BQ24193_Misc = 0x07,
- BQ24193_Status = 0x08,
- BQ24193_FaultReg = 0x09,
- BQ24193_VendorPart = 0x0A,
-};
-
-enum BQ24193_reg_prop {
- BQ24193_InputVoltageLimit, // REG 0.
- BQ24193_InputCurrentLimit, // REG 0.
- BQ24193_SystemMinimumVoltage, // REG 1.
- BQ24193_FastChargeCurrentLimit, // REG 2.
- BQ24193_ChargeVoltageLimit, // REG 4.
- BQ24193_RechargeThreshold, // REG 4.
- BQ24193_ThermalRegulation, // REG 6.
- BQ24193_ChargeStatus, // REG 8.
- BQ24193_TempStatus, // REG 9.
- BQ24193_DevID, // REG A.
- BQ24193_ProductNumber, // REG A.
-};
-
-int bq24193_get_property(enum BQ24193_reg_prop prop, int *value);
-void bq24193_enable_charger();
-void bq24193_fake_battery_removal();
-
-#endif /* __BQ24193_H_ */
diff --git a/nyx/nyx_gui/power/max17050.c b/nyx/nyx_gui/power/max17050.c
deleted file mode 100644
index f70cfec..0000000
--- a/nyx/nyx_gui/power/max17050.c
+++ /dev/null
@@ -1,279 +0,0 @@
-/*
- * Fuel gauge driver for Nintendo Switch's Maxim 17050
- *
- * Copyright (c) 2011 Samsung Electronics
- * MyungJoo Ham
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * This driver is based on max17040_battery.c
- */
-
-#include "max17050.h"
-#include "../soc/i2c.h"
-#include "../utils/util.h"
-
-/* Status register bits */
-#define STATUS_POR_BIT (1 << 1)
-#define STATUS_BST_BIT (1 << 3)
-#define STATUS_VMN_BIT (1 << 8)
-#define STATUS_TMN_BIT (1 << 9)
-#define STATUS_SMN_BIT (1 << 10)
-#define STATUS_BI_BIT (1 << 11)
-#define STATUS_VMX_BIT (1 << 12)
-#define STATUS_TMX_BIT (1 << 13)
-#define STATUS_SMX_BIT (1 << 14)
-#define STATUS_BR_BIT (1 << 15)
-
-#define VFSOC0_LOCK 0x0000
-#define VFSOC0_UNLOCK 0x0080
-
-#define MAX17050_VMAX_TOLERANCE 50 /* 50 mV */
-
-static u32 battery_voltage = 0;
-u32 max17050_get_cached_batt_volt()
-{
- return battery_voltage;
-}
-
-static u16 max17050_get_reg(u8 reg)
-{
- u16 data = 0;
-
- i2c_recv_buf_small((u8 *)&data, 2, I2C_1, MAXIM17050_I2C_ADDR, reg);
-
- return data;
-}
-
-int max17050_get_property(enum MAX17050_reg reg, int *value)
-{
- u16 data;
-
- switch (reg)
- {
- case MAX17050_Age: // Age (percent). Based on 100% x (FullCAP Register/DesignCap).
- data = max17050_get_reg(MAX17050_Age);
- *value = data >> 8; /* Show MSB. 1% increments */
- break;
- case MAX17050_Cycles: // Cycle count.
- *value = max17050_get_reg(MAX17050_Cycles);
- break;
- case MAX17050_MinVolt: // Voltage max/min
- data = max17050_get_reg(MAX17050_MinMaxVolt);
- *value = (data & 0xff) * 20; /* Voltage MIN. Units of 20mV */
- break;
- case MAX17050_MaxVolt: // Voltage max/min
- data = max17050_get_reg(MAX17050_MinMaxVolt);
- *value = (data >> 8) * 20; /* Voltage MAX. Units of LSB = 20mV */
- break;
- case MAX17050_V_empty: // Voltage min design.
- data = max17050_get_reg(MAX17050_V_empty);
- *value = (data >> 7) * 10; /* Units of LSB = 10mV */
- break;
- case MAX17050_VCELL: // Voltage now.
- data = max17050_get_reg(MAX17050_VCELL);
- *value = data * 625 / 8 / 1000;
- battery_voltage = *value;
- break;
- case MAX17050_AvgVCELL: // Voltage avg.
- data = max17050_get_reg(MAX17050_AvgVCELL);
- *value = data * 625 / 8 / 1000;
- break;
- case MAX17050_OCVInternal: // Voltage ocv.
- data = max17050_get_reg(MAX17050_OCVInternal);
- *value = data * 625 / 8 / 1000;
- break;
- case MAX17050_RepSOC: // Capacity %.
- *value = max17050_get_reg(MAX17050_RepSOC);
- break;
- case MAX17050_DesignCap: // Charge full design.
- data = max17050_get_reg(MAX17050_DesignCap);
- *value = data * 5 / 10;
- break;
- case MAX17050_FullCAP: // Charge full.
- data = max17050_get_reg(MAX17050_FullCAP);
- *value = data * 5 / 10;
- break;
- case MAX17050_RepCap: // Charge now.
- data = max17050_get_reg(MAX17050_RepCap);
- *value = data * 5 / 10;
- break;
- case MAX17050_TEMP: // Temp.
- data = max17050_get_reg(MAX17050_TEMP);
- *value = (s16)data;
- *value = *value * 10 / 256;
- break;
- case MAX17050_Current: // Current now.
- data = max17050_get_reg(MAX17050_Current);
- *value = (s16)data;
- *value *= 1562500 / MAX17050_DEFAULT_SNS_RESISTOR;
- break;
- case MAX17050_AvgCurrent: // Current avg.
- data = max17050_get_reg(MAX17050_AvgCurrent);
- *value = (s16)data;
- *value *= 1562500 / MAX17050_DEFAULT_SNS_RESISTOR;
- break;
- default:
- return -1;
- }
- return 0;
-}
-
-static int _max17050_write_verify_reg(u8 reg, u16 value)
-{
- int retries = 8;
- int ret;
- u16 read_value;
-
- do
- {
- ret = i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, reg, (u8 *)&value, 2);
- read_value = max17050_get_reg(reg);
- if (read_value != value)
- {
- ret = -1;
- retries--;
- }
- } while (retries && read_value != value);
-
- return ret;
-}
-
-static void _max17050_override_por(u8 reg, u16 value)
-{
- if (value)
- i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, reg, (u8 *)&value, 2);
-}
-
-static void _max17050_load_new_capacity_params()
-{
- u16 fullcap, repSoc, dq_acc, dp_acc;
-
- fullcap = 0x2476; // 4667mAh design capacity.
- dq_acc = 0x10bc; // From a healthy fuel gauge.
- dp_acc = 0x5e09; // =||=
- repSoc = 0x6400; // 100%.
-
- _max17050_write_verify_reg(MAX17050_RemCap, fullcap);
- _max17050_write_verify_reg(MAX17050_RepCap, fullcap);
-
- _max17050_write_verify_reg(MAX17050_dQacc, dq_acc);
- _max17050_write_verify_reg(MAX17050_dPacc, dp_acc);
-
- _max17050_write_verify_reg(MAX17050_FullCAP, fullcap);
- //i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_DesignCap, (u8 *)&fullcap, 2);
- _max17050_write_verify_reg(MAX17050_FullCAPNom, fullcap);
- /* Update SOC register with new SOC */
- i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_RepSOC, (u8 *)&repSoc, 2);
-}
-
-static void _max17050_reset_vfsoc0_reg()
-{
- u16 lockVal = 0;
- u16 vfSoc = 0x6440; // >100% for fully charged battery
-
- lockVal = VFSOC0_UNLOCK;
- i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_VFSOC0Enable, (u8 *)&lockVal, 2);
-
- _max17050_write_verify_reg(MAX17050_VFSOC0, vfSoc);
-
- lockVal = VFSOC0_LOCK;
- i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_VFSOC0Enable, (u8 *)&lockVal, 2);
-}
-
-static void _max17050_update_capacity_regs()
-{
- u16 value = 0x2476; // Set to 4667mAh design capacity.
- _max17050_write_verify_reg(MAX17050_FullCAP, value);
- _max17050_write_verify_reg(MAX17050_FullCAPNom, value);
- //i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_DesignCap, config->design_cap, 2);
-}
-
-static void _max17050_write_config_regs()
-{
- u16 value = 0;
-
- value = 0x7254;
- i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_CONFIG, (u8 *)&value, 2);
- value = 0x2473;
- i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_LearnCFG, (u8 *)&value, 2);
- //i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_FilterCFG, (u8 *)&value, 2)
- //i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_RelaxCFG, (u8 *)&value, 2)
- //i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_FullSOCThr, (u8 *)&value, 2)
-}
-
-/*
- * Block write all the override values coming from platform data.
- * This function MUST be called before the POR initialization proceedure
- * specified by maxim.
- */
-static void _max17050_override_por_values()
-{
- u16 dq_acc = 0x10bc; // From a healthy fuel gauge.
- u16 dp_acc = 0x5e09; // =||=
-
- _max17050_override_por(MAX17050_dQacc, dq_acc);
- _max17050_override_por(MAX17050_dPacc, dp_acc);
-
- //_max17050_override_por(MAX17050_RCOMP0, config->rcomp0); //0x58
- //_max17050_override_por(MAX17050_TempCo, config->tcompc0); //0x1b22
-
- //u16 k_empty0 = 0x439;
- //_max17050_override_por(map, MAX17050_K_empty0, k_empty0); // Unknown cell data
-}
-
-static void _max17050_set_por_bit(u16 value)
-{
- _max17050_write_verify_reg(MAX17050_STATUS, value);
-}
-
-int max17050_fix_configuration()
-{
- /* Init phase, set the POR bit */
- _max17050_set_por_bit(STATUS_POR_BIT);
-
- /* Override POR values */
- _max17050_override_por_values();
- /* After Power up, the MAX17050 requires 500ms in order
- * to perform signal debouncing and initial SOC reporting
- */
- msleep(500);
-
- /* Initialize configaration */
- _max17050_write_config_regs();
-
- /* update capacity params */
- _max17050_update_capacity_regs();
-
- /* delay must be atleast 350mS to allow VFSOC
- * to be calculated from the new configuration
- */
- msleep(350);
-
- /* reset vfsoc0 reg */
- _max17050_reset_vfsoc0_reg();
-
- /* load new capacity params */
- _max17050_load_new_capacity_params();
-
- /* Init complete, Clear the POR bit */
- //_max17050_set_por_bit(0); // Should we? Or let the switch to reconfigure POR?
-
- // Sets POR, BI, BR.
- _max17050_set_por_bit(0x8801);
-
- return 0;
-}
diff --git a/nyx/nyx_gui/power/max17050.h b/nyx/nyx_gui/power/max17050.h
deleted file mode 100644
index eb55e65..0000000
--- a/nyx/nyx_gui/power/max17050.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * Fuel gauge driver for Nintendo Switch's Maxim 17050
- * Note that Maxim 8966 and 8997 are mfd and this is its subdevice.
- *
- * Copyright (c) 2011 Samsung Electronics
- * MyungJoo Ham
- * Copyright (c) 2018-2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef __MAX17050_H_
-#define __MAX17050_H_
-
-#include "../utils/types.h"
-
-#define MAX17050_STATUS_BattAbsent (1 << 3)
-#define MAX17050_DEFAULT_SNS_RESISTOR 10000
-
-/* Consider RepCap which is less then 10 units below FullCAP full */
-#define MAX17050_FULL_THRESHOLD 10
-
-#define MAX17050_CHARACTERIZATION_DATA_SIZE 48
-
-#define MAXIM17050_I2C_ADDR 0x36
-
-enum MAX17050_reg {
- MAX17050_STATUS = 0x00,
- MAX17050_VALRT_Th = 0x01,
- MAX17050_TALRT_Th = 0x02,
- MAX17050_SALRT_Th = 0x03,
- MAX17050_AtRate = 0x04,
- MAX17050_RepCap = 0x05,
- MAX17050_RepSOC = 0x06,
- MAX17050_Age = 0x07,
- MAX17050_TEMP = 0x08,
- MAX17050_VCELL = 0x09,
- MAX17050_Current = 0x0A,
- MAX17050_AvgCurrent = 0x0B,
-
- MAX17050_SOC = 0x0D,
- MAX17050_AvSOC = 0x0E,
- MAX17050_RemCap = 0x0F,
- MAX17050_FullCAP = 0x10,
- MAX17050_TTE = 0x11,
- MAX17050_QRTbl00 = 0x12,
- MAX17050_FullSOCThr = 0x13,
- MAX17050_RSLOW = 0x14,
-
- MAX17050_AvgTA = 0x16,
- MAX17050_Cycles = 0x17,
- MAX17050_DesignCap = 0x18,
- MAX17050_AvgVCELL = 0x19,
- MAX17050_MinMaxTemp = 0x1A,
- MAX17050_MinMaxVolt = 0x1B,
- MAX17050_MinMaxCurr = 0x1C,
- MAX17050_CONFIG = 0x1D,
- MAX17050_ICHGTerm = 0x1E,
- MAX17050_AvCap = 0x1F,
- MAX17050_ManName = 0x20,
- MAX17050_DevName = 0x21,
- MAX17050_QRTbl10 = 0x22,
- MAX17050_FullCAPNom = 0x23,
- MAX17050_TempNom = 0x24,
- MAX17050_TempLim = 0x25,
- MAX17050_TempHot = 0x26,
- MAX17050_AIN = 0x27,
- MAX17050_LearnCFG = 0x28,
- MAX17050_FilterCFG = 0x29,
- MAX17050_RelaxCFG = 0x2A,
- MAX17050_MiscCFG = 0x2B,
- MAX17050_TGAIN = 0x2C,
- MAX17050_TOFF = 0x2D,
- MAX17050_CGAIN = 0x2E,
- MAX17050_COFF = 0x2F,
-
- MAX17050_QRTbl20 = 0x32,
- MAX17050_SOC_empty = 0x33,
- MAX17050_T_empty = 0x34,
- MAX17050_FullCAP0 = 0x35,
- MAX17050_LAvg_empty = 0x36,
- MAX17050_FCTC = 0x37,
- MAX17050_RCOMP0 = 0x38,
- MAX17050_TempCo = 0x39,
- MAX17050_V_empty = 0x3A,
- MAX17050_K_empty0 = 0x3B,
- MAX17050_TaskPeriod = 0x3C,
- MAX17050_FSTAT = 0x3D,
- MAX17050_TIMER = 0x3E,
- MAX17050_SHDNTIMER = 0x3F,
-
- MAX17050_QRTbl30 = 0x42,
-
- MAX17050_dQacc = 0x45,
- MAX17050_dPacc = 0x46,
-
- MAX17050_VFSOC0 = 0x48,
-
- Max17050_QH0 = 0x4C,
- MAX17050_QH = 0x4D,
- MAX17050_QL = 0x4E,
-
- MAX17050_MinVolt = 0x50, // Custom ID. Not to be sent to i2c.
- MAX17050_MaxVolt = 0x51, // Custom ID. Not to be sent to i2c.
-
- MAX17050_VFSOC0Enable = 0x60,
- MAX17050_MODELEnable1 = 0x62,
- MAX17050_MODELEnable2 = 0x63,
-
- MAX17050_MODELChrTbl = 0x80,
-
- MAX17050_OCV = 0xEE,
-
- MAX17050_OCVInternal = 0xFB,
-
- MAX17050_VFSOC = 0xFF,
-};
-
-int max17050_get_property(enum MAX17050_reg reg, int *value);
-int max17050_fix_configuration();
-u32 max17050_get_cached_batt_volt();
-
-#endif /* __MAX17050_H_ */
diff --git a/nyx/nyx_gui/power/max77620.h b/nyx/nyx_gui/power/max77620.h
deleted file mode 100644
index 26ea855..0000000
--- a/nyx/nyx_gui/power/max77620.h
+++ /dev/null
@@ -1,340 +0,0 @@
-/*
- * Defining registers address and its bit definitions of MAX77620 and MAX20024
- *
- * Copyright (c) 2016 NVIDIA CORPORATION. All rights reserved.
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- */
-
-#ifndef _MFD_MAX77620_H_
-#define _MFD_MAX77620_H_
-
-#define MAX77620_I2C_ADDR 0x3C
-
-/* GLOBAL, PMIC, GPIO, FPS, ONOFFC, CID Registers */
-#define MAX77620_REG_CNFGGLBL1 0x00
-#define MAX77620_CNFGGLBL1_LBDAC_EN (1 << 7)
-#define MAX77620_CNFGGLBL1_MPPLD (1 << 6)
-#define MAX77620_CNFGGLBL1_LBHYST ((1 << 5) | (1 << 4))
-#define MAX77620_CNFGGLBL1_LBHYST_100 (0 << 4)
-#define MAX77620_CNFGGLBL1_LBHYST_200 (1 << 4)
-#define MAX77620_CNFGGLBL1_LBHYST_300 (2 << 4)
-#define MAX77620_CNFGGLBL1_LBHYST_400 (3 << 4)
-#define MAX77620_CNFGGLBL1_LBDAC_MASK 0x0E
-#define MAX77620_CNFGGLBL1_LBDAC_2700 (0 << 1)
-#define MAX77620_CNFGGLBL1_LBDAC_2800 (1 << 1)
-#define MAX77620_CNFGGLBL1_LBDAC_2900 (2 << 1)
-#define MAX77620_CNFGGLBL1_LBDAC_3000 (3 << 1)
-#define MAX77620_CNFGGLBL1_LBDAC_3100 (4 << 1)
-#define MAX77620_CNFGGLBL1_LBDAC_3200 (5 << 1)
-#define MAX77620_CNFGGLBL1_LBDAC_3300 (6 << 1)
-#define MAX77620_CNFGGLBL1_LBDAC_3400 (7 << 1)
-#define MAX77620_CNFGGLBL1_LBRSTEN (1 << 0)
-
-#define MAX77620_REG_CNFGGLBL2 0x01
-#define MAX77620_REG_CNFGGLBL3 0x02
-#define MAX77620_WDTC_MASK 0x3
-#define MAX77620_WDTOFFC (1 << 4)
-#define MAX77620_WDTSLPC (1 << 3)
-#define MAX77620_WDTEN (1 << 2)
-#define MAX77620_TWD_MASK 0x3
-#define MAX77620_TWD_2s 0x0
-#define MAX77620_TWD_16s 0x1
-#define MAX77620_TWD_64s 0x2
-#define MAX77620_TWD_128s 0x3
-
-#define MAX77620_REG_CNFG1_32K 0x03
-#define MAX77620_CNFG1_32K_OUT0_EN (1 << 2)
-
-#define MAX77620_REG_CNFGBBC 0x04
-#define MAX77620_CNFGBBC_ENABLE (1 << 0)
-#define MAX77620_CNFGBBC_CURRENT_MASK 0x06
-#define MAX77620_CNFGBBC_CURRENT_SHIFT 1
-#define MAX77620_CNFGBBC_VOLTAGE_MASK 0x18
-#define MAX77620_CNFGBBC_VOLTAGE_SHIFT 3
-#define MAX77620_CNFGBBC_LOW_CURRENT_DISABLE (1 << 5)
-#define MAX77620_CNFGBBC_RESISTOR_MASK 0xC0
-#define MAX77620_CNFGBBC_RESISTOR_SHIFT 6
-#define MAX77620_CNFGBBC_RESISTOR_100 (0 << MAX77620_CNFGBBC_RESISTOR_SHIFT)
-#define MAX77620_CNFGBBC_RESISTOR_1K (1 << MAX77620_CNFGBBC_RESISTOR_SHIFT)
-#define MAX77620_CNFGBBC_RESISTOR_3K (2 << MAX77620_CNFGBBC_RESISTOR_SHIFT)
-#define MAX77620_CNFGBBC_RESISTOR_6K (3 << MAX77620_CNFGBBC_RESISTOR_SHIFT)
-
-#define MAX77620_REG_IRQTOP 0x05
-#define MAX77620_IRQ_TOP_GLBL_MASK (1 << 7)
-#define MAX77620_IRQ_TOP_SD_MASK (1 << 6)
-#define MAX77620_IRQ_TOP_LDO_MASK (1 << 5)
-#define MAX77620_IRQ_TOP_GPIO_MASK (1 << 4)
-#define MAX77620_IRQ_TOP_RTC_MASK (1 << 3)
-#define MAX77620_IRQ_TOP_32K_MASK (1 << 2)
-#define MAX77620_IRQ_TOP_ONOFF_MASK (1 << 1)
-
-#define MAX77620_REG_INTLBT 0x06
-#define MAX77620_REG_IRQTOPM 0x0D
-#define MAX77620_IRQ_LBM_MASK (1 << 3)
-#define MAX77620_IRQ_TJALRM1_MASK (1 << 2)
-#define MAX77620_IRQ_TJALRM2_MASK (1 << 1)
-
-#define MAX77620_REG_IRQSD 0x07
-#define MAX77620_REG_IRQ_LVL2_L0_7 0x08
-#define MAX77620_REG_IRQ_LVL2_L8 0x09
-#define MAX77620_REG_IRQ_LVL2_GPIO 0x0A
-#define MAX77620_REG_ONOFFIRQ 0x0B
-#define MAX77620_REG_NVERC 0x0C
-
-#define MAX77620_REG_INTENLBT 0x0E
-#define MAX77620_GLBLM_MASK (1 << 0)
-
-#define MAX77620_REG_IRQMASKSD 0x0F
-#define MAX77620_REG_IRQ_MSK_L0_7 0x10
-#define MAX77620_REG_IRQ_MSK_L8 0x11
-#define MAX77620_REG_ONOFFIRQM 0x12
-#define MAX77620_REG_STATLBT 0x13
-#define MAX77620_REG_STATSD 0x14
-#define MAX77620_REG_ONOFFSTAT 0x15
-
-/* SD and LDO Registers */
-#define MAX77620_REG_SD0 0x16
-#define MAX77620_REG_SD1 0x17
-#define MAX77620_REG_SD2 0x18
-#define MAX77620_REG_SD3 0x19
-#define MAX77620_REG_SD4 0x1A
-#define MAX77620_SDX_VOLT_MASK 0xFF
-#define MAX77620_SD0_VOLT_MASK 0x3F
-#define MAX77620_SD1_VOLT_MASK 0x7F
-#define MAX77620_LDO_VOLT_MASK 0x3F
-#define MAX77620_REG_DVSSD0 0x1B
-#define MAX77620_REG_DVSSD1 0x1C
-#define MAX77620_REG_SD0_CFG 0x1D
-#define MAX77620_REG_SD1_CFG 0x1E
-#define MAX77620_REG_SD2_CFG 0x1F
-#define MAX77620_REG_SD3_CFG 0x20
-#define MAX77620_REG_SD4_CFG 0x21
-#define MAX77620_REG_SD_CFG2 0x22
-#define MAX77620_REG_LDO0_CFG 0x23
-#define MAX77620_REG_LDO0_CFG2 0x24
-#define MAX77620_REG_LDO1_CFG 0x25
-#define MAX77620_REG_LDO1_CFG2 0x26
-#define MAX77620_REG_LDO2_CFG 0x27
-#define MAX77620_REG_LDO2_CFG2 0x28
-#define MAX77620_REG_LDO3_CFG 0x29
-#define MAX77620_REG_LDO3_CFG2 0x2A
-#define MAX77620_REG_LDO4_CFG 0x2B
-#define MAX77620_REG_LDO4_CFG2 0x2C
-#define MAX77620_REG_LDO5_CFG 0x2D
-#define MAX77620_REG_LDO5_CFG2 0x2E
-#define MAX77620_REG_LDO6_CFG 0x2F
-#define MAX77620_REG_LDO6_CFG2 0x30
-#define MAX77620_REG_LDO7_CFG 0x31
-#define MAX77620_REG_LDO7_CFG2 0x32
-#define MAX77620_REG_LDO8_CFG 0x33
-#define MAX77620_REG_LDO8_CFG2 0x34
-#define MAX77620_LDO_POWER_MODE_MASK 0xC0
-#define MAX77620_LDO_POWER_MODE_SHIFT 6
-#define MAX77620_POWER_MODE_NORMAL 3
-#define MAX77620_POWER_MODE_LPM 2
-#define MAX77620_POWER_MODE_GLPM 1
-#define MAX77620_POWER_MODE_DISABLE 0
-#define MAX20024_LDO_CFG2_MPOK_MASK (1 << 2)
-#define MAX77620_LDO_CFG2_ADE_MASK (1 << 1)
-#define MAX77620_LDO_CFG2_ADE_DISABLE (0 << 1)
-#define MAX77620_LDO_CFG2_ADE_ENABLE (1 << 1)
-#define MAX77620_LDO_CFG2_SS_MASK (1 << 0)
-#define MAX77620_LDO_CFG2_SS_FAST (1 << 0)
-#define MAX77620_LDO_CFG2_SS_SLOW 0
-
-#define MAX77620_REG_LDO_CFG3 0x35
-#define MAX77620_TRACK4_MASK (1 << 5)
-#define MAX77620_TRACK4_SHIFT 5
-
-#define MAX77620_LDO_SLEW_RATE_MASK 0x1
-
-#define MAX77620_REG_GPIO0 0x36
-#define MAX77620_REG_GPIO1 0x37
-#define MAX77620_REG_GPIO2 0x38
-#define MAX77620_REG_GPIO3 0x39
-#define MAX77620_REG_GPIO4 0x3A
-#define MAX77620_REG_GPIO5 0x3B
-#define MAX77620_REG_GPIO6 0x3C
-#define MAX77620_REG_GPIO7 0x3D
-#define MAX77620_REG_PUE_GPIO 0x3E
-#define MAX77620_REG_PDE_GPIO 0x3F
-#define MAX77620_REG_AME_GPIO 0x40
-#define MAX77620_CNFG_GPIO_DRV_MASK (1 << 0)
-#define MAX77620_CNFG_GPIO_DRV_PUSHPULL (1 << 0)
-#define MAX77620_CNFG_GPIO_DRV_OPENDRAIN (0 << 0)
-#define MAX77620_CNFG_GPIO_DIR_MASK (1 << 1)
-#define MAX77620_CNFG_GPIO_DIR_INPUT (1 << 1)
-#define MAX77620_CNFG_GPIO_DIR_OUTPUT (0 << 1)
-#define MAX77620_CNFG_GPIO_INPUT_VAL_MASK (1 << 2)
-#define MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK (1 << 3)
-#define MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH (1 << 3)
-#define MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW (0 << 3)
-#define MAX77620_CNFG_GPIO_INT_MASK (0x3 << 4)
-#define MAX77620_CNFG_GPIO_INT_FALLING (1 << 4)
-#define MAX77620_CNFG_GPIO_INT_RISING (1 << 5)
-#define MAX77620_CNFG_GPIO_DBNC_MASK (0x3 << 6)
-#define MAX77620_CNFG_GPIO_DBNC_None (0x0 << 6)
-#define MAX77620_CNFG_GPIO_DBNC_8ms (0x1 << 6)
-#define MAX77620_CNFG_GPIO_DBNC_16ms (0x2 << 6)
-#define MAX77620_CNFG_GPIO_DBNC_32ms (0x3 << 6)
-
-#define MAX77620_REG_ONOFFCNFG1 0x41
-#define MAX77620_ONOFFCNFG1_SFT_RST (1 << 7)
-#define MAX77620_ONOFFCNFG1_MRT_MASK 0x38
-#define MAX77620_ONOFFCNFG1_MRT_SHIFT 0x3
-#define MAX77620_ONOFFCNFG1_SLPEN (1 << 2)
-#define MAX77620_ONOFFCNFG1_PWR_OFF (1 << 1)
-#define MAX20024_ONOFFCNFG1_CLRSE 0x18
-
-#define MAX77620_REG_ONOFFCNFG2 0x42
-#define MAX77620_ONOFFCNFG2_SFT_RST_WK (1 << 7)
-#define MAX77620_ONOFFCNFG2_WD_RST_WK (1 << 6)
-#define MAX77620_ONOFFCNFG2_SLP_LPM_MSK (1 << 5)
-#define MAX77620_ONOFFCNFG2_WK_ALARM1 (1 << 2)
-#define MAX77620_ONOFFCNFG2_WK_EN0 (1 << 0)
-
-/* FPS Registers */
-#define MAX77620_REG_FPS_CFG0 0x43
-#define MAX77620_REG_FPS_CFG1 0x44
-#define MAX77620_REG_FPS_CFG2 0x45
-#define MAX77620_REG_FPS_LDO0 0x46
-#define MAX77620_REG_FPS_LDO1 0x47
-#define MAX77620_REG_FPS_LDO2 0x48
-#define MAX77620_REG_FPS_LDO3 0x49
-#define MAX77620_REG_FPS_LDO4 0x4A
-#define MAX77620_REG_FPS_LDO5 0x4B
-#define MAX77620_REG_FPS_LDO6 0x4C
-#define MAX77620_REG_FPS_LDO7 0x4D
-#define MAX77620_REG_FPS_LDO8 0x4E
-#define MAX77620_REG_FPS_SD0 0x4F
-#define MAX77620_REG_FPS_SD1 0x50
-#define MAX77620_REG_FPS_SD2 0x51
-#define MAX77620_REG_FPS_SD3 0x52
-#define MAX77620_REG_FPS_SD4 0x53
-#define MAX77620_REG_FPS_NONE 0
-#define MAX77620_FPS_SRC_MASK 0xC0
-#define MAX77620_FPS_SRC_SHIFT 6
-#define MAX77620_FPS_PU_PERIOD_MASK 0x38
-#define MAX77620_FPS_PU_PERIOD_SHIFT 3
-#define MAX77620_FPS_PD_PERIOD_MASK 0x07
-#define MAX77620_FPS_PD_PERIOD_SHIFT 0
-
-/* Minimum and maximum FPS period time (in microseconds) are
- * different for MAX77620 and Max20024.
- */
-#define MAX77620_FPS_COUNT 3
-
-#define MAX77620_FPS_PERIOD_MIN_US 40
-#define MAX20024_FPS_PERIOD_MIN_US 20
-
-#define MAX77620_FPS_PERIOD_MAX_US 2560
-#define MAX20024_FPS_PERIOD_MAX_US 5120
-
-#define MAX77620_REG_FPS_GPIO1 0x54
-#define MAX77620_REG_FPS_GPIO2 0x55
-#define MAX77620_REG_FPS_GPIO3 0x56
-#define MAX77620_FPS_TIME_PERIOD_MASK 0x38
-#define MAX77620_FPS_TIME_PERIOD_SHIFT 3
-#define MAX77620_FPS_EN_SRC_MASK 0x06
-#define MAX77620_FPS_EN_SRC_SHIFT 1
-#define MAX77620_FPS_ENFPS_SW_MASK 0x01
-#define MAX77620_FPS_ENFPS_SW 0x01
-
-#define MAX77620_REG_FPS_RSO 0x57
-#define MAX77620_REG_CID0 0x58
-#define MAX77620_REG_CID1 0x59
-#define MAX77620_REG_CID2 0x5A
-#define MAX77620_REG_CID3 0x5B
-#define MAX77620_REG_CID4 0x5C
-#define MAX77620_REG_CID5 0x5D
-
-#define MAX77620_REG_DVSSD4 0x5E
-#define MAX20024_REG_MAX_ADD 0x70
-
-#define MAX77620_CID_DIDM_MASK 0xF0
-#define MAX77620_CID_DIDM_SHIFT 4
-
-/* CNCG2SD */
-#define MAX77620_SD_CNF2_ROVS_EN_SD1 (1 << 1)
-#define MAX77620_SD_CNF2_ROVS_EN_SD0 (1 << 2)
-
-/* Device Identification Metal */
-#define MAX77620_CID5_DIDM(n) (((n) >> 4) & 0xF)
-/* Device Indentification OTP */
-#define MAX77620_CID5_DIDO(n) ((n) & 0xF)
-
-/* SD CNFG1 */
-#define MAX77620_SD_SR_MASK 0xC0
-#define MAX77620_SD_SR_SHIFT 6
-#define MAX77620_SD_POWER_MODE_MASK 0x30
-#define MAX77620_SD_POWER_MODE_SHIFT 4
-#define MAX77620_SD_CFG1_ADE_MASK (1 << 3)
-#define MAX77620_SD_CFG1_ADE_DISABLE 0
-#define MAX77620_SD_CFG1_ADE_ENABLE (1 << 3)
-#define MAX77620_SD_FPWM_MASK 0x04
-#define MAX77620_SD_FPWM_SHIFT 2
-#define MAX77620_SD_FSRADE_MASK 0x01
-#define MAX77620_SD_FSRADE_SHIFT 0
-#define MAX77620_SD_CFG1_FPWM_SD_MASK (1 << 2)
-#define MAX77620_SD_CFG1_FPWM_SD_SKIP 0
-#define MAX77620_SD_CFG1_FPWM_SD_FPWM (1 << 2)
-#define MAX20024_SD_CFG1_MPOK_MASK (1 << 1)
-#define MAX77620_SD_CFG1_FSRADE_SD_MASK (1 << 0)
-#define MAX77620_SD_CFG1_FSRADE_SD_DISABLE 0
-#define MAX77620_SD_CFG1_FSRADE_SD_ENABLE (1 << 0)
-
-#define MAX77620_IRQ_LVL2_GPIO_EDGE0 (1 << 0)
-#define MAX77620_IRQ_LVL2_GPIO_EDGE1 (1 << 1)
-#define MAX77620_IRQ_LVL2_GPIO_EDGE2 (1 << 2)
-#define MAX77620_IRQ_LVL2_GPIO_EDGE3 (1 << 3)
-#define MAX77620_IRQ_LVL2_GPIO_EDGE4 (1 << 4)
-#define MAX77620_IRQ_LVL2_GPIO_EDGE5 (1 << 5)
-#define MAX77620_IRQ_LVL2_GPIO_EDGE6 (1 << 6)
-#define MAX77620_IRQ_LVL2_GPIO_EDGE7 (1 << 7)
-
-/* Interrupts */
-enum {
- MAX77620_IRQ_TOP_GLBL, /* Low-Battery */
- MAX77620_IRQ_TOP_SD, /* SD power fail */
- MAX77620_IRQ_TOP_LDO, /* LDO power fail */
- MAX77620_IRQ_TOP_GPIO, /* TOP GPIO internal int to MAX77620 */
- MAX77620_IRQ_TOP_RTC, /* RTC */
- MAX77620_IRQ_TOP_32K, /* 32kHz oscillator */
- MAX77620_IRQ_TOP_ONOFF, /* ON/OFF oscillator */
- MAX77620_IRQ_LBT_MBATLOW, /* Thermal alarm status, > 120C */
- MAX77620_IRQ_LBT_TJALRM1, /* Thermal alarm status, > 120C */
- MAX77620_IRQ_LBT_TJALRM2, /* Thermal alarm status, > 140C */
-};
-
-/* GPIOs */
-enum {
- MAX77620_GPIO0,
- MAX77620_GPIO1,
- MAX77620_GPIO2,
- MAX77620_GPIO3,
- MAX77620_GPIO4,
- MAX77620_GPIO5,
- MAX77620_GPIO6,
- MAX77620_GPIO7,
- MAX77620_GPIO_NR,
-};
-
-/* FPS Source */
-enum max77620_fps_src {
- MAX77620_FPS_SRC_0,
- MAX77620_FPS_SRC_1,
- MAX77620_FPS_SRC_2,
- MAX77620_FPS_SRC_NONE,
- MAX77620_FPS_SRC_DEF,
-};
-
-enum max77620_chip_id {
- MAX77620,
- MAX20024,
-};
-
-#endif /* _MFD_MAX77620_H_ */
diff --git a/nyx/nyx_gui/power/max7762x.c b/nyx/nyx_gui/power/max7762x.c
deleted file mode 100644
index ce07cbe..0000000
--- a/nyx/nyx_gui/power/max7762x.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "max7762x.h"
-#include "max77620.h"
-#include "../soc/i2c.h"
-#include "../utils/util.h"
-
-#define REGULATOR_SD 0
-#define REGULATOR_LDO 1
-
-typedef struct _max77620_regulator_t
-{
- u8 type;
- const char *name;
- u8 reg_sd;
-
- u32 mv_step;
- u32 mv_min;
- u32 mv_default;
- u32 mv_max;
-
- u8 volt_addr;
- u8 cfg_addr;
-
- u8 volt_mask;
- u8 enable_mask;
- u8 enable_shift;
- u8 status_mask;
-
- u8 fps_addr;
- u8 fps_src;
- u8 pd_period;
- u8 pu_period;
-} max77620_regulator_t;
-
-static const max77620_regulator_t _pmic_regulators[] = {
- { REGULATOR_SD, "sd0", 0x16, 12500, 600000, 625000, 1400000, MAX77620_REG_SD0, MAX77620_REG_SD0_CFG, MAX77620_SD0_VOLT_MASK, MAX77620_SD_POWER_MODE_MASK, MAX77620_SD_POWER_MODE_SHIFT, 0x80, MAX77620_REG_FPS_SD0, 1, 7, 1 },
- { REGULATOR_SD, "sd1", 0x17, 12500, 600000, 1125000, 1125000, MAX77620_REG_SD1, MAX77620_REG_SD1_CFG, MAX77620_SD1_VOLT_MASK, MAX77620_SD_POWER_MODE_MASK, MAX77620_SD_POWER_MODE_SHIFT, 0x40, MAX77620_REG_FPS_SD1, 0, 1, 5 },
- { REGULATOR_SD, "sd2", 0x18, 12500, 600000, 1325000, 1350000, MAX77620_REG_SD2, MAX77620_REG_SD2_CFG, MAX77620_SDX_VOLT_MASK, MAX77620_SD_POWER_MODE_MASK, MAX77620_SD_POWER_MODE_SHIFT, 0x20, MAX77620_REG_FPS_SD2, 1, 5, 2 },
- { REGULATOR_SD, "sd3", 0x19, 12500, 600000, 1800000, 1800000, MAX77620_REG_SD3, MAX77620_REG_SD3_CFG, MAX77620_SDX_VOLT_MASK, MAX77620_SD_POWER_MODE_MASK, MAX77620_SD_POWER_MODE_SHIFT, 0x10, MAX77620_REG_FPS_SD3, 0, 3, 3 },
- { REGULATOR_LDO, "ldo0", 0x00, 25000, 800000, 1200000, 1200000, MAX77620_REG_LDO0_CFG, MAX77620_REG_LDO0_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00, MAX77620_REG_FPS_LDO0, 3, 7, 0 },
- { REGULATOR_LDO, "ldo1", 0x00, 25000, 800000, 1050000, 1050000, MAX77620_REG_LDO1_CFG, MAX77620_REG_LDO1_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00, MAX77620_REG_FPS_LDO1, 3, 7, 0 },
- { REGULATOR_LDO, "ldo2", 0x00, 50000, 800000, 1800000, 3300000, MAX77620_REG_LDO2_CFG, MAX77620_REG_LDO2_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00, MAX77620_REG_FPS_LDO2, 3, 7, 0 },
- { REGULATOR_LDO, "ldo3", 0x00, 50000, 800000, 3100000, 3100000, MAX77620_REG_LDO3_CFG, MAX77620_REG_LDO3_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00, MAX77620_REG_FPS_LDO3, 3, 7, 0 },
- { REGULATOR_LDO, "ldo4", 0x00, 12500, 800000, 850000, 850000, MAX77620_REG_LDO4_CFG, MAX77620_REG_LDO4_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00, MAX77620_REG_FPS_LDO4, 0, 7, 1 },
- { REGULATOR_LDO, "ldo5", 0x00, 50000, 800000, 1800000, 1800000, MAX77620_REG_LDO5_CFG, MAX77620_REG_LDO5_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00, MAX77620_REG_FPS_LDO5, 3, 7, 0 },
- { REGULATOR_LDO, "ldo6", 0x00, 50000, 800000, 2900000, 2900000, MAX77620_REG_LDO6_CFG, MAX77620_REG_LDO6_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00, MAX77620_REG_FPS_LDO6, 3, 7, 0 },
- { REGULATOR_LDO, "ldo7", 0x00, 50000, 800000, 1050000, 1050000, MAX77620_REG_LDO7_CFG, MAX77620_REG_LDO7_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00, MAX77620_REG_FPS_LDO7, 1, 4, 3 },
- { REGULATOR_LDO, "ldo8", 0x00, 50000, 800000, 1050000, 1050000, MAX77620_REG_LDO8_CFG, MAX77620_REG_LDO8_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00, MAX77620_REG_FPS_LDO8, 3, 7, 0 }
-};
-
-static void _max77620_try_set_reg(u8 reg, u8 val)
-{
- u8 tmp;
- do
- {
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, reg, val);
- tmp = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, reg);
- } while (val != tmp);
-}
-
-int max77620_regulator_get_status(u32 id)
-{
- if (id > REGULATOR_MAX)
- return 0;
-
- const max77620_regulator_t *reg = &_pmic_regulators[id];
-
- if (reg->type == REGULATOR_SD)
- return (i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_STATSD) & reg->status_mask) ? 0 : 1;
- return (i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, reg->cfg_addr) & 8) ? 1 : 0;
-}
-
-int max77620_regulator_config_fps(u32 id)
-{
- if (id > REGULATOR_MAX)
- return 0;
-
- const max77620_regulator_t *reg = &_pmic_regulators[id];
-
- _max77620_try_set_reg(reg->fps_addr,
- (reg->fps_src << MAX77620_FPS_SRC_SHIFT) | (reg->pu_period << MAX77620_FPS_PU_PERIOD_SHIFT) | (reg->pd_period));
-
- return 1;
-}
-
-int max77620_regulator_set_voltage(u32 id, u32 mv)
-{
- if (id > REGULATOR_MAX)
- return 0;
-
- const max77620_regulator_t *reg = &_pmic_regulators[id];
-
- if (mv < reg->mv_min || mv > reg->mv_max)
- return 0;
-
- u32 mult = (mv + reg->mv_step - 1 - reg->mv_min) / reg->mv_step;
- u8 val = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, reg->volt_addr);
- val = (val & ~reg->volt_mask) | (mult & reg->volt_mask);
- _max77620_try_set_reg(reg->volt_addr, val);
- usleep(1000);
-
- return 1;
-}
-
-int max77620_regulator_enable(u32 id, int enable)
-{
- if (id > REGULATOR_MAX)
- return 0;
-
- const max77620_regulator_t *reg = &_pmic_regulators[id];
-
- u32 addr = reg->type == REGULATOR_SD ? reg->cfg_addr : reg->volt_addr;
- u8 val = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, addr);
- if (enable)
- val = (val & ~reg->enable_mask) | ((MAX77620_POWER_MODE_NORMAL << reg->enable_shift) & reg->enable_mask);
- else
- val &= ~reg->enable_mask;
- _max77620_try_set_reg(addr, val);
- usleep(1000);
-
- return 1;
-}
-
-// LDO only.
-int max77620_regulator_set_volt_and_flags(u32 id, u32 mv, u8 flags)
-{
- if (id > REGULATOR_MAX)
- return 0;
-
- const max77620_regulator_t *reg = &_pmic_regulators[id];
-
- if (mv < reg->mv_min || mv > reg->mv_max)
- return 0;
-
- u32 mult = (mv + reg->mv_step - 1 - reg->mv_min) / reg->mv_step;
- u8 val = ((flags << reg->enable_shift) & ~reg->volt_mask) | (mult & reg->volt_mask);
- _max77620_try_set_reg(reg->volt_addr, val);
- usleep(1000);
-
- return 1;
-}
-
-void max77620_config_default()
-{
- for (u32 i = 1; i <= REGULATOR_MAX; i++)
- {
- i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CID4);
- max77620_regulator_config_fps(i);
- max77620_regulator_set_voltage(i, _pmic_regulators[i].mv_default);
- if (_pmic_regulators[i].fps_src != MAX77620_FPS_SRC_NONE)
- max77620_regulator_enable(i, 1);
- }
- _max77620_try_set_reg(MAX77620_REG_SD_CFG2, 4);
-}
-
-void max77620_low_battery_monitor_config(bool enable)
-{
- _max77620_try_set_reg(MAX77620_REG_CNFGGLBL1,
- MAX77620_CNFGGLBL1_LBDAC_EN | (enable ? MAX77620_CNFGGLBL1_MPPLD : 0) |
- MAX77620_CNFGGLBL1_LBHYST_200 | MAX77620_CNFGGLBL1_LBDAC_2800);
-}
diff --git a/nyx/nyx_gui/power/max7762x.h b/nyx/nyx_gui/power/max7762x.h
deleted file mode 100644
index aefe892..0000000
--- a/nyx/nyx_gui/power/max7762x.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _MAX7762X_H_
-#define _MAX7762X_H_
-
-#include "../utils/types.h"
-
-/*
-* Switch Power domains (max77620):
-* Name | Usage | uV step | uV min | uV default | uV max | Init
-*-------+---------------+---------+--------+------------+---------+------------------
-* sd0 | SoC | 12500 | 600000 | 625000 | 1400000 | 1.125V (pkg1.1)
-* sd1 | SDRAM | 12500 | 600000 | 1125000 | 1125000 | 1.1V (pkg1.1)
-* sd2 | ldo{0-1, 7-8} | 12500 | 600000 | 1325000 | 1350000 | 1.325V (pcv)
-* sd3 | 1.8V general | 12500 | 600000 | 1800000 | 1800000 |
-* ldo0 | Display Panel | 25000 | 800000 | 1200000 | 1200000 | 1.2V (pkg1.1)
-* ldo1 | XUSB, PCIE | 25000 | 800000 | 1050000 | 1050000 | 1.05V (pcv)
-* ldo2 | SDMMC1 | 50000 | 800000 | 1800000 | 3300000 |
-* ldo3 | GC ASIC | 50000 | 800000 | 3100000 | 3100000 | 3.1V (pcv)
-* ldo4 | RTC | 12500 | 800000 | 850000 | 850000 |
-* ldo5 | GC Card | 50000 | 800000 | 1800000 | 1800000 | 1.8V (pcv)
-* ldo6 | Touch, ALS | 50000 | 800000 | 2900000 | 2900000 | 2.9V
-* ldo7 | XUSB | 50000 | 800000 | 1050000 | 1050000 |
-* ldo8 | XUSB, DC | 50000 | 800000 | 1050000 | 1050000 |
-*/
-
-/*
-* MAX77620_AME_GPIO: control GPIO modes (bits 0 - 7 correspond to GPIO0 - GPIO7); 0 -> GPIO, 1 -> alt-mode
-* MAX77620_REG_GPIOx: 0x9 sets output and enable
-*/
-
-/*! MAX77620 partitions. */
-#define REGULATOR_SD0 0
-#define REGULATOR_SD1 1
-#define REGULATOR_SD2 2
-#define REGULATOR_SD3 3
-#define REGULATOR_LDO0 4
-#define REGULATOR_LDO1 5
-#define REGULATOR_LDO2 6
-#define REGULATOR_LDO3 7
-#define REGULATOR_LDO4 8
-#define REGULATOR_LDO5 9
-#define REGULATOR_LDO6 10
-#define REGULATOR_LDO7 11
-#define REGULATOR_LDO8 12
-#define REGULATOR_MAX 12
-
-#define MAX77621_CPU_I2C_ADDR 0x1B
-#define MAX77621_GPU_I2C_ADDR 0x1C
-
-#define MAX77621_VOUT_REG 0
-#define MAX77621_VOUT_DVS_REG 1
-#define MAX77621_CONTROL1_REG 2
-#define MAX77621_CONTROL2_REG 3
-
-/* MAX77621_VOUT */
-#define MAX77621_VOUT_ENABLE (1 << 7)
-#define MAX77621_VOUT_MASK 0x7F
-#define MAX77621_VOUT_0_95V 0x37
-#define MAX77621_VOUT_1_09V 0x4F
-
-/* MAX77621_VOUT_DVC_DVS */
-#define MAX77621_DVS_VOUT_MASK 0x7F
-
-/* MAX77621_CONTROL1 */
-#define MAX77621_SNS_ENABLE (1 << 7)
-#define MAX77621_FPWM_EN_M (1 << 6)
-#define MAX77621_NFSR_ENABLE (1 << 5)
-#define MAX77621_AD_ENABLE (1 << 4)
-#define MAX77621_BIAS_ENABLE (1 << 3)
-#define MAX77621_FREQSHIFT_9PER (1 << 2)
-
-#define MAX77621_RAMP_12mV_PER_US 0x0
-#define MAX77621_RAMP_25mV_PER_US 0x1
-#define MAX77621_RAMP_50mV_PER_US 0x2
-#define MAX77621_RAMP_200mV_PER_US 0x3
-#define MAX77621_RAMP_MASK 0x3
-
-/* MAX77621_CONTROL2 */
-#define MAX77621_WDTMR_ENABLE (1 << 6)
-#define MAX77621_DISCH_ENBABLE (1 << 5)
-#define MAX77621_FT_ENABLE (1 << 4)
-#define MAX77621_T_JUNCTION_120 (1 << 7)
-
-#define MAX77621_CKKADV_TRIP_DISABLE 0xC
-#define MAX77621_CKKADV_TRIP_75mV_PER_US 0x0
-#define MAX77621_CKKADV_TRIP_150mV_PER_US 0x4
-#define MAX77621_CKKADV_TRIP_75mV_PER_US_HIST_DIS 0x8
-
-#define MAX77621_INDUCTOR_MIN_30_PER 0x0
-#define MAX77621_INDUCTOR_NOMINAL 0x1
-#define MAX77621_INDUCTOR_PLUS_30_PER 0x2
-#define MAX77621_INDUCTOR_PLUS_60_PER 0x3
-
-int max77620_regulator_get_status(u32 id);
-int max77620_regulator_config_fps(u32 id);
-int max77620_regulator_set_voltage(u32 id, u32 mv);
-int max77620_regulator_enable(u32 id, int enable);
-int max77620_regulator_set_volt_and_flags(u32 id, u32 mv, u8 flags);
-void max77620_config_default();
-void max77620_low_battery_monitor_config(bool enable);
-
-#endif
diff --git a/nyx/nyx_gui/rtc/max77620-rtc.c b/nyx/nyx_gui/rtc/max77620-rtc.c
deleted file mode 100644
index 04c6937..0000000
--- a/nyx/nyx_gui/rtc/max77620-rtc.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * PMIC Real Time Clock driver for Nintendo Switch's MAX77620-RTC
- *
- * Copyright (c) 2018-2019 CTCaer
- * Copyright (c) 2019 shchmue
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "max77620-rtc.h"
-#include "../soc/i2c.h"
-#include "../utils/util.h"
-
-void max77620_rtc_get_time(rtc_time_t *time)
-{
- u8 val = 0;
-
- // Update RTC regs from RTC clock.
- i2c_send_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_UPDATE0_REG, MAX77620_RTC_READ_UPDATE);
-
- // Get control reg config.
- val = i2c_recv_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_CONTROL_REG);
- // TODO: Check for binary format also?
-
- // Get time.
- time->sec = i2c_recv_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_SEC_REG) & 0x7F;
- time->min = i2c_recv_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_MIN_REG) & 0x7F;
- u8 hour = i2c_recv_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_HOUR_REG);
- time->hour = hour & 0x1F;
-
- if (!(val & MAX77620_RTC_24H) && (hour & MAX77620_RTC_HOUR_PM_MASK))
- time->hour = (time->hour & 0xF) + 12;
-
- // Get day of week. 1: Monday to 7: Sunday.
- time->weekday = 0;
- val = i2c_recv_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_WEEKDAY_REG);
- for (int i = 0; i < 8; i++)
- {
- time->weekday++;
- if (val & 1)
- break;
- val >>= 1;
- }
-
- // Get date.
- time->day = i2c_recv_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_DATE_REG) & 0x1f;
- time->month = (i2c_recv_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_MONTH_REG) & 0xF) - 1;
- time->year = (i2c_recv_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_YEAR_REG) & 0x7F) + 2000;
-}
-
-void max77620_rtc_stop_alarm()
-{
- u8 val = 0;
-
- // Update RTC regs from RTC clock.
- i2c_send_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_UPDATE0_REG, MAX77620_RTC_READ_UPDATE);
-
- // Stop alarm for both ALARM1 and ALARM2. Horizon uses ALARM2.
- for (int i = 0; i < (MAX77620_RTC_NR_TIME_REGS * 2); i++)
- {
- val = i2c_recv_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_ALARM1_SEC_REG + i);
- val &= ~MAX77620_RTC_ALARM_EN_MASK;
- i2c_send_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_ALARM1_SEC_REG + i, val);
- }
-
- // Update RTC clock from RTC regs.
- i2c_send_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_UPDATE0_REG, MAX77620_RTC_WRITE_UPDATE);
-}
-
-void max77620_rtc_epoch_to_date(u32 epoch, rtc_time_t *time)
-{
- u32 tmp, edays, year, month, day;
-
- // Set time.
- time->sec = epoch % 60;
- epoch /= 60;
- time->min = epoch % 60;
- epoch /= 60;
- time->hour = epoch % 24;
- epoch /= 24;
-
- // Calculate base date values.
- tmp = (u32)(((u64)4 * epoch + 102032) / 146097 + 15);
- tmp = (u32)((u64)epoch + 2442113 + tmp - (tmp >> 2));
-
- year = (20 * tmp - 2442) / 7305;
- edays = tmp - 365 * year - (year >> 2);
- month = edays * 1000 / 30601;
- day = edays - month * 30 - month * 601 / 1000;
-
- // Month/Year offset.
- if(month < 14)
- {
- year -= 4716;
- month--;
- }
- else
- {
- year -= 4715;
- month -= 13;
- }
-
- // Set date.
- time->year = year;
- time->month = month;
- time->day = day;
-
- // Set weekday.
- time->weekday = 0; //! TODO.
-}
-
-u32 max77620_rtc_date_to_epoch(const rtc_time_t *time)
-{
- u32 year, month, epoch;
-
- //Year
- year = time->year;
- //Month of year
- month = time->month;
-
- // Month/Year offset.
- if(month < 3)
- {
- month += 12;
- year--;
- }
-
- epoch = (365 * year) + (year >> 2) - (year / 100) + (year / 400); // Years to days.
-
- epoch += (30 * month) + (3 * (month + 1) / 5) + time->day; // Months to days.
- epoch -= 719561; // Epoch time is 1/1/1970.
-
- epoch *= 86400; // Days to seconds.
- epoch += (3600 * time->hour) + (60 * time->min) + time->sec; // Add hours, minutes and seconds.
-
- return epoch;
-}
diff --git a/nyx/nyx_gui/rtc/max77620-rtc.h b/nyx/nyx_gui/rtc/max77620-rtc.h
deleted file mode 100644
index 8c3231e..0000000
--- a/nyx/nyx_gui/rtc/max77620-rtc.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * PMIC Real Time Clock driver for Nintendo Switch's MAX77620-RTC
- *
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _MFD_MAX77620_RTC_H_
-#define _MFD_MAX77620_RTC_H_
-
-#include "../utils/types.h"
-
-#define MAX77620_RTC_I2C_ADDR 0x68
-
-#define MAX77620_RTC_NR_TIME_REGS 7
-
-#define MAX77620_RTC_CONTROLM_REG 0x02
-#define MAX77620_RTC_CONTROL_REG 0x03
-#define MAX77620_RTC_BIN_FORMAT (1 << 0)
-#define MAX77620_RTC_24H (1 << 1)
-
-#define MAX77620_RTC_UPDATE0_REG 0x04
-#define MAX77620_RTC_WRITE_UPDATE (1 << 0)
-#define MAX77620_RTC_READ_UPDATE (1 << 4)
-
-#define MAX77620_RTC_SEC_REG 0x07
-#define MAX77620_RTC_MIN_REG 0x08
-#define MAX77620_RTC_HOUR_REG 0x09
-#define MAX77620_RTC_HOUR_PM_MASK (1 << 6)
-#define MAX77620_RTC_WEEKDAY_REG 0x0A
-#define MAX77620_RTC_MONTH_REG 0x0B
-#define MAX77620_RTC_YEAR_REG 0x0C
-#define MAX77620_RTC_DATE_REG 0x0D
-
-#define MAX77620_ALARM1_SEC_REG 0x0E
-#define MAX77620_ALARM1_MIN_REG 0x0F
-#define MAX77620_ALARM1_HOUR_REG 0x10
-#define MAX77620_ALARM1_WEEKDAY_REG 0x11
-#define MAX77620_ALARM1_MONTH_REG 0x12
-#define MAX77620_ALARM1_YEAR_REG 0x13
-#define MAX77620_ALARM1_DATE_REG 0x14
-#define MAX77620_ALARM2_SEC_REG 0x15
-#define MAX77620_ALARM2_MIN_REG 0x16
-#define MAX77620_ALARM2_HOUR_REG 0x17
-#define MAX77620_ALARM2_WEEKDAY_REG 0x18
-#define MAX77620_ALARM2_MONTH_REG 0x19
-#define MAX77620_ALARM2_YEAR_REG 0x1A
-#define MAX77620_ALARM2_DATE_REG 0x1B
-#define MAX77620_RTC_ALARM_EN_MASK (1 << 7)
-
-typedef struct _rtc_time_t {
- u8 weekday;
- u8 sec;
- u8 min;
- u8 hour;
- u8 day;
- u8 month;
- u16 year;
-} rtc_time_t;
-
-void max77620_rtc_get_time(rtc_time_t *time);
-void max77620_rtc_stop_alarm();
-void max77620_rtc_epoch_to_date(u32 epoch, rtc_time_t *time);
-u32 max77620_rtc_date_to_epoch(const rtc_time_t *time);
-
-#endif /* _MFD_MAX77620_RTC_H_ */
diff --git a/nyx/nyx_gui/sec/se.c b/nyx/nyx_gui/sec/se.c
deleted file mode 100644
index 021d1f5..0000000
--- a/nyx/nyx_gui/sec/se.c
+++ /dev/null
@@ -1,491 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "../sec/se.h"
-#include "../mem/heap.h"
-#include "../soc/bpmp.h"
-#include "../soc/t210.h"
-#include "../sec/se_t210.h"
-#include "../utils/util.h"
-
-typedef struct _se_ll_t
-{
- vu32 num;
- vu32 addr;
- vu32 size;
-} se_ll_t;
-
-static void _gf256_mul_x(void *block)
-{
- u8 *pdata = (u8 *)block;
- u32 carry = 0;
-
- for (int i = 0xF; i >= 0; i--)
- {
- u8 b = pdata[i];
- pdata[i] = (b << 1) | carry;
- carry = b >> 7;
- }
-
- if (carry)
- pdata[0xF] ^= 0x87;
-}
-
-static void _se_ll_init(se_ll_t *ll, u32 addr, u32 size)
-{
- ll->num = 0;
- ll->addr = addr;
- ll->size = size;
-}
-
-static void _se_ll_set(se_ll_t *dst, se_ll_t *src)
-{
- SE(SE_IN_LL_ADDR_REG_OFFSET) = (u32)src;
- SE(SE_OUT_LL_ADDR_REG_OFFSET) = (u32)dst;
-}
-
-static int _se_wait()
-{
- while (!(SE(SE_INT_STATUS_REG_OFFSET) & SE_INT_OP_DONE(INT_SET)))
- ;
- if (SE(SE_INT_STATUS_REG_OFFSET) & SE_INT_ERROR(INT_SET) ||
- SE(SE_STATUS_0) & SE_STATUS_0_STATE_WAIT_IN ||
- SE(SE_ERR_STATUS_0) != SE_ERR_STATUS_0_SE_NS_ACCESS_CLEAR)
- return 0;
- return 1;
-}
-
-se_ll_t *ll_dst, *ll_src;
-static int _se_execute(u32 op, void *dst, u32 dst_size, const void *src, u32 src_size, bool is_oneshot)
-{
- ll_dst = NULL;
- ll_src = NULL;
-
- if (dst)
- {
- ll_dst = (se_ll_t *)malloc(sizeof(se_ll_t));
- _se_ll_init(ll_dst, (u32)dst, dst_size);
- }
-
- if (src)
- {
- ll_src = (se_ll_t *)malloc(sizeof(se_ll_t));
- _se_ll_init(ll_src, (u32)src, src_size);
- }
-
- _se_ll_set(ll_dst, ll_src);
-
- SE(SE_ERR_STATUS_0) = SE(SE_ERR_STATUS_0);
- SE(SE_INT_STATUS_REG_OFFSET) = SE(SE_INT_STATUS_REG_OFFSET);
-
- bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false);
-
- SE(SE_OPERATION_REG_OFFSET) = SE_OPERATION(op);
-
- if (is_oneshot)
- {
- int res = _se_wait();
-
- bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false);
-
- if (src)
- free(ll_src);
- if (dst)
- free(ll_dst);
-
- return res;
- }
-
- return 1;
-}
-
-static int _se_execute_finalize()
-{
- int res = _se_wait();
-
- bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false);
-
- if (ll_src)
- {
- free(ll_src);
- ll_src = NULL;
- }
- if (ll_dst)
- {
- free(ll_dst);
- ll_dst = NULL;
- }
-
- return res;
-}
-
-static int _se_execute_oneshot(u32 op, void *dst, u32 dst_size, const void *src, u32 src_size)
-{
- return _se_execute(op, dst, dst_size, src, src_size, true);
-}
-
-static int _se_execute_one_block(u32 op, void *dst, u32 dst_size, const void *src, u32 src_size)
-{
- if (!src || !dst)
- return 0;
-
- u8 *block = (u8 *)malloc(0x10);
- memset(block, 0, 0x10);
-
- SE(SE_BLOCK_COUNT_REG_OFFSET) = 0;
-
- memcpy(block, src, src_size);
- int res = _se_execute_oneshot(op, block, 0x10, block, 0x10);
- memcpy(dst, block, dst_size);
-
- free(block);
- return res;
-}
-
-static void _se_aes_ctr_set(void *ctr)
-{
- u32 *data = (u32 *)ctr;
- for (u32 i = 0; i < 4; i++)
- SE(SE_CRYPTO_CTR_REG_OFFSET + 4 * i) = data[i];
-}
-
-void se_rsa_acc_ctrl(u32 rs, u32 flags)
-{
- if (flags & SE_RSA_KEY_TBL_DIS_KEY_ALL_FLAG)
- SE(SE_RSA_KEYTABLE_ACCESS_REG_OFFSET + 4 * rs) =
- ((flags >> SE_RSA_KEY_TBL_DIS_KEYUSE_FLAG_SHIFT) & SE_RSA_KEY_TBL_DIS_KEYUSE_FLAG) |
- ((flags & SE_RSA_KEY_TBL_DIS_KEY_READ_UPDATE_FLAG) ^ SE_RSA_KEY_TBL_DIS_KEY_ALL_COMMON_FLAG);
- if (flags & SE_RSA_KEY_TBL_DIS_KEY_LOCK_FLAG)
- SE(SE_RSA_KEYTABLE_ACCESS_LOCK_OFFSET) &= ~(1 << rs);
-}
-
-void se_key_acc_ctrl(u32 ks, u32 flags)
-{
- if (flags & SE_KEY_TBL_DIS_KEY_ACCESS_FLAG)
- SE(SE_KEY_TABLE_ACCESS_REG_OFFSET + 4 * ks) = ~flags;
- if (flags & SE_KEY_TBL_DIS_KEY_LOCK_FLAG)
- SE(SE_KEY_TABLE_ACCESS_LOCK_OFFSET) &= ~(1 << ks);
-}
-
-u32 se_key_acc_ctrl_get(u32 ks)
-{
- return SE(SE_KEY_TABLE_ACCESS_REG_OFFSET + 4 * ks);
-}
-
-void se_aes_key_set(u32 ks, void *key, u32 size)
-{
- u32 *data = (u32 *)key;
- for (u32 i = 0; i < size / 4; i++)
- {
- SE(SE_KEYTABLE_REG_OFFSET) = SE_KEYTABLE_SLOT(ks) | i;
- SE(SE_KEYTABLE_DATA0_REG_OFFSET) = data[i];
- }
-}
-
-void se_aes_key_clear(u32 ks)
-{
- for (u32 i = 0; i < TEGRA_SE_AES_MAX_KEY_SIZE / 4; i++)
- {
- SE(SE_KEYTABLE_REG_OFFSET) = SE_KEYTABLE_SLOT(ks) | i;
- SE(SE_KEYTABLE_DATA0_REG_OFFSET) = 0;
- }
-}
-
-int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input)
-{
- SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_DEC_ALG(ALG_AES_DEC) | SE_CONFIG_DST(DST_KEYTAB);
- SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks_src) | SE_CRYPTO_CORE_SEL(CORE_DECRYPT);
- SE(SE_BLOCK_COUNT_REG_OFFSET) = 0;
- SE(SE_CRYPTO_KEYTABLE_DST_REG_OFFSET) = SE_CRYPTO_KEYTABLE_DST_KEY_INDEX(ks_dst);
-
- return _se_execute_oneshot(OP_START, NULL, 0, input, 0x10);
-}
-
-int se_aes_crypt_ecb(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size)
-{
- if (enc)
- {
- SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY);
- SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_CORE_SEL(CORE_ENCRYPT);
- }
- else
- {
- SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_DEC_ALG(ALG_AES_DEC) | SE_CONFIG_DST(DST_MEMORY);
- SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_CORE_SEL(CORE_DECRYPT);
- }
- SE(SE_BLOCK_COUNT_REG_OFFSET) = (src_size >> 4) - 1;
- return _se_execute_oneshot(OP_START, dst, dst_size, src, src_size);
-}
-
-int se_aes_crypt_cbc(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size)
-{
- if (enc)
- {
- SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY);
- SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_VCTRAM_SEL(VCTRAM_AESOUT) |
- SE_CRYPTO_CORE_SEL(CORE_ENCRYPT) | SE_CRYPTO_XOR_POS(XOR_TOP);
- }
- else
- {
- SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_DEC_ALG(ALG_AES_DEC) | SE_CONFIG_DST(DST_MEMORY);
- SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_VCTRAM_SEL(VCTRAM_PREVAHB) |
- SE_CRYPTO_CORE_SEL(CORE_DECRYPT) | SE_CRYPTO_XOR_POS(XOR_BOTTOM);
- }
- SE(SE_BLOCK_COUNT_REG_OFFSET) = (src_size >> 4) - 1;
- return _se_execute_oneshot(OP_START, dst, dst_size, src, src_size);
-}
-
-int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, const void *src)
-{
- return se_aes_crypt_ecb(ks, enc, dst, 0x10, src, 0x10);
-}
-
-int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size, void *ctr)
-{
- SE(SE_SPARE_0_REG_OFFSET) = 1;
- SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY);
- SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_CORE_SEL(CORE_ENCRYPT) |
- SE_CRYPTO_XOR_POS(XOR_BOTTOM) | SE_CRYPTO_INPUT_SEL(INPUT_LNR_CTR) | SE_CRYPTO_CTR_VAL(1);
- _se_aes_ctr_set(ctr);
-
- u32 src_size_aligned = src_size & 0xFFFFFFF0;
- u32 src_size_delta = src_size & 0xF;
-
- if (src_size_aligned)
- {
- SE(SE_BLOCK_COUNT_REG_OFFSET) = (src_size >> 4) - 1;
- if (!_se_execute_oneshot(OP_START, dst, dst_size, src, src_size_aligned))
- return 0;
- }
-
- if (src_size - src_size_aligned && src_size_aligned < dst_size)
- return _se_execute_one_block(OP_START, dst + src_size_aligned,
- MIN(src_size_delta, dst_size - src_size_aligned),
- src + src_size_aligned, src_size_delta);
-
- return 1;
-}
-
-int se_aes_xts_crypt_sec(u32 ks1, u32 ks2, u32 enc, u64 sec, void *dst, void *src, u32 secsize)
-{
- int res = 0;
- u8 *tweak = (u8 *)malloc(0x10);
- u8 *pdst = (u8 *)dst;
- u8 *psrc = (u8 *)src;
-
- //Generate tweak.
- for (int i = 0xF; i >= 0; i--)
- {
- tweak[i] = sec & 0xFF;
- sec >>= 8;
- }
- if (!se_aes_crypt_block_ecb(ks1, 1, tweak, tweak))
- goto out;
-
- //We are assuming a 0x10-aligned sector size in this implementation.
- for (u32 i = 0; i < secsize / 0x10; i++)
- {
- for (u32 j = 0; j < 0x10; j++)
- pdst[j] = psrc[j] ^ tweak[j];
- if (!se_aes_crypt_block_ecb(ks2, enc, pdst, pdst))
- goto out;
- for (u32 j = 0; j < 0x10; j++)
- pdst[j] = pdst[j] ^ tweak[j];
- _gf256_mul_x(tweak);
- psrc += 0x10;
- pdst += 0x10;
- }
-
- res = 1;
-
-out:;
- free(tweak);
- return res;
-}
-
-int se_aes_xts_crypt(u32 ks1, u32 ks2, u32 enc, u64 sec, void *dst, void *src, u32 secsize, u32 num_secs)
-{
- u8 *pdst = (u8 *)dst;
- u8 *psrc = (u8 *)src;
-
- for (u32 i = 0; i < num_secs; i++)
- if (!se_aes_xts_crypt_sec(ks1, ks2, enc, sec + i, pdst + secsize * i, psrc + secsize * i, secsize))
- return 0;
-
- return 1;
-}
-
-int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64 total_size, u32 sha_cfg, bool is_oneshot)
-{
- int res;
- u32 *hash32 = (u32 *)hash;
-
- if (src_size > 0xFFFFFF || (u32)hash % 4 || !hash) // Max 16MB - 1 chunks and aligned x4 hash buffer.
- return 0;
-
- // Setup config for SHA256.
- SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_MODE(MODE_SHA256) | SE_CONFIG_ENC_ALG(ALG_SHA) | SE_CONFIG_DST(DST_HASHREG);
- SE(SE_SHA_CONFIG_REG_OFFSET) = sha_cfg;
- SE(SE_BLOCK_COUNT_REG_OFFSET) = 0;
-
- // Set total size to current buffer size if empty.
- if (!total_size)
- total_size = src_size;
-
- // Set total size: BITS(src_size), up to 2 EB.
- SE(SE_SHA_MSG_LENGTH_0_REG_OFFSET) = (u32)(total_size << 3);
- SE(SE_SHA_MSG_LENGTH_1_REG_OFFSET) = (u32)(total_size >> 29);
- SE(SE_SHA_MSG_LENGTH_2_REG_OFFSET) = 0;
- SE(SE_SHA_MSG_LENGTH_3_REG_OFFSET) = 0;
-
- // Set size left to hash.
- SE(SE_SHA_MSG_LEFT_0_REG_OFFSET) = (u32)(total_size << 3);
- SE(SE_SHA_MSG_LEFT_1_REG_OFFSET) = (u32)(total_size >> 29);
- SE(SE_SHA_MSG_LEFT_2_REG_OFFSET) = 0;
- SE(SE_SHA_MSG_LEFT_3_REG_OFFSET) = 0;
-
- // If we hash in chunks, copy over the intermediate.
- if (sha_cfg == SHA_CONTINUE && msg_left)
- {
- // Restore message left to process.
- SE(SE_SHA_MSG_LEFT_0_REG_OFFSET) = msg_left[0];
- SE(SE_SHA_MSG_LEFT_1_REG_OFFSET) = msg_left[1];
-
- // Restore hash reg.
- for (u32 i = 0; i < 8; i++)
- SE(SE_HASH_RESULT_REG_OFFSET + (i << 2)) = byte_swap_32(hash32[i]);
- }
-
- // Trigger the operation.
- res = _se_execute(OP_START, NULL, 0, src, src_size, is_oneshot);
-
- if (is_oneshot)
- {
- // Backup message left.
- if (msg_left)
- {
- msg_left[0] = SE(SE_SHA_MSG_LEFT_0_REG_OFFSET);
- msg_left[1] = SE(SE_SHA_MSG_LEFT_1_REG_OFFSET);
- }
-
- // Copy output hash.
- for (u32 i = 0; i < 8; i++)
- hash32[i] = byte_swap_32(SE(SE_HASH_RESULT_REG_OFFSET + (i << 2)));
- }
-
- return res;
-}
-
-int se_calc_sha256_oneshot(void *hash, const void *src, u32 src_size)
-{
- return se_calc_sha256(hash, NULL, src, src_size, 0, SHA_INIT_HASH, true);
-}
-
-int se_calc_sha256_finalize(void *hash, u32 *msg_left)
-{
- u32 *hash32 = (u32 *)hash;
- int res = _se_execute_finalize();
-
- // Backup message left.
- if (msg_left)
- {
- msg_left[0] = SE(SE_SHA_MSG_LEFT_0_REG_OFFSET);
- msg_left[1] = SE(SE_SHA_MSG_LEFT_1_REG_OFFSET);
- }
-
- // Copy output hash.
- for (u32 i = 0; i < 8; i++)
- hash32[i] = byte_swap_32(SE(SE_HASH_RESULT_REG_OFFSET + (i << 2)));
-
- return res;
-}
-
-int se_gen_prng128(void *dst)
-{
- // Setup config for X931 PRNG.
- SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_MODE(MODE_KEY128) | SE_CONFIG_ENC_ALG(ALG_RNG) | SE_CONFIG_DST(DST_MEMORY);
- SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_HASH(HASH_DISABLE) | SE_CRYPTO_XOR_POS(XOR_BYPASS) | SE_CRYPTO_INPUT_SEL(INPUT_RANDOM);
-
- SE(SE_RNG_CONFIG_REG_OFFSET) = SE_RNG_CONFIG_SRC(RNG_SRC_ENTROPY) | SE_RNG_CONFIG_MODE(RNG_MODE_NORMAL);
- //SE(SE_RNG_SRC_CONFIG_REG_OFFSET) =
- // SE_RNG_SRC_CONFIG_ENT_SRC(RNG_SRC_RO_ENT_ENABLE) | SE_RNG_SRC_CONFIG_ENT_SRC_LOCK(RNG_SRC_RO_ENT_LOCK_ENABLE);
- SE(SE_RNG_RESEED_INTERVAL_REG_OFFSET) = 1;
-
- SE(SE_BLOCK_COUNT_REG_OFFSET) = (16 >> 4) - 1;
-
- // Trigger the operation.
- return _se_execute_oneshot(OP_START, dst, 16, NULL, 0);
-}
-
-void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize)
-{
- u8 *aligned_buf = (u8 *)ALIGN((u32)buf, 0x40);
-
- // Set Secure Random Key.
- SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_MODE(MODE_KEY128) | SE_CONFIG_ENC_ALG(ALG_RNG) | SE_CONFIG_DST(DST_SRK);
- SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(0) | SE_CRYPTO_CORE_SEL(CORE_ENCRYPT) | SE_CRYPTO_INPUT_SEL(INPUT_RANDOM);
- SE(SE_RNG_CONFIG_REG_OFFSET) = SE_RNG_CONFIG_SRC(RNG_SRC_ENTROPY) | SE_RNG_CONFIG_MODE(RNG_MODE_FORCE_RESEED);
- SE(SE_CRYPTO_LAST_BLOCK) = 0;
- _se_execute_oneshot(OP_START, NULL, 0, NULL, 0);
-
- // Save AES keys.
- SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_MODE(MODE_KEY128) | SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY);
-
- for (u32 i = 0; i < TEGRA_SE_KEYSLOT_COUNT; i++)
- {
- SE(SE_CONTEXT_SAVE_CONFIG_REG_OFFSET) = SE_CONTEXT_SAVE_SRC(AES_KEYTABLE) |
- (i << SE_KEY_INDEX_SHIFT) | SE_CONTEXT_SAVE_WORD_QUAD(KEYS_0_3);
-
- SE(SE_CRYPTO_LAST_BLOCK) = 0;
- _se_execute_oneshot(OP_CTX_SAVE, aligned_buf, 0x10, NULL, 0);
- memcpy(keys + i * keysize, aligned_buf, 0x10);
-
- if (keysize > 0x10)
- {
- SE(SE_CONTEXT_SAVE_CONFIG_REG_OFFSET) = SE_CONTEXT_SAVE_SRC(AES_KEYTABLE) |
- (i << SE_KEY_INDEX_SHIFT) | SE_CONTEXT_SAVE_WORD_QUAD(KEYS_4_7);
-
- SE(SE_CRYPTO_LAST_BLOCK) = 0;
- _se_execute_oneshot(OP_CTX_SAVE, aligned_buf, 0x10, NULL, 0);
- memcpy(keys + i * keysize + 0x10, aligned_buf, 0x10);
- }
- }
-
- // Save SRK to PMC secure scratches.
- SE(SE_CONTEXT_SAVE_CONFIG_REG_OFFSET) = SE_CONTEXT_SAVE_SRC(SRK);
- SE(0x80) = 0; // SE_CRYPTO_LAST_BLOCK
- _se_execute_oneshot(OP_CTX_SAVE, NULL, 0, NULL, 0);
-
- // End context save.
- SE(SE_CONFIG_REG_OFFSET) = 0;
- _se_execute_oneshot(OP_CTX_SAVE, NULL, 0, NULL, 0);
-
- // Get SRK.
- u32 srk[4];
- srk[0] = PMC(0xC0);
- srk[1] = PMC(0xC4);
- srk[2] = PMC(0x224);
- srk[3] = PMC(0x228);
-
- // Decrypt context.
- se_aes_key_clear(3);
- se_aes_key_set(3, srk, 0x10);
- se_aes_crypt_cbc(3, 0, keys, TEGRA_SE_KEYSLOT_COUNT * keysize, keys, TEGRA_SE_KEYSLOT_COUNT * keysize);
- se_aes_key_clear(3);
-}
diff --git a/nyx/nyx_gui/sec/se.h b/nyx/nyx_gui/sec/se.h
deleted file mode 100644
index 2baedbb..0000000
--- a/nyx/nyx_gui/sec/se.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
-* Copyright (c) 2018 naehrwert
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms and conditions of the GNU General Public License,
-* version 2, as published by the Free Software Foundation.
-*
-* This program is distributed in the hope it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see .
-*/
-
-#ifndef _SE_H_
-#define _SE_H_
-
-#include "../utils/types.h"
-
-void se_rsa_acc_ctrl(u32 rs, u32 flags);
-void se_key_acc_ctrl(u32 ks, u32 flags);
-u32 se_key_acc_ctrl_get(u32 ks);
-void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize);
-void se_aes_key_set(u32 ks, void *key, u32 size);
-void se_aes_key_clear(u32 ks);
-int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input);
-int se_aes_crypt_ecb(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size);
-int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, const void *src);
-int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size, void *ctr);
-int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64 total_size, u32 sha_cfg, bool is_oneshot);
-int se_calc_sha256_oneshot(void *hash, const void *src, u32 src_size);
-int se_calc_sha256_finalize(void *hash, u32 *msg_left);
-int se_gen_prng128(void *dst);
-
-#endif
diff --git a/nyx/nyx_gui/sec/se_t210.h b/nyx/nyx_gui/sec/se_t210.h
deleted file mode 100644
index 01828c7..0000000
--- a/nyx/nyx_gui/sec/se_t210.h
+++ /dev/null
@@ -1,391 +0,0 @@
-/*
-* Driver for Tegra Security Engine
-*
-* Copyright (c) 2011-2013, NVIDIA Corporation. All Rights Reserved.
-*
-* This program is free software; you can redistribute it and/or modify
-* it under the terms of the GNU General Public License as published by
-* the Free Software Foundation; either version 2 of the License, or
-* (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
-*/
-
-#ifndef _CRYPTO_TEGRA_SE_H
-#define _CRYPTO_TEGRA_SE_H
-
-#include "../utils/types.h"
-
-#define TEGRA_SE_CRA_PRIORITY 300
-#define TEGRA_SE_COMPOSITE_PRIORITY 400
-#define TEGRA_SE_CRYPTO_QUEUE_LENGTH 50
-#define SE_MAX_SRC_SG_COUNT 50
-#define SE_MAX_DST_SG_COUNT 50
-
-#define TEGRA_SE_KEYSLOT_COUNT 16
-#define SE_MAX_LAST_BLOCK_SIZE 0xFFFFF
-
-/* SE register definitions */
-#define SE_SECURITY_0 0x000
-#define SE_KEY_SCHED_READ_SHIFT 3
-
-#define SE_TZRAM_SECURITY_0 0x004
-
-#define SE_CONFIG_REG_OFFSET 0x014
-#define SE_CONFIG_ENC_ALG_SHIFT 12
-#define SE_CONFIG_DEC_ALG_SHIFT 8
-#define ALG_AES_ENC 1
-#define ALG_RNG 2
-#define ALG_SHA 3
-#define ALG_RSA 4
-#define ALG_NOP 0
-#define ALG_AES_DEC 1
-#define SE_CONFIG_ENC_ALG(x) (x << SE_CONFIG_ENC_ALG_SHIFT)
-#define SE_CONFIG_DEC_ALG(x) (x << SE_CONFIG_DEC_ALG_SHIFT)
-#define SE_CONFIG_DST_SHIFT 2
-#define DST_MEMORY 0
-#define DST_HASHREG 1
-#define DST_KEYTAB 2
-#define DST_SRK 3
-#define DST_RSAREG 4
-#define SE_CONFIG_DST(x) (x << SE_CONFIG_DST_SHIFT)
-#define SE_CONFIG_ENC_MODE_SHIFT 24
-#define SE_CONFIG_DEC_MODE_SHIFT 16
-#define MODE_KEY128 0
-#define MODE_KEY192 1
-#define MODE_KEY256 2
-#define MODE_SHA1 0
-#define MODE_SHA224 4
-#define MODE_SHA256 5
-#define MODE_SHA384 6
-#define MODE_SHA512 7
-#define SE_CONFIG_ENC_MODE(x) (x << SE_CONFIG_ENC_MODE_SHIFT)
-#define SE_CONFIG_DEC_MODE(x) (x << SE_CONFIG_DEC_MODE_SHIFT)
-
-#define SE_RNG_CONFIG_REG_OFFSET 0x340
-#define RNG_MODE_SHIFT 0
-#define RNG_MODE_NORMAL 0
-#define RNG_MODE_FORCE_INSTANTION 1
-#define RNG_MODE_FORCE_RESEED 2
-#define SE_RNG_CONFIG_MODE(x) (x << RNG_MODE_SHIFT)
-#define RNG_SRC_SHIFT 2
-#define RNG_SRC_NONE 0
-#define RNG_SRC_ENTROPY 1
-#define RNG_SRC_LFSR 2
-#define SE_RNG_CONFIG_SRC(x) (x << RNG_SRC_SHIFT)
-
-#define SE_RNG_SRC_CONFIG_REG_OFFSET 0x344
-#define RNG_SRC_RO_ENT_SHIFT 1
-#define RNG_SRC_RO_ENT_ENABLE 1
-#define RNG_SRC_RO_ENT_DISABLE 0
-#define SE_RNG_SRC_CONFIG_ENT_SRC(x) (x << RNG_SRC_RO_ENT_SHIFT)
-#define RNG_SRC_RO_ENT_LOCK_SHIFT 0
-#define RNG_SRC_RO_ENT_LOCK_ENABLE 1
-#define RNG_SRC_RO_ENT_LOCK_DISABLE 0
-#define SE_RNG_SRC_CONFIG_ENT_SRC_LOCK(x) (x << RNG_SRC_RO_ENT_LOCK_SHIFT)
-
-#define SE_RNG_RESEED_INTERVAL_REG_OFFSET 0x348
-
-#define SE_KEYTABLE_REG_OFFSET 0x31c
-#define SE_KEYTABLE_SLOT_SHIFT 4
-#define SE_KEYTABLE_SLOT(x) (x << SE_KEYTABLE_SLOT_SHIFT)
-#define SE_KEYTABLE_QUAD_SHIFT 2
-#define QUAD_KEYS_128 0
-#define QUAD_KEYS_192 1
-#define QUAD_KEYS_256 1
-#define QUAD_ORG_IV 2
-#define QUAD_UPDTD_IV 3
-#define SE_KEYTABLE_QUAD(x) (x << SE_KEYTABLE_QUAD_SHIFT)
-#define SE_KEYTABLE_OP_TYPE_SHIFT 9
-#define OP_READ 0
-#define OP_WRITE 1
-#define SE_KEYTABLE_OP_TYPE(x) (x << SE_KEYTABLE_OP_TYPE_SHIFT)
-#define SE_KEYTABLE_TABLE_SEL_SHIFT 8
-#define TABLE_KEYIV 0
-#define TABLE_SCHEDULE 1
-#define SE_KEYTABLE_TABLE_SEL(x) (x << SE_KEYTABLE_TABLE_SEL_SHIFT)
-#define SE_KEYTABLE_PKT_SHIFT 0
-#define SE_KEYTABLE_PKT(x) (x << SE_KEYTABLE_PKT_SHIFT)
-
-#define SE_OP_DONE_SHIFT 4
-#define OP_DONE 1
-#define SE_OP_DONE(x, y) ((x) && (y << SE_OP_DONE_SHIFT))
-
-#define SE_CRYPTO_LAST_BLOCK 0x080
-
-#define SE_CRYPTO_REG_OFFSET 0x304
-#define SE_CRYPTO_HASH_SHIFT 0
-#define HASH_DISABLE 0
-#define HASH_ENABLE 1
-#define SE_CRYPTO_HASH(x) (x << SE_CRYPTO_HASH_SHIFT)
-#define SE_CRYPTO_XOR_POS_SHIFT 1
-#define XOR_BYPASS 0
-#define XOR_TOP 2
-#define XOR_BOTTOM 3
-#define SE_CRYPTO_XOR_POS(x) (x << SE_CRYPTO_XOR_POS_SHIFT)
-#define SE_CRYPTO_INPUT_SEL_SHIFT 3
-#define INPUT_AHB 0
-#define INPUT_RANDOM 1
-#define INPUT_AESOUT 2
-#define INPUT_LNR_CTR 3
-#define SE_CRYPTO_INPUT_SEL(x) (x << SE_CRYPTO_INPUT_SEL_SHIFT)
-#define SE_CRYPTO_VCTRAM_SEL_SHIFT 5
-#define VCTRAM_AHB 0
-#define VCTRAM_AESOUT 2
-#define VCTRAM_PREVAHB 3
-#define SE_CRYPTO_VCTRAM_SEL(x) (x << SE_CRYPTO_VCTRAM_SEL_SHIFT)
-#define SE_CRYPTO_IV_SEL_SHIFT 7
-#define IV_ORIGINAL 0
-#define IV_UPDATED 1
-#define SE_CRYPTO_IV_SEL(x) (x << SE_CRYPTO_IV_SEL_SHIFT)
-#define SE_CRYPTO_CORE_SEL_SHIFT 8
-#define CORE_DECRYPT 0
-#define CORE_ENCRYPT 1
-#define SE_CRYPTO_CORE_SEL(x) (x << SE_CRYPTO_CORE_SEL_SHIFT)
-#define SE_CRYPTO_CTR_VAL_SHIFT 11
-#define SE_CRYPTO_CTR_VAL(x) (x << SE_CRYPTO_CTR_VAL_SHIFT)
-#define SE_CRYPTO_KEY_INDEX_SHIFT 24
-#define SE_CRYPTO_KEY_INDEX(x) (x << SE_CRYPTO_KEY_INDEX_SHIFT)
-#define SE_CRYPTO_CTR_CNTN_SHIFT 11
-#define SE_CRYPTO_CTR_CNTN(x) (x << SE_CRYPTO_CTR_CNTN_SHIFT)
-
-#define SE_CRYPTO_CTR_REG_COUNT 4
-#define SE_CRYPTO_CTR_REG_OFFSET 0x308
-
-#define SE_OPERATION_REG_OFFSET 0x008
-#define SE_OPERATION_SHIFT 0
-#define OP_ABORT 0
-#define OP_START 1
-#define OP_RESTART 2
-#define OP_CTX_SAVE 3
-#define OP_RESTART_IN 4
-#define SE_OPERATION(x) (x << SE_OPERATION_SHIFT)
-
-#define SE_CONTEXT_SAVE_CONFIG_REG_OFFSET 0x070
-#define SE_CONTEXT_SAVE_WORD_QUAD_SHIFT 0
-#define KEYS_0_3 0
-#define KEYS_4_7 1
-#define ORIG_IV 2
-#define UPD_IV 3
-#define SE_CONTEXT_SAVE_WORD_QUAD(x) (x << SE_CONTEXT_SAVE_WORD_QUAD_SHIFT)
-
-#define SE_CONTEXT_SAVE_KEY_INDEX_SHIFT 8
-#define SE_CONTEXT_SAVE_KEY_INDEX(x) (x << SE_CONTEXT_SAVE_KEY_INDEX_SHIFT)
-
-#define SE_CONTEXT_SAVAE_STICKY_WORD_QUAD_SHIFT 24
-#define STICKY_0_3 0
-#define STICKY_4_7 1
-#define SE_CONTEXT_SAVE_STICKY_WORD_QUAD(x) \
- (x << SE_CONTEXT_SAVAE_STICKY_WORD_QUAD_SHIFT)
-
-#define SE_CONTEXT_SAVE_SRC_SHIFT 29
-#define STICKY_BITS 0
-#define KEYTABLE 2
-#define MEM 4
-#define SRK 6
-
-#define RSA_KEYTABLE 1
-#define AES_KEYTABLE 2
-#define SE_CONTEXT_SAVE_SRC(x) (x << SE_CONTEXT_SAVE_SRC_SHIFT)
-
-#define SE_CONTEXT_SAVE_RSA_KEY_INDEX_SHIFT 16
-#define SE_CONTEXT_SAVE_RSA_KEY_INDEX(x) \
- (x << SE_CONTEXT_SAVE_RSA_KEY_INDEX_SHIFT)
-
-#define SE_CONTEXT_RSA_WORD_QUAD_SHIFT 12
-#define SE_CONTEXT_RSA_WORD_QUAD(x) \
- (x << SE_CONTEXT_RSA_WORD_QUAD_SHIFT)
-
-#define SE_INT_ENABLE_REG_OFFSET 0x00c
-#define SE_INT_STATUS_REG_OFFSET 0x010
-#define INT_DISABLE 0
-#define INT_ENABLE 1
-#define INT_UNSET 0
-#define INT_SET 1
-#define SE_INT_OP_DONE_SHIFT 4
-#define SE_INT_OP_DONE(x) (x << SE_INT_OP_DONE_SHIFT)
-#define SE_INT_ERROR_SHIFT 16
-#define SE_INT_ERROR(x) (x << SE_INT_ERROR_SHIFT)
-
-#define SE_STATUS_0 0x800
-#define SE_STATUS_0_STATE_WAIT_IN 3
-
-#define SE_ERR_STATUS_0 0x804
-#define SE_ERR_STATUS_0_SE_NS_ACCESS_CLEAR 0
-
-#define SE_CRYPTO_KEYTABLE_DST_REG_OFFSET 0X330
-#define SE_CRYPTO_KEYTABLE_DST_WORD_QUAD_SHIFT 0
-#define SE_CRYPTO_KEYTABLE_DST_WORD_QUAD(x) \
- (x << SE_CRYPTO_KEYTABLE_DST_WORD_QUAD_SHIFT)
-
-#define SE_KEY_INDEX_SHIFT 8
-#define SE_CRYPTO_KEYTABLE_DST_KEY_INDEX(x) (x << SE_KEY_INDEX_SHIFT)
-
-#define SE_IN_LL_ADDR_REG_OFFSET 0x018
-#define SE_OUT_LL_ADDR_REG_OFFSET 0x024
-
-#define SE_KEYTABLE_DATA0_REG_OFFSET 0x320
-#define SE_KEYTABLE_REG_MAX_DATA 16
-
-#define SE_BLOCK_COUNT_REG_OFFSET 0x318
-
-#define SE_SPARE_0_REG_OFFSET 0x80c
-
-#define SE_SHA_CONFIG_REG_OFFSET 0x200
-#define SHA_CONTINUE 0
-#define SHA_INIT_HASH 1
-
-#define SE_SHA_MSG_LENGTH_0_REG_OFFSET 0x204
-#define SE_SHA_MSG_LENGTH_1_REG_OFFSET 0x208
-#define SE_SHA_MSG_LENGTH_2_REG_OFFSET 0x20C
-#define SE_SHA_MSG_LENGTH_3_REG_OFFSET 0x210
-#define SE_SHA_MSG_LEFT_0_REG_OFFSET 0x214
-#define SE_SHA_MSG_LEFT_1_REG_OFFSET 0x218
-#define SE_SHA_MSG_LEFT_2_REG_OFFSET 0x21C
-#define SE_SHA_MSG_LEFT_3_REG_OFFSET 0x220
-
-#define SE_HASH_RESULT_REG_COUNT 16
-#define SE_HASH_RESULT_REG_OFFSET 0x030
-#define TEGRA_SE_KEY_256_SIZE 32
-#define TEGRA_SE_KEY_192_SIZE 24
-#define TEGRA_SE_KEY_128_SIZE 16
-#define TEGRA_SE_AES_BLOCK_SIZE 16
-#define TEGRA_SE_AES_MIN_KEY_SIZE 16
-#define TEGRA_SE_AES_MAX_KEY_SIZE 32
-#define TEGRA_SE_AES_IV_SIZE 16
-#define TEGRA_SE_RNG_IV_SIZE 16
-#define TEGRA_SE_RNG_DT_SIZE 16
-#define TEGRA_SE_RNG_KEY_SIZE 16
-#define TEGRA_SE_RNG_SEED_SIZE (TEGRA_SE_RNG_IV_SIZE + \
- TEGRA_SE_RNG_KEY_SIZE + \
- TEGRA_SE_RNG_DT_SIZE)
-
-#define TEGRA_SE_AES_CMAC_DIGEST_SIZE 16
-#define TEGRA_SE_RSA512_DIGEST_SIZE 64
-#define TEGRA_SE_RSA1024_DIGEST_SIZE 128
-#define TEGRA_SE_RSA1536_DIGEST_SIZE 192
-#define TEGRA_SE_RSA2048_DIGEST_SIZE 256
-
-#define SE_KEY_TABLE_ACCESS_LOCK_OFFSET 0x280
-#define SE_KEY_TBL_DIS_KEY_LOCK_FLAG 0x80
-
-#define SE_KEY_TABLE_ACCESS_REG_OFFSET 0x284
-#define SE_KEY_TBL_DIS_KEYREAD_FLAG (1 << 0)
-#define SE_KEY_TBL_DIS_KEYUPDATE_FLAG (1 << 1)
-#define SE_KEY_TBL_DIS_OIVREAD_FLAG (1 << 2)
-#define SE_KEY_TBL_DIS_OIVUPDATE_FLAG (1 << 3)
-#define SE_KEY_TBL_DIS_UIVREAD_FLAG (1 << 4)
-#define SE_KEY_TBL_DIS_UIVUPDATE_FLAG (1 << 5)
-#define SE_KEY_TBL_DIS_KEYUSE_FLAG (1 << 6)
-#define SE_KEY_TBL_DIS_KEY_ACCESS_FLAG 0x7F
-
-#define SE_KEY_READ_DISABLE_SHIFT 0
-#define SE_KEY_UPDATE_DISABLE_SHIFT 1
-
-#define SE_CONTEXT_BUFER_SIZE 1072
-#define SE_CONTEXT_DRBG_BUFER_SIZE 2112
-
-#define SE_CONTEXT_SAVE_RANDOM_DATA_OFFSET 0
-#define SE_CONTEXT_SAVE_RANDOM_DATA_SIZE 16
-#define SE_CONTEXT_SAVE_STICKY_BITS_OFFSET \
- (SE_CONTEXT_SAVE_RANDOM_DATA_OFFSET + SE_CONTEXT_SAVE_RANDOM_DATA_SIZE)
-#define SE_CONTEXT_SAVE_STICKY_BITS_SIZE 16
-
-#define SE_CONTEXT_SAVE_KEYS_OFFSET (SE_CONTEXT_SAVE_STICKY_BITS_OFFSET + \
- SE_CONTEXT_SAVE_STICKY_BITS_SIZE)
-#define SE11_CONTEXT_SAVE_KEYS_OFFSET (SE_CONTEXT_SAVE_STICKY_BITS_OFFSET + \
- SE_CONTEXT_SAVE_STICKY_BITS_SIZE + \
- SE_CONTEXT_SAVE_STICKY_BITS_SIZE)
-
-#define SE_CONTEXT_SAVE_KEY_LENGTH 512
-#define SE_CONTEXT_ORIGINAL_IV_OFFSET (SE_CONTEXT_SAVE_KEYS_OFFSET + \
- SE_CONTEXT_SAVE_KEY_LENGTH)
-#define SE11_CONTEXT_ORIGINAL_IV_OFFSET (SE11_CONTEXT_SAVE_KEYS_OFFSET + \
- SE_CONTEXT_SAVE_KEY_LENGTH)
-
-#define SE_CONTEXT_ORIGINAL_IV_LENGTH 256
-
-#define SE_CONTEXT_UPDATED_IV_OFFSET (SE_CONTEXT_ORIGINAL_IV_OFFSET + \
- SE_CONTEXT_ORIGINAL_IV_LENGTH)
-#define SE11_CONTEXT_UPDATED_IV_OFFSET (SE11_CONTEXT_ORIGINAL_IV_OFFSET + \
- SE_CONTEXT_ORIGINAL_IV_LENGTH)
-
-#define SE_CONTEXT_UPDATED_IV_LENGTH 256
-
-#define SE_CONTEXT_SAVE_KNOWN_PATTERN_OFFSET (SE_CONTEXT_UPDATED_IV_OFFSET + \
- SE_CONTEXT_UPDATED_IV_LENGTH)
-#define SE11_CONTEXT_SAVE_KNOWN_PATTERN_OFFSET \
- (SE11_CONTEXT_UPDATED_IV_OFFSET + \
- SE_CONTEXT_UPDATED_IV_LENGTH)
-
-#define SE_CONTEXT_SAVE_RSA_KEYS_OFFSET SE11_CONTEXT_SAVE_KNOWN_PATTERN_OFFSET
-
-#define SE_CONTEXT_SAVE_RSA_KEY_LENGTH 1024
-
-#define SE_CONTEXT_SAVE_RSA_KNOWN_PATTERN_OFFSET \
- (SE_CONTEXT_SAVE_RSA_KEYS_OFFSET + SE_CONTEXT_SAVE_RSA_KEY_LENGTH)
-
-#define SE_CONTEXT_KNOWN_PATTERN_SIZE 16
-
-#define TEGRA_SE_RSA_KEYSLOT_COUNT 2
-
-#define SE_RSA_KEYTABLE_ACCESS_LOCK_OFFSET 0x40C
-#define SE_RSA_KEY_TBL_DIS_KEY_LOCK_FLAG 0x80
-
-#define SE_RSA_KEYTABLE_ACCESS_REG_OFFSET 0x410
-#define SE_RSA_KEY_TBL_DIS_KEYREAD_FLAG (1 << 0)
-#define SE_RSA_KEY_TBL_DIS_KEYUPDATE_FLAG (1 << 1)
-#define SE_RSA_KEY_TBL_DIS_KEY_READ_UPDATE_FLAG (SE_RSA_KEY_TBL_DIS_KEYREAD_FLAG | SE_RSA_KEY_TBL_DIS_KEYUPDATE_FLAG)
-#define SE_RSA_KEY_TBL_DIS_KEYUSE_FLAG (1 << 2)
-#define SE_RSA_KEY_TBL_DIS_KEYUSE_FLAG_SHIFT (1 << 2)
-#define SE_RSA_KEY_TBL_DIS_KEY_ALL_COMMON_FLAG 7
-#define SE_RSA_KEY_TBL_DIS_KEY_ALL_FLAG 0x7F
-
-#define SE_RSA_KEYTABLE_ADDR 0x420
-#define SE_RSA_KEYTABLE_DATA 0x424
-#define SE_RSA_OUTPUT 0x428
-
-#define RSA_KEY_READ 0
-#define RSA_KEY_WRITE 1
-#define SE_RSA_KEY_OP_SHIFT 10
-#define SE_RSA_KEY_OP(x) (x << SE_RSA_KEY_OP_SHIFT)
-
-#define RSA_KEY_INPUT_MODE_REG 0
-#define RSA_KEY_INPUT_MODE_DMA 1
-#define RSA_KEY_INPUT_MODE_SHIFT 8
-#define RSA_KEY_INPUT_MODE(x) (x << RSA_KEY_INPUT_MODE_SHIFT)
-
-#define RSA_KEY_SLOT_ONE 0
-#define RSA_KEY_SLOT_TW0 1
-#define RSA_KEY_NUM_SHIFT 7
-#define RSA_KEY_NUM(x) (x << RSA_KEY_NUM_SHIFT)
-
-#define RSA_KEY_TYPE_EXP 0
-#define RSA_KEY_TYPE_MOD 1
-#define RSA_KEY_TYPE_SHIFT 6
-#define RSA_KEY_TYPE(x) (x << RSA_KEY_TYPE_SHIFT)
-
-#define SE_RSA_KEY_SIZE_REG_OFFSET 0x404
-#define SE_RSA_EXP_SIZE_REG_OFFSET 0x408
-
-#define RSA_KEY_SLOT_SHIFT 24
-#define RSA_KEY_SLOT(x) (x << RSA_KEY_SLOT_SHIFT)
-#define SE_RSA_CONFIG 0x400
-
-#define RSA_KEY_PKT_WORD_ADDR_SHIFT 0
-#define RSA_KEY_PKT_WORD_ADDR(x) (x << RSA_KEY_PKT_WORD_ADDR_SHIFT)
-
-#define RSA_KEY_WORD_ADDR_SHIFT 0
-#define RSA_KEY_WORD_ADDR(x) (x << RSA_KEY_WORD_ADDR_SHIFT)
-
-#define SE_RSA_KEYTABLE_PKT_SHIFT 0
-#define SE_RSA_KEYTABLE_PKT(x) (x << SE_RSA_KEYTABLE_PKT_SHIFT)
-
-#endif /* _CRYPTO_TEGRA_SE_H */
diff --git a/nyx/nyx_gui/sec/tsec.c b/nyx/nyx_gui/sec/tsec.c
deleted file mode 100644
index 9f0ce58..0000000
--- a/nyx/nyx_gui/sec/tsec.c
+++ /dev/null
@@ -1,290 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2019 CTCaer
- * Copyright (c) 2018 balika011
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "../sec/tsec.h"
-#include "../sec/tsec_t210.h"
-#include "../sec/se_t210.h"
-#include "../soc/bpmp.h"
-#include "../soc/clock.h"
-#include "../soc/kfuse.h"
-#include "../soc/smmu.h"
-#include "../soc/t210.h"
-#include "../mem/heap.h"
-#include "../mem/mc.h"
-#include "../utils/util.h"
-
-// #include "../gfx/gfx.h"
-
-#define PKG11_MAGIC 0x31314B50
-#define KB_TSEC_FW_EMU_COMPAT 6 // KB ID for HOS 6.2.0.
-
-static int _tsec_dma_wait_idle()
-{
- u32 timeout = get_tmr_ms() + 10000;
-
- while (!(TSEC(TSEC_DMATRFCMD) & TSEC_DMATRFCMD_IDLE))
- if (get_tmr_ms() > timeout)
- return 0;
-
- return 1;
-}
-
-static int _tsec_dma_pa_to_internal_100(int not_imem, int i_offset, int pa_offset)
-{
- u32 cmd;
-
- if (not_imem)
- cmd = TSEC_DMATRFCMD_SIZE_256B; // DMA 256 bytes
- else
- cmd = TSEC_DMATRFCMD_IMEM; // DMA IMEM (Instruction memmory)
-
- TSEC(TSEC_DMATRFMOFFS) = i_offset;
- TSEC(TSEC_DMATRFFBOFFS) = pa_offset;
- TSEC(TSEC_DMATRFCMD) = cmd;
-
- return _tsec_dma_wait_idle();
-}
-
-int tsec_query(u8 *tsec_keys, u8 kb, tsec_ctxt_t *tsec_ctxt)
-{
- int res = 0;
- u8 *fwbuf = NULL;
- u32 *pdir, *car, *fuse, *pmc, *flowctrl, *se, *mc, *iram, *evec;
- u32 *pkg11_magic_off;
-
- bpmp_mmu_disable();
- bpmp_clk_rate_set(BPMP_CLK_NORMAL);
-
- // Enable clocks.
- clock_enable_host1x();
- usleep(2);
- clock_enable_tsec();
- clock_enable_sor_safe();
- clock_enable_sor0();
- clock_enable_sor1();
- clock_enable_kfuse();
-
- kfuse_wait_ready();
-
- // Configure Falcon.
- TSEC(TSEC_DMACTL) = 0;
- TSEC(TSEC_IRQMSET) =
- TSEC_IRQMSET_EXT(0xFF) |
- TSEC_IRQMSET_WDTMR |
- TSEC_IRQMSET_HALT |
- TSEC_IRQMSET_EXTERR |
- TSEC_IRQMSET_SWGEN0 |
- TSEC_IRQMSET_SWGEN1;
- TSEC(TSEC_IRQDEST) =
- TSEC_IRQDEST_EXT(0xFF) |
- TSEC_IRQDEST_HALT |
- TSEC_IRQDEST_EXTERR |
- TSEC_IRQDEST_SWGEN0 |
- TSEC_IRQDEST_SWGEN1;
- TSEC(TSEC_ITFEN) = TSEC_ITFEN_CTXEN | TSEC_ITFEN_MTHDEN;
- if (!_tsec_dma_wait_idle())
- {
- res = -1;
- goto out;
- }
-
- // Load firmware or emulate memio environment for newer TSEC fw.
- if (kb == KB_TSEC_FW_EMU_COMPAT)
- TSEC(TSEC_DMATRFBASE) = (u32)tsec_ctxt->fw >> 8;
- else
- {
- fwbuf = (u8 *)malloc(0x4000);
- u8 *fwbuf_aligned = (u8 *)ALIGN((u32)fwbuf, 0x100);
- memcpy(fwbuf_aligned, tsec_ctxt->fw, tsec_ctxt->size);
- TSEC(TSEC_DMATRFBASE) = (u32)fwbuf_aligned >> 8;
- }
-
- for (u32 addr = 0; addr < tsec_ctxt->size; addr += 0x100)
- {
- if (!_tsec_dma_pa_to_internal_100(false, addr, addr))
- {
- res = -2;
- goto out_free;
- }
- }
-
- if (kb == KB_TSEC_FW_EMU_COMPAT)
- {
- // Init SMMU translation for TSEC.
- pdir = smmu_init_for_tsec();
- smmu_init(tsec_ctxt->secmon_base);
- // Enable SMMU
- if (!smmu_is_used())
- smmu_enable();
-
- // Clock reset controller.
- car = page_alloc(1);
- memcpy(car, (void *)CLOCK_BASE, 0x1000);
- car[CLK_RST_CONTROLLER_CLK_SOURCE_TSEC / 4] = 2;
- smmu_map(pdir, CLOCK_BASE, (u32)car, 1, _WRITABLE | _READABLE | _NONSECURE);
-
- // Fuse driver.
- fuse = page_alloc(1);
- memcpy((void *)&fuse[0x800/4], (void *)FUSE_BASE, 0x400);
- fuse[0x82C / 4] = 0;
- fuse[0x9E0 / 4] = (1 << (kb + 2)) - 1;
- fuse[0x9E4 / 4] = (1 << (kb + 2)) - 1;
- smmu_map(pdir, (FUSE_BASE - 0x800), (u32)fuse, 1, _READABLE | _NONSECURE);
-
- // Power management controller.
- pmc = page_alloc(1);
- smmu_map(pdir, RTC_BASE, (u32)pmc, 1, _READABLE | _NONSECURE);
-
- // Flow control.
- flowctrl = page_alloc(1);
- smmu_map(pdir, FLOW_CTLR_BASE, (u32)flowctrl, 1, _WRITABLE | _NONSECURE);
-
- // Security engine.
- se = page_alloc(1);
- memcpy(se, (void *)SE_BASE, 0x1000);
- smmu_map(pdir, SE_BASE, (u32)se, 1, _READABLE | _WRITABLE | _NONSECURE);
-
- // Memory controller.
- mc = page_alloc(1);
- memcpy(mc, (void *)MC_BASE, 0x1000);
- mc[MC_IRAM_BOM / 4] = 0;
- mc[MC_IRAM_TOM / 4] = 0x80000000;
- smmu_map(pdir, MC_BASE, (u32)mc, 1, _READABLE | _NONSECURE);
-
- // IRAM
- iram = page_alloc(0x30);
- memcpy(iram, tsec_ctxt->pkg1, 0x30000);
- // PKG1.1 magic offset.
- pkg11_magic_off = (u32 *)(iram + ((tsec_ctxt->pkg11_off + 0x20) / 4));
- smmu_map(pdir, 0x40010000, (u32)iram, 0x30, _READABLE | _WRITABLE | _NONSECURE);
-
- // Exception vectors
- evec = page_alloc(1);
- smmu_map(pdir, EXCP_VEC_BASE, (u32)evec, 1, _READABLE | _WRITABLE | _NONSECURE);
- }
-
- // Execute firmware.
- HOST1X(HOST1X_CH0_SYNC_SYNCPT_160) = 0x34C2E1DA;
- TSEC(TSEC_STATUS) = 0;
- TSEC(TSEC_BOOTKEYVER) = 1; // HOS uses key version 1.
- TSEC(TSEC_BOOTVEC) = 0;
- TSEC(TSEC_CPUCTL) = TSEC_CPUCTL_STARTCPU;
-
- if (kb == KB_TSEC_FW_EMU_COMPAT)
- {
- u32 start = get_tmr_us();
- u32 k = se[SE_KEYTABLE_DATA0_REG_OFFSET / 4];
- u32 key[16] = {0};
- u32 kidx = 0;
-
- while (*pkg11_magic_off != PKG11_MAGIC)
- {
- smmu_flush_all();
-
- if (k != se[SE_KEYTABLE_DATA0_REG_OFFSET / 4])
- {
- k = se[SE_KEYTABLE_DATA0_REG_OFFSET / 4];
- key[kidx++] = k;
- }
-
- // Failsafe.
- if ((u32)get_tmr_us() - start > 125000)
- break;
- }
-
- if (kidx != 8)
- {
- res = -6;
- smmu_deinit_for_tsec();
-
- goto out_free;
- }
-
- // Give some extra time to make sure PKG1.1 is decrypted.
- msleep(50);
-
- memcpy(tsec_keys, &key, 0x20);
- memcpy(tsec_ctxt->pkg1, iram, 0x30000);
-
- smmu_deinit_for_tsec();
-
- // for (int i = 0; i < kidx; i++)
- // gfx_printf("key %08X\n", key[i]);
-
- // gfx_printf("cpuctl (%08X) mbox (%08X)\n", TSEC(TSEC_CPUCTL), TSEC(TSEC_STATUS));
-
- // u32 errst = MC(MC_ERR_STATUS);
- // gfx_printf(" MC %08X %08X %08X\n", MC(MC_INTSTATUS), errst, MC(MC_ERR_ADR));
- // gfx_printf(" type: %02X\n", errst >> 28);
- // gfx_printf(" smmu: %02X\n", (errst >> 25) & 3);
- // gfx_printf(" dir: %s\n", (errst >> 16) & 1 ? "W" : "R");
- // gfx_printf(" cid: %02x\n", errst & 0xFF);
- }
- else
- {
- if (!_tsec_dma_wait_idle())
- {
- res = -3;
- goto out_free;
- }
- u32 timeout = get_tmr_ms() + 2000;
- while (!TSEC(TSEC_STATUS))
- if (get_tmr_ms() > timeout)
- {
- res = -4;
- goto out_free;
- }
- if (TSEC(TSEC_STATUS) != 0xB0B0B0B0)
- {
- res = -5;
- goto out_free;
- }
-
- // Fetch result.
- HOST1X(HOST1X_CH0_SYNC_SYNCPT_160) = 0;
- u32 buf[4];
- buf[0] = SOR1(SOR_NV_PDISP_SOR_DP_HDCP_BKSV_LSB);
- buf[1] = SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_BKSV_LSB);
- buf[2] = SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_MSB);
- buf[3] = SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_LSB);
- SOR1(SOR_NV_PDISP_SOR_DP_HDCP_BKSV_LSB) = 0;
- SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_BKSV_LSB) = 0;
- SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_MSB) = 0;
- SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_LSB) = 0;
-
- memcpy(tsec_keys, &buf, 0x10);
- }
-
-out_free:;
- free(fwbuf);
-
-out:;
-
- // Disable clocks.
- clock_disable_kfuse();
- clock_disable_sor1();
- clock_disable_sor0();
- clock_disable_sor_safe();
- clock_disable_tsec();
- bpmp_mmu_enable();
- bpmp_clk_rate_set(BPMP_CLK_DEFAULT_BOOST);
-
- return res;
-}
diff --git a/nyx/nyx_gui/sec/tsec.h b/nyx/nyx_gui/sec/tsec.h
deleted file mode 100644
index 45d994c..0000000
--- a/nyx/nyx_gui/sec/tsec.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
-* Copyright (c) 2018 naehrwert
-* Copyright (c) 2018 CTCaer
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms and conditions of the GNU General Public License,
-* version 2, as published by the Free Software Foundation.
-*
-* This program is distributed in the hope it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see .
-*/
-
-#ifndef _TSEC_H_
-#define _TSEC_H_
-
-#include "../utils/types.h"
-
-typedef struct _tsec_ctxt_t
-{
- void *fw;
- u32 size;
- void *pkg1;
- u32 pkg11_off;
- u32 secmon_base;
-} tsec_ctxt_t;
-
-int tsec_query(u8 *tsec_keys, u8 kb, tsec_ctxt_t *tsec_ctxt);
-
-#endif
diff --git a/nyx/nyx_gui/sec/tsec_t210.h b/nyx/nyx_gui/sec/tsec_t210.h
deleted file mode 100644
index befe269..0000000
--- a/nyx/nyx_gui/sec/tsec_t210.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
-* Copyright (c) 2018 CTCaer
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms and conditions of the GNU General Public License,
-* version 2, as published by the Free Software Foundation.
-*
-* This program is distributed in the hope it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see .
-*/
-
-#ifndef _TSEC_T210_H_
-#define _TSEC_T210_H_
-
-#define TSEC_BOOTKEYVER 0x1040
-#define TSEC_STATUS 0x1044
-#define TSEC_ITFEN 0x1048
-#define TSEC_ITFEN_CTXEN (1 << 0)
-#define TSEC_ITFEN_MTHDEN (1 << 1)
-#define TSEC_IRQMSET 0x1010
-#define TSEC_IRQMSET_WDTMR (1 << 1)
-#define TSEC_IRQMSET_HALT (1 << 4)
-#define TSEC_IRQMSET_EXTERR (1 << 5)
-#define TSEC_IRQMSET_SWGEN0 (1 << 6)
-#define TSEC_IRQMSET_SWGEN1 (1 << 7)
-#define TSEC_IRQMSET_EXT(val) (((val) & 0xFF) << 8)
-#define TSEC_IRQDEST 0x101C
-#define TSEC_IRQDEST_HALT (1 << 4)
-#define TSEC_IRQDEST_EXTERR (1 << 5)
-#define TSEC_IRQDEST_SWGEN0 (1 << 6)
-#define TSEC_IRQDEST_SWGEN1 (1 << 7)
-#define TSEC_IRQDEST_EXT(val) (((val) & 0xFF) << 8)
-#define TSEC_CPUCTL 0x1100
-#define TSEC_CPUCTL_STARTCPU (1 << 1)
-#define TSEC_BOOTVEC 0x1104
-#define TSEC_DMACTL 0x110C
-#define TSEC_DMATRFBASE 0x1110
-#define TSEC_DMATRFMOFFS 0x1114
-#define TSEC_DMATRFCMD 0x1118
-#define TSEC_DMATRFCMD_IDLE (1 << 1)
-#define TSEC_DMATRFCMD_IMEM (1 << 4)
-#define TSEC_DMATRFCMD_SIZE_256B (6 << 8)
-#define TSEC_DMATRFFBOFFS 0x111C
-
-#endif
diff --git a/nyx/nyx_gui/soc/bpmp.c b/nyx/nyx_gui/soc/bpmp.c
deleted file mode 100644
index 8460857..0000000
--- a/nyx/nyx_gui/soc/bpmp.c
+++ /dev/null
@@ -1,309 +0,0 @@
-/*
- * BPMP-Lite Cache/MMU and Frequency driver for Tegra X1
- *
- * Copyright (c) 2019-2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "bpmp.h"
-#include "clock.h"
-#include "t210.h"
-#include "../../../common/memory_map.h"
-#include "../utils/util.h"
-
-#define BPMP_MMU_CACHE_LINE_SIZE 0x20
-
-#define BPMP_CACHE_CONFIG 0x0
-#define CFG_ENABLE_CACHE (1 << 0)
-#define CFG_ENABLE_SKEW_ASSOC (1 << 1)
-#define CFG_DISABLE_RANDOM_ALLOC (1 << 2)
-#define CFG_FORCE_WRITE_THROUGH (1 << 3)
-#define CFG_NEVER_ALLOCATE (1 << 6)
-#define CFG_ENABLE_INTERRUPT (1 << 7)
-#define CFG_MMU_TAG_MODE(x) (x << 8)
-#define TAG_MODE_PARALLEL 0
-#define TAG_MODE_TAG_FIRST 1
-#define TAG_MODE_MMU_FIRST 2
-#define CFG_DISABLE_WRITE_BUFFER (1 << 10)
-#define CFG_DISABLE_READ_BUFFER (1 << 11)
-#define CFG_ENABLE_HANG_DETECT (1 << 12)
-#define CFG_FULL_LINE_DIRTY (1 << 13)
-#define CFG_TAG_CHK_ABRT_ON_ERR (1 << 14)
-#define CFG_TAG_CHK_CLR_ERR (1 << 15)
-#define CFG_DISABLE_SAMELINE (1 << 16)
-#define CFG_OBS_BUS_EN (1 << 31)
-
-#define BPMP_CACHE_LOCK 0x4
-#define LOCK_LINE(x) (1 << x)
-
-#define BPMP_CACHE_SIZE 0xC
-#define BPMP_CACHE_LFSR 0x10
-
-#define BPMP_CACHE_TAG_STATUS 0x14
-#define TAG_STATUS_TAG_CHECK_ERROR (1 << 0)
-#define TAG_STATUS_CONFLICT_ADDR_MASK 0xFFFFFFE0
-
-#define BPMP_CACHE_CLKEN_OVERRIDE 0x18
-#define CLKEN_OVERRIDE_WR_MCCIF_CLKEN (1 << 0)
-#define CLKEN_OVERRIDE_RD_MCCIF_CLKEN (1 << 1)
-
-#define BPMP_CACHE_MAINT_ADDR 0x20
-#define BPMP_CACHE_MAINT_DATA 0x24
-
-#define BPMP_CACHE_MAINT_REQ 0x28
-#define MAINT_REQ_WAY_BITMAP(x) ((x) << 8)
-
-#define BPMP_CACHE_INT_MASK 0x40
-#define BPMP_CACHE_INT_CLEAR 0x44
-#define BPMP_CACHE_INT_RAW_EVENT 0x48
-#define BPMP_CACHE_INT_STATUS 0x4C
-#define INT_MAINT_DONE (1 << 0)
-#define INT_MAINT_ERROR (1 << 1)
-
-#define BPMP_CACHE_RB_CFG 0x80
-#define BPMP_CACHE_WB_CFG 0x84
-
-#define BPMP_CACHE_MMU_FALLBACK_ENTRY 0xA0
-#define BPMP_CACHE_MMU_SHADOW_COPY_MASK 0xA4
-
-#define BPMP_CACHE_MMU_CFG 0xAC
-#define MMU_CFG_BLOCK_MAIN_ENTRY_WR (1 << 0)
-#define MMU_CFG_SEQ_EN (1 << 1)
-#define MMU_CFG_TLB_EN (1 << 2)
-#define MMU_CFG_SEG_CHECK_ALL_ENTRIES (1 << 3)
-#define MMU_CFG_ABORT_STORE_LAST (1 << 4)
-#define MMU_CFG_CLR_ABORT (1 << 5)
-
-#define BPMP_CACHE_MMU_CMD 0xB0
-#define MMU_CMD_NOP 0
-#define MMU_CMD_INIT 1
-#define MMU_CMD_COPY_SHADOW 2
-
-#define BPMP_CACHE_MMU_ABORT_STAT 0xB4
-#define ABORT_STAT_UNIT_MASK 0x7
-#define ABORT_STAT_UNIT_NONE 0
-#define ABORT_STAT_UNIT_CACHE 1
-#define ABORT_STAT_UNIT_SEQ 2
-#define ABORT_STAT_UNIT_TLB 3
-#define ABORT_STAT_UNIT_SEG 4
-#define ABORT_STAT_UNIT_FALLBACK 5
-#define ABORT_STAT_OVERLAP (1 << 3)
-#define ABORT_STAT_ENTRY (0x1F << 4)
-#define ABORT_STAT_TYPE_MASK (3 << 16)
-#define ABORT_STAT_TYPE_EXE (0 << 16)
-#define ABORT_STAT_TYPE_RD (1 << 16)
-#define ABORT_STAT_TYPE_WR (2 << 16)
-#define ABORT_STAT_SIZE (3 << 18)
-#define ABORT_STAT_SEQ (1 << 20)
-#define ABORT_STAT_PROT (1 << 21)
-
-#define BPMP_CACHE_MMU_ABORT_ADDR 0xB8
-#define BPMP_CACHE_MMU_ACTIVE_ENTRIES 0xBC
-
-#define BPMP_MMU_SHADOW_ENTRY_BASE (BPMP_CACHE_BASE + 0x400)
-#define BPMP_MMU_MAIN_ENTRY_BASE (BPMP_CACHE_BASE + 0x800)
-#define MMU_EN_CACHED (1 << 0)
-#define MMU_EN_EXEC (1 << 1)
-#define MMU_EN_READ (1 << 2)
-#define MMU_EN_WRITE (1 << 3)
-
-bpmp_mmu_entry_t mmu_entries[] =
-{
- { DRAM_START, 0xFFFFFFFF, MMU_EN_READ | MMU_EN_WRITE | MMU_EN_EXEC | MMU_EN_CACHED, true },
- { IRAM_BASE, 0x4003FFFF, MMU_EN_READ | MMU_EN_WRITE | MMU_EN_EXEC | MMU_EN_CACHED, true }
-};
-
-void bpmp_mmu_maintenance(u32 op, bool force)
-{
- if (!force && !(BPMP_CACHE_CTRL(BPMP_CACHE_CONFIG) & CFG_ENABLE_CACHE))
- return;
-
- BPMP_CACHE_CTRL(BPMP_CACHE_INT_CLEAR) = INT_MAINT_DONE;
-
- // This is a blocking operation.
- BPMP_CACHE_CTRL(BPMP_CACHE_MAINT_REQ) = MAINT_REQ_WAY_BITMAP(0xF) | op;
-
- while(!(BPMP_CACHE_CTRL(BPMP_CACHE_INT_RAW_EVENT) & INT_MAINT_DONE))
- ;
-
- BPMP_CACHE_CTRL(BPMP_CACHE_INT_CLEAR) = BPMP_CACHE_CTRL(BPMP_CACHE_INT_RAW_EVENT);
-}
-
-void bpmp_mmu_set_entry(int idx, bpmp_mmu_entry_t *entry, bool apply)
-{
- if (idx > 31)
- return;
-
- volatile bpmp_mmu_entry_t *mmu_entry = (bpmp_mmu_entry_t *)(BPMP_MMU_SHADOW_ENTRY_BASE + sizeof(bpmp_mmu_entry_t) * idx);
-
- if (entry->enable)
- {
- mmu_entry->start_addr = ALIGN(entry->start_addr, BPMP_MMU_CACHE_LINE_SIZE);
- mmu_entry->end_addr = ALIGN_DOWN(entry->end_addr, BPMP_MMU_CACHE_LINE_SIZE);
- mmu_entry->attr = entry->attr;
-
- BPMP_CACHE_CTRL(BPMP_CACHE_MMU_SHADOW_COPY_MASK) |= (1 << idx);
-
- if (apply)
- BPMP_CACHE_CTRL(BPMP_CACHE_MMU_CMD) = MMU_CMD_COPY_SHADOW;
- }
-}
-
-void bpmp_mmu_enable()
-{
- if (BPMP_CACHE_CTRL(BPMP_CACHE_CONFIG) & CFG_ENABLE_CACHE)
- return;
-
- // Init BPMP MMU.
- BPMP_CACHE_CTRL(BPMP_CACHE_MMU_CMD) = MMU_CMD_INIT;
- BPMP_CACHE_CTRL(BPMP_CACHE_MMU_FALLBACK_ENTRY) = MMU_EN_READ | MMU_EN_WRITE | MMU_EN_EXEC; // RWX for non-defined regions.
- BPMP_CACHE_CTRL(BPMP_CACHE_MMU_CFG) = MMU_CFG_SEQ_EN | MMU_CFG_TLB_EN | MMU_CFG_ABORT_STORE_LAST;
-
- // Init BPMP MMU entries.
- BPMP_CACHE_CTRL(BPMP_CACHE_MMU_SHADOW_COPY_MASK) = 0;
- for (u32 idx = 0; idx < (sizeof(mmu_entries) / sizeof(bpmp_mmu_entry_t)); idx++)
- bpmp_mmu_set_entry(idx, &mmu_entries[idx], false);
-
- BPMP_CACHE_CTRL(BPMP_CACHE_MMU_CMD) = MMU_CMD_COPY_SHADOW;
-
- // Invalidate cache.
- bpmp_mmu_maintenance(BPMP_MMU_MAINT_INVALID_WAY, true);
-
- // Enable cache.
- BPMP_CACHE_CTRL(BPMP_CACHE_CONFIG) = CFG_ENABLE_CACHE | CFG_FORCE_WRITE_THROUGH |
- CFG_MMU_TAG_MODE(TAG_MODE_PARALLEL) | CFG_TAG_CHK_ABRT_ON_ERR;
-
- // HW bug. Invalidate cache again.
- bpmp_mmu_maintenance(BPMP_MMU_MAINT_INVALID_WAY, false);
-}
-
-void bpmp_mmu_disable()
-{
- if (!(BPMP_CACHE_CTRL(BPMP_CACHE_CONFIG) & CFG_ENABLE_CACHE))
- return;
-
- // Clean and invalidate cache.
- bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false);
-
- // Disable cache.
- BPMP_CACHE_CTRL(BPMP_CACHE_CONFIG) = 0;
-}
-
-// APB clock affects RTC, PWM, MEMFETCH, APE, USB, SOR PWM,
-// I2C host, DC/DSI/DISP. UART gives extra stress.
-// 92: 100% success ratio. 93-94: 595-602MHz has 99% success ratio. 95: 608MHz less.
-const u8 pll_divn[] = {
- 0, // BPMP_CLK_NORMAL: 408MHz 0% - 136MHz APB.
- 85, // BPMP_CLK_HIGH_BOOST: 544MHz 33% - 136MHz APB.
- 90, // BPMP_CLK_SUPER_BOOST: 576MHz 41% - 144MHz APB.
- 92 // BPMP_CLK_HYPER_BOOST: 589MHz 44% - 147MHz APB.
- // Do not use for public releases!
- //95 // BPMP_CLK_DEV_BOOST: 608MHz 49% - 152MHz APB.
-};
-
-bpmp_freq_t bpmp_clock_set = BPMP_CLK_NORMAL;
-
-void bpmp_clk_rate_get()
-{
- bool clk_src_is_pllp = ((CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) >> 4) & 7) == 3;
-
- if (clk_src_is_pllp)
- bpmp_clock_set = BPMP_CLK_NORMAL;
- else
- {
- bpmp_clock_set = BPMP_CLK_HIGH_BOOST;
-
- u8 pll_divn_curr = (CLOCK(CLK_RST_CONTROLLER_PLLC_BASE) >> 10) & 0xFF;
- for (u32 i = 1; i < sizeof(pll_divn); i++)
- {
- if (pll_divn[i] == pll_divn_curr)
- {
- bpmp_clock_set = i;
- break;
- }
- }
- }
-}
-
-void bpmp_clk_rate_set(bpmp_freq_t fid)
-{
- if (fid > (BPMP_CLK_MAX - 1))
- fid = BPMP_CLK_MAX - 1;
-
- if (bpmp_clock_set == fid)
- return;
-
- if (fid)
- {
- if (bpmp_clock_set)
- {
- // Restore to PLLP source during PLLC4 configuration.
- CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333; // PLLP_OUT.
- msleep(1); // Wait a bit for clock source change.
- }
-
- // Configure and enable PLLC.
- clock_enable_pllc(pll_divn[fid]);
-
- // Set SCLK / HCLK / PCLK.
- CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 3; // PCLK = HCLK / (3 + 1). HCLK == SCLK.
- CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003310; // PLLC_OUT1 for active and CLKM for idle.
- }
- else
- {
- CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003330; // PLLP_OUT for active and CLKM for idle.
- msleep(1); // Wait a bit for clock source change.
- CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // PCLK = HCLK / (2 + 1). HCLK == SCLK.
-
- // Disable PLLC to save power.
- clock_disable_pllc();
- }
- bpmp_clock_set = fid;
-}
-
-// The following functions halt BPMP to reduce power while sleeping.
-// They are not as accurate as RTC at big values but they guarantee time+ delay.
-void bpmp_usleep(u32 us)
-{
- u32 delay;
-
- // Each iteration takes 1us.
- while (us)
- {
- delay = (us > HALT_COP_MAX_CNT) ? HALT_COP_MAX_CNT : us;
- us -= delay;
-
- FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_COP_WAIT_EVENT | HALT_COP_USEC | delay;
- }
-}
-
-void bpmp_msleep(u32 ms)
-{
- u32 delay;
-
- // Iteration time is variable. ~200 - 1000us.
- while (ms)
- {
- delay = (ms > HALT_COP_MAX_CNT) ? HALT_COP_MAX_CNT : ms;
- ms -= delay;
-
- FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_COP_WAIT_EVENT | HALT_COP_MSEC | delay;
- }
-}
-
-void bpmp_halt()
-{
- FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_COP_WAIT_EVENT | HALT_COP_JTAG;
-}
-
diff --git a/nyx/nyx_gui/soc/bpmp.h b/nyx/nyx_gui/soc/bpmp.h
deleted file mode 100644
index aad901a..0000000
--- a/nyx/nyx_gui/soc/bpmp.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * BPMP-Lite Cache/MMU and Frequency driver for Tegra X1
- *
- * Copyright (c) 2019-2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _BPMP_H_
-#define _BPMP_H_
-
-#include "../utils/types.h"
-
-typedef enum
-{
- BPMP_MMU_MAINT_NOP = 0,
- BPMP_MMU_MAINT_CLEAN_PHY = 1,
- BPMP_MMU_MAINT_INVALID_PHY = 2,
- BPMP_MMU_MAINT_CLEAN_INVALID_PHY = 3,
- BPMP_MMU_MAINT_CLEAN_LINE = 9,
- BPMP_MMU_MAINT_INVALID_LINE = 10,
- BPMP_MMU_MAINT_CLEAN_INVALID_LINE = 11,
- BPMP_MMU_MAINT_CLEAN_WAY = 17,
- BPMP_MMU_MAINT_INVALID_WAY = 18,
- BPMP_MMU_MAINT_CLN_INV_WAY = 19
-} bpmp_maintenance_t;
-
-typedef struct _bpmp_mmu_entry_t
-{
- u32 start_addr;
- u32 end_addr;
- u32 attr;
- u32 enable;
-} bpmp_mmu_entry_t;
-
-typedef enum
-{
- BPMP_CLK_NORMAL, // 408MHz 0% - 136MHz APB.
- BPMP_CLK_HIGH_BOOST, // 544MHz 33% - 136MHz APB.
- BPMP_CLK_SUPER_BOOST, // 576MHz 41% - 144MHz APB.
- BPMP_CLK_HYPER_BOOST, // 589MHz 44% - 147MHz APB.
- //BPMP_CLK_DEV_BOOST, // 608MHz 49% - 152MHz APB.
- BPMP_CLK_MAX
-} bpmp_freq_t;
-
-#define BPMP_CLK_DEFAULT_BOOST BPMP_CLK_HYPER_BOOST
-
-void bpmp_mmu_maintenance(u32 op, bool force);
-void bpmp_mmu_set_entry(int idx, bpmp_mmu_entry_t *entry, bool apply);
-void bpmp_mmu_enable();
-void bpmp_mmu_disable();
-void bpmp_clk_rate_get();
-void bpmp_clk_rate_set(bpmp_freq_t fid);
-void bpmp_usleep(u32 us);
-void bpmp_msleep(u32 ms);
-void bpmp_halt();
-
-#endif
diff --git a/nyx/nyx_gui/soc/ccplex.c b/nyx/nyx_gui/soc/ccplex.c
deleted file mode 100644
index 0d46b1c..0000000
--- a/nyx/nyx_gui/soc/ccplex.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "../soc/ccplex.h"
-#include "../soc/i2c.h"
-#include "../soc/clock.h"
-#include "../utils/util.h"
-#include "../soc/pmc.h"
-#include "../soc/t210.h"
-#include "../power/max77620.h"
-#include "../power/max7762x.h"
-
-void _ccplex_enable_power()
-{
- u8 tmp = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_AME_GPIO); // Get current pinmuxing
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_AME_GPIO, tmp & ~(1 << 5)); // Disable GPIO5 pinmuxing.
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO5, MAX77620_CNFG_GPIO_DRV_PUSHPULL | MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH);
-
- // Enable cores power.
- // 1-3.x: MAX77621_NFSR_ENABLE.
- i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_CONTROL1_REG,
- MAX77621_AD_ENABLE | MAX77621_NFSR_ENABLE | MAX77621_SNS_ENABLE | MAX77621_RAMP_12mV_PER_US);
- // 1.0.0-3.x: MAX77621_T_JUNCTION_120 | MAX77621_CKKADV_TRIP_DISABLE | MAX77621_INDUCTOR_NOMINAL.
- i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_CONTROL2_REG,
- MAX77621_T_JUNCTION_120 | MAX77621_WDTMR_ENABLE | MAX77621_CKKADV_TRIP_75mV_PER_US| MAX77621_INDUCTOR_NOMINAL);
- i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_VOUT_REG, MAX77621_VOUT_ENABLE | MAX77621_VOUT_0_95V);
- i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_VOUT_DVS_REG, MAX77621_VOUT_ENABLE | MAX77621_VOUT_0_95V);
-}
-
-int _ccplex_pmc_enable_partition(u32 part, int enable)
-{
- u32 part_mask = 1 << part;
- u32 desired_state = enable << part;
-
- // Check if the partition has the state we want.
- if ((PMC(APBDEV_PMC_PWRGATE_STATUS) & part_mask) == desired_state)
- return 1;
-
- u32 i = 5001;
- while (PMC(APBDEV_PMC_PWRGATE_TOGGLE) & 0x100)
- {
- usleep(1);
- i--;
- if (i < 1)
- return 0;
- }
-
- // Toggle power gating.
- PMC(APBDEV_PMC_PWRGATE_TOGGLE) = part | 0x100;
-
- i = 5001;
- while (i > 0)
- {
- if ((PMC(APBDEV_PMC_PWRGATE_STATUS) & part_mask) == desired_state)
- break;
- usleep(1);
- i--;
- }
-
- return 1;
-}
-
-void ccplex_boot_cpu0(u32 entry)
-{
- // Set ACTIVE_CLUSER to FAST.
- FLOW_CTLR(FLOW_CTLR_BPMP_CLUSTER_CONTROL) &= 0xFFFFFFFE;
-
- _ccplex_enable_power();
-
- if (!(CLOCK(CLK_RST_CONTROLLER_PLLX_BASE) & 0x40000000)) // PLLX_ENABLE.
- {
- CLOCK(CLK_RST_CONTROLLER_PLLX_MISC_3) &= 0xFFFFFFF7; // Disable IDDQ.
- usleep(2);
- CLOCK(CLK_RST_CONTROLLER_PLLX_BASE) = 0x80404E02;
- CLOCK(CLK_RST_CONTROLLER_PLLX_BASE) = 0x404E02;
- CLOCK(CLK_RST_CONTROLLER_PLLX_MISC) = (CLOCK(CLK_RST_CONTROLLER_PLLX_MISC) & 0xFFFBFFFF) | 0x40000;
- CLOCK(CLK_RST_CONTROLLER_PLLX_BASE) = 0x40404E02;
- }
- while (!(CLOCK(CLK_RST_CONTROLLER_PLLX_BASE) & 0x8000000))
- ;
-
- // Configure MSELECT source and enable clock.
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT) = (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT) & 0x1FFFFF00) | 6;
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) = (CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) & 0xFFFFFFF7) | 8;
-
- // Configure initial CPU clock frequency and enable clock.
- CLOCK(CLK_RST_CONTROLLER_CCLK_BURST_POLICY) = 0x20008888;
- CLOCK(CLK_RST_CONTROLLER_SUPER_CCLK_DIVIDER) = 0x80000000;
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_V_SET) = 1;
-
- clock_enable_coresight();
-
- // CAR2PMC_CPU_ACK_WIDTH should be set to 0.
- CLOCK(CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2) &= 0xFFFFF000;
-
- // Enable CPU rail.
- _ccplex_pmc_enable_partition(0, 1);
- // Enable cluster 0 non-CPU.
- _ccplex_pmc_enable_partition(15, 1);
- // Enable CE0.
- _ccplex_pmc_enable_partition(14, 1);
-
- // Request and wait for RAM repair.
- FLOW_CTLR(FLOW_CTLR_RAM_REPAIR) = 1;
- while (!(FLOW_CTLR(FLOW_CTLR_RAM_REPAIR) & 2))
- ;
-
- EXCP_VEC(EVP_CPU_RESET_VECTOR) = 0;
-
- // Set reset vector.
- SB(SB_AA64_RESET_LOW) = entry | SB_AA64_RST_AARCH64_MODE_EN;
- SB(SB_AA64_RESET_HIGH) = 0;
- // Non-secure reset vector write disable.
- SB(SB_CSR) = SB_CSR_NS_RST_VEC_WR_DIS;
- (void)SB(SB_CSR);
-
- // Tighten up the security aperture.
- // MC(MC_TZ_SECURITY_CTRL) = 1;
-
- // Clear MSELECT reset.
- CLOCK(CLK_RST_CONTROLLER_RST_DEVICES_V) &= 0xFFFFFFF7;
- // Clear NONCPU reset.
- CLOCK(CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR) = 0x20000000;
- // Clear CPU0 reset.
- // < 5.x: 0x411F000F, Clear CPU{0,1,2,3} POR and CORE, CX0, L2, and DBG reset.
- CLOCK(CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR) = 0x41010001;
-}
diff --git a/nyx/nyx_gui/soc/ccplex.h b/nyx/nyx_gui/soc/ccplex.h
deleted file mode 100644
index 91430c7..0000000
--- a/nyx/nyx_gui/soc/ccplex.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _CCPLEX_H_
-#define _CCPLEX_H_
-
-#include "../utils/types.h"
-
-void ccplex_boot_cpu0(u32 entry);
-
-#endif
diff --git a/nyx/nyx_gui/soc/clock.c b/nyx/nyx_gui/soc/clock.c
deleted file mode 100644
index e19c993..0000000
--- a/nyx/nyx_gui/soc/clock.c
+++ /dev/null
@@ -1,716 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "../soc/clock.h"
-#include "../soc/t210.h"
-#include "../utils/util.h"
-#include "../storage/sdmmc.h"
-
-/*
- * CLOCK Peripherals:
- * L 0 - 31
- * H 32 - 63
- * U 64 - 95
- * V 96 - 127
- * W 128 - 159
- * X 160 - 191
- * Y 192 - 223
- */
-
-/* clock_t: reset, enable, source, index, clk_src, clk_div */
-
-static const clock_t _clock_uart[] = {
-/* UART A */ { CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_UARTA, 6, 0, 2 },
-/* UART B */ { CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_UARTB, 7, 0, 2 },
-/* UART C */ { CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_RST_CONTROLLER_CLK_SOURCE_UARTC, 23, 0, 2 },
-/* UART D */ { CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_UARTD, 1, 0, 2 },
-/* UART E */ { CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_UARTAPE, 20, 0, 2 }
-};
-
-//I2C default parameters - TLOW: 4, THIGH: 2, DEBOUNCE: 0, FM_DIV: 26.
-static const clock_t _clock_i2c[] = {
-/* I2C1 */ { CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_I2C1, 12, 0, 19 }, //20.4MHz -> 100KHz
-/* I2C2 */ { CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_RST_CONTROLLER_CLK_SOURCE_I2C2, 22, 0, 4 }, //81.6MHz -> 400KHz
-/* I2C3 */ { CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_I2C3, 3, 0, 4 }, //81.6MHz -> 400KHz
-/* I2C4 */ { CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_I2C4, 7, 0, 19 }, //20.4MHz -> 100KHz
-/* I2C5 */ { CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_RST_CONTROLLER_CLK_SOURCE_I2C5, 15, 0, 4 }, //81.6MHz -> 400KHz
-/* I2C6 */ { CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_RST_CONTROLLER_CLK_SOURCE_I2C6, 6, 0, 19 } //20.4MHz -> 100KHz
-};
-
-static clock_t _clock_se = {
- CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_SE, 31, 0, 0
-};
-
-static clock_t _clock_tzram = {
- CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_NO_SOURCE, 30, 0, 0
-};
-
-static clock_t _clock_host1x = {
- CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_HOST1X, 28, 4, 3
-};
-static clock_t _clock_tsec = {
- CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_TSEC, 19, 0, 2
-};
-static clock_t _clock_sor_safe = {
- CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_NO_SOURCE, 30, 0, 0
-};
-static clock_t _clock_sor0 = {
- CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_NO_SOURCE, 22, 0, 0
-};
-static clock_t _clock_sor1 = {
- CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_RST_CONTROLLER_CLK_SOURCE_SOR1, 23, 0, 2
-};
-static clock_t _clock_kfuse = {
- CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_NO_SOURCE, 8, 0, 0
-};
-
-static clock_t _clock_cl_dvfs = {
- CLK_RST_CONTROLLER_RST_DEVICES_W, CLK_RST_CONTROLLER_CLK_OUT_ENB_W, CLK_NO_SOURCE, 27, 0, 0
-};
-static clock_t _clock_coresight = {
- CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_CSITE, 9, 0, 4
-};
-
-static clock_t _clock_pwm = {
- CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_PWM, 17, 6, 4 // Fref: 6.2MHz.
-};
-
-static clock_t _clock_sdmmc_legacy_tm = {
- CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM, 1, 4, 66
-};
-
-void clock_enable(const clock_t *clk)
-{
- // Put clock into reset.
- CLOCK(clk->reset) = (CLOCK(clk->reset) & ~(1 << clk->index)) | (1 << clk->index);
- // Disable.
- CLOCK(clk->enable) &= ~(1 << clk->index);
- // Configure clock source if required.
- if (clk->source)
- CLOCK(clk->source) = clk->clk_div | (clk->clk_src << 29);
- // Enable.
- CLOCK(clk->enable) = (CLOCK(clk->enable) & ~(1 << clk->index)) | (1 << clk->index);
- usleep(2);
-
- // Take clock off reset.
- CLOCK(clk->reset) &= ~(1 << clk->index);
-}
-
-void clock_disable(const clock_t *clk)
-{
- // Put clock into reset.
- CLOCK(clk->reset) = (CLOCK(clk->reset) & ~(1 << clk->index)) | (1 << clk->index);
- // Disable.
- CLOCK(clk->enable) &= ~(1 << clk->index);
-}
-
-void clock_enable_fuse(bool enable)
-{
- CLOCK(CLK_RST_CONTROLLER_MISC_CLK_ENB) = (CLOCK(CLK_RST_CONTROLLER_MISC_CLK_ENB) & 0xEFFFFFFF) | ((enable & 1) << 28);
-}
-
-void clock_enable_uart(u32 idx)
-{
- clock_enable(&_clock_uart[idx]);
-}
-
-void clock_disable_uart(u32 idx)
-{
- clock_disable(&_clock_uart[idx]);
-}
-
-#define UART_SRC_CLK_DIV_EN (1 << 24)
-
-int clock_uart_use_src_div(u32 idx, u32 baud)
-{
- u32 clk_src_div = CLOCK(_clock_uart[idx].source) & 0xE0000000;
-
- if (baud == 1000000)
- CLOCK(_clock_uart[idx].source) = clk_src_div | UART_SRC_CLK_DIV_EN | 49;
- else
- {
- CLOCK(_clock_uart[idx].source) = clk_src_div | 2;
-
- return 1;
- }
-
- return 0;
-}
-
-void clock_enable_i2c(u32 idx)
-{
- clock_enable(&_clock_i2c[idx]);
-}
-
-void clock_disable_i2c(u32 idx)
-{
- clock_disable(&_clock_i2c[idx]);
-}
-
-void clock_enable_se()
-{
- clock_enable(&_clock_se);
-}
-
-void clock_enable_tzram()
-{
- clock_enable(&_clock_tzram);
-}
-
-void clock_enable_host1x()
-{
- clock_enable(&_clock_host1x);
-}
-
-void clock_disable_host1x()
-{
- clock_disable(&_clock_host1x);
-}
-
-void clock_enable_tsec()
-{
- clock_enable(&_clock_tsec);
-}
-
-void clock_disable_tsec()
-{
- clock_disable(&_clock_tsec);
-}
-
-void clock_enable_sor_safe()
-{
- clock_enable(&_clock_sor_safe);
-}
-
-void clock_disable_sor_safe()
-{
- clock_disable(&_clock_sor_safe);
-}
-
-void clock_enable_sor0()
-{
- clock_enable(&_clock_sor0);
-}
-
-void clock_disable_sor0()
-{
- clock_disable(&_clock_sor0);
-}
-
-void clock_enable_sor1()
-{
- clock_enable(&_clock_sor1);
-}
-
-void clock_disable_sor1()
-{
- clock_disable(&_clock_sor1);
-}
-
-void clock_enable_kfuse()
-{
- //clock_enable(&_clock_kfuse);
- CLOCK(CLK_RST_CONTROLLER_RST_DEVICES_H) = (CLOCK(CLK_RST_CONTROLLER_RST_DEVICES_H) & 0xFFFFFEFF) | 0x100;
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_H) &= 0xFFFFFEFF;
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_H) = (CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_H) & 0xFFFFFEFF) | 0x100;
- usleep(10);
- CLOCK(CLK_RST_CONTROLLER_RST_DEVICES_H) &= 0xFFFFFEFF;
- usleep(20);
-}
-
-void clock_disable_kfuse()
-{
- clock_disable(&_clock_kfuse);
-}
-
-void clock_enable_cl_dvfs()
-{
- clock_enable(&_clock_cl_dvfs);
-}
-
-void clock_disable_cl_dvfs()
-{
- clock_disable(&_clock_cl_dvfs);
-}
-
-void clock_enable_coresight()
-{
- clock_enable(&_clock_coresight);
-}
-
-void clock_disable_coresight()
-{
- clock_disable(&_clock_coresight);
-}
-
-void clock_enable_pwm()
-{
- clock_enable(&_clock_pwm);
-}
-
-void clock_disable_pwm()
-{
- clock_disable(&_clock_pwm);
-}
-
-void clock_enable_pllc(u32 divn)
-{
- u8 pll_divn_curr = (CLOCK(CLK_RST_CONTROLLER_PLLC_BASE) >> 10) & 0xFF;
-
- // Check if already enabled and configured.
- if ((CLOCK(CLK_RST_CONTROLLER_PLLC_BASE) & PLLCX_BASE_ENABLE) && (pll_divn_curr == divn))
- return;
-
- // Take PLLC out of reset and set basic misc parameters.
- CLOCK(CLK_RST_CONTROLLER_PLLC_MISC) =
- ((CLOCK(CLK_RST_CONTROLLER_PLLC_MISC) & 0xFFF0000F) & ~PLLC_MISC_RESET) | (0x80000 << 4); // PLLC_EXT_FRU.
- CLOCK(CLK_RST_CONTROLLER_PLLC_MISC_2) |= 0xF0 << 8; // PLLC_FLL_LD_MEM.
-
- // Disable PLL and IDDQ in case they are on.
- CLOCK(CLK_RST_CONTROLLER_PLLC_BASE) &= ~PLLCX_BASE_ENABLE;
- CLOCK(CLK_RST_CONTROLLER_PLLC_MISC_1) &= ~PLLC_MISC1_IDDQ;
- usleep(10);
-
- // Set PLLC dividers.
- CLOCK(CLK_RST_CONTROLLER_PLLC_BASE) = (divn << 10) | 4; // DIVM: 4, DIVP: 1.
-
- // Enable PLLC and wait for Phase and Frequency lock.
- CLOCK(CLK_RST_CONTROLLER_PLLC_BASE) |= PLLCX_BASE_ENABLE;
- while (!(CLOCK(CLK_RST_CONTROLLER_PLLC_BASE) & PLLCX_BASE_LOCK))
- ;
-
- // Disable PLLC_OUT1, enable reset and set div to 1.5.
- CLOCK(CLK_RST_CONTROLLER_PLLC_OUT) = (1 << 8);
-
- // Enable PLLC_OUT1 and bring it out of reset.
- CLOCK(CLK_RST_CONTROLLER_PLLC_OUT) |= (PLLC_OUT1_CLKEN | PLLC_OUT1_RSTN_CLR);
- msleep(1); // Wait a bit for PLL to stabilize.
-}
-
-void clock_disable_pllc()
-{
- // Disable PLLC and PLLC_OUT1.
- CLOCK(CLK_RST_CONTROLLER_PLLC_OUT) &= ~(PLLC_OUT1_CLKEN | PLLC_OUT1_RSTN_CLR);
- CLOCK(CLK_RST_CONTROLLER_PLLC_BASE) &= ~PLLCX_BASE_ENABLE;
- CLOCK(CLK_RST_CONTROLLER_PLLC_BASE) |= PLLCX_BASE_REF_DIS;
- CLOCK(CLK_RST_CONTROLLER_PLLC_MISC_1) |= PLLC_MISC1_IDDQ;
- CLOCK(CLK_RST_CONTROLLER_PLLC_MISC) |= PLLC_MISC_RESET;
- usleep(10);
-}
-
-#define PLLC4_ENABLED (1 << 31)
-#define PLLC4_IN_USE (~PLLC4_ENABLED)
-
-u32 pllc4_enabled = 0;
-
-static void _clock_enable_pllc4(u32 mask)
-{
- pllc4_enabled |= mask;
-
- if (pllc4_enabled & PLLC4_ENABLED)
- return;
-
- // Enable Phase and Frequency lock detection.
- //CLOCK(CLK_RST_CONTROLLER_PLLC4_MISC) = PLLC4_MISC_EN_LCKDET;
-
- // Disable PLL and IDDQ in case they are on.
- CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLCX_BASE_ENABLE;
- CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLC4_BASE_IDDQ;
- usleep(10);
-
- // Set PLLC4 dividers.
- CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) = (104 << 8) | 4; // DIVM: 4, DIVP: 1.
-
- // Enable PLLC4 and wait for Phase and Frequency lock.
- CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) |= PLLCX_BASE_ENABLE;
- while (!(CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) & PLLCX_BASE_LOCK))
- ;
-
- msleep(1); // Wait a bit for PLL to stabilize.
-
- pllc4_enabled |= PLLC4_ENABLED;
-}
-
-static void _clock_disable_pllc4(u32 mask)
-{
- pllc4_enabled &= ~mask;
-
- // Check if currently in use or disabled.
- if ((pllc4_enabled & PLLC4_IN_USE) || !(pllc4_enabled & PLLC4_ENABLED))
- return;
-
- // Disable PLLC4.
- msleep(1); // Wait at least 1ms to prevent glitching.
- CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLCX_BASE_ENABLE;
- CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) |= PLLC4_BASE_IDDQ;
- usleep(10);
-
- pllc4_enabled = 0;
-}
-
-#define L_SWR_SDMMC1_RST (1 << 14)
-#define L_SWR_SDMMC2_RST (1 << 9)
-#define L_SWR_SDMMC4_RST (1 << 15)
-#define U_SWR_SDMMC3_RST (1 << 5)
-
-#define L_CLK_ENB_SDMMC1 (1 << 14)
-#define L_CLK_ENB_SDMMC2 (1 << 9)
-#define L_CLK_ENB_SDMMC4 (1 << 15)
-#define U_CLK_ENB_SDMMC3 (1 << 5)
-
-#define L_SET_SDMMC1_RST (1 << 14)
-#define L_SET_SDMMC2_RST (1 << 9)
-#define L_SET_SDMMC4_RST (1 << 15)
-#define U_SET_SDMMC3_RST (1 << 5)
-
-#define L_CLR_SDMMC1_RST (1 << 14)
-#define L_CLR_SDMMC2_RST (1 << 9)
-#define L_CLR_SDMMC4_RST (1 << 15)
-#define U_CLR_SDMMC3_RST (1 << 5)
-
-#define L_SET_CLK_ENB_SDMMC1 (1 << 14)
-#define L_SET_CLK_ENB_SDMMC2 (1 << 9)
-#define L_SET_CLK_ENB_SDMMC4 (1 << 15)
-#define U_SET_CLK_ENB_SDMMC3 (1 << 5)
-
-#define L_CLR_CLK_ENB_SDMMC1 (1 << 14)
-#define L_CLR_CLK_ENB_SDMMC2 (1 << 9)
-#define L_CLR_CLK_ENB_SDMMC4 (1 << 15)
-#define U_CLR_CLK_ENB_SDMMC3 (1 << 5)
-
-static int _clock_sdmmc_is_reset(u32 id)
-{
- switch (id)
- {
- case SDMMC_1:
- return CLOCK(CLK_RST_CONTROLLER_RST_DEVICES_L) & L_SWR_SDMMC1_RST;
- case SDMMC_2:
- return CLOCK(CLK_RST_CONTROLLER_RST_DEVICES_L) & L_SWR_SDMMC2_RST;
- case SDMMC_3:
- return CLOCK(CLK_RST_CONTROLLER_RST_DEVICES_U) & U_SWR_SDMMC3_RST;
- case SDMMC_4:
- return CLOCK(CLK_RST_CONTROLLER_RST_DEVICES_L) & L_SWR_SDMMC4_RST;
- }
- return 0;
-}
-
-static void _clock_sdmmc_set_reset(u32 id)
-{
- switch (id)
- {
- case SDMMC_1:
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = L_SET_SDMMC1_RST;
- break;
- case SDMMC_2:
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = L_SET_SDMMC2_RST;
- break;
- case SDMMC_3:
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_U_SET) = U_SET_SDMMC3_RST;
- break;
- case SDMMC_4:
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = L_SET_SDMMC4_RST;
- break;
- }
-}
-
-static void _clock_sdmmc_clear_reset(u32 id)
-{
- switch (id)
- {
- case SDMMC_1:
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_CLR) = L_CLR_SDMMC1_RST;
- break;
- case SDMMC_2:
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_CLR) = L_CLR_SDMMC2_RST;
- break;
- case SDMMC_3:
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_U_CLR) = U_CLR_SDMMC3_RST;
- break;
- case SDMMC_4:
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_CLR) = L_CLR_SDMMC4_RST;
- break;
- }
-}
-
-static int _clock_sdmmc_is_enabled(u32 id)
-{
- switch (id)
- {
- case SDMMC_1:
- return CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) & L_CLK_ENB_SDMMC1;
- case SDMMC_2:
- return CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) & L_CLK_ENB_SDMMC2;
- case SDMMC_3:
- return CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_U) & U_CLK_ENB_SDMMC3;
- case SDMMC_4:
- return CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) & L_CLK_ENB_SDMMC4;
- }
- return 0;
-}
-
-static void _clock_sdmmc_set_enable(u32 id)
-{
- switch (id)
- {
- case SDMMC_1:
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_SET) = L_SET_CLK_ENB_SDMMC1;
- break;
- case SDMMC_2:
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_SET) = L_SET_CLK_ENB_SDMMC2;
- break;
- case SDMMC_3:
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_U_SET) = U_SET_CLK_ENB_SDMMC3;
- break;
- case SDMMC_4:
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_SET) = L_SET_CLK_ENB_SDMMC4;
- break;
- }
-}
-
-static void _clock_sdmmc_clear_enable(u32 id)
-{
- switch (id)
- {
- case SDMMC_1:
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = L_CLR_CLK_ENB_SDMMC1;
- break;
- case SDMMC_2:
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = L_CLR_CLK_ENB_SDMMC2;
- break;
- case SDMMC_3:
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_U_CLR) = U_CLR_CLK_ENB_SDMMC3;
- break;
- case SDMMC_4:
- CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = L_CLR_CLK_ENB_SDMMC4;
- break;
- }
-}
-
-static void _clock_sdmmc_config_legacy_tm()
-{
- clock_t *clk = &_clock_sdmmc_legacy_tm;
- if (!(CLOCK(clk->enable) & (1 << clk->index)))
- clock_enable(clk);
-}
-
-typedef struct _clock_sdmmc_t
-{
- u32 clock;
- u32 real_clock;
-} clock_sdmmc_t;
-
-static clock_sdmmc_t _clock_sdmmc_table[4] = { 0 };
-
-#define SDMMC_CLOCK_SRC_PLLP_OUT0 0x0
-#define SDMMC_CLOCK_SRC_PLLC4_OUT2 0x3
-#define SDMMC4_CLOCK_SRC_PLLC4_OUT2_LJ 0x1
-
-static int _clock_sdmmc_config_clock_host(u32 *pclock, u32 id, u32 val)
-{
- u32 divisor = 0;
- u32 source = SDMMC_CLOCK_SRC_PLLP_OUT0;
-
- if (id > SDMMC_4)
- return 0;
-
- // Get IO clock divisor.
- switch (val)
- {
- case 25000:
- *pclock = 24728;
- divisor = 31; // 16.5 div.
- break;
- case 26000:
- *pclock = 25500;
- divisor = 30; // 16 div.
- break;
- case 40800:
- *pclock = 40800;
- divisor = 18; // 10 div.
- break;
- case 50000:
- *pclock = 48000;
- divisor = 15; // 8.5 div.
- break;
- case 52000:
- *pclock = 51000;
- divisor = 14; // 8 div.
- break;
- case 100000:
- source = SDMMC_CLOCK_SRC_PLLC4_OUT2;
- *pclock = 99840;
- divisor = 2; // 2 div.
- break;
- case 164000:
- *pclock = 163200;
- divisor = 3; // 2.5 div.
- break;
- case 200000: // 240MHz evo+.
- switch (id)
- {
- case SDMMC_1:
- source = SDMMC_CLOCK_SRC_PLLC4_OUT2;
- break;
- case SDMMC_2:
- source = SDMMC4_CLOCK_SRC_PLLC4_OUT2_LJ;
- break;
- case SDMMC_3:
- source = SDMMC_CLOCK_SRC_PLLC4_OUT2;
- break;
- case SDMMC_4:
- source = SDMMC4_CLOCK_SRC_PLLC4_OUT2_LJ;
- break;
- }
- *pclock = 199680;
- divisor = 0; // 1 div.
- break;
- default:
- *pclock = 24728;
- divisor = 31; // 16.5 div.
- }
-
- _clock_sdmmc_table[id].clock = val;
- _clock_sdmmc_table[id].real_clock = *pclock;
-
- // Enable PLLC4 if in use by any SDMMC.
- if (source)
- _clock_enable_pllc4(1 << id);
-
- // Set SDMMC legacy timeout clock.
- _clock_sdmmc_config_legacy_tm();
-
- // Set SDMMC clock.
- switch (id)
- {
- case SDMMC_1:
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC1) = (source << 29) | divisor;
- break;
- case SDMMC_2:
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC2) = (source << 29) | divisor;
- break;
- case SDMMC_3:
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC3) = (source << 29) | divisor;
- break;
- case SDMMC_4:
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4) = (source << 29) | divisor;
- break;
- }
-
- return 1;
-}
-
-void clock_sdmmc_config_clock_source(u32 *pclock, u32 id, u32 val)
-{
- if (_clock_sdmmc_table[id].clock == val)
- {
- *pclock = _clock_sdmmc_table[id].real_clock;
- }
- else
- {
- int is_enabled = _clock_sdmmc_is_enabled(id);
- if (is_enabled)
- _clock_sdmmc_clear_enable(id);
- _clock_sdmmc_config_clock_host(pclock, id, val);
- if (is_enabled)
- _clock_sdmmc_set_enable(id);
- _clock_sdmmc_is_reset(id);
- }
-}
-
-void clock_sdmmc_get_card_clock_div(u32 *pclock, u16 *pdivisor, u32 type)
-{
- // Get Card clock divisor.
- switch (type)
- {
- case SDHCI_TIMING_MMC_ID: // Actual IO Freq: 380.59 KHz.
- *pclock = 26000;
- *pdivisor = 66;
- break;
- case SDHCI_TIMING_MMC_LS26:
- *pclock = 26000;
- *pdivisor = 1;
- break;
- case SDHCI_TIMING_MMC_HS52:
- *pclock = 52000;
- *pdivisor = 1;
- break;
- case SDHCI_TIMING_MMC_HS200:
- case SDHCI_TIMING_MMC_HS400:
- case SDHCI_TIMING_UHS_SDR104:
- *pclock = 200000;
- *pdivisor = 1;
- break;
- case SDHCI_TIMING_SD_ID: // Actual IO Freq: 380.43 KHz.
- *pclock = 25000;
- *pdivisor = 64;
- break;
- case SDHCI_TIMING_SD_DS12:
- case SDHCI_TIMING_UHS_SDR12:
- *pclock = 25000;
- *pdivisor = 1;
- break;
- case SDHCI_TIMING_SD_HS25:
- case SDHCI_TIMING_UHS_SDR25:
- *pclock = 50000;
- *pdivisor = 1;
- break;
- case SDHCI_TIMING_UHS_SDR50:
- *pclock = 100000;
- *pdivisor = 1;
- break;
- case SDHCI_TIMING_UHS_SDR82:
- *pclock = 164000;
- *pdivisor = 1;
- break;
- case SDHCI_TIMING_UHS_DDR50:
- *pclock = 40800;
- *pdivisor = 1;
- break;
- case SDHCI_TIMING_MMC_DDR52: // Actual IO Freq: 49.92 MHz.
- *pclock = 200000;
- *pdivisor = 2;
- break;
- }
-}
-
-int clock_sdmmc_is_not_reset_and_enabled(u32 id)
-{
- return !_clock_sdmmc_is_reset(id) && _clock_sdmmc_is_enabled(id);
-}
-
-void clock_sdmmc_enable(u32 id, u32 val)
-{
- u32 clock = 0;
-
- if (_clock_sdmmc_is_enabled(id))
- _clock_sdmmc_clear_enable(id);
- _clock_sdmmc_set_reset(id);
- _clock_sdmmc_config_clock_host(&clock, id, val);
- _clock_sdmmc_set_enable(id);
- _clock_sdmmc_is_reset(id);
- usleep((100000 + clock - 1) / clock);
- _clock_sdmmc_clear_reset(id);
- _clock_sdmmc_is_reset(id);
-}
-
-void clock_sdmmc_disable(u32 id)
-{
- _clock_sdmmc_set_reset(id);
- _clock_sdmmc_clear_enable(id);
- _clock_sdmmc_is_reset(id);
- _clock_disable_pllc4(1 << id);
-}
diff --git a/nyx/nyx_gui/soc/clock.h b/nyx/nyx_gui/soc/clock.h
deleted file mode 100644
index a9b9f9a..0000000
--- a/nyx/nyx_gui/soc/clock.h
+++ /dev/null
@@ -1,224 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _CLOCK_H_
-#define _CLOCK_H_
-
-#include "../utils/types.h"
-
-/*! Clock registers. */
-#define CLK_RST_CONTROLLER_RST_SOURCE 0x0
-#define CLK_RST_CONTROLLER_RST_DEVICES_L 0x4
-#define CLK_RST_CONTROLLER_RST_DEVICES_H 0x8
-#define CLK_RST_CONTROLLER_RST_DEVICES_U 0xC
-#define CLK_RST_CONTROLLER_CLK_OUT_ENB_L 0x10
-#define CLK_RST_CONTROLLER_CLK_OUT_ENB_H 0x14
-#define CLK_RST_CONTROLLER_CLK_OUT_ENB_U 0x18
-#define CLK_RST_CONTROLLER_CCLK_BURST_POLICY 0x20
-#define CLK_RST_CONTROLLER_SUPER_CCLK_DIVIDER 0x24
-#define CLK_RST_CONTROLLER_SCLK_BURST_POLICY 0x28
-#define CLK_RST_CONTROLLER_SUPER_SCLK_DIVIDER 0x2C
-#define CLK_RST_CONTROLLER_CLK_SYSTEM_RATE 0x30
-#define CLK_RST_CONTROLLER_MISC_CLK_ENB 0x48
-#define CLK_RST_CONTROLLER_OSC_CTRL 0x50
-#define CLK_RST_CONTROLLER_PLLC_BASE 0x80
-#define CLK_RST_CONTROLLER_PLLC_OUT 0x84
-#define CLK_RST_CONTROLLER_PLLC_MISC 0x88
-#define CLK_RST_CONTROLLER_PLLC_MISC_1 0x8C
-#define CLK_RST_CONTROLLER_PLLM_BASE 0x90
-#define CLK_RST_CONTROLLER_PLLM_MISC1 0x98
-#define CLK_RST_CONTROLLER_PLLM_MISC2 0x9C
-#define CLK_RST_CONTROLLER_PLLP_BASE 0xA0
-#define CLK_RST_CONTROLLER_PLLA_BASE 0xB0
-#define CLK_RST_CONTROLLER_PLLA_OUT 0xB4
-#define CLK_RST_CONTROLLER_PLLA_MISC1 0xB8
-#define CLK_RST_CONTROLLER_PLLA_MISC 0xBC
-#define CLK_RST_CONTROLLER_PLLU_BASE 0xC0
-#define CLK_RST_CONTROLLER_PLLU_MISC 0xCC
-#define CLK_RST_CONTROLLER_PLLD_BASE 0xD0
-#define CLK_RST_CONTROLLER_PLLD_MISC1 0xD8
-#define CLK_RST_CONTROLLER_PLLD_MISC 0xDC
-#define CLK_RST_CONTROLLER_PLLX_BASE 0xE0
-#define CLK_RST_CONTROLLER_PLLX_MISC 0xE4
-#define CLK_RST_CONTROLLER_PLLE_BASE 0xE8
-#define CLK_RST_CONTROLLER_PLLE_MISC 0xEC
-#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRA 0xF8
-#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRB 0xFC
-#define CLK_RST_CONTROLLER_CLK_SOURCE_I2S2 0x100
-#define CLK_RST_CONTROLLER_CLK_SOURCE_PWM 0x110
-#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C1 0x124
-#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C5 0x128
-#define CLK_RST_CONTROLLER_CLK_SOURCE_DISP1 0x138
-#define CLK_RST_CONTROLLER_CLK_SOURCE_VI 0x148
-#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC1 0x150
-#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC2 0x154
-#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC4 0x164
-#define CLK_RST_CONTROLLER_CLK_SOURCE_UARTA 0x178
-#define CLK_RST_CONTROLLER_CLK_SOURCE_UARTB 0x17C
-#define CLK_RST_CONTROLLER_CLK_SOURCE_HOST1X 0x180
-#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C2 0x198
-#define CLK_RST_CONTROLLER_CLK_SOURCE_EMC 0x19C
-#define CLK_RST_CONTROLLER_CLK_SOURCE_UARTC 0x1A0
-#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C3 0x1B8
-#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC3 0x1BC
-#define CLK_RST_CONTROLLER_CLK_SOURCE_UARTD 0x1C0
-#define CLK_RST_CONTROLLER_CLK_SOURCE_CSITE 0x1D4
-#define CLK_RST_CONTROLLER_CLK_SOURCE_I2S1 0x1D8
-#define CLK_RST_CONTROLLER_CLK_SOURCE_TSEC 0x1F4
-#define CLK_RST_CONTROLLER_CLK_OUT_ENB_X 0x280
-#define CLK_RST_CONTROLLER_CLK_ENB_X_SET 0x284
-#define CLK_RST_CONTROLLER_CLK_ENB_X_CLR 0x288
-#define CLK_RST_CONTROLLER_RST_DEVICES_X 0x28C
-#define CLK_RST_CONTROLLER_RST_DEV_X_SET 0x290
-#define CLK_RST_CONTROLLER_RST_DEV_X_CLR 0x294
-#define CLK_RST_CONTROLLER_CLK_OUT_ENB_Y 0x298
-#define CLK_RST_CONTROLLER_CLK_ENB_Y_SET 0x29C
-#define CLK_RST_CONTROLLER_CLK_ENB_Y_CLR 0x2A0
-#define CLK_RST_CONTROLLER_RST_DEVICES_Y 0x2A4
-#define CLK_RST_CONTROLLER_RST_DEV_Y_SET 0x2A8
-#define CLK_RST_CONTROLLER_RST_DEV_Y_CLR 0x2AC
-#define CLK_RST_CONTROLLER_RST_DEV_L_SET 0x300
-#define CLK_RST_CONTROLLER_RST_DEV_L_CLR 0x304
-#define CLK_RST_CONTROLLER_RST_DEV_H_SET 0x308
-#define CLK_RST_CONTROLLER_RST_DEV_H_CLR 0x30C
-#define CLK_RST_CONTROLLER_RST_DEV_U_SET 0x310
-#define CLK_RST_CONTROLLER_RST_DEV_U_CLR 0x314
-#define CLK_RST_CONTROLLER_CLK_ENB_L_SET 0x320
-#define CLK_RST_CONTROLLER_CLK_ENB_L_CLR 0x324
-#define CLK_RST_CONTROLLER_CLK_ENB_H_SET 0x328
-#define CLK_RST_CONTROLLER_CLK_ENB_H_CLR 0x32C
-#define CLK_RST_CONTROLLER_CLK_ENB_U_SET 0x330
-#define CLK_RST_CONTROLLER_CLK_ENB_U_CLR 0x334
-#define CLK_RST_CONTROLLER_RST_DEVICES_V 0x358
-#define CLK_RST_CONTROLLER_RST_DEVICES_W 0x35C
-#define CLK_RST_CONTROLLER_CLK_OUT_ENB_V 0x360
-#define CLK_RST_CONTROLLER_CLK_OUT_ENB_W 0x364
-#define CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2 0x388
-#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRC 0x3A0
-#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD 0x3A4
-#define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT 0x3B4
-#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C4 0x3C4
-#define CLK_RST_CONTROLLER_CLK_SOURCE_EXTPERIPH1 0x3EC
-#define CLK_RST_CONTROLLER_CLK_SOURCE_SYS 0x400
-#define CLK_RST_CONTROLLER_CLK_SOURCE_SOR1 0x410
-#define CLK_RST_CONTROLLER_CLK_SOURCE_SE 0x42C
-#define CLK_RST_CONTROLLER_RST_DEV_V_SET 0x430
-#define CLK_RST_CONTROLLER_RST_DEV_V_CLR 0x434
-#define CLK_RST_CONTROLLER_RST_DEV_W_SET 0x438
-#define CLK_RST_CONTROLLER_RST_DEV_W_CLR 0x43C
-#define CLK_RST_CONTROLLER_CLK_ENB_V_SET 0x440
-#define CLK_RST_CONTROLLER_CLK_ENB_V_CLR 0x444
-#define CLK_RST_CONTROLLER_CLK_ENB_W_SET 0x448
-#define CLK_RST_CONTROLLER_CLK_ENB_W_CLR 0x44C
-#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET 0x450
-#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR 0x454
-#define CLK_RST_CONTROLLER_UTMIP_PLL_CFG0 0x480
-#define CLK_RST_CONTROLLER_UTMIP_PLL_CFG1 0x484
-#define CLK_RST_CONTROLLER_UTMIP_PLL_CFG2 0x488
-#define CLK_RST_CONTROLLER_PLLE_AUX 0x48C
-#define CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_I2S0 0x4A0
-#define CLK_RST_CONTROLLER_PLLX_MISC_3 0x518
-#define CLK_RST_CONTROLLER_UTMIPLL_HW_PWRDN_CFG0 0x52C
-#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRE 0x554
-#define CLK_RST_CONTROLLER_SPARE_REG0 0x55C
-#define CLK_RST_CONTROLLER_PLLC4_BASE 0x5A4
-#define CLK_RST_CONTROLLER_PLLC4_MISC 0x5A8
-#define CLK_RST_CONTROLLER_PLLC_MISC_2 0x5D0
-#define CLK_RST_CONTROLLER_PLLC4_OUT 0x5E4
-#define CLK_RST_CONTROLLER_PLLMB_BASE 0x5E8
-#define CLK_RST_CONTROLLER_CLK_SOURCE_DSIA_LP 0x620
-#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C6 0x65C
-#define CLK_RST_CONTROLLER_CLK_SOURCE_EMC_DLL 0x664
-#define CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL 0x66C
-#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM 0x694
-#define CLK_RST_CONTROLLER_CLK_SOURCE_NVENC 0x6A0
-#define CLK_RST_CONTROLLER_CLK_SOURCE_USB2_HSIC_TRK 0x6CC
-#define CLK_RST_CONTROLLER_SE_SUPER_CLK_DIVIDER 0x704
-#define CLK_RST_CONTROLLER_CLK_SOURCE_UARTAPE 0x710
-
-#define CLK_NO_SOURCE 0x0
-
-/*! PLL control and status bits */
-#define PLLCX_BASE_ENABLE (1 << 30)
-#define PLLCX_BASE_REF_DIS (1 << 29)
-#define PLLCX_BASE_LOCK (1 << 27)
-
-#define PLLA_BASE_IDDQ (1 << 25)
-#define PLLA_OUT0_CLKEN (1 << 1)
-#define PLLA_OUT0_RSTN_CLR (1 << 0)
-
-#define PLLC_MISC_RESET (1 << 30)
-#define PLLC_MISC1_IDDQ (1 << 27)
-#define PLLC_OUT1_CLKEN (1 << 1)
-#define PLLC_OUT1_RSTN_CLR (1 << 0)
-
-#define PLLC4_MISC_EN_LCKDET (1 << 30)
-#define PLLC4_BASE_IDDQ (1 << 18)
-#define PLLC4_OUT3_CLKEN (1 << 1)
-#define PLLC4_OUT3_RSTN_CLR (1 << 0)
-
-/*! Generic clock descriptor. */
-typedef struct _clock_t
-{
- u32 reset;
- u32 enable;
- u32 source;
- u8 index;
- u8 clk_src;
- u8 clk_div;
-} clock_t;
-
-/*! Generic clock enable/disable. */
-void clock_enable(const clock_t *clk);
-void clock_disable(const clock_t *clk);
-
-/*! Clock control for specific hardware portions. */
-void clock_enable_fuse(bool enable);
-void clock_enable_uart(u32 idx);
-void clock_disable_uart(u32 idx);
-int clock_uart_use_src_div(u32 idx, u32 baud);
-void clock_enable_i2c(u32 idx);
-void clock_disable_i2c(u32 idx);
-void clock_enable_se();
-void clock_enable_tzram();
-void clock_enable_host1x();
-void clock_disable_host1x();
-void clock_enable_tsec();
-void clock_disable_tsec();
-void clock_enable_sor_safe();
-void clock_disable_sor_safe();
-void clock_enable_sor0();
-void clock_disable_sor0();
-void clock_enable_sor1();
-void clock_disable_sor1();
-void clock_enable_kfuse();
-void clock_disable_kfuse();
-void clock_enable_cl_dvfs();
-void clock_disable_cl_dvfs();
-void clock_enable_coresight();
-void clock_disable_coresight();
-void clock_enable_pwm();
-void clock_disable_pwm();
-void clock_enable_pllc(u32 divn);
-void clock_disable_pllc();
-void clock_sdmmc_config_clock_source(u32 *pclock, u32 id, u32 val);
-void clock_sdmmc_get_card_clock_div(u32 *pclock, u16 *pdivisor, u32 type);
-int clock_sdmmc_is_not_reset_and_enabled(u32 id);
-void clock_sdmmc_enable(u32 id, u32 val);
-void clock_sdmmc_disable(u32 id);
-
-#endif
diff --git a/nyx/nyx_gui/soc/fuse.c b/nyx/nyx_gui/soc/fuse.c
deleted file mode 100644
index 8b30a74..0000000
--- a/nyx/nyx_gui/soc/fuse.c
+++ /dev/null
@@ -1,357 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 shuffle2
- * Copyright (c) 2018 balika011
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "../soc/fuse.h"
-#include "../soc/t210.h"
-
-#define ARRAYSIZE(x) (sizeof(x) / sizeof(*x))
-
-static const u32 evp_thunk_template[] = {
- 0xe92d0007, // STMFD SP!, {R0-R2}
- 0xe1a0200e, // MOV R2, LR
- 0xe2422002, // SUB R2, R2, #2
- 0xe5922000, // LDR R2, [R2]
- 0xe20220ff, // AND R2, R2, #0xFF
- 0xe1a02082, // MOV R2, R2,LSL#1
- 0xe59f001c, // LDR R0, =evp_thunk_template
- 0xe59f101c, // LDR R1, =thunk_end
- 0xe0411000, // SUB R1, R1, R0
- 0xe59f0018, // LDR R0, =iram_evp_thunks
- 0xe0800001, // ADD R0, R0, R1
- 0xe0822000, // ADD R2, R2, R0
- 0xe3822001, // ORR R2, R2, #1
- 0xe8bd0003, // LDMFD SP!, {R0,R1}
- 0xe12fff12, // BX R2
- 0x001007b0, // off_1007EC DCD evp_thunk_template
- 0x001007f8, // off_1007F0 DCD thunk_end
- 0x40004c30, // off_1007F4 DCD iram_evp_thunks
- // thunk_end is here
-};
-static const u32 evp_thunk_template_len = sizeof(evp_thunk_template);
-
-// treated as 12bit values
-static const u32 hash_vals[] = {1, 2, 4, 8, 0, 3, 5, 6, 7, 9, 10, 11};
-
-void fuse_disable_program()
-{
- FUSE(FUSE_DISABLEREGPROGRAM) = 1;
-}
-
-u32 fuse_read_odm(u32 idx)
-{
- return FUSE(FUSE_RESERVED_ODMX(idx));
-}
-
-u32 fuse_read_odm_keygen_rev()
-{
- if ((fuse_read_odm(4) & 0x800) && fuse_read_odm(0) == 0x8E61ECAE && fuse_read_odm(1) == 0xF2BA3BB2)
- return (fuse_read_odm(2) & 0x1F);
-
- return 0;
-}
-
-void fuse_wait_idle()
-{
- u32 ctrl;
- do
- {
- ctrl = FUSE(FUSE_CTRL);
- } while (((ctrl >> 16) & 0x1f) != 4);
-}
-
-u32 fuse_read(u32 addr)
-{
- FUSE(FUSE_ADDR) = addr;
- FUSE(FUSE_CTRL) = (FUSE(FUSE_ADDR) & ~FUSE_CMD_MASK) | FUSE_READ;
- fuse_wait_idle();
- return FUSE(FUSE_RDATA);
-}
-
-void fuse_read_array(u32 *words)
-{
- for (u32 i = 0; i < 192; i++)
- words[i] = fuse_read(i);
-}
-
-static u32 _parity32_even(u32 *words, u32 count)
-{
- u32 acc = words[0];
- for (u32 i = 1; i < count; i++)
- {
- acc ^= words[i];
- }
- u32 lo = ((acc & 0xffff) ^ (acc >> 16)) & 0xff;
- u32 hi = ((acc & 0xffff) ^ (acc >> 16)) >> 8;
- u32 x = hi ^ lo;
- lo = ((x & 0xf) ^ (x >> 4)) & 3;
- hi = ((x & 0xf) ^ (x >> 4)) >> 2;
- x = hi ^ lo;
-
- return (x & 1) ^ (x >> 1);
-}
-
-static int _patch_hash_one(u32 *word)
-{
- u32 bits20_31 = *word & 0xfff00000;
- u32 parity_bit = _parity32_even(&bits20_31, 1);
- u32 hash = 0;
- for (u32 i = 0; i < 12; i++)
- {
- if (*word & (1 << (20 + i)))
- {
- hash ^= hash_vals[i];
- }
- }
- if (hash == 0)
- {
- if (parity_bit == 0)
- {
- return 0;
- }
- *word ^= 1 << 24;
- return 1;
- }
- if (parity_bit == 0)
- {
- return 3;
- }
- for (u32 i = 0; i < ARRAYSIZE(hash_vals); i++)
- {
- if (hash_vals[i] == hash)
- {
- *word ^= 1 << (20 + i);
- return 1;
- }
- }
- return 2;
-}
-
-static int _patch_hash_multi(u32 *words, u32 count)
-{
- u32 parity_bit = _parity32_even(words, count);
- u32 bits0_14 = words[0] & 0x7fff;
- u32 bit15 = words[0] & 0x8000;
- u32 bits16_19 = words[0] & 0xf0000;
-
- u32 hash = 0;
- words[0] = bits16_19;
- for (u32 i = 0; i < count; i++)
- {
- u32 w = words[i];
- if (w)
- {
- for (u32 bitpos = 0; bitpos < 32; bitpos++)
- {
- if ((w >> bitpos) & 1)
- {
- hash ^= 0x4000 + i * 32 + bitpos;
- }
- }
- }
- }
- hash ^= bits0_14;
- // stupid but this is what original code does.
- // equivalent to original words[0] &= 0xfff00000
- words[0] = bits16_19 ^ bit15 ^ bits0_14;
-
- if (hash == 0)
- {
- if (parity_bit == 0)
- {
- return 0;
- }
- words[0] ^= 0x8000;
- return 1;
- }
- if (parity_bit == 0)
- {
- return 3;
- }
- u32 bitcount = hash - 0x4000;
- if (bitcount < 16 || bitcount >= count * 32)
- {
- u32 num_set = 0;
- for (u32 bitpos = 0; bitpos < 15; bitpos++)
- {
- if ((hash >> bitpos) & 1)
- {
- num_set++;
- }
- }
- if (num_set != 1)
- {
- return 2;
- }
- words[0] ^= hash;
- return 1;
- }
- words[bitcount / 32] ^= 1 << (hash & 0x1f);
- return 1;
-}
-
-int fuse_read_ipatch(void (*ipatch)(u32 offset, u32 value))
-{
- u32 words[80];
- u32 word_count;
- u32 word_addr;
- u32 word0 = 0;
- u32 total_read = 0;
-
- word_count = FUSE(FUSE_FIRST_BOOTROM_PATCH_SIZE);
- word_count &= 0x7F;
- word_addr = 191;
-
- while (word_count)
- {
- total_read += word_count;
- if (total_read >= ARRAYSIZE(words))
- {
- break;
- }
-
- for (u32 i = 0; i < word_count; i++)
- words[i] = fuse_read(word_addr--);
-
- word0 = words[0];
- if (_patch_hash_multi(words, word_count) >= 2)
- {
- return 1;
- }
- u32 ipatch_count = (words[0] >> 16) & 0xF;
- if (ipatch_count)
- {
- for (u32 i = 0; i < ipatch_count; i++)
- {
- u32 word = words[i + 1];
- u32 addr = (word >> 16) * 2;
- u32 data = word & 0xFFFF;
-
- ipatch(addr, data);
- }
- }
- words[0] = word0;
- if ((word0 >> 25) == 0)
- break;
- if (_patch_hash_one(&word0) >= 2)
- {
- return 3;
- }
- word_count = word0 >> 25;
- }
-
- return 0;
-}
-
-int fuse_read_evp_thunk(u32 *iram_evp_thunks, u32 *iram_evp_thunks_len)
-{
- u32 words[80];
- u32 word_count;
- u32 word_addr;
- u32 word0 = 0;
- u32 total_read = 0;
- int evp_thunk_written = 0;
- void *evp_thunk_dst_addr = 0;
-
- memset(iram_evp_thunks, 0, *iram_evp_thunks_len);
-
- word_count = FUSE(FUSE_FIRST_BOOTROM_PATCH_SIZE);
- word_count &= 0x7F;
- word_addr = 191;
-
- while (word_count)
- {
- total_read += word_count;
- if (total_read >= ARRAYSIZE(words))
- {
- break;
- }
-
- for (u32 i = 0; i < word_count; i++)
- words[i] = fuse_read(word_addr--);
-
- word0 = words[0];
- if (_patch_hash_multi(words, word_count) >= 2)
- {
- return 1;
- }
- u32 ipatch_count = (words[0] >> 16) & 0xF;
- u32 insn_count = word_count - ipatch_count - 1;
- if (insn_count)
- {
- if (!evp_thunk_written)
- {
- evp_thunk_dst_addr = (void *)iram_evp_thunks;
-
- memcpy(evp_thunk_dst_addr, (void *)evp_thunk_template, evp_thunk_template_len);
- evp_thunk_dst_addr += evp_thunk_template_len;
- evp_thunk_written = 1;
- *iram_evp_thunks_len = evp_thunk_template_len;
-
- //write32(TEGRA_EXCEPTION_VECTORS_BASE + 0x208, iram_evp_thunks);
- }
-
- u32 thunk_patch_len = insn_count * sizeof(u32);
- memcpy(evp_thunk_dst_addr, &words[ipatch_count + 1], thunk_patch_len);
- evp_thunk_dst_addr += thunk_patch_len;
- *iram_evp_thunks_len += thunk_patch_len;
- }
- words[0] = word0;
- if ((word0 >> 25) == 0)
- break;
- if (_patch_hash_one(&word0) >= 2)
- {
- return 3;
- }
- word_count = word0 >> 25;
- }
-
- return 0;
-}
-
-bool fuse_check_patched_rcm()
-{
- // Check if XUSB in use.
- if (FUSE(FUSE_RESERVED_SW) & (1<<7))
- return true;
-
- // Check if RCM is ipatched.
- u32 word_count = FUSE(FUSE_FIRST_BOOTROM_PATCH_SIZE) & 0x7F;
- u32 word_addr = 191;
-
- while (word_count)
- {
- u32 word0 = fuse_read(word_addr);
- u32 ipatch_count = (word0 >> 16) & 0xF;
-
- for (u32 i = 0; i < ipatch_count; i++)
- {
- u32 word = fuse_read(word_addr - (i + 1));
- u32 addr = (word >> 16) * 2;
- if (addr == 0x769A)
- return true;
- }
-
- word_addr -= word_count;
- word_count = word0 >> 25;
- }
-
- return false;
-}
diff --git a/nyx/nyx_gui/soc/fuse.h b/nyx/nyx_gui/soc/fuse.h
deleted file mode 100644
index 5e59609..0000000
--- a/nyx/nyx_gui/soc/fuse.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 shuffle2
- * Copyright (c) 2018 balika011
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _FUSE_H_
-#define _FUSE_H_
-
-#include "../utils/types.h"
-
-/*! Fuse registers. */
-#define FUSE_CTRL 0x0
-#define FUSE_ADDR 0x4
-#define FUSE_RDATA 0x8
-#define FUSE_WDATA 0xC
-#define FUSE_TIME_RD1 0x10
-#define FUSE_TIME_RD2 0x14
-#define FUSE_TIME_PGM1 0x18
-#define FUSE_TIME_PGM2 0x1C
-#define FUSE_PRIV2INTFC 0x20
-#define FUSE_FUSEBYPASS 0x24
-#define FUSE_PRIVATEKEYDISABLE 0x28
-#define FUSE_DISABLEREGPROGRAM 0x2C
-#define FUSE_WRITE_ACCESS_SW 0x30
-#define FUSE_PWR_GOOD_SW 0x34
-#define FUSE_SKU_INFO 0x110
-#define FUSE_CPU_SPEEDO_0_CALIB 0x114
-#define FUSE_CPU_IDDQ_CALIB 0x118
-#define FUSE_OPT_FT_REV 0x128
-#define FUSE_CPU_SPEEDO_1_CALIB 0x12C
-#define FUSE_CPU_SPEEDO_2_CALIB 0x130
-#define FUSE_SOC_SPEEDO_0_CALIB 0x134
-#define FUSE_SOC_SPEEDO_1_CALIB 0x138
-#define FUSE_SOC_SPEEDO_2_CALIB 0x13C
-#define FUSE_SOC_IDDQ_CALIB 0x140
-#define FUSE_OPT_CP_REV 0x190
-#define FUSE_FIRST_BOOTROM_PATCH_SIZE 0x19c
-#define FUSE_PRIVATE_KEY0 0x1A4
-#define FUSE_PRIVATE_KEY1 0x1A8
-#define FUSE_PRIVATE_KEY2 0x1AC
-#define FUSE_PRIVATE_KEY3 0x1B0
-#define FUSE_PRIVATE_KEY4 0x1B4
-#define FUSE_RESERVED_SW 0x1C0
-#define FUSE_USB_CALIB 0x1F0
-#define FUSE_SKU_DIRECT_CONFIG 0x1F4
-#define FUSE_OPT_VENDOR_CODE 0x200
-#define FUSE_OPT_FAB_CODE 0x204
-#define FUSE_OPT_LOT_CODE_0 0x208
-#define FUSE_OPT_LOT_CODE_1 0x20C
-#define FUSE_OPT_WAFER_ID 0x210
-#define FUSE_OPT_X_COORDINATE 0x214
-#define FUSE_OPT_Y_COORDINATE 0x218
-#define FUSE_GPU_IDDQ_CALIB 0x228
-#define FUSE_USB_CALIB_EXT 0x350
-
-/*! Fuse commands. */
-#define FUSE_READ 0x1
-#define FUSE_WRITE 0x2
-#define FUSE_SENSE 0x3
-#define FUSE_CMD_MASK 0x3
-
-/*! Fuse cache registers. */
-#define FUSE_RESERVED_ODMX(x) (0x1C8 + 4 * (x))
-
-void fuse_disable_program();
-u32 fuse_read_odm(u32 idx);
-u32 fuse_read_odm_keygen_rev();
-void fuse_wait_idle();
-int fuse_read_ipatch(void (*ipatch)(u32 offset, u32 value));
-int fuse_read_evp_thunk(u32 *iram_evp_thunks, u32 *iram_evp_thunks_len);
-void fuse_read_array(u32 *words);
-bool fuse_check_patched_rcm();
-
-#endif
diff --git a/nyx/nyx_gui/soc/gpio.c b/nyx/nyx_gui/soc/gpio.c
deleted file mode 100644
index 3371947..0000000
--- a/nyx/nyx_gui/soc/gpio.c
+++ /dev/null
@@ -1,168 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "gpio.h"
-#include "t210.h"
-
-#define GPIO_BANK_IDX(port) (port >> 2)
-
-#define GPIO_CNF_OFFSET(port) (0x00 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_OE_OFFSET(port) (0x10 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_OUT_OFFSET(port) (0x20 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_IN_OFFSET(port) (0x30 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_INT_STA_OFFSET(port) (0x40 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_INT_ENB_OFFSET(port) (0x50 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_INT_LVL_OFFSET(port) (0x60 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_INT_CLR_OFFSET(port) (0x70 + ((port >> 2) << 8) + ((port % 4) << 2))
-
-#define GPIO_CNF_MASKED_OFFSET(port) (0x80 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_OE_MASKED_OFFSET(port) (0x90 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_OUT_MASKED_OFFSET(port) (0xA0 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_INT_STA_MASKED_OFFSET(port) (0xC0 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_INT_ENB_MASKED_OFFSET(port) (0xD0 + ((port >> 2) << 8) + ((port % 4) << 2))
-#define GPIO_INT_LVL_MASKED_OFFSET(port) (0xE0 + ((port >> 2) << 8) + ((port % 4) << 2))
-
-#define GPIO_IRQ_BANK1 32
-#define GPIO_IRQ_BANK2 33
-#define GPIO_IRQ_BANK3 34
-#define GPIO_IRQ_BANK4 35
-#define GPIO_IRQ_BANK5 55
-#define GPIO_IRQ_BANK6 87
-#define GPIO_IRQ_BANK7 89
-#define GPIO_IRQ_BANK8 125
-
-static u8 gpio_bank_irq_ids[8] = {
- GPIO_IRQ_BANK1, GPIO_IRQ_BANK2, GPIO_IRQ_BANK3, GPIO_IRQ_BANK4,
- GPIO_IRQ_BANK5, GPIO_IRQ_BANK6, GPIO_IRQ_BANK7, GPIO_IRQ_BANK8
-};
-
-void gpio_config(u32 port, u32 pins, int mode)
-{
- u32 offset = GPIO_CNF_OFFSET(port);
-
- if (mode)
- GPIO(offset) |= pins;
- else
- GPIO(offset) &= ~pins;
-
- (void)GPIO(offset); // Commit the write.
-}
-
-void gpio_output_enable(u32 port, u32 pins, int enable)
-{
- u32 port_offset = GPIO_OE_OFFSET(port);
-
- if (enable)
- GPIO(port_offset) |= pins;
- else
- GPIO(port_offset) &= ~pins;
-
- (void)GPIO(port_offset); // Commit the write.
-}
-
-void gpio_write(u32 port, u32 pins, int high)
-{
- u32 port_offset = GPIO_OUT_OFFSET(port);
-
- if (high)
- GPIO(port_offset) |= pins;
- else
- GPIO(port_offset) &= ~pins;
-
- (void)GPIO(port_offset); // Commit the write.
-}
-
-int gpio_read(u32 port, u32 pins)
-{
- u32 port_offset = GPIO_IN_OFFSET(port);
-
- return (GPIO(port_offset) & pins) ? 1 : 0;
-}
-
-static void _gpio_interrupt_clear(u32 port, u32 pins)
-{
- u32 port_offset = GPIO_INT_CLR_OFFSET(port);
-
- GPIO(port_offset) |= pins;
-
- (void)GPIO(port_offset); // Commit the write.
-}
-
-int gpio_interrupt_status(u32 port, u32 pins)
-{
- u32 port_offset = GPIO_INT_STA_OFFSET(port);
- u32 enabled = GPIO(GPIO_INT_ENB_OFFSET(port)) & pins;
-
- int status = ((GPIO(port_offset) & pins) && enabled) ? 1 : 0;
-
- // Clear the interrupt status.
- if (status)
- _gpio_interrupt_clear(port, pins);
-
- return status;
-}
-
-void gpio_interrupt_enable(u32 port, u32 pins, int enable)
-{
- u32 port_offset = GPIO_INT_ENB_OFFSET(port);
-
- // Clear any possible stray interrupt.
- _gpio_interrupt_clear(port, pins);
-
- if (enable)
- GPIO(port_offset) |= pins;
- else
- GPIO(port_offset) &= ~pins;
-
- (void)GPIO(port_offset); // Commit the write.
-}
-
-void gpio_interrupt_level(u32 port, u32 pins, int high, int edge, int delta)
-{
- u32 port_offset = GPIO_INT_LVL_OFFSET(port);
-
- u32 val = GPIO(port_offset);
-
- if (high)
- val |= pins;
- else
- val &= ~pins;
-
- if (edge)
- val |= pins << 8;
- else
- val &= ~(pins << 8);
-
- if (delta)
- val |= pins << 16;
- else
- val &= ~(pins << 16);
-
- GPIO(port_offset) = val;
-
- (void)GPIO(port_offset); // Commit the write.
-
- // Clear any possible stray interrupt.
- _gpio_interrupt_clear(port, pins);
-}
-
-u32 gpio_get_bank_irq_id(u32 port)
-{
- u32 bank_idx = GPIO_BANK_IDX(port);
-
- return gpio_bank_irq_ids[bank_idx];
-}
\ No newline at end of file
diff --git a/nyx/nyx_gui/soc/gpio.h b/nyx/nyx_gui/soc/gpio.h
deleted file mode 100644
index a7f999d..0000000
--- a/nyx/nyx_gui/soc/gpio.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _GPIO_H_
-#define _GPIO_H_
-
-#include "../utils/types.h"
-
-#define GPIO_MODE_SPIO 0
-#define GPIO_MODE_GPIO 1
-
-#define GPIO_OUTPUT_DISABLE 0
-#define GPIO_OUTPUT_ENABLE 1
-
-#define GPIO_IRQ_DISABLE 0
-#define GPIO_IRQ_ENABLE 1
-
-#define GPIO_LOW 0
-#define GPIO_HIGH 1
-#define GPIO_FALLING 0
-#define GPIO_RISING 1
-
-#define GPIO_LEVEL 0
-#define GPIO_EDGE 1
-
-#define GPIO_CONFIGURED_EDGE 0
-#define GPIO_ANY_EDGE_CHANGE 1
-
-/*! GPIO pins (0-7 for each port). */
-#define GPIO_PIN_0 (1 << 0)
-#define GPIO_PIN_1 (1 << 1)
-#define GPIO_PIN_2 (1 << 2)
-#define GPIO_PIN_3 (1 << 3)
-#define GPIO_PIN_4 (1 << 4)
-#define GPIO_PIN_5 (1 << 5)
-#define GPIO_PIN_6 (1 << 6)
-#define GPIO_PIN_7 (1 << 7)
-
-/*! GPIO ports (A-EE). */
-#define GPIO_PORT_A 0
-#define GPIO_PORT_B 1
-#define GPIO_PORT_C 2
-#define GPIO_PORT_D 3
-#define GPIO_PORT_E 4
-#define GPIO_PORT_F 5
-#define GPIO_PORT_G 6
-#define GPIO_PORT_H 7
-#define GPIO_PORT_I 8
-#define GPIO_PORT_J 9
-#define GPIO_PORT_K 10
-#define GPIO_PORT_L 11
-#define GPIO_PORT_M 12
-#define GPIO_PORT_N 13
-#define GPIO_PORT_O 14
-#define GPIO_PORT_P 15
-#define GPIO_PORT_Q 16
-#define GPIO_PORT_R 17
-#define GPIO_PORT_S 18
-#define GPIO_PORT_T 19
-#define GPIO_PORT_U 20
-#define GPIO_PORT_V 21
-#define GPIO_PORT_W 22
-#define GPIO_PORT_X 23
-#define GPIO_PORT_Y 24
-#define GPIO_PORT_Z 25
-#define GPIO_PORT_AA 26
-#define GPIO_PORT_BB 27
-#define GPIO_PORT_CC 28
-#define GPIO_PORT_DD 29
-#define GPIO_PORT_EE 30
-
-void gpio_config(u32 port, u32 pins, int mode);
-void gpio_output_enable(u32 port, u32 pins, int enable);
-void gpio_write(u32 port, u32 pins, int high);
-int gpio_read(u32 port, u32 pins);
-int gpio_interrupt_status(u32 port, u32 pins);
-void gpio_interrupt_enable(u32 port, u32 pins, int enable);
-void gpio_interrupt_level(u32 port, u32 pins, int high, int edge, int delta);
-u32 gpio_get_bank_irq_id(u32 port);
-
-#endif
diff --git a/nyx/nyx_gui/soc/hw_init.c b/nyx/nyx_gui/soc/hw_init.c
deleted file mode 100644
index 9dc0ca6..0000000
--- a/nyx/nyx_gui/soc/hw_init.c
+++ /dev/null
@@ -1,397 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "hw_init.h"
-#include "bpmp.h"
-#include "clock.h"
-#include "fuse.h"
-#include "gpio.h"
-#include "i2c.h"
-#include "pinmux.h"
-#include "pmc.h"
-#include "uart.h"
-#include "t210.h"
-#include "../input/joycon.h"
-#include "../input/touch.h"
-#include "../gfx/di.h"
-#include "../mem/mc.h"
-#include "../mem/minerva.h"
-#include "../mem/sdram.h"
-#include "../sec/se.h"
-#include "../sec/se_t210.h"
-#include "../power/max77620.h"
-#include "../power/max7762x.h"
-#include "../gfx/di.h"
-#include "../power/regulator_5v.h"
-#include "../storage/nx_sd.h"
-#include "../storage/sdmmc.h"
-#include "../thermal/fan.h"
-#include "../utils/util.h"
-
-extern boot_cfg_t b_cfg;
-extern volatile nyx_storage_t *nyx_str;
-
-/*
- * CLK_OSC - 38.4 MHz crystal.
- * CLK_M - 19.2 MHz (osc/2).
- * CLK_S - 32.768 KHz (from PMIC).
- * SCLK - 204MHz init (-> 408MHz -> OC).
- * HCLK - 204MHz init (-> 408MHz -> OC).
- * PCLK - 68MHz init (-> 136MHz -> OC/4).
- */
-
-void _config_oscillators()
-{
- CLOCK(CLK_RST_CONTROLLER_SPARE_REG0) = (CLOCK(CLK_RST_CONTROLLER_SPARE_REG0) & 0xFFFFFFF3) | 4; // Set CLK_M_DIVISOR to 2.
- SYSCTR0(SYSCTR0_CNTFID0) = 19200000; // Set counter frequency.
- TMR(TIMERUS_USEC_CFG) = 0x45F; // For 19.2MHz clk_m.
- CLOCK(CLK_RST_CONTROLLER_OSC_CTRL) = 0x50000071; // Set OSC to 38.4MHz and drive strength.
-
- PMC(APBDEV_PMC_OSC_EDPD_OVER) = (PMC(APBDEV_PMC_OSC_EDPD_OVER) & 0xFFFFFF81) | 0xE; // Set LP0 OSC drive strength.
- PMC(APBDEV_PMC_OSC_EDPD_OVER) = (PMC(APBDEV_PMC_OSC_EDPD_OVER) & 0xFFBFFFFF) | PMC_OSC_EDPD_OVER_OSC_CTRL_OVER;
- PMC(APBDEV_PMC_CNTRL2) = (PMC(APBDEV_PMC_CNTRL2) & 0xFFFFEFFF) | PMC_CNTRL2_HOLD_CKE_LOW_EN;
- PMC(APBDEV_PMC_SCRATCH188) = (PMC(APBDEV_PMC_SCRATCH188) & 0xFCFFFFFF) | (4 << 23); // LP0 EMC2TMC_CFG_XM2COMP_PU_VREF_SEL_RANGE.
-
- CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 0x10; // Set HCLK div to 2 and PCLK div to 1.
- CLOCK(CLK_RST_CONTROLLER_PLLMB_BASE) &= 0xBFFFFFFF; // PLLMB disable.
-
- PMC(APBDEV_PMC_TSC_MULT) = (PMC(APBDEV_PMC_TSC_MULT) & 0xFFFF0000) | 0x249F; //0x249F = 19200000 * (16 / 32.768 kHz)
-
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SYS) = 0; // Set SCLK div to 1.
- CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20004444; // Set clk source to Run and PLLP_OUT2 (204MHz).
- CLOCK(CLK_RST_CONTROLLER_SUPER_SCLK_DIVIDER) = 0x80000000; // Enable SUPER_SDIV to 1.
- CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // Set HCLK div to 1 and PCLK div to 3.
-}
-
-void _config_gpios()
-{
- /////////////////put mariko stuff, basically lite.
-
- PINMUX_AUX(PINMUX_AUX_UART2_TX) = 0;
- PINMUX_AUX(PINMUX_AUX_UART3_TX) = 0;
-
- // Set Joy-Con IsAttached direction.
- PINMUX_AUX(PINMUX_AUX_GPIO_PE6) = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE;
- PINMUX_AUX(PINMUX_AUX_GPIO_PH6) = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE;
-
- // Set pin mode for Joy-Con IsAttached and UARTB/C TX pins.
-#if !defined (DEBUG_UART_PORT) || DEBUG_UART_PORT != UART_B
- gpio_config(GPIO_PORT_G, GPIO_PIN_0, GPIO_MODE_GPIO);
-#endif
-#if !defined (DEBUG_UART_PORT) || DEBUG_UART_PORT != UART_C
- gpio_config(GPIO_PORT_D, GPIO_PIN_1, GPIO_MODE_GPIO);
-#endif
- // Set Joy-Con IsAttached mode.
- gpio_config(GPIO_PORT_E, GPIO_PIN_6, GPIO_MODE_GPIO);
- gpio_config(GPIO_PORT_H, GPIO_PIN_6, GPIO_MODE_GPIO);
-
- // Enable input logic for Joy-Con IsAttached and UARTB/C TX pins.
- gpio_output_enable(GPIO_PORT_G, GPIO_PIN_0, GPIO_OUTPUT_DISABLE);
- gpio_output_enable(GPIO_PORT_D, GPIO_PIN_1, GPIO_OUTPUT_DISABLE);
- gpio_output_enable(GPIO_PORT_E, GPIO_PIN_6, GPIO_OUTPUT_DISABLE);
- gpio_output_enable(GPIO_PORT_H, GPIO_PIN_6, GPIO_OUTPUT_DISABLE);
-
- pinmux_config_i2c(I2C_1);
- pinmux_config_i2c(I2C_5);
- pinmux_config_uart(UART_A);
-
- // Configure volume up/down as inputs.
- gpio_config(GPIO_PORT_X, GPIO_PIN_6, GPIO_MODE_GPIO);
- gpio_config(GPIO_PORT_X, GPIO_PIN_7, GPIO_MODE_GPIO);
- gpio_output_enable(GPIO_PORT_X, GPIO_PIN_6, GPIO_OUTPUT_DISABLE);
- gpio_output_enable(GPIO_PORT_X, GPIO_PIN_7, GPIO_OUTPUT_DISABLE);
-
- // Configure HOME as inputs.
- // PINMUX_AUX(PINMUX_AUX_BUTTON_HOME) = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE;
- // gpio_config(GPIO_PORT_Y, GPIO_PIN_1, GPIO_MODE_GPIO);
-}
-
-void _config_pmc_scratch()
-{
- PMC(APBDEV_PMC_SCRATCH20) &= 0xFFF3FFFF; // Unset Debug console from Customer Option.
- PMC(APBDEV_PMC_SCRATCH190) &= 0xFFFFFFFE; // Unset DATA_DQ_E_IVREF EMC_PMACRO_DATA_PAD_TX_CTRL
- PMC(APBDEV_PMC_SECURE_SCRATCH21) |= PMC_FUSE_PRIVATEKEYDISABLE_TZ_STICKY_BIT;
-}
-
-void _mbist_workaround()
-{
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) |= (1 << 10); // Enable AHUB clock.
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_Y) |= (1 << 6); // Enable APE clock.
-
- // Set mux output to SOR1 clock switch.
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SOR1) = (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SOR1) | 0x8000) & 0xFFFFBFFF;
- // Enabled PLLD and set csi to PLLD for test pattern generation.
- CLOCK(CLK_RST_CONTROLLER_PLLD_BASE) |= 0x40800000;
-
- // Clear per-clock resets.
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_Y_CLR) = 0x40; // Clear reset APE.
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_X_CLR) = 0x40000; // Clear reset VIC.
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_CLR) = 0x18000000; // Clear reset DISP1, HOST1X.
- usleep(2);
-
- // I2S channels to master and disable SLCG.
- I2S(I2S1_CTRL) |= I2S_CTRL_MASTER_EN;
- I2S(I2S1_CG) &= ~I2S_CG_SLCG_ENABLE;
- I2S(I2S2_CTRL) |= I2S_CTRL_MASTER_EN;
- I2S(I2S2_CG) &= ~I2S_CG_SLCG_ENABLE;
- I2S(I2S3_CTRL) |= I2S_CTRL_MASTER_EN;
- I2S(I2S3_CG) &= ~I2S_CG_SLCG_ENABLE;
- I2S(I2S4_CTRL) |= I2S_CTRL_MASTER_EN;
- I2S(I2S4_CG) &= ~I2S_CG_SLCG_ENABLE;
- I2S(I2S5_CTRL) |= I2S_CTRL_MASTER_EN;
- I2S(I2S5_CG) &= ~I2S_CG_SLCG_ENABLE;
-
- DISPLAY_A(_DIREG(DC_COM_DSC_TOP_CTL)) |= 4; // DSC_SLCG_OVERRIDE.
- VIC(0x8C) = 0xFFFFFFFF;
- usleep(2);
-
- // Set per-clock reset.
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_Y_SET) = 0x40; // Set reset APE.
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = 0x18000000; // Set reset DISP1, HOST1x.
- CLOCK(CLK_RST_CONTROLLER_RST_DEV_X_SET) = 0x40000; // Set reset VIC.
-
- // Enable specific clocks and disable all others.
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_H) = 0xC0; // Enable clock PMC, FUSE.
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) = 0x80000130; // Enable clock RTC, TMR, GPIO, BPMP_CACHE.
- //CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) = 0x80400130; // Keep USBD ON.
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_U) = 0x1F00200; // Enable clock CSITE, IRAMA, IRAMB, IRAMC, IRAMD, BPMP_CACHE_RAM.
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) = 0x80400808; // Enable clock MSELECT, APB2APE, SPDIF_DOUBLER, SE.
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_W) = 0x402000FC; // Enable clock PCIERX0, PCIERX1, PCIERX2, PCIERX3, PCIERX4, PCIERX5, ENTROPY, MC1.
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_X) = 0x23000780; // Enable clock MC_CAPA, MC_CAPB, MC_CPU, MC_BBC, DBGAPB, HPLL_ADSP, PLLG_REF.
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_Y) = 0x300; // Enable clock MC_CDPA, MC_CCPA.
-
- // Disable clock gate overrides.
- CLOCK(CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRA) = 0;
- CLOCK(CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRB) = 0;
- CLOCK(CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRC) = 0;
- CLOCK(CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD) = 0;
- CLOCK(CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRE) = 0;
-
- // Set child clock sources.
- CLOCK(CLK_RST_CONTROLLER_PLLD_BASE) &= 0x1F7FFFFF; // Disable PLLD and set reference clock and csi clock.
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SOR1) &= 0xFFFF3FFF; // Set SOR1 to automatic muxing of safe clock (24MHz) or SOR1 clk switch.
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_VI) = (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_VI) & 0x1FFFFFFF) | 0x80000000; // Set clock source to PLLP_OUT.
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_HOST1X) = (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_HOST1X) & 0x1FFFFFFF) | 0x80000000; // Set clock source to PLLP_OUT.
- CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_NVENC) = (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_NVENC) & 0x1FFFFFFF) | 0x80000000; // Set clock source to PLLP_OUT.
-}
-
-void _config_se_brom()
-{
- // Enable fuse clock.
- clock_enable_fuse(true);
-
- // Skip SBK/SSK if sept was run.
- if (!(b_cfg.boot_cfg & BOOT_CFG_SEPT_RUN))
- {
- // Bootrom part we skipped.
- u32 sbk[4] = {
- FUSE(FUSE_PRIVATE_KEY0),
- FUSE(FUSE_PRIVATE_KEY1),
- FUSE(FUSE_PRIVATE_KEY2),
- FUSE(FUSE_PRIVATE_KEY3)
- };
- // Set SBK to slot 14.
- se_aes_key_set(14, sbk, 0x10);
-
- // Lock SBK from being read.
- SE(SE_KEY_TABLE_ACCESS_REG_OFFSET + 14 * 4) = 0x7E;
-
- // Lock SSK (although it's not set and unused anyways).
- SE(SE_KEY_TABLE_ACCESS_REG_OFFSET + 15 * 4) = 0x7E;
- }
-
- // This memset needs to happen here, else TZRAM will behave weirdly later on.
- memset((void *)TZRAM_BASE, 0, 0x10000);
- PMC(APBDEV_PMC_CRYPTO_OP) = PMC_CRYPTO_OP_SE_ENABLE;
- SE(SE_INT_STATUS_REG_OFFSET) = 0x1F;
-
- // Clear the boot reason to avoid problems later
- PMC(APBDEV_PMC_SCRATCH200) = 0x0;
- PMC(APBDEV_PMC_RST_STATUS) = 0x0;
- APB_MISC(APB_MISC_PP_STRAPPING_OPT_A) = (APB_MISC(APB_MISC_PP_STRAPPING_OPT_A) & 0xF0) | (7 << 10);
-}
-
-void _config_regulators()
-{
- // Disable low battery shutdown monitor.
- max77620_low_battery_monitor_config(false);
-
- // Disable SDMMC1 IO power.
- gpio_output_enable(GPIO_PORT_E, GPIO_PIN_4, GPIO_OUTPUT_DISABLE);
- max77620_regulator_enable(REGULATOR_LDO2, 0);
- sd_power_cycle_time_start = get_tmr_ms();
-
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K);
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1,
- (1 << 6) | (3 << MAX77620_ONOFFCNFG1_MRT_SHIFT)); // PWR delay for forced shutdown off.
-
-///////// not on mariko
- // Configure all Flexible Power Sequencers.
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG0,
- (7 << MAX77620_FPS_TIME_PERIOD_SHIFT));
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG1,
- (7 << MAX77620_FPS_TIME_PERIOD_SHIFT) | (1 << MAX77620_FPS_EN_SRC_SHIFT));
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG2,
- (7 << MAX77620_FPS_TIME_PERIOD_SHIFT));
- max77620_regulator_config_fps(REGULATOR_LDO4);
- max77620_regulator_config_fps(REGULATOR_LDO8);
- max77620_regulator_config_fps(REGULATOR_SD0);
- max77620_regulator_config_fps(REGULATOR_SD1);
- max77620_regulator_config_fps(REGULATOR_SD3);
-
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_GPIO3,
- (4 << MAX77620_FPS_TIME_PERIOD_SHIFT) | (2 << MAX77620_FPS_PD_PERIOD_SHIFT)); // 3.x+
-////////
-
- // Set vdd_core voltage to 1.125V.
- max77620_regulator_set_voltage(REGULATOR_SD0, 1125000); // 1050000 on mariko.
-
- //if (lite)
- // ldo8 2.8V enable.
-
- // Fix CPU/GPU after a L4T warmboot.
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO5, 2);
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO6, 2);
-
- i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_VOUT_REG, MAX77621_VOUT_0_95V); // Disable power.
- i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_VOUT_DVS_REG, MAX77621_VOUT_ENABLE | MAX77621_VOUT_1_09V); // Enable DVS power.
- i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_CONTROL1_REG, MAX77621_RAMP_50mV_PER_US);
- i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_CONTROL2_REG,
- MAX77621_T_JUNCTION_120 | MAX77621_FT_ENABLE | MAX77621_CKKADV_TRIP_75mV_PER_US_HIST_DIS |
- MAX77621_CKKADV_TRIP_150mV_PER_US | MAX77621_INDUCTOR_NOMINAL);
-
- i2c_send_byte(I2C_5, MAX77621_GPU_I2C_ADDR, MAX77621_VOUT_REG, MAX77621_VOUT_0_95V); // Disable power.
- i2c_send_byte(I2C_5, MAX77621_GPU_I2C_ADDR, MAX77621_VOUT_DVS_REG, MAX77621_VOUT_ENABLE | MAX77621_VOUT_1_09V); // Enable DVS power.
- i2c_send_byte(I2C_5, MAX77621_GPU_I2C_ADDR, MAX77621_CONTROL1_REG, MAX77621_RAMP_50mV_PER_US);
- i2c_send_byte(I2C_5, MAX77621_GPU_I2C_ADDR, MAX77621_CONTROL2_REG,
- MAX77621_T_JUNCTION_120 | MAX77621_FT_ENABLE | MAX77621_CKKADV_TRIP_75mV_PER_US_HIST_DIS |
- MAX77621_CKKADV_TRIP_150mV_PER_US | MAX77621_INDUCTOR_NOMINAL);
-}
-
-void config_hw()
-{
- // Bootrom stuff we skipped by going through rcm.
- _config_se_brom();
- //FUSE(FUSE_PRIVATEKEYDISABLE) = 0x11;
- SYSREG(AHB_AHB_SPARE_REG) &= 0xFFFFFF9F; // Unset APB2JTAG_OVERRIDE_EN and OBS_OVERRIDE_EN.
- PMC(APBDEV_PMC_SCRATCH49) = PMC(APBDEV_PMC_SCRATCH49) & 0xFFFFFFFC;
-
- _mbist_workaround(); // not on mariko.
- clock_enable_se();
- // CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SE) |= 0x100; // Lock clock. mariko.
-
- // Enable fuse clock.
- clock_enable_fuse(true);
-
- // Disable fuse programming.
- fuse_disable_program();
-
- mc_enable();
-
- _config_oscillators();
- APB_MISC(APB_MISC_PP_PINMUX_GLOBAL) = 0;
- _config_gpios();
-
-#ifdef DEBUG_UART_PORT
- clock_enable_uart(DEBUG_UART_PORT);
- uart_init(DEBUG_UART_PORT, 115200);
-#endif
-
- clock_enable_cl_dvfs();
-
- clock_enable_i2c(I2C_1);
- clock_enable_i2c(I2C_5);
-
- clock_enable_tzram();
-
- i2c_init(I2C_1);
- i2c_init(I2C_5);
-
- // Enable charger in case it's disabled.
- bq24193_enable_charger();
-
- _config_regulators();
-
- _config_pmc_scratch(); // Missing from 4.x+
-
- CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333; // Set SCLK to PLLP_OUT (408MHz).
-
- // APBDEV_PMC_UNK_BE8 &= 0xFFFFFFFE; // mariko
- // APBDEV_PMC_UNK_BF0 = 3; // mariko
- // APBDEV_PMC_UNK_BEC = 3; // mariko
-
- sdram_init();
-
- bpmp_mmu_enable();
-
- // Clear flags from PMC_SCRATCH0
- PMC(APBDEV_PMC_SCRATCH0) &= ~PMC_SCRATCH0_MODE_PAYLOAD;
-}
-
-void reconfig_hw_workaround(bool extra_reconfig, u32 magic)
-{
- // Disable BPMP max clock.
- bpmp_clk_rate_set(BPMP_CLK_NORMAL);
-
-#ifdef NYX
- // Deinit touchscreen, 5V regulators and Joy-Con.
- touch_power_off();
- set_fan_duty(0);
- jc_deinit();
- regulator_disable_5v(REGULATOR_5V_ALL);
- clock_disable_uart(UART_B);
- clock_disable_uart(UART_C);
-#endif
-
- // Flush/disable MMU cache and set DRAM clock to 204MHz.
- bpmp_mmu_disable();
- minerva_change_freq(FREQ_204);
- nyx_str->mtc_cfg.init_done = 0;
-
- // Re-enable clocks to Audio Processing Engine as a workaround to hanging.
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) |= (1 << 10); // Enable AHUB clock.
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_Y) |= (1 << 6); // Enable APE clock.
-
- if (extra_reconfig)
- {
- msleep(10);
- PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_SDMMC1_IO_EN;
-
- clock_disable_cl_dvfs();
-
- // Disable Joy-con GPIOs.
- gpio_config(GPIO_PORT_G, GPIO_PIN_0, GPIO_MODE_SPIO);
- gpio_config(GPIO_PORT_D, GPIO_PIN_1, GPIO_MODE_SPIO);
- gpio_config(GPIO_PORT_E, GPIO_PIN_6, GPIO_MODE_SPIO);
- gpio_config(GPIO_PORT_H, GPIO_PIN_6, GPIO_MODE_SPIO);
- }
-
- // Power off display.
- display_end();
-
- // Enable clock to USBD and init SDMMC1 to avoid hangs with bad hw inits.
- if (magic == 0xBAADF00D)
- {
- CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) |= (1 << 22);
- sdmmc_init(&sd_sdmmc, SDMMC_1, SDMMC_POWER_3_3, SDMMC_BUS_WIDTH_1, SDHCI_TIMING_SD_ID, 0);
- clock_disable_cl_dvfs();
-
- msleep(200);
- }
-}
\ No newline at end of file
diff --git a/nyx/nyx_gui/soc/hw_init.h b/nyx/nyx_gui/soc/hw_init.h
deleted file mode 100644
index b92814b..0000000
--- a/nyx/nyx_gui/soc/hw_init.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _HW_INIT_H_
-#define _HW_INIT_H_
-
-#include "../utils/types.h"
-
-void config_hw();
-void reconfig_hw_workaround(bool extra_reconfig, u32 magic);
-
-#endif
diff --git a/nyx/nyx_gui/soc/i2c.c b/nyx/nyx_gui/soc/i2c.c
deleted file mode 100644
index 40ab097..0000000
--- a/nyx/nyx_gui/soc/i2c.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "i2c.h"
-#include "../utils/util.h"
-
-static const u32 i2c_addrs[] = {
- 0x7000C000, 0x7000C400, 0x7000C500,
- 0x7000C700, 0x7000D000, 0x7000D100
-};
-
-static void _i2c_wait(vu32 *base)
-{
- base[I2C_CONFIG_LOAD] = 0x25;
- for (u32 i = 0; i < 20; i++)
- {
- usleep(1);
- if (!(base[I2C_CONFIG_LOAD] & 1))
- break;
- }
-}
-
-static int _i2c_send_pkt(u32 idx, u32 x, u8 *buf, u32 size)
-{
- if (size > 8)
- return 0;
-
- u32 tmp = 0;
-
- vu32 *base = (vu32 *)i2c_addrs[idx];
- base[I2C_CMD_ADDR0] = x << 1; //Set x (send mode).
-
- if (size > 4)
- {
- memcpy(&tmp, buf, 4);
- base[I2C_CMD_DATA1] = tmp; //Set value.
- tmp = 0;
- memcpy(&tmp, buf + 4, size - 4);
- base[I2C_CMD_DATA2] = tmp;
- }
- else
- {
- memcpy(&tmp, buf, size);
- base[I2C_CMD_DATA1] = tmp; //Set value.
- }
-
- base[I2C_CNFG] = ((size - 1) << 1) | 0x2800; //Set size and send mode.
- _i2c_wait(base); //Kick transaction.
-
- base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFFDFF) | 0x200;
-
- u32 timeout = get_tmr_ms() + 1500;
- while (base[I2C_STATUS] & 0x100)
- {
- if (get_tmr_ms() > timeout)
- return 0;
- }
-
- if (base[I2C_STATUS] << 28)
- return 0;
-
- return 1;
-}
-
-static int _i2c_recv_pkt(u32 idx, u8 *buf, u32 size, u32 x)
-{
- if (size > 8)
- return 0;
-
- vu32 *base = (vu32 *)i2c_addrs[idx];
- base[I2C_CMD_ADDR0] = (x << 1) | 1; // Set x (recv mode).
- base[I2C_CNFG] = ((size - 1) << 1) | 0x2840; // Set size and recv mode.
- _i2c_wait(base); // Kick transaction.
-
- base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFFDFF) | 0x200;
-
- u32 timeout = get_tmr_ms() + 1500;
- while (base[I2C_STATUS] & 0x100)
- {
- if (get_tmr_ms() > timeout)
- return 0;
- }
-
- if (base[I2C_STATUS] << 28)
- return 0;
-
- u32 tmp = base[I2C_CMD_DATA1]; // Get LS value.
- if (size > 4)
- {
- memcpy(buf, &tmp, 4);
- tmp = base[I2C_CMD_DATA2]; // Get MS value.
- memcpy(buf + 4, &tmp, size - 4);
- }
- else
- memcpy(buf, &tmp, size);
-
- return 1;
-}
-
-void i2c_init(u32 idx)
-{
- vu32 *base = (vu32 *)i2c_addrs[idx];
-
- base[I2C_CLK_DIVISOR_REGISTER] = 0x50001;
- base[I2C_BUS_CLEAR_CONFIG] = 0x90003;
- _i2c_wait(base);
-
- for (u32 i = 0; i < 10; i++)
- {
- usleep(20000);
- if (base[INTERRUPT_STATUS_REGISTER] & 0x800)
- break;
- }
-
- (vu32)base[I2C_BUS_CLEAR_STATUS];
- base[INTERRUPT_STATUS_REGISTER] = base[INTERRUPT_STATUS_REGISTER];
-}
-
-int i2c_send_buf_small(u32 idx, u32 x, u32 y, u8 *buf, u32 size)
-{
- u8 tmp[4];
-
- if (size > 7)
- return 0;
-
- tmp[0] = y;
- memcpy(tmp + 1, buf, size);
-
- return _i2c_send_pkt(idx, x, tmp, size + 1);
-}
-
-int i2c_recv_buf(u8 *buf, u32 size, u32 idx, u32 x)
-{
- return _i2c_recv_pkt(idx, buf, size, x);
-}
-
-int i2c_recv_buf_small(u8 *buf, u32 size, u32 idx, u32 x, u32 y)
-{
- int res = _i2c_send_pkt(idx, x, (u8 *)&y, 1);
- if (res)
- res = _i2c_recv_pkt(idx, buf, size, x);
- return res;
-}
-
-int i2c_send_byte(u32 idx, u32 x, u32 y, u8 b)
-{
- return i2c_send_buf_small(idx, x, y, &b, 1);
-}
-
-u8 i2c_recv_byte(u32 idx, u32 x, u32 y)
-{
- u8 tmp = 0;
- i2c_recv_buf_small(&tmp, 1, idx, x, y);
- return tmp;
-}
-
diff --git a/nyx/nyx_gui/soc/i2c.h b/nyx/nyx_gui/soc/i2c.h
deleted file mode 100644
index 4f04bac..0000000
--- a/nyx/nyx_gui/soc/i2c.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _I2C_H_
-#define _I2C_H_
-
-#include "../utils/types.h"
-
-#define I2C_1 0
-#define I2C_2 1
-#define I2C_3 2
-#define I2C_4 3
-#define I2C_5 4
-#define I2C_6 5
-
-#define I2C_CNFG 0x00
-#define I2C_CMD_ADDR0 0x01
-#define I2C_CMD_DATA1 0x03
-#define I2C_CMD_DATA2 0x04
-#define I2C_STATUS 0x07
-#define INTERRUPT_STATUS_REGISTER 0x1A
-#define I2C_CLK_DIVISOR_REGISTER 0x1B
-#define I2C_BUS_CLEAR_CONFIG 0x21
-#define I2C_BUS_CLEAR_STATUS 0x22
-#define I2C_CONFIG_LOAD 0x23
-
-void i2c_init(u32 idx);
-int i2c_send_buf_small(u32 idx, u32 x, u32 y, u8 *buf, u32 size);
-int i2c_recv_buf(u8 *buf, u32 size, u32 idx, u32 x);
-int i2c_recv_buf_small(u8 *buf, u32 size, u32 idx, u32 x, u32 y);
-int i2c_send_byte(u32 idx, u32 x, u32 y, u8 b);
-u8 i2c_recv_byte(u32 idx, u32 x, u32 y);
-
-#endif
diff --git a/nyx/nyx_gui/soc/irq.c b/nyx/nyx_gui/soc/irq.c
deleted file mode 100644
index 627976d..0000000
--- a/nyx/nyx_gui/soc/irq.c
+++ /dev/null
@@ -1,263 +0,0 @@
-/*
- * BPMP-Lite IRQ driver for Tegra X1
- *
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "irq.h"
-#include "t210.h"
-#include "../gfx/gfx.h"
-#include "../mem/heap.h"
-
-//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
-#define DPRINTF(...)
-
-extern void irq_disable();
-extern void irq_enable_cpu_irq_exceptions();
-extern void irq_disable_cpu_irq_exceptions();
-
-typedef struct _irq_ctxt_t
-{
- u32 irq;
- int (*handler)(u32 irq, void *data);
- void *data;
- u32 flags;
-} irq_ctxt_t;
-
-bool irq_init_done = false;
-irq_ctxt_t irqs[IRQ_MAX_HANDLERS];
-
-static void _irq_enable_source(u32 irq)
-{
- u32 ctrl_idx = irq >> 5;
- u32 bit = irq % 32;
-
- // Set as normal IRQ.
- ICTLR(ctrl_idx, PRI_ICTLR_COP_IEP_CLASS) &= ~(1 << bit);
-
- // Enable IRQ source.
- ICTLR(ctrl_idx, PRI_ICTLR_COP_IER_SET) = 1 << bit;
-}
-
-static void _irq_disable_source(u32 irq)
-{
- u32 ctrl_idx = irq >> 5;
- u32 bit = irq % 32;
-
- // Disable IRQ source.
- ICTLR(ctrl_idx, PRI_ICTLR_COP_IER_CLR) = 1 << bit;
-}
-
-static void _irq_disable_and_ack_all()
-{
- // Disable and ack all IRQ sources.
- for (u32 ctrl_idx = 0; ctrl_idx < 6; ctrl_idx++)
- {
- u32 enabled_irqs = ICTLR(ctrl_idx, PRI_ICTLR_COP_IER);
- ICTLR(ctrl_idx, PRI_ICTLR_COP_IER_CLR) = enabled_irqs;
- ICTLR(ctrl_idx, PRI_ICTLR_FIR_CLR) = enabled_irqs;
- }
-}
-
-static void _irq_ack_source(u32 irq)
-{
- u32 ctrl_idx = irq >> 5;
- u32 bit = irq % 32;
-
- // Force stop the interrupt as it's serviced here.
- ICTLR(ctrl_idx, PRI_ICTLR_FIR_CLR) = 1 << bit;
-}
-
-void irq_free(u32 irq)
-{
- for (u32 idx = 0; idx < IRQ_MAX_HANDLERS; idx++)
- {
- if (irqs[idx].irq == irq && irqs[idx].handler)
- {
- irqs[idx].irq = 0;
- irqs[idx].handler = NULL;
- irqs[idx].data = NULL;
- irqs[idx].flags = 0;
-
- _irq_disable_source(irq);
- }
- }
-}
-
-static void _irq_free_all()
-{
- for (u32 idx = 0; idx < IRQ_MAX_HANDLERS; idx++)
- {
- if (irqs[idx].handler)
- {
- _irq_disable_source(irqs[idx].irq);
-
- irqs[idx].irq = 0;
- irqs[idx].handler = NULL;
- irqs[idx].data = NULL;
- irqs[idx].flags = 0;
- }
- }
-}
-
-static irq_status_t _irq_handle_source(u32 irq)
-{
- int status = IRQ_NONE;
-
- _irq_disable_source(irq);
- _irq_ack_source(irq);
-
- u32 idx;
- for (idx = 0; idx < IRQ_MAX_HANDLERS; idx++)
- {
- if (irqs[idx].irq == irq)
- {
- status = irqs[idx].handler(irqs[idx].irq, irqs[idx].data);
-
- if (status == IRQ_HANDLED)
- break;
- }
- }
-
- if (irqs[idx].flags & IRQ_FLAG_ONE_OFF)
- irq_free(irq);
- else
- _irq_enable_source(irq);
-
- return status;
-}
-
-void irq_handler()
-{
- // Get IRQ source.
- u32 irq = EXCP_VEC(EVP_COP_IRQ_STS) & 0xFF;
-
- if (!irq_init_done)
- {
- _irq_ack_source(irq);
- return;
- }
-
- DPRINTF("IRQ: %d\n", irq);
-
- int err = _irq_handle_source(irq);
-
- //TODO: disable if unhandhled.
- if (err == IRQ_NONE)
- gfx_printf("Unhandled IRQ: %d\n", irq);
-}
-
-static void _irq_init()
-{
- _irq_disable_and_ack_all();
- memset(irqs, 0, sizeof(irq_ctxt_t) * IRQ_MAX_HANDLERS);
- irq_init_done = true;
-}
-
-void irq_end()
-{
- _irq_free_all();
- irq_disable_cpu_irq_exceptions();
- irq_init_done = false;
-}
-
-void irq_wait_event(u32 irq)
-{
- irq_disable_cpu_irq_exceptions();
-
- _irq_enable_source(irq);
-
- // Halt BPMP and wait for the IRQ. No need to use WAIT_EVENT + LIC_IRQ when BPMP serves the IRQ.
- FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_COP_STOP_UNTIL_IRQ;
-
- _irq_disable_source(irq);
- _irq_ack_source(irq);
-
- irq_enable_cpu_irq_exceptions();
-}
-
-void irq_disable_wait_event()
-{
- irq_enable_cpu_irq_exceptions();
-}
-
-irq_status_t irq_request(u32 irq, irq_handler_t handler, void *data, irq_flags_t flags)
-{
- if (!irq_init_done)
- _irq_init();
-
- for (u32 idx = 0; idx < IRQ_MAX_HANDLERS; idx++)
- {
- if (irqs[idx].handler == NULL ||
- (irqs[idx].irq == irq && irqs[idx].flags & IRQ_FLAG_REPLACEABLE))
- {
- DPRINTF("Registered handler, IRQ: %d, Slot: %d\n", irq, idx);
- DPRINTF("Handler: %08p, Flags: %x\n", (u32)handler, flags);
-
- irqs[idx].irq = irq;
- irqs[idx].handler = handler;
- irqs[idx].data = data;
- irqs[idx].flags = flags;
-
- _irq_enable_source(irq);
-
- return IRQ_ENABLED;
- }
- else if (irqs[idx].irq == irq)
- return IRQ_ALREADY_REGISTERED;
- }
-
- return IRQ_NO_SLOTS_AVAILABLE;
-}
-
-void __attribute__ ((target("arm"))) fiq_setup()
-{
-/*
- asm volatile("mrs r12, cpsr\n\t"
- "bic r12, r12, #0x1F\n\t"
- "orr r12, r12, #0x11\n\t"
- "msr cpsr_c, r12\n\t");
-
- register volatile char *text asm ("r8");
- register volatile char *uart_tx asm ("r9");
- register int len asm ("r10");
-
- len = 5;
- uart_tx = (char *)0x70006040;
- memcpy((char *)text, "FIQ\r\n", len);
- *uart_tx = 0;
-
- asm volatile("mrs r12, cpsr\n"
- "orr r12, r12, #0x1F\n"
- "msr cpsr_c, r12");
-*/
-}
-
-void __attribute__ ((target("arm"), interrupt ("FIQ"))) fiq_handler()
-{
-/*
- register volatile char *text asm ("r8");
- register volatile char *uart_tx asm ("r9");
- register int len asm ("r10");
-
- while (len)
- {
- *uart_tx = *text++;
- len--;
- }
-*/
-}
diff --git a/nyx/nyx_gui/soc/irq.h b/nyx/nyx_gui/soc/irq.h
deleted file mode 100644
index c77d980..0000000
--- a/nyx/nyx_gui/soc/irq.h
+++ /dev/null
@@ -1,222 +0,0 @@
-/*
- * BPMP-Lite IRQ driver for Tegra X1
- *
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef IRQ_H
-#define IRQ_H
-
-#include "../utils/types.h"
-
-#define IRQ_MAX_HANDLERS 16
-
-/* Primary interrupt controller ids */
-#define IRQ_TMR1 0
-#define IRQ_TMR2 1
-#define IRQ_RTC 2
-#define IRQ_CEC 3
-#define IRQ_SHR_SEM_INBOX_FULL 4
-#define IRQ_SHR_SEM_INBOX_EMPTY 5
-#define IRQ_SHR_SEM_OUTBOX_FULL 6
-#define IRQ_SHR_SEM_OUTBOX_EMPTY 7
-#define IRQ_NVJPEG 8
-#define IRQ_NVDEC 9
-#define IRQ_QUAD_SPI 10
-#define IRQ_DPAUX_INT1 11
-#define IRQ_SATA_RX_STAT 13
-#define IRQ_SDMMC1 14
-#define IRQ_SDMMC2 15
-#define IRQ_VGPIO_INT 16
-#define IRQ_VII2C_INT 17
-#define IRQ_SDMMC3 19
-#define IRQ_USB 20
-#define IRQ_USB2 21
-#define IRQ_SATA_CTL 23
-#define IRQ_PMC_INT 24
-#define IRQ_FC_INT 25
-#define IRQ_APB_DMA_CPU 26
-#define IRQ_ARB_SEM_GNT_COP 28
-#define IRQ_ARB_SEM_GNT_CPU 29
-#define IRQ_SDMMC4 31
-
-/* Secondary interrupt controller ids */
-#define IRQ_GPIO1 32
-#define IRQ_GPIO2 33
-#define IRQ_GPIO3 34
-#define IRQ_GPIO4 35
-#define IRQ_UARTA 36
-#define IRQ_UARTB 37
-#define IRQ_I2C 38
-#define IRQ_USB3_HOST_INT 39
-#define IRQ_USB3_HOST_SMI 40
-#define IRQ_TMR3 41
-#define IRQ_TMR4 42
-#define IRQ_USB3_HOST_PME 43
-#define IRQ_USB3_DEV_HOST 44
-#define IRQ_ACTMON 45
-#define IRQ_UARTC 46
-#define IRQ_THERMAL 48
-#define IRQ_XUSB_PADCTL 49
-#define IRQ_TSEC 50
-#define IRQ_EDP 51
-#define IRQ_I2C5 53
-#define IRQ_GPIO5 55
-#define IRQ_USB3_DEV_SMI 56
-#define IRQ_USB3_DEV_PME 57
-#define IRQ_SE 58
-#define IRQ_SPI1 59
-#define IRQ_APB_DMA_COP 60
-#define IRQ_CLDVFS 62
-#define IRQ_I2C6 63
-
-/* Tertiary interrupt controller ids */
-#define IRQ_HOST1X_SYNCPT_COP 64
-#define IRQ_HOST1X_SYNCPT_CPU 65
-#define IRQ_HOST1X_GEN_COP 66
-#define IRQ_HOST1X_GEN_CPU 67
-#define IRQ_NVENC 68
-#define IRQ_VI 69
-#define IRQ_ISPB 70
-#define IRQ_ISP 71
-#define IRQ_VIC 72
-#define IRQ_DISPLAY 73
-#define IRQ_DISPLAYB 74
-#define IRQ_SOR1 75
-#define IRQ_SOR 76
-#define IRQ_MC 77
-#define IRQ_EMC 78
-#define IRQ_TSECB 80
-#define IRQ_HDA 81
-#define IRQ_SPI2 82
-#define IRQ_SPI3 83
-#define IRQ_I2C2 84
-#define IRQ_PMU_EXT 86
-#define IRQ_GPIO6 87
-#define IRQ_GPIO7 89
-#define IRQ_UARTD 90
-#define IRQ_I2C3 92
-#define IRQ_SPI4 93
-
-/* Quaternary interrupt controller ids */
-#define IRQ_DTV 96
-#define IRQ_PCIE_INT 98
-#define IRQ_PCIE_MSI 99
-#define IRQ_AVP_CACHE 101
-#define IRQ_APE_INT1 102
-#define IRQ_APE_INT0 103
-#define IRQ_APB_DMA_CH0 104
-#define IRQ_APB_DMA_CH1 105
-#define IRQ_APB_DMA_CH2 106
-#define IRQ_APB_DMA_CH3 107
-#define IRQ_APB_DMA_CH4 108
-#define IRQ_APB_DMA_CH5 109
-#define IRQ_APB_DMA_CH6 110
-#define IRQ_APB_DMA_CH7 111
-#define IRQ_APB_DMA_CH8 112
-#define IRQ_APB_DMA_CH9 113
-#define IRQ_APB_DMA_CH10 114
-#define IRQ_APB_DMA_CH11 115
-#define IRQ_APB_DMA_CH12 116
-#define IRQ_APB_DMA_CH13 117
-#define IRQ_APB_DMA_CH14 118
-#define IRQ_APB_DMA_CH15 119
-#define IRQ_I2C4 120
-#define IRQ_TMR5 121
-#define IRQ_WDT_CPU 123
-#define IRQ_WDT_AVP 124
-#define IRQ_GPIO8 125
-#define IRQ_CAR 126
-
-/* Quinary interrupt controller ids */
-#define IRQ_APB_DMA_CH16 128
-#define IRQ_APB_DMA_CH17 129
-#define IRQ_APB_DMA_CH18 130
-#define IRQ_APB_DMA_CH19 131
-#define IRQ_APB_DMA_CH20 132
-#define IRQ_APB_DMA_CH21 133
-#define IRQ_APB_DMA_CH22 134
-#define IRQ_APB_DMA_CH23 135
-#define IRQ_APB_DMA_CH24 136
-#define IRQ_APB_DMA_CH25 137
-#define IRQ_APB_DMA_CH26 138
-#define IRQ_APB_DMA_CH27 139
-#define IRQ_APB_DMA_CH28 140
-#define IRQ_APB_DMA_CH29 141
-#define IRQ_APB_DMA_CH30 142
-#define IRQ_APB_DMA_CH31 143
-#define IRQ_CPU0_PMU_INTR 144
-#define IRQ_CPU1_PMU_INTR 145
-#define IRQ_CPU2_PMU_INTR 146
-#define IRQ_CPU3_PMU_INTR 147
-#define IRQ_SDMMC1_SYS 148
-#define IRQ_SDMMC2_SYS 149
-#define IRQ_SDMMC3_SYS 150
-#define IRQ_SDMMC4_SYS 151
-#define IRQ_TMR6 152
-#define IRQ_TMR7 153
-#define IRQ_TMR8 154
-#define IRQ_TMR9 155
-#define IRQ_TMR0 156
-#define IRQ_GPU_STALL 157
-#define IRQ_GPU_NONSTALL 158
-#define IRQ_DPAUX 159
-
-/* Senary interrupt controller ids */
-#define IRQ_MPCORE_AXIERRIRQ 160
-#define IRQ_MPCORE_INTERRIRQ 161
-#define IRQ_EVENT_GPIO_A 162
-#define IRQ_EVENT_GPIO_B 163
-#define IRQ_EVENT_GPIO_C 164
-#define IRQ_FLOW_RSM_CPU 168
-#define IRQ_FLOW_RSM_COP 169
-#define IRQ_TMR_SHARED 170
-#define IRQ_MPCORE_CTIIRQ0 171
-#define IRQ_MPCORE_CTIIRQ1 172
-#define IRQ_MPCORE_CTIIRQ2 173
-#define IRQ_MPCORE_CTIIRQ3 174
-#define IRQ_MSELECT_ERROR 175
-#define IRQ_TMR10 176
-#define IRQ_TMR11 177
-#define IRQ_TMR12 178
-#define IRQ_TMR13 179
-
-typedef int (*irq_handler_t)(u32 irq, void *data);
-
-typedef enum _irq_status_t
-{
- IRQ_NONE = 0,
- IRQ_HANDLED = 1,
- IRQ_ERROR = 2,
-
- IRQ_ENABLED = 0,
- IRQ_NO_SLOTS_AVAILABLE = 1,
- IRQ_ALREADY_REGISTERED = 2
-} irq_status_t;
-
-typedef enum _irq_flags_t
-{
- IRQ_FLAG_NONE = 0,
- IRQ_FLAG_ONE_OFF = (1 << 0),
- IRQ_FLAG_REPLACEABLE = (1 << 1)
-} irq_flags_t;
-
-void irq_end();
-void irq_free(u32 irq);
-void irq_wait_event();
-void irq_disable_wait_event();
-irq_status_t irq_request(u32 irq, irq_handler_t handler, void *data, irq_flags_t flags);
-
-#endif
\ No newline at end of file
diff --git a/nyx/nyx_gui/soc/kfuse.c b/nyx/nyx_gui/soc/kfuse.c
deleted file mode 100644
index cdfba53..0000000
--- a/nyx/nyx_gui/soc/kfuse.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "../soc/kfuse.h"
-#include "../soc/clock.h"
-#include "../soc/t210.h"
-
-int kfuse_wait_ready()
-{
- // Wait for KFUSE to finish init and verification of data.
- while (!(KFUSE(KFUSE_STATE) & KFUSE_STATE_DONE))
- ;
-
- if (!(KFUSE(KFUSE_STATE) & KFUSE_STATE_CRCPASS))
- return 0;
-
- return 1;
-}
-
-int kfuse_read(u32 *buf)
-{
- int res = 0;
-
- clock_enable_kfuse();
-
- if (!kfuse_wait_ready())
- goto out;
-
- KFUSE(KFUSE_KEYADDR) = KFUSE_KEYADDR_AUTOINC;
- for (int i = 0; i < KFUSE_NUM_WORDS; i++)
- buf[i] = KFUSE(KFUSE_KEYS);
-
- res = 1;
-
-out:
- clock_disable_kfuse();
- return res;
-}
diff --git a/nyx/nyx_gui/soc/kfuse.h b/nyx/nyx_gui/soc/kfuse.h
deleted file mode 100644
index a535803..0000000
--- a/nyx/nyx_gui/soc/kfuse.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _KFUSE_H_
-#define _KFUSE_H_
-
-#include "../utils/types.h"
-
-#define KFUSE_STATE_SOFTRESET (1 << 31)
-#define KFUSE_STATE_STOP (1 << 25)
-#define KFUSE_STATE_RESTART (1 << 24)
-#define KFUSE_STATE_CRCPASS (1 << 17)
-#define KFUSE_STATE_DONE (1 << 16)
-#define KFUSE_STATE_ERRBLOCK_MASK 0x3F00
-#define KFUSE_STATE_ERRBLOCK_SHIFT 8
-#define KFUSE_STATE_CURBLOCK_MASK 0x3F
-
-#define KFUSE_KEYADDR_AUTOINC (1<<16)
-
-#define KFUSE_STATE 0x80
-#define KFUSE_KEYADDR 0x88
-#define KFUSE_KEYS 0x8C
-
-#define KFUSE_NUM_WORDS 144
-
-int kfuse_wait_ready();
-int kfuse_read(u32 *buf);
-
-#endif
diff --git a/nyx/nyx_gui/soc/pinmux.c b/nyx/nyx_gui/soc/pinmux.c
deleted file mode 100644
index 582ab29..0000000
--- a/nyx/nyx_gui/soc/pinmux.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "../soc/pinmux.h"
-#include "../soc/t210.h"
-
-void pinmux_config_uart(u32 idx)
-{
- PINMUX_AUX(PINMUX_AUX_UARTX_TX(idx)) = 0;
- PINMUX_AUX(PINMUX_AUX_UARTX_RX(idx)) = PINMUX_INPUT_ENABLE | PINMUX_PULL_UP;
- PINMUX_AUX(PINMUX_AUX_UARTX_RTS(idx)) = 0;
- PINMUX_AUX(PINMUX_AUX_UARTX_CTS(idx)) = PINMUX_INPUT_ENABLE | PINMUX_PULL_DOWN;
-}
-
-void pinmux_config_i2c(u32 idx)
-{
- PINMUX_AUX(PINMUX_AUX_X_I2C_SCL(idx)) = PINMUX_INPUT_ENABLE;
- PINMUX_AUX(PINMUX_AUX_X_I2C_SDA(idx)) = PINMUX_INPUT_ENABLE;
-}
diff --git a/nyx/nyx_gui/soc/pinmux.h b/nyx/nyx_gui/soc/pinmux.h
deleted file mode 100644
index ca57584..0000000
--- a/nyx/nyx_gui/soc/pinmux.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _PINMUX_H_
-#define _PINMUX_H_
-
-#include "../utils/types.h"
-
-/*! APB MISC registers. */
-#define APB_MISC_GP_SDMMC1_CLK_LPBK_CONTROL 0x8D4
-#define APB_MISC_GP_SDMMC3_CLK_LPBK_CONTROL 0x8D8
-#define APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL 0xA98
-#define APB_MISC_GP_VGPIO_GPIO_MUX_SEL 0xB74
-
-/*! Pinmux registers. */
-#define PINMUX_AUX_SDMMC1_CLK 0x00
-#define PINMUX_AUX_SDMMC1_CMD 0x04
-#define PINMUX_AUX_SDMMC1_DAT3 0x08
-#define PINMUX_AUX_SDMMC1_DAT2 0x0C
-#define PINMUX_AUX_SDMMC1_DAT1 0x10
-#define PINMUX_AUX_SDMMC1_DAT0 0x14
-#define PINMUX_AUX_SDMMC3_CLK 0x1C
-#define PINMUX_AUX_SDMMC3_CMD 0x20
-#define PINMUX_AUX_SDMMC3_DAT0 0x24
-#define PINMUX_AUX_SDMMC3_DAT1 0x28
-#define PINMUX_AUX_SDMMC3_DAT2 0x2C
-#define PINMUX_AUX_SDMMC3_DAT3 0x30
-#define PINMUX_AUX_SATA_LED_ACTIVE 0x4C
-#define PINMUX_AUX_DMIC3_CLK 0xB4
-#define PINMUX_AUX_DMIC3_DAT 0xB8
-#define PINMUX_AUX_CAM_I2C_SCL 0xD4
-#define PINMUX_AUX_CAM_I2C_SDA 0xD8
-#define PINMUX_AUX_UART2_TX 0xF4
-#define PINMUX_AUX_UART3_TX 0x104
-#define PINMUX_AUX_DAP4_DIN 0x148
-#define PINMUX_AUX_DAP4_SCLK 0x150
-#define PINMUX_AUX_GPIO_X1_AUD 0x18C
-#define PINMUX_AUX_GPIO_X3_AUD 0x190
-#define PINMUX_AUX_SPDIF_IN 0x1A4
-#define PINMUX_AUX_USB_VBUS_EN0 0x1A8
-#define PINMUX_AUX_USB_VBUS_EN1 0x1AC
-#define PINMUX_AUX_WIFI_EN 0x1B4
-#define PINMUX_AUX_WIFI_RST 0x1B8
-#define PINMUX_AUX_AP_WAKE_NFC 0x1CC
-#define PINMUX_AUX_NFC_EN 0x1D0
-#define PINMUX_AUX_NFC_INT 0x1D4
-#define PINMUX_AUX_CAM1_PWDN 0x1EC
-#define PINMUX_AUX_CAM2_PWDN 0x1F0
-#define PINMUX_AUX_LCD_BL_PWM 0x1FC
-#define PINMUX_AUX_LCD_BL_EN 0x200
-#define PINMUX_AUX_LCD_RST 0x204
-#define PINMUX_AUX_LCD_GPIO1 0x208
-#define PINMUX_AUX_LCD_GPIO2 0x20C
-#define PINMUX_AUX_TOUCH_INT 0x220
-#define PINMUX_AUX_MOTION_INT 0x224
-#define PINMUX_AUX_BUTTON_HOME 0x240
-#define PINMUX_AUX_GPIO_PE6 0x248
-#define PINMUX_AUX_GPIO_PH6 0x250
-#define PINMUX_AUX_GPIO_PK3 0x260
-#define PINMUX_AUX_GPIO_PZ1 0x280
-/*! 0:UART-A, 1:UART-B, 3:UART-C, 3:UART-D */
-#define PINMUX_AUX_UARTX_TX(x) (0xE4 + 0x10 * (x))
-#define PINMUX_AUX_UARTX_RX(x) (0xE8 + 0x10 * (x))
-#define PINMUX_AUX_UARTX_RTS(x) (0xEC + 0x10 * (x))
-#define PINMUX_AUX_UARTX_CTS(x) (0xF0 + 0x10 * (x))
-/*! 0:GEN1, 1:GEN2, 2:GEN3, 3:CAM, 4:PWR */
-#define PINMUX_AUX_X_I2C_SCL(x) (0xBC + 8 * (x))
-#define PINMUX_AUX_X_I2C_SDA(x) (0xC0 + 8 * (x))
-
-#define PINMUX_FUNC_MASK (3 << 0)
-
-#define PINMUX_PULL_MASK (3 << 2)
-#define PINMUX_PULL_NONE (0 << 2)
-#define PINMUX_PULL_DOWN (1 << 2)
-#define PINMUX_PULL_UP (2 << 2)
-
-#define PINMUX_TRISTATE (1 << 4)
-#define PINMUX_PARKED (1 << 5)
-#define PINMUX_INPUT_ENABLE (1 << 6)
-#define PINMUX_LOCK (1 << 7)
-#define PINMUX_LPDR (1 << 8)
-#define PINMUX_HSM (1 << 9)
-
-#define PINMUX_IO_HV (1 << 10)
-#define PINMUX_OPEN_DRAIN (1 << 11)
-#define PINMUX_SCHMT (1 << 12)
-
-#define PINMUX_DRIVE_1X (0 << 13)
-#define PINMUX_DRIVE_2X (1 << 13)
-#define PINMUX_DRIVE_3X (2 << 13)
-#define PINMUX_DRIVE_4X (3 << 13)
-
-void pinmux_config_uart(u32 idx);
-void pinmux_config_i2c(u32 idx);
-
-#endif
diff --git a/nyx/nyx_gui/soc/pmc.h b/nyx/nyx_gui/soc/pmc.h
deleted file mode 100644
index 7df7922..0000000
--- a/nyx/nyx_gui/soc/pmc.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 st4rk
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _PMC_H_
-#define _PMC_H_
-
-/*! PMC registers. */
-#define APBDEV_PMC_CNTRL 0x0
-#define PMC_CNTRL_MAIN_RST (1 << 4)
-#define APBDEV_PMC_SEC_DISABLE 0x4
-#define APBDEV_PMC_PWRGATE_TOGGLE 0x30
-#define APBDEV_PMC_PWRGATE_STATUS 0x38
-#define APBDEV_PMC_NO_IOPOWER 0x44
-#define PMC_NO_IOPOWER_GPIO_IO_EN (1 << 21)
-#define PMC_NO_IOPOWER_AUDIO_HV (1 << 18)
-#define PMC_NO_IOPOWER_SDMMC1_IO_EN (1 << 12)
-#define APBDEV_PMC_SCRATCH0 0x50
-#define PMC_SCRATCH0_MODE_RECOVERY (1 << 31)
-#define PMC_SCRATCH0_MODE_FASTBOOT (1 << 30)
-#define PMC_SCRATCH0_MODE_PAYLOAD (1 << 29)
-#define PMC_SCRATCH0_MODE_RCM (1 << 1)
-#define PMC_SCRATCH0_MODE_WARMBOOT (1 << 0)
-#define APBDEV_PMC_SCRATCH1 0x54
-#define APBDEV_PMC_SCRATCH20 0xA0
-#define APBDEV_PMC_PWR_DET_VAL 0xE4
-#define PMC_PWR_DET_GPIO_IO_EN (1 << 21)
-#define PMC_PWR_DET_AUDIO_HV (1 << 18)
-#define PMC_PWR_DET_SDMMC1_IO_EN (1 << 12)
-#define APBDEV_PMC_DDR_PWR 0xE8
-#define APBDEV_PMC_USB_AO 0xF0
-#define APBDEV_PMC_CRYPTO_OP 0xF4
-#define PMC_CRYPTO_OP_SE_ENABLE 0
-#define PMC_CRYPTO_OP_SE_DISABLE 1
-#define APBDEV_PMC_SCRATCH33 0x120
-#define APBDEV_PMC_SCRATCH40 0x13C
-#define APBDEV_PMC_OSC_EDPD_OVER 0x1A4
-#define PMC_OSC_EDPD_OVER_OSC_CTRL_OVER 0x400000
-#define APBDEV_PMC_CLK_OUT_CNTRL 0x1A8
-#define PMC_CLK_OUT_CNTRL_CLK1_FORCE_EN (1 << 2)
-#define APBDEV_PMC_RST_STATUS 0x1B4
-#define APBDEV_PMC_IO_DPD_REQ 0x1B8
-#define APBDEV_PMC_IO_DPD2_REQ 0x1C0
-#define APBDEV_PMC_VDDP_SEL 0x1CC
-#define APBDEV_PMC_DDR_CFG 0x1D0
-#define APBDEV_PMC_SCRATCH45 0x234
-#define APBDEV_PMC_SCRATCH46 0x238
-#define APBDEV_PMC_SCRATCH49 0x244
-#define APBDEV_PMC_TSC_MULT 0x2B4
-#define APBDEV_PMC_SEC_DISABLE2 0x2C4
-#define APBDEV_PMC_WEAK_BIAS 0x2C8
-#define APBDEV_PMC_REG_SHORT 0x2CC
-#define APBDEV_PMC_SEC_DISABLE3 0x2D8
-#define APBDEV_PMC_SECURE_SCRATCH21 0x334
-#define PMC_FUSE_PRIVATEKEYDISABLE_TZ_STICKY_BIT 0x10
-#define APBDEV_PMC_SECURE_SCRATCH32 0x360
-#define APBDEV_PMC_SECURE_SCRATCH49 0x3A4
-#define APBDEV_PMC_CNTRL2 0x440
-#define PMC_CNTRL2_HOLD_CKE_LOW_EN 0x1000
-#define APBDEV_PMC_IO_DPD3_REQ 0x45C
-#define APBDEV_PMC_IO_DPD4_REQ 0x464
-#define APBDEV_PMC_UTMIP_PAD_CFG1 0x4C4
-#define APBDEV_PMC_UTMIP_PAD_CFG3 0x4CC
-#define APBDEV_PMC_DDR_CNTRL 0x4E4
-#define APBDEV_PMC_SEC_DISABLE4 0x5B0
-#define APBDEV_PMC_SEC_DISABLE5 0x5B4
-#define APBDEV_PMC_SEC_DISABLE6 0x5B8
-#define APBDEV_PMC_SEC_DISABLE7 0x5BC
-#define APBDEV_PMC_SEC_DISABLE8 0x5C0
-#define APBDEV_PMC_SCRATCH188 0x810
-#define APBDEV_PMC_SCRATCH190 0x818
-#define APBDEV_PMC_SCRATCH200 0x840
-
-#endif
diff --git a/nyx/nyx_gui/soc/pmc_lp0_t210.h b/nyx/nyx_gui/soc/pmc_lp0_t210.h
deleted file mode 100644
index 641d9f7..0000000
--- a/nyx/nyx_gui/soc/pmc_lp0_t210.h
+++ /dev/null
@@ -1,564 +0,0 @@
-/*
- * Copyright (c) 2010-2015, NVIDIA CORPORATION. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- */
-
-#ifndef _TEGRA210_PMC_H_
-#define _TEGRA210_PMC_H_
-
-#include "../utils/types.h"
-
-struct tegra_pmc_regs
-{
- u32 cntrl;
- u32 sec_disable;
- u32 pmc_swrst;
- u32 wake_mask;
- u32 wake_lvl;
- u32 wake_status;
- u32 sw_wake_status;
- u32 dpd_pads_oride;
- u32 dpd_sample;
- u32 dpd_enable;
- u32 pwrgate_timer_off;
- u32 clamp_status;
- u32 pwrgate_toggle;
- u32 remove_clamping_cmd;
- u32 pwrgate_status;
- u32 pwrgood_timer;
- u32 blink_timer;
- u32 no_iopower;
- u32 pwr_det;
- u32 pwr_det_latch;
- u32 scratch0;
- u32 scratch1;
- u32 scratch2;
- u32 scratch3;
- u32 scratch4;
- u32 scratch5;
- u32 scratch6;
- u32 scratch7;
- u32 scratch8;
- u32 scratch9;
- u32 scratch10;
- u32 scratch11;
- u32 scratch12;
- u32 scratch13;
- u32 scratch14;
- u32 scratch15;
- u32 scratch16;
- u32 scratch17;
- u32 scratch18;
- u32 scratch19;
- u32 odmdata;
- u32 scratch21;
- u32 scratch22;
- u32 scratch23;
- u32 secure_scratch0;
- u32 secure_scratch1;
- u32 secure_scratch2;
- u32 secure_scratch3;
- u32 secure_scratch4;
- u32 secure_scratch5;
- u32 cpupwrgood_timer;
- u32 cpupwroff_timer;
- u32 pg_mask;
- u32 pg_mask_1;
- u32 auto_wake_lvl;
- u32 auto_wake_lvl_mask;
- u32 wake_delay;
- u32 pwr_det_val;
- u32 ddr_pwr;
- u32 usb_debounce_del;
- u32 usb_a0;
- u32 crypto_op;
- u32 pllp_wb0_override;
- u32 scratch24;
- u32 scratch25;
- u32 scratch26;
- u32 scratch27;
- u32 scratch28;
- u32 scratch29;
- u32 scratch30;
- u32 scratch31;
- u32 scratch32;
- u32 scratch33;
- u32 scratch34;
- u32 scratch35;
- u32 scratch36;
- u32 scratch37;
- u32 scratch38;
- u32 scratch39;
- u32 scratch40;
- u32 scratch41;
- u32 scratch42;
- u32 bondout_mirror[3];
- u32 sys_33v_en;
- u32 bondout_mirror_access;
- u32 gate;
- u32 wake2_mask;
- u32 wake2_lvl;
- u32 wake2_status;
- u32 sw_wake2_status;
- u32 auto_wake2_lvl_mask;
- u32 pg_mask_2;
- u32 pg_mask_ce1;
- u32 pg_mask_ce2;
- u32 pg_mask_ce3;
- u32 pwrgate_timer_ce[7];
- u32 pcx_edpd_cntrl;
- u32 osc_edpd_over;
- u32 clk_out_cntrl;
- u32 sata_pwrgt;
- u32 sensor_ctrl;
- u32 rst_status;
- u32 io_dpd_req;
- u32 io_dpd_status;
- u32 io_dpd2_req;
- u32 io_dpd2_status;
- u32 sel_dpd_tim;
- u32 vddp_sel;
- u32 ddr_cfg;
- u32 e_no_vttgen;
- u8 _rsv0[4];
- u32 pllm_wb0_override_freq;
- u32 test_pwrgate;
- u32 pwrgate_timer_mult;
- u32 dis_sel_dpd;
- u32 utmip_uhsic_triggers;
- u32 utmip_uhsic_saved_state;
- u32 utmip_pad_cfg;
- u32 utmip_term_pad_cfg;
- u32 utmip_uhsic_sleep_cfg;
- u32 utmip_uhsic_sleepwalk_cfg;
- u32 utmip_sleepwalk_p[3];
- u32 uhsic_sleepwalk_p0;
- u32 utmip_uhsic_status;
- u32 utmip_uhsic_fake;
- u32 bondout_mirror3[5 - 3];
- u32 secure_scratch6;
- u32 secure_scratch7;
- u32 scratch43;
- u32 scratch44;
- u32 scratch45;
- u32 scratch46;
- u32 scratch47;
- u32 scratch48;
- u32 scratch49;
- u32 scratch50;
- u32 scratch51;
- u32 scratch52;
- u32 scratch53;
- u32 scratch54;
- u32 scratch55;
- u32 scratch0_eco;
- u32 por_dpd_ctrl;
- u32 scratch2_eco;
- u32 utmip_uhsic_line_wakeup;
- u32 utmip_bias_master_cntrl;
- u32 utmip_master_config;
- u32 td_pwrgate_inter_part_timer;
- u32 utmip_uhsic2_triggers;
- u32 utmip_uhsic2_saved_state;
- u32 utmip_uhsic2_sleep_cfg;
- u32 utmip_uhsic2_sleepwalk_cfg;
- u32 uhsic2_sleepwalk_p1;
- u32 utmip_uhsic2_status;
- u32 utmip_uhsic2_fake;
- u32 utmip_uhsic2_line_wakeup;
- u32 utmip_master2_config;
- u32 utmip_uhsic_rpd_cfg;
- u32 pg_mask_ce0;
- u32 pg_mask3[5 - 3];
- u32 pllm_wb0_override2;
- u32 tsc_mult;
- u32 cpu_vsense_override;
- u32 glb_amap_cfg;
- u32 sticky_bits;
- u32 sec_disable2;
- u32 weak_bias;
- u32 reg_short;
- u32 pg_mask_andor;
- u8 _rsv1[0x2c];
- u32 secure_scratch8; /* offset 0x300 */
- u32 secure_scratch9;
- u32 secure_scratch10;
- u32 secure_scratch11;
- u32 secure_scratch12;
- u32 secure_scratch13;
- u32 secure_scratch14;
- u32 secure_scratch15;
- u32 secure_scratch16;
- u32 secure_scratch17;
- u32 secure_scratch18;
- u32 secure_scratch19;
- u32 secure_scratch20;
- u32 secure_scratch21;
- u32 secure_scratch22;
- u32 secure_scratch23;
- u32 secure_scratch24;
- u32 secure_scratch25;
- u32 secure_scratch26;
- u32 secure_scratch27;
- u32 secure_scratch28;
- u32 secure_scratch29;
- u32 secure_scratch30;
- u32 secure_scratch31;
- u32 secure_scratch32;
- u32 secure_scratch33;
- u32 secure_scratch34;
- u32 secure_scratch35;
- u32 secure_scratch36;
- u32 secure_scratch37;
- u32 secure_scratch38;
- u32 secure_scratch39;
- u32 secure_scratch40;
- u32 secure_scratch41;
- u32 secure_scratch42;
- u32 secure_scratch43;
- u32 secure_scratch44;
- u32 secure_scratch45;
- u32 secure_scratch46;
- u32 secure_scratch47;
- u32 secure_scratch48;
- u32 secure_scratch49;
- u32 secure_scratch50;
- u32 secure_scratch51;
- u32 secure_scratch52;
- u32 secure_scratch53;
- u32 secure_scratch54;
- u32 secure_scratch55;
- u32 secure_scratch56;
- u32 secure_scratch57;
- u32 secure_scratch58;
- u32 secure_scratch59;
- u32 secure_scratch60;
- u32 secure_scratch61;
- u32 secure_scratch62;
- u32 secure_scratch63;
- u32 secure_scratch64;
- u32 secure_scratch65;
- u32 secure_scratch66;
- u32 secure_scratch67;
- u32 secure_scratch68;
- u32 secure_scratch69;
- u32 secure_scratch70;
- u32 secure_scratch71;
- u32 secure_scratch72;
- u32 secure_scratch73;
- u32 secure_scratch74;
- u32 secure_scratch75;
- u32 secure_scratch76;
- u32 secure_scratch77;
- u32 secure_scratch78;
- u32 secure_scratch79;
- u32 _rsv0x420[8];
- u32 cntrl2; /* 0x440 */
- u32 _rsv0x444[2];
- u32 event_counter; /* 0x44C */
- u32 fuse_control;
- u32 scratch1_eco;
- u32 _rsv0x458[1];
- u32 io_dpd3_req; /* 0x45C */
- u32 io_dpd3_status;
- u32 io_dpd4_req;
- u32 io_dpd4_status;
- u32 _rsv0x46C[30];
- u32 ddr_cntrl; /* 0x4E4 */
- u32 _rsv0x4E8[70];
- u32 scratch56; /* 0x600 */
- u32 scratch57;
- u32 scratch58;
- u32 scratch59;
- u32 scratch60;
- u32 scratch61;
- u32 scratch62;
- u32 scratch63;
- u32 scratch64;
- u32 scratch65;
- u32 scratch66;
- u32 scratch67;
- u32 scratch68;
- u32 scratch69;
- u32 scratch70;
- u32 scratch71;
- u32 scratch72;
- u32 scratch73;
- u32 scratch74;
- u32 scratch75;
- u32 scratch76;
- u32 scratch77;
- u32 scratch78;
- u32 scratch79;
- u32 scratch80;
- u32 scratch81;
- u32 scratch82;
- u32 scratch83;
- u32 scratch84;
- u32 scratch85;
- u32 scratch86;
- u32 scratch87;
- u32 scratch88;
- u32 scratch89;
- u32 scratch90;
- u32 scratch91;
- u32 scratch92;
- u32 scratch93;
- u32 scratch94;
- u32 scratch95;
- u32 scratch96;
- u32 scratch97;
- u32 scratch98;
- u32 scratch99;
- u32 scratch100;
- u32 scratch101;
- u32 scratch102;
- u32 scratch103;
- u32 scratch104;
- u32 scratch105;
- u32 scratch106;
- u32 scratch107;
- u32 scratch108;
- u32 scratch109;
- u32 scratch110;
- u32 scratch111;
- u32 scratch112;
- u32 scratch113;
- u32 scratch114;
- u32 scratch115;
- u32 scratch116;
- u32 scratch117;
- u32 scratch118;
- u32 scratch119;
- u32 scratch120; /* 0x700 */
- u32 scratch121;
- u32 scratch122;
- u32 scratch123;
- u32 scratch124;
- u32 scratch125;
- u32 scratch126;
- u32 scratch127;
- u32 scratch128;
- u32 scratch129;
- u32 scratch130;
- u32 scratch131;
- u32 scratch132;
- u32 scratch133;
- u32 scratch134;
- u32 scratch135;
- u32 scratch136;
- u32 scratch137;
- u32 scratch138;
- u32 scratch139;
- u32 scratch140;
- u32 scratch141;
- u32 scratch142;
- u32 scratch143;
- u32 scratch144;
- u32 scratch145;
- u32 scratch146;
- u32 scratch147;
- u32 scratch148;
- u32 scratch149;
- u32 scratch150;
- u32 scratch151;
- u32 scratch152;
- u32 scratch153;
- u32 scratch154;
- u32 scratch155;
- u32 scratch156;
- u32 scratch157;
- u32 scratch158;
- u32 scratch159;
- u32 scratch160;
- u32 scratch161;
- u32 scratch162;
- u32 scratch163;
- u32 scratch164;
- u32 scratch165;
- u32 scratch166;
- u32 scratch167;
- u32 scratch168;
- u32 scratch169;
- u32 scratch170;
- u32 scratch171;
- u32 scratch172;
- u32 scratch173;
- u32 scratch174;
- u32 scratch175;
- u32 scratch176;
- u32 scratch177;
- u32 scratch178;
- u32 scratch179;
- u32 scratch180;
- u32 scratch181;
- u32 scratch182;
- u32 scratch183;
- u32 scratch184;
- u32 scratch185;
- u32 scratch186;
- u32 scratch187;
- u32 scratch188;
- u32 scratch189;
- u32 scratch190;
- u32 scratch191;
- u32 scratch192;
- u32 scratch193;
- u32 scratch194;
- u32 scratch195;
- u32 scratch196;
- u32 scratch197;
- u32 scratch198;
- u32 scratch199;
- u32 scratch200;
- u32 scratch201;
- u32 scratch202;
- u32 scratch203;
- u32 scratch204;
- u32 scratch205;
- u32 scratch206;
- u32 scratch207;
- u32 scratch208;
- u32 scratch209;
- u32 scratch210;
- u32 scratch211;
- u32 scratch212;
- u32 scratch213;
- u32 scratch214;
- u32 scratch215;
- u32 scratch216;
- u32 scratch217;
- u32 scratch218;
- u32 scratch219;
- u32 scratch220;
- u32 scratch221;
- u32 scratch222;
- u32 scratch223;
- u32 scratch224;
- u32 scratch225;
- u32 scratch226;
- u32 scratch227;
- u32 scratch228;
- u32 scratch229;
- u32 scratch230;
- u32 scratch231;
- u32 scratch232;
- u32 scratch233;
- u32 scratch234;
- u32 scratch235;
- u32 scratch236;
- u32 scratch237;
- u32 scratch238;
- u32 scratch239;
- u32 scratch240;
- u32 scratch241;
- u32 scratch242;
- u32 scratch243;
- u32 scratch244;
- u32 scratch245;
- u32 scratch246;
- u32 scratch247;
- u32 scratch248;
- u32 scratch249;
- u32 scratch250;
- u32 scratch251;
- u32 scratch252;
- u32 scratch253;
- u32 scratch254;
- u32 scratch255;
- u32 scratch256;
- u32 scratch257;
- u32 scratch258;
- u32 scratch259;
- u32 scratch260;
- u32 scratch261;
- u32 scratch262;
- u32 scratch263;
- u32 scratch264;
- u32 scratch265;
- u32 scratch266;
- u32 scratch267;
- u32 scratch268;
- u32 scratch269;
- u32 scratch270;
- u32 scratch271;
- u32 scratch272;
- u32 scratch273;
- u32 scratch274;
- u32 scratch275;
- u32 scratch276;
- u32 scratch277;
- u32 scratch278;
- u32 scratch279;
- u32 scratch280;
- u32 scratch281;
- u32 scratch282;
- u32 scratch283;
- u32 scratch284;
- u32 scratch285;
- u32 scratch286;
- u32 scratch287;
- u32 scratch288;
- u32 scratch289;
- u32 scratch290;
- u32 scratch291;
- u32 scratch292;
- u32 scratch293;
- u32 scratch294;
- u32 scratch295;
- u32 scratch296;
- u32 scratch297;
- u32 scratch298;
- u32 scratch299; /* 0x9CC */
- u32 _rsv0x9D0[50];
- u32 secure_scratch80; /* 0xa98 */
- u32 secure_scratch81;
- u32 secure_scratch82;
- u32 secure_scratch83;
- u32 secure_scratch84;
- u32 secure_scratch85;
- u32 secure_scratch86;
- u32 secure_scratch87;
- u32 secure_scratch88;
- u32 secure_scratch89;
- u32 secure_scratch90;
- u32 secure_scratch91;
- u32 secure_scratch92;
- u32 secure_scratch93;
- u32 secure_scratch94;
- u32 secure_scratch95;
- u32 secure_scratch96;
- u32 secure_scratch97;
- u32 secure_scratch98;
- u32 secure_scratch99;
- u32 secure_scratch100;
- u32 secure_scratch101;
- u32 secure_scratch102;
- u32 secure_scratch103;
- u32 secure_scratch104;
- u32 secure_scratch105;
- u32 secure_scratch106;
- u32 secure_scratch107;
- u32 secure_scratch108;
- u32 secure_scratch109;
- u32 secure_scratch110;
- u32 secure_scratch111;
- u32 secure_scratch112;
- u32 secure_scratch113;
- u32 secure_scratch114;
- u32 secure_scratch115;
- u32 secure_scratch116;
- u32 secure_scratch117;
- u32 secure_scratch118;
- u32 secure_scratch119;
-};
-
-#endif /* _TEGRA210_PMC_H_ */
diff --git a/nyx/nyx_gui/soc/smmu.c b/nyx/nyx_gui/soc/smmu.c
deleted file mode 100644
index ef4f9bb..0000000
--- a/nyx/nyx_gui/soc/smmu.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 balika011
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "smmu.h"
-#include "../soc/ccplex.h"
-#include "../soc/t210.h"
-#include "../mem/mc_t210.h"
-#include "../utils/util.h"
-#include "../utils/aarch64_util.h"
-
-bool smmu_used = false;
-u8 *_pageheap = (u8 *)SMMU_HEAP_ADDR;
-
-//Enabling SMMU requires a TZ secure write: MC(MC_SMMU_CONFIG) = 1;
-u8 smmu_payload[] __attribute__((aligned(16))) = {
- 0x41, 0x01, 0x00, 0x58, // 0x00: LDR X1, =0x70019010
- 0x20, 0x00, 0x80, 0xD2, // 0x04: MOV X0, #0x1
- 0x20, 0x00, 0x00, 0xB9, // 0x08: STR W0, [X1]
- 0x1F, 0x71, 0x08, 0xD5, // 0x0C: IC IALLUIS
- 0x9F, 0x3B, 0x03, 0xD5, // 0x10: DSB ISH
- 0xFE, 0xFF, 0xFF, 0x17, // 0x14: B loop
- 0x00, 0x00, 0x80, 0xD2, // 0x18: MOV X0, #0x0
- 0x20, 0x00, 0x00, 0xB9, // 0x1C: STR W0, [X1]
- 0x80, 0x00, 0x00, 0x58, // 0x20: LDR X0, =0x4002B000
- 0x00, 0x00, 0x1F, 0xD6, // 0x28: BR X0
- 0x10, 0x90, 0x01, 0x70, // 0x28: MC_SMMU_CONFIG
- 0x00, 0x00, 0x00, 0x00, // 0x2C:
- 0x00, 0x00, 0x00, 0x00, // 0x30: secmon address
- 0x00, 0x00, 0x00, 0x00 // 0x34:
-};
-
-void *page_alloc(u32 num)
-{
- u8 *res = _pageheap;
- _pageheap += 0x1000 * num;
- memset(res, 0, 0x1000 * num);
- return res;
-}
-
-u32 *smmu_alloc_pdir()
-{
- u32 *pdir = (u32 *)page_alloc(1);
- for (int pdn = 0; pdn < SMMU_PDIR_COUNT; pdn++)
- pdir[pdn] = _PDE_VACANT(pdn);
- return pdir;
-}
-
-void smmu_flush_regs()
-{
- (void)MC(MC_SMMU_PTB_DATA);
-}
-
-void smmu_flush_all()
-{
- MC(MC_SMMU_PTC_FLUSH) = 0;
- smmu_flush_regs();
- MC(MC_SMMU_TLB_FLUSH) = 0;
- smmu_flush_regs();
-}
-
-void smmu_init(u32 secmon_base)
-{
- MC(MC_SMMU_PTB_ASID) = 0;
- MC(MC_SMMU_PTB_DATA) = 0;
- MC(MC_SMMU_TLB_CONFIG) = 0x30000030;
- MC(MC_SMMU_PTC_CONFIG) = 0x28000F3F;
- MC(MC_SMMU_PTC_FLUSH) = 0;
- MC(MC_SMMU_TLB_FLUSH) = 0;
-
- // Set the secmon address
- *(u32 *)(smmu_payload + 0x30) = secmon_base;
-}
-
-void smmu_enable()
-{
- if (smmu_used)
- return;
-
- ccplex_boot_cpu0((u32)smmu_payload);
- smmu_used = true;
- msleep(150);
-
- smmu_flush_all();
-}
-
-bool smmu_is_used()
-{
- return smmu_used;
-}
-
-void smmu_exit()
-{
- *(u32 *)(smmu_payload + 0x14) = _NOP();
-}
-
-u32 *smmu_init_domain4(u32 dev_base, u32 asid)
-{
- u32 *pdir = smmu_alloc_pdir();
-
- MC(MC_SMMU_PTB_ASID) = asid;
- MC(MC_SMMU_PTB_DATA) = SMMU_MK_PDIR((u32)pdir, _PDIR_ATTR);
- smmu_flush_regs();
-
- MC(dev_base) = 0x80000000 | (asid << 24) | (asid << 16) | (asid << 8) | (asid);
- smmu_flush_regs();
-
- return pdir;
-}
-
-u32 *smmu_get_pte(u32 *pdir, u32 iova)
-{
- u32 ptn = SMMU_ADDR_TO_PFN(iova);
- u32 pdn = SMMU_ADDR_TO_PDN(iova);
- u32 *ptbl;
-
- if (pdir[pdn] != _PDE_VACANT(pdn))
- ptbl = (u32 *)((pdir[pdn] & SMMU_PFN_MASK) << SMMU_PDIR_SHIFT);
- else
- {
- ptbl = (u32 *)page_alloc(1);
- u32 addr = SMMU_PDN_TO_ADDR(pdn);
- for (int pn = 0; pn < SMMU_PTBL_COUNT; pn++, addr += SMMU_PAGE_SIZE)
- ptbl[pn] = _PTE_VACANT(addr);
- pdir[pdn] = SMMU_MK_PDE((u32)ptbl, _PDE_ATTR | _PDE_NEXT);
- smmu_flush_all();
- }
-
- return &ptbl[ptn % SMMU_PTBL_COUNT];
-}
-
-void smmu_map(u32 *pdir, u32 addr, u32 page, int cnt, u32 attr)
-{
- for (int i = 0; i < cnt; i++)
- {
- u32 *pte = smmu_get_pte(pdir, addr);
- *pte = SMMU_ADDR_TO_PFN(page) | attr;
- addr += 0x1000;
- page += 0x1000;
- }
- smmu_flush_all();
-}
-
-u32 *smmu_init_for_tsec()
-{
- return smmu_init_domain4(MC_SMMU_TSEC_ASID, 1);
-}
-
-void smmu_deinit_for_tsec()
-{
- MC(MC_SMMU_PTB_ASID) = 1;
- MC(MC_SMMU_PTB_DATA) = 0;
- MC(MC_SMMU_TSEC_ASID) = 0;
- smmu_flush_regs();
-}
-
diff --git a/nyx/nyx_gui/soc/smmu.h b/nyx/nyx_gui/soc/smmu.h
deleted file mode 100644
index 827d58b..0000000
--- a/nyx/nyx_gui/soc/smmu.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "../utils/types.h"
-
-#define SMMU_HEAP_ADDR 0xA0000000
-
-#define MC_INTSTATUS 0x0
-#define MC_INTMASK 0x4
-#define MC_ERR_STATUS 0x8
-#define MC_ERR_ADR 0xc
-#define MC_SMMU_CONFIG 0x10
-#define MC_SMMU_TLB_CONFIG 0x14
-#define MC_SMMU_PTC_CONFIG 0x18
-#define MC_SMMU_PTB_ASID 0x1c
-#define MC_SMMU_PTB_DATA 0x20
-#define MC_SMMU_TLB_FLUSH 0x30
-#define MC_SMMU_PTC_FLUSH 0x34
-#define MC_SMMU_ASID_SECURITY 0x38
-#define MC_SMMU_TSEC_ASID 0x294
-#define MC_SMMU_TRANSLATION_ENABLE_0 0x228
-#define MC_SMMU_TRANSLATION_ENABLE_1 0x22c
-#define MC_SMMU_TRANSLATION_ENABLE_2 0x230
-#define MC_SMMU_TRANSLATION_ENABLE_3 0x234
-#define MC_SMMU_TRANSLATION_ENABLE_4 0xb98
-
-#define SMMU_PDE_NEXT_SHIFT 28
-#define MC_SMMU_PTB_DATA_0_ASID_NONSECURE_SHIFT 29
-#define MC_SMMU_PTB_DATA_0_ASID_WRITABLE_SHIFT 30
-#define MC_SMMU_PTB_DATA_0_ASID_READABLE_SHIFT 31
-#define SMMU_PAGE_SHIFT 12
-#define SMMU_PAGE_SIZE (1 << SMMU_PAGE_SHIFT)
-#define SMMU_PDIR_COUNT 1024
-#define SMMU_PDIR_SIZE (sizeof(u32) * SMMU_PDIR_COUNT)
-#define SMMU_PTBL_COUNT 1024
-#define SMMU_PTBL_SIZE (sizeof(u32) * SMMU_PTBL_COUNT)
-#define SMMU_PDIR_SHIFT 12
-#define SMMU_PDE_SHIFT 12
-#define SMMU_PTE_SHIFT 12
-#define SMMU_PFN_MASK 0x000FFFFF
-#define SMMU_ADDR_TO_PFN(addr) ((addr) >> 12)
-#define SMMU_ADDR_TO_PDN(addr) ((addr) >> 22)
-#define SMMU_PDN_TO_ADDR(addr) ((pdn) << 22)
-#define _READABLE (1 << MC_SMMU_PTB_DATA_0_ASID_READABLE_SHIFT)
-#define _WRITABLE (1 << MC_SMMU_PTB_DATA_0_ASID_WRITABLE_SHIFT)
-#define _NONSECURE (1 << MC_SMMU_PTB_DATA_0_ASID_NONSECURE_SHIFT)
-#define _PDE_NEXT (1 << SMMU_PDE_NEXT_SHIFT)
-#define _MASK_ATTR (_READABLE | _WRITABLE | _NONSECURE)
-#define _PDIR_ATTR (_READABLE | _WRITABLE | _NONSECURE)
-#define _PDE_ATTR (_READABLE | _WRITABLE | _NONSECURE)
-#define _PDE_VACANT(pdn) (((pdn) << 10) | _PDE_ATTR)
-#define _PTE_ATTR (_READABLE | _WRITABLE | _NONSECURE)
-#define _PTE_VACANT(addr) (((addr) >> SMMU_PAGE_SHIFT) | _PTE_ATTR)
-#define SMMU_MK_PDIR(page, attr) (((page) >> SMMU_PDIR_SHIFT) | (attr))
-#define SMMU_MK_PDE(page, attr) (((page) >> SMMU_PDE_SHIFT) | (attr))
-
-void *page_alloc(u32 num);
-u32 *smmu_alloc_pdir();
-void smmu_flush_regs();
-void smmu_flush_all();
-void smmu_init(u32 secmon_base);
-void smmu_enable();
-bool smmu_is_used();
-void smmu_exit();
-u32 *smmu_init_domain4(u32 dev_base, u32 asid);
-u32 *smmu_get_pte(u32 *pdir, u32 iova);
-void smmu_map(u32 *pdir, u32 addr, u32 page, int cnt, u32 attr);
-u32 *smmu_init_for_tsec();
-void smmu_deinit_for_tsec();
diff --git a/nyx/nyx_gui/soc/t210.h b/nyx/nyx_gui/soc/t210.h
deleted file mode 100644
index b45ef2a..0000000
--- a/nyx/nyx_gui/soc/t210.h
+++ /dev/null
@@ -1,286 +0,0 @@
-/*
-* Copyright (c) 2018 naehrwert
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms and conditions of the GNU General Public License,
-* version 2, as published by the Free Software Foundation.
-*
-* This program is distributed in the hope it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see .
-*/
-
-#ifndef _T210_H_
-#define _T210_H_
-
-#include "../utils/types.h"
-
-#define BOOTROM_BASE 0x100000
-#define IRAM_BASE 0x40000000
-#define HOST1X_BASE 0x50000000
-#define BPMP_CACHE_BASE 0x50040000
-#define DISPLAY_A_BASE 0x54200000
-#define DSI_BASE 0x54300000
-#define VIC_BASE 0x54340000
-#define TSEC_BASE 0x54500000
-#define SOR1_BASE 0x54580000
-#define ICTLR_BASE 0x60004000
-#define TMR_BASE 0x60005000
-#define CLOCK_BASE 0x60006000
-#define FLOW_CTLR_BASE 0x60007000
-#define AHBDMA_BASE 0x60008000
-#define SYSREG_BASE 0x6000C000
-#define SB_BASE (SYSREG_BASE + 0x200)
-#define GPIO_BASE 0x6000D000
-#define GPIO_1_BASE (GPIO_BASE)
-#define GPIO_2_BASE (GPIO_BASE + 0x100)
-#define GPIO_3_BASE (GPIO_BASE + 0x200)
-#define GPIO_4_BASE (GPIO_BASE + 0x300)
-#define GPIO_5_BASE (GPIO_BASE + 0x400)
-#define GPIO_6_BASE (GPIO_BASE + 0x500)
-#define GPIO_7_BASE (GPIO_BASE + 0x600)
-#define GPIO_8_BASE (GPIO_BASE + 0x700)
-#define EXCP_VEC_BASE 0x6000F000
-#define IPATCH_BASE 0x6001DC00
-#define APBDMA_BASE 0x60020000
-#define APB_MISC_BASE 0x70000000
-#define PINMUX_AUX_BASE 0x70003000
-#define UART_BASE 0x70006000
-#define PWM_BASE 0x7000A000
-#define RTC_BASE 0x7000E000
-#define PMC_BASE 0x7000E400
-#define SYSCTR0_BASE 0x700F0000
-#define FUSE_BASE 0x7000F800
-#define KFUSE_BASE 0x7000FC00
-#define SE_BASE 0x70012000
-#define MC_BASE 0x70019000
-#define EMC_BASE 0x7001B000
-#define EMC0_BASE 0x7001E000
-#define EMC1_BASE 0x7001F000
-#define MIPI_CAL_BASE 0x700E3000
-#define CL_DVFS_BASE 0x70110000
-#define I2S_BASE 0x702D1000
-#define ADMA_BASE 0x702E2000
-#define TZRAM_BASE 0x7C010000
-#define USB_BASE 0x7D000000
-#define USB_OTG_BASE USB_BASE
-#define USB1_BASE 0x7D004000
-
-#define _REG(base, off) *(vu32 *)((base) + (off))
-
-#define HOST1X(off) _REG(HOST1X_BASE, off)
-#define BPMP_CACHE_CTRL(off) _REG(BPMP_CACHE_BASE, off)
-#define DISPLAY_A(off) _REG(DISPLAY_A_BASE, off)
-#define DSI(off) _REG(DSI_BASE, off)
-#define VIC(off) _REG(VIC_BASE, off)
-#define TSEC(off) _REG(TSEC_BASE, off)
-#define SOR1(off) _REG(SOR1_BASE, off)
-#define ICTLR(cidx, off) _REG(ICTLR_BASE + (0x100 * cidx), off)
-#define TMR(off) _REG(TMR_BASE, off)
-#define CLOCK(off) _REG(CLOCK_BASE, off)
-#define FLOW_CTLR(off) _REG(FLOW_CTLR_BASE, off)
-#define SYSREG(off) _REG(SYSREG_BASE, off)
-#define AHB_GIZMO(off) _REG(SYSREG_BASE, off)
-#define SB(off) _REG(SB_BASE, off)
-#define GPIO(off) _REG(GPIO_BASE, off)
-#define GPIO_1(off) _REG(GPIO_1_BASE, off)
-#define GPIO_2(off) _REG(GPIO_2_BASE, off)
-#define GPIO_3(off) _REG(GPIO_3_BASE, off)
-#define GPIO_4(off) _REG(GPIO_4_BASE, off)
-#define GPIO_5(off) _REG(GPIO_5_BASE, off)
-#define GPIO_6(off) _REG(GPIO_6_BASE, off)
-#define GPIO_7(off) _REG(GPIO_7_BASE, off)
-#define GPIO_8(off) _REG(GPIO_8_BASE, off)
-#define EXCP_VEC(off) _REG(EXCP_VEC_BASE, off)
-#define APB_MISC(off) _REG(APB_MISC_BASE, off)
-#define PINMUX_AUX(off) _REG(PINMUX_AUX_BASE, off)
-#define PWM(off) _REG(PWM_BASE, off)
-#define RTC(off) _REG(RTC_BASE, off)
-#define PMC(off) _REG(PMC_BASE, off)
-#define SYSCTR0(off) _REG(SYSCTR0_BASE, off)
-#define FUSE(off) _REG(FUSE_BASE, off)
-#define KFUSE(off) _REG(KFUSE_BASE, off)
-#define SE(off) _REG(SE_BASE, off)
-#define MC(off) _REG(MC_BASE, off)
-#define EMC(off) _REG(EMC_BASE, off)
-#define EMC_CH0(off) _REG(EMC0_BASE, off)
-#define EMC_CH1(off) _REG(EMC1_BASE, off)
-#define MIPI_CAL(off) _REG(MIPI_CAL_BASE, off)
-#define CL_DVFS(off) _REG(CL_DVFS_BASE, off)
-#define I2S(off) _REG(I2S_BASE, off)
-#define ADMA(off) _REG(ADMA_BASE, off)
-#define USB(off) _REG(USB_BASE, off)
-#define USB1(off) _REG(USB1_BASE, off)
-#define TEST_REG(off) _REG(0x0, off)
-
-/* HOST1X registers. */
-#define HOST1X_CH0_SYNC_BASE 0x2100
-#define HOST1X_CH0_SYNC_SYNCPT_9 (HOST1X_CH0_SYNC_BASE + 0xFA4)
-#define HOST1X_CH0_SYNC_SYNCPT_160 (HOST1X_CH0_SYNC_BASE + 0x1200)
-
-/*! EVP registers. */
-#define EVP_CPU_RESET_VECTOR 0x100
-#define EVP_COP_RESET_VECTOR 0x200
-#define EVP_COP_UNDEF_VECTOR 0x204
-#define EVP_COP_SWI_VECTOR 0x208
-#define EVP_COP_PREFETCH_ABORT_VECTOR 0x20C
-#define EVP_COP_DATA_ABORT_VECTOR 0x210
-#define EVP_COP_RSVD_VECTOR 0x214
-#define EVP_COP_IRQ_VECTOR 0x218
-#define EVP_COP_FIQ_VECTOR 0x21C
-#define EVP_COP_IRQ_STS 0x220
-
-/*! Primary Interrupt Controller registers. */
-#define PRI_ICTLR_FIR 0x14
-#define PRI_ICTLR_FIR_SET 0x18
-#define PRI_ICTLR_FIR_CLR 0x1C
-#define PRI_ICTLR_CPU_IER 0x20
-#define PRI_ICTLR_CPU_IER_SET 0x24
-#define PRI_ICTLR_CPU_IER_CLR 0x28
-#define PRI_ICTLR_CPU_IEP_CLASS 0x2C
-#define PRI_ICTLR_COP_IER 0x30
-#define PRI_ICTLR_COP_IER_SET 0x34
-#define PRI_ICTLR_COP_IER_CLR 0x38
-#define PRI_ICTLR_COP_IEP_CLASS 0x3C
-
-/*! AHB Gizmo registers. */
-#define AHB_ARBITRATION_PRIORITY_CTRL 0x8
-#define ARBITRATION_PRIORITY_CTRL_ENB_FAST_REARBITRATE (1 << 6)
-#define AHB_GIZMO_AHB_MEM 0x10
-#define AHB_MEM_ENB_FAST_REARBITRATE (1 << 2)
-#define AHB_GIZMO_USB 0x20
-#define AHB_GIZMO_USB_IMMEDIATE (1 << 18)
-#define AHB_AHB_MEM_PREFETCH_CFG1 0xF0
-#define MEM_PREFETCH_ENABLE (1 << 31)
-#define MEM_PREFETCH_AHB_MST_USB 6
-
-/*! Misc registers. */
-#define APB_MISC_PP_STRAPPING_OPT_A 0x08
-#define APB_MISC_PP_PINMUX_GLOBAL 0x40
-#define APB_MISC_GP_HIDREV 0x804
-#define APB_MISC_GP_AUD_MCLK_CFGPADCTRL 0x8F4
-#define APB_MISC_GP_LCD_BL_PWM_CFGPADCTRL 0xA34
-#define APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL 0xA98
-#define APB_MISC_GP_EMMC2_PAD_CFGPADCTRL 0xA9C
-#define APB_MISC_GP_EMMC4_PAD_CFGPADCTRL 0xAB4
-#define APB_MISC_GP_EMMC4_PAD_PUPD_CFGPADCTRL 0xABC
-#define APB_MISC_GP_WIFI_EN_CFGPADCTRL 0xB64
-#define APB_MISC_GP_WIFI_RST_CFGPADCTRL 0xB68
-
-/*! System registers. */
-#define AHB_ARBITRATION_XBAR_CTRL 0xE0
-#define AHB_AHB_SPARE_REG 0x110
-
-/*! Secure boot registers. */
-#define SB_CSR 0x0
-#define SB_CSR_NS_RST_VEC_WR_DIS (1 << 1)
-#define SB_CSR_PIROM_DISABLE (1 << 4)
-#define SB_AA64_RESET_LOW 0x30
-#define SB_AA64_RST_AARCH64_MODE_EN (1 << 0)
-#define SB_AA64_RESET_HIGH 0x34
-
-/*! SOR registers. */
-#define SOR_NV_PDISP_SOR_DP_HDCP_BKSV_LSB 0x1E8
-#define SOR_NV_PDISP_SOR_TMDS_HDCP_BKSV_LSB 0x21C
-#define SOR_NV_PDISP_SOR_TMDS_HDCP_CN_MSB 0x208
-#define SOR_NV_PDISP_SOR_TMDS_HDCP_CN_LSB 0x20C
-
-/*! RTC registers. */
-#define APBDEV_RTC_SECONDS 0x8
-#define APBDEV_RTC_SHADOW_SECONDS 0xC
-#define APBDEV_RTC_MILLI_SECONDS 0x10
-
-/*! SYSCTR0 registers. */
-#define SYSCTR0_CNTFID0 0x20
-#define SYSCTR0_CNTCR 0x00
-#define SYSCTR0_COUNTERID0 0xFE0
-#define SYSCTR0_COUNTERID1 0xFE4
-#define SYSCTR0_COUNTERID2 0xFE8
-#define SYSCTR0_COUNTERID3 0xFEC
-#define SYSCTR0_COUNTERID4 0xFD0
-#define SYSCTR0_COUNTERID5 0xFD4
-#define SYSCTR0_COUNTERID6 0xFD8
-#define SYSCTR0_COUNTERID7 0xFDC
-#define SYSCTR0_COUNTERID8 0xFF0
-#define SYSCTR0_COUNTERID9 0xFF4
-#define SYSCTR0_COUNTERID10 0xFF8
-#define SYSCTR0_COUNTERID11 0xFFC
-
-/*! TMR registers. */
-#define TIMERUS_CNTR_1US (0x10 + 0x0)
-#define TIMERUS_USEC_CFG (0x10 + 0x4)
-#define TIMER_TMR8_TMR_PTV 0x78
-#define TIMER_TMR9_TMR_PTV 0x80
-#define TIMER_EN (1 << 31)
-#define TIMER_PER_EN (1 << 30)
-#define TIMER_TMR8_TMR_PCR 0x7C
-#define TIMER_TMR9_TMR_PCR 0x8C
-#define TIMER_INTR_CLR (1 << 30)
-
-#define TIMER_WDT4_CONFIG (0x100 + 0x80)
-#define TIMER_SRC(TMR) (TMR & 0xF)
-#define TIMER_PER(PER) ((PER & 0xFF) << 4)
-#define TIMER_SYSRESET_EN (1 << 14)
-#define TIMER_PMCRESET_EN (1 << 15)
-#define TIMER_WDT4_COMMAND (0x108 + 0x80)
-#define TIMER_START_CNT (1 << 0)
-#define TIMER_CNT_DISABLE (1 << 1)
-#define TIMER_WDT4_UNLOCK_PATTERN (0x10C + 0x80)
-#define TIMER_MAGIC_PTRN 0xC45A
-
-/*! I2S registers. */
-#define I2S1_CG 0x88
-#define I2S1_CTRL 0xA0
-#define I2S2_CG 0x188
-#define I2S2_CTRL 0x1A0
-#define I2S3_CG 0x288
-#define I2S3_CTRL 0x2A0
-#define I2S4_CG 0x388
-#define I2S4_CTRL 0x3A0
-#define I2S5_CG 0x488
-#define I2S5_CTRL 0x4A0
-#define I2S_CG_SLCG_ENABLE (1 << 0)
-#define I2S_CTRL_MASTER_EN (1 << 10)
-
-/*! PWM registers. */
-#define PWM_CONTROLLER_PWM_CSR_0 0x00
-#define PWM_CONTROLLER_PWM_CSR_1 0x10
-#define PWM_CSR_EN (1 << 31)
-
-/*! Special registers. */
-#define EMC_SCRATCH0 0x324
-#define EMC_HEKA_UPD (1 << 30)
-#define EMC_SEPT_RUN (1 << 31)
-
-/*! Flow controller registers. */
-#define FLOW_CTLR_HALT_COP_EVENTS 0x4
-#define HALT_COP_GIC_IRQ (1 << 9)
-#define HALT_COP_LIC_IRQ (1 << 11)
-#define HALT_COP_SEC (1 << 23)
-#define HALT_COP_MSEC (1 << 24)
-#define HALT_COP_USEC (1 << 25)
-#define HALT_COP_JTAG (1 << 28)
-#define HALT_COP_WAIT_EVENT (1 << 30)
-#define HALT_COP_STOP_UNTIL_IRQ (1 << 31)
-#define HALT_COP_MAX_CNT 0xFF
-#define FLOW_CTLR_HALT_CPU0_EVENTS 0x0
-#define FLOW_CTLR_HALT_CPU1_EVENTS 0x14
-#define FLOW_CTLR_HALT_CPU2_EVENTS 0x1C
-#define FLOW_CTLR_HALT_CPU3_EVENTS 0x24
-#define FLOW_CTLR_CPU0_CSR 0x8
-#define FLOW_CTLR_CPU1_CSR 0x18
-#define FLOW_CTLR_CPU2_CSR 0x20
-#define FLOW_CTLR_CPU3_CSR 0x28
-#define FLOW_CTLR_RAM_REPAIR 0x40
-#define FLOW_CTLR_BPMP_CLUSTER_CONTROL 0x98
-
-/*! USB controller registers. */
-#define USB1_UTMIP_BAT_CHRG_CFG0 0x830
-#define BAT_CHRG_CFG0_OP_SRC_EN (1 << 3)
-#define BAT_CHRG_CFG0_PWRDOWN_CHRG (1 << 0)
-
-#endif
diff --git a/nyx/nyx_gui/soc/uart.c b/nyx/nyx_gui/soc/uart.c
deleted file mode 100644
index 92c22a1..0000000
--- a/nyx/nyx_gui/soc/uart.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
-* Copyright (c) 2018 naehrwert
-* Copyright (c) 2019-2020 CTCaer
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms and conditions of the GNU General Public License,
-* version 2, as published by the Free Software Foundation.
-*
-* This program is distributed in the hope it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see .
-*/
-
-#include "../soc/uart.h"
-#include "../soc/clock.h"
-#include "../soc/t210.h"
-#include "../utils/util.h"
-
-/* UART A, B, C, D and E. */
-static const u32 uart_baseoff[5] = { 0, 0x40, 0x200, 0x300, 0x400 };
-
-void uart_init(u32 idx, u32 baud)
-{
- uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]);
-
- // Make sure no data is being sent.
- uart_wait_idle(idx, UART_TX_IDLE);
-
- // Set clock.
- bool clk_type = clock_uart_use_src_div(idx, baud);
-
- // Misc settings.
- u32 div = clk_type ? ((8 * baud + 408000000) / (16 * baud)) : 1; // DIV_ROUND_CLOSEST.
- uart->UART_IER_DLAB = 0; // Disable interrupts.
- uart->UART_LCR = UART_LCR_DLAB | UART_LCR_WORD_LENGTH_8; // Enable DLAB & set 8n1 mode.
- uart->UART_THR_DLAB = (u8)div; // Divisor latch LSB.
- uart->UART_IER_DLAB = (u8)(div >> 8); // Divisor latch MSB.
- uart->UART_LCR = UART_LCR_WORD_LENGTH_8; // Disable DLAB.
- (void)uart->UART_SPR;
-
- // Setup and flush fifo.
- uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO;
- (void)uart->UART_SPR;
- usleep(20);
- uart->UART_MCR = 0; // Disable hardware flow control.
- usleep(96);
- uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_TX_CLR | UART_IIR_FCR_RX_CLR;
-
- // Wait 3 symbols for baudrate change.
- usleep(3 * ((baud + 999999) / baud));
- uart_wait_idle(idx, UART_TX_IDLE | UART_RX_IDLE);
-}
-
-void uart_wait_idle(u32 idx, u32 which)
-{
- uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]);
- if (UART_TX_IDLE & which)
- {
- while (!(uart->UART_LSR & UART_LSR_TMTY))
- ;
- }
- if (UART_RX_IDLE & which)
- {
- while (uart->UART_LSR & UART_LSR_RDR)
- ;
- }
-}
-
-void uart_send(u32 idx, const u8 *buf, u32 len)
-{
- uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]);
-
- for (u32 i = 0; i != len; i++)
- {
- while (!(uart->UART_LSR & UART_LSR_THRE))
- ;
- uart->UART_THR_DLAB = buf[i];
- }
-}
-
-u32 uart_recv(u32 idx, u8 *buf, u32 len)
-{
- uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]);
- u32 timeout = get_tmr_us() + 250;
- u32 i;
-
- for (i = 0; ; i++)
- {
- while (!(uart->UART_LSR & UART_LSR_RDR))
- {
- if (timeout < get_tmr_us())
- break;
- if (len && len < i)
- break;
- }
- if (timeout < get_tmr_us())
- break;
-
- buf[i] = uart->UART_THR_DLAB;
- timeout = get_tmr_us() + 250;
- }
-
- return i ? (len ? (i - 1) : i) : 0;
-}
-
-void uart_invert(u32 idx, bool enable, u32 invert_mask)
-{
- uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]);
-
- if (enable)
- uart->UART_IRDA_CSR |= invert_mask;
- else
- uart->UART_IRDA_CSR &= ~invert_mask;
- (void)uart->UART_SPR;
-}
-
-u32 uart_get_IIR(u32 idx)
-{
- uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]);
-
- return uart->UART_IIR_FCR;
-}
-
-void uart_set_IIR(u32 idx)
-{
- uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]);
-
- uart->UART_IER_DLAB &= ~UART_IER_DLAB_IE_EORD;
- (void)uart->UART_SPR;
- uart->UART_IER_DLAB |= UART_IER_DLAB_IE_EORD;
- (void)uart->UART_SPR;
-}
-
-void uart_empty_fifo(u32 idx, u32 which)
-{
- uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]);
-
- uart->UART_MCR = 0;
- (void)uart->UART_SPR;
- usleep(96);
-
- uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_TX_CLR | UART_IIR_FCR_RX_CLR;
- (void)uart->UART_SPR;
- usleep(18);
- u32 tries = 0;
-
- if (UART_IIR_FCR_TX_CLR & which)
- {
- while (tries < 10 && uart->UART_LSR & UART_LSR_TMTY)
- {
- tries++;
- usleep(100);
- }
- tries = 0;
- }
-
- if (UART_IIR_FCR_RX_CLR & which)
- {
- while (tries < 10 && !uart->UART_LSR & UART_LSR_RDR)
- {
- tries++;
- usleep(100);
- }
- }
-}
diff --git a/nyx/nyx_gui/soc/uart.h b/nyx/nyx_gui/soc/uart.h
deleted file mode 100644
index ef22108..0000000
--- a/nyx/nyx_gui/soc/uart.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
-* Copyright (c) 2018 naehrwert
-* Copyright (c) 2019-2020 CTCaer
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms and conditions of the GNU General Public License,
-* version 2, as published by the Free Software Foundation.
-*
-* This program is distributed in the hope it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see .
-*/
-
-#ifndef _UART_H_
-#define _UART_H_
-
-#include "../utils/types.h"
-
-#define UART_A 0
-#define UART_B 1
-#define UART_C 2
-#define UART_D 3
-#define UART_E 4
-
-#define BAUD_115200 115200
-
-#define UART_TX_IDLE 0x1
-#define UART_RX_IDLE 0x2
-
-#define UART_TX_FIFO_FULL 0x100
-#define UART_RX_FIFO_EMPTY 0x200
-
-#define UART_INVERT_RXD 0x01
-#define UART_INVERT_TXD 0x02
-#define UART_INVERT_CTS 0x04
-#define UART_INVERT_RTS 0x08
-
-#define UART_IER_DLAB_IE_EORD 0x20
-
-#define UART_LCR_DLAB 0x80
-#define UART_LCR_STOP 0x4
-#define UART_LCR_WORD_LENGTH_8 0x3
-
-#define UART_LSR_RDR 0x1
-#define UART_LSR_THRE 0x20
-#define UART_LSR_TMTY 0x40
-#define UART_LSR_FIFOE 0x80
-
-#define UART_IIR_FCR_TX_CLR 0x4
-#define UART_IIR_FCR_RX_CLR 0x2
-#define UART_IIR_FCR_EN_FIFO 0x1
-
-#define UART_MCR_RTS 0x2
-#define UART_MCR_DTR 0x1
-
-typedef struct _uart_t
-{
- /* 0x00 */ vu32 UART_THR_DLAB;
- /* 0x04 */ vu32 UART_IER_DLAB;
- /* 0x08 */ vu32 UART_IIR_FCR;
- /* 0x0C */ vu32 UART_LCR;
- /* 0x10 */ vu32 UART_MCR;
- /* 0x14 */ vu32 UART_LSR;
- /* 0x18 */ vu32 UART_MSR;
- /* 0x1C */ vu32 UART_SPR;
- /* 0x20 */ vu32 UART_IRDA_CSR;
- /* 0x24 */ vu32 UART_RX_FIFO_CFG;
- /* 0x28 */ vu32 UART_MIE;
- /* 0x2C */ vu32 UART_VENDOR_STATUS;
- /* 0x30 */ u8 _pad_30[0xC];
- /* 0x3C */ vu32 UART_ASR;
-} uart_t;
-
-void uart_init(u32 idx, u32 baud);
-void uart_wait_idle(u32 idx, u32 which);
-void uart_send(u32 idx, const u8 *buf, u32 len);
-u32 uart_recv(u32 idx, u8 *buf, u32 len);
-void uart_invert(u32 idx, bool enable, u32 invert_mask);
-u32 uart_get_IIR(u32 idx);
-void uart_set_IIR(u32 idx);
-void uart_empty_fifo(u32 idx, u32 which);
-
-#endif
diff --git a/nyx/nyx_gui/storage/mbr_gpt.h b/nyx/nyx_gui/storage/mbr_gpt.h
deleted file mode 100644
index 923b6d2..0000000
--- a/nyx/nyx_gui/storage/mbr_gpt.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef MBR_GPT_H
-#define MBR_GPT_H
-
-#include "../utils/types.h"
-
-typedef struct _mbr_chs_t
-{
- u8 head;
- u8 sector;
- u8 cylinder;
-} __attribute__((packed)) mbr_chs_t;
-
-typedef struct _mbr_part_t
-{
- u8 status;
- mbr_chs_t start_sct_chs;
- u8 type;
- mbr_chs_t end_sct_chs;
- u32 start_sct;
- u32 size_sct;
-} __attribute__((packed)) mbr_part_t;
-
-typedef struct _mbr_t
-{
- u8 bootstrap[440];
- u32 signature;
- u16 copy_protected;
- mbr_part_t partitions[4];
- u16 boot_signature;
-} __attribute__((packed)) mbr_t;
-
-typedef struct _gpt_entry_t
-{
- u8 type_guid[0x10];
- u8 part_guid[0x10];
- u64 lba_start;
- u64 lba_end;
- u64 attrs;
- u16 name[36];
-} gpt_entry_t;
-
-typedef struct _gpt_header_t
-{
- u64 signature; // "EFI PART"
- u32 revision;
- u32 size;
- u32 crc32;
- u32 res1;
- u64 my_lba;
- u64 alt_lba;
- u64 first_use_lba;
- u64 last_use_lba;
- u8 disk_guid[0x10];
- u64 part_ent_lba;
- u32 num_part_ents;
- u32 part_ent_size;
- u32 part_ents_crc32;
- u8 res2[420]; // Used as first 3 partition entries backup for HOS.
-} gpt_header_t;
-
-typedef struct _gpt_t
-{
- gpt_header_t header;
- gpt_entry_t entries[128];
-} gpt_t;
-
-#endif
diff --git a/nyx/nyx_gui/storage/mmc.h b/nyx/nyx_gui/storage/mmc.h
deleted file mode 100644
index 0d87e35..0000000
--- a/nyx/nyx_gui/storage/mmc.h
+++ /dev/null
@@ -1,432 +0,0 @@
-/*
- * Header for MultiMediaCard (MMC)
- *
- * Copyright 2002 Hewlett-Packard Company
- *
- * Use consistent with the GNU GPL is permitted,
- * provided that this copyright notice is
- * preserved in its entirety in all copies and derived works.
- *
- * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
- * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
- * FITNESS FOR ANY PARTICULAR PURPOSE.
- *
- * Many thanks to Alessandro Rubini and Jonathan Corbet!
- *
- * Based strongly on code by:
- *
- * Author: Yong-iL Joh
- *
- * Author: Andrew Christian
- * 15 May 2002
- */
-
-#ifndef LINUX_MMC_MMC_H
-#define LINUX_MMC_MMC_H
-
-/* Standard MMC commands (4.1) type argument response */
-/* class 1 */
-#define MMC_GO_IDLE_STATE 0 /* bc */
-#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
-#define MMC_ALL_SEND_CID 2 /* bcr R2 */
-#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
-#define MMC_SET_DSR 4 /* bc [31:16] RCA */
-#define MMC_SLEEP_AWAKE 5 /* ac [31:16] RCA 15:flg R1b */
-#define MMC_SWITCH 6 /* ac [31:0] See below R1b */
-#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */
-#define MMC_SEND_EXT_CSD 8 /* adtc R1 */
-#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */
-#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
-#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
-#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
-#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
-#define MMC_BUS_TEST_R 14 /* adtc R1 */
-#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
-#define MMC_BUS_TEST_W 19 /* adtc R1 */
-#define MMC_SPI_READ_OCR 58 /* spi spi_R3 */
-#define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */
-
-/* class 2 */
-#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
-#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
-#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
-#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
-#define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
-
-/* class 3 */
-#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
-
-/* class 4 */
-#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
-#define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
-#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
-#define MMC_PROGRAM_CID 26 /* adtc R1 */
-#define MMC_PROGRAM_CSD 27 /* adtc R1 */
-
-/* class 6 */
-#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
-#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
-#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
-
-/* class 5 */
-#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
-#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
-#define MMC_ERASE 38 /* ac R1b */
-
-/* class 9 */
-#define MMC_FAST_IO 39 /* ac R4 */
-#define MMC_GO_IRQ_STATE 40 /* bcr R5 */
-
-/* class 7 */
-#define MMC_LOCK_UNLOCK 42 /* adtc R1b */
-
-/* class 8 */
-#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
-#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */
-
-/* class 11 */
-#define MMC_QUE_TASK_PARAMS 44 /* ac [20:16] task id R1 */
-#define MMC_QUE_TASK_ADDR 45 /* ac [31:0] data addr R1 */
-#define MMC_EXECUTE_READ_TASK 46 /* adtc [20:16] task id R1 */
-#define MMC_EXECUTE_WRITE_TASK 47 /* adtc [20:16] task id R1 */
-#define MMC_CMDQ_TASK_MGMT 48 /* ac [20:16] task id R1b */
-
-/*
-* MMC_SWITCH argument format:
-*
-* [31:26] Always 0
-* [25:24] Access Mode
-* [23:16] Location of target Byte in EXT_CSD
-* [15:08] Value Byte
-* [07:03] Always 0
-* [02:00] Command Set
-*/
-
-/*
-MMC status in R1, for native mode (SPI bits are different)
-Type
-e : error bit
-s : status bit
-r : detected and set for the actual command response
-x : detected and set during command execution. the host must poll
-the card by sending status command in order to read these bits.
-Clear condition
-a : according to the card state
-b : always related to the previous command. Reception of
-a valid command will clear it (with a delay of one command)
-c : clear by read
-*/
-
-#define R1_OUT_OF_RANGE (1 << 31) /* er, c */
-#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
-#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
-#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
-#define R1_ERASE_PARAM (1 << 27) /* ex, c */
-#define R1_WP_VIOLATION (1 << 26) /* erx, c */
-#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
-#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
-#define R1_COM_CRC_ERROR (1 << 23) /* er, b */
-#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
-#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
-#define R1_CC_ERROR (1 << 20) /* erx, c */
-#define R1_ERROR (1 << 19) /* erx, c */
-#define R1_UNDERRUN (1 << 18) /* ex, c */
-#define R1_OVERRUN (1 << 17) /* ex, c */
-#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
-#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
-#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
-#define R1_ERASE_RESET (1 << 13) /* sr, c */
-#define R1_STATUS(x) (x & 0xFFFFE000)
-#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
-#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
-#define R1_SWITCH_ERROR (1 << 7) /* sx, c */
-#define R1_EXCEPTION_EVENT (1 << 6) /* sr, a */
-#define R1_APP_CMD (1 << 5) /* sr, c */
-
-#define R1_STATE_IDLE 0
-#define R1_STATE_READY 1
-#define R1_STATE_IDENT 2
-#define R1_STATE_STBY 3
-#define R1_STATE_TRAN 4
-#define R1_STATE_DATA 5
-#define R1_STATE_RCV 6
-#define R1_STATE_PRG 7
-#define R1_STATE_DIS 8
-
-/*
-* MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS
-* R1 is the low order byte; R2 is the next highest byte, when present.
-*/
-#define R1_SPI_IDLE (1 << 0)
-#define R1_SPI_ERASE_RESET (1 << 1)
-#define R1_SPI_ILLEGAL_COMMAND (1 << 2)
-#define R1_SPI_COM_CRC (1 << 3)
-#define R1_SPI_ERASE_SEQ (1 << 4)
-#define R1_SPI_ADDRESS (1 << 5)
-#define R1_SPI_PARAMETER (1 << 6)
-/* R1 bit 7 is always zero */
-#define R2_SPI_CARD_LOCKED (1 << 8)
-#define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */
-#define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP
-#define R2_SPI_ERROR (1 << 10)
-#define R2_SPI_CC_ERROR (1 << 11)
-#define R2_SPI_CARD_ECC_ERROR (1 << 12)
-#define R2_SPI_WP_VIOLATION (1 << 13)
-#define R2_SPI_ERASE_PARAM (1 << 14)
-#define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */
-#define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE
-
-/*
-* OCR bits are mostly in host.h
-*/
-#define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */
-
-/*
-* Card Command Classes (CCC)
-*/
-#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */
-/* (CMD0,1,2,3,4,7,9,10,12,13,15) */
-/* (and for SPI, CMD58,59) */
-#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */
-/* (CMD11) */
-#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */
-/* (CMD16,17,18) */
-#define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */
-/* (CMD20) */
-#define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */
-/* (CMD16,24,25,26,27) */
-#define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */
-/* (CMD32,33,34,35,36,37,38,39) */
-#define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */
-/* (CMD28,29,30) */
-#define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */
-/* (CMD16,CMD42) */
-#define CCC_APP_SPEC (1<<8) /* (8) Application specific */
-/* (CMD55,56,57,ACMD*) */
-#define CCC_IO_MODE (1<<9) /* (9) I/O mode */
-/* (CMD5,39,40,52,53) */
-#define CCC_SWITCH (1<<10) /* (10) High speed switch */
-/* (CMD6,34,35,36,37,50) */
-/* (11) Reserved */
-/* (CMD?) */
-
-/*
-* CSD field definitions
-*/
-
-#define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */
-#define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */
-#define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */
-#define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */
-
-#define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */
-#define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */
-#define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */
-#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */
-#define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */
-
-/*
-* EXT_CSD fields
-*/
-
-#define EXT_CSD_CMDQ_MODE_EN 15 /* R/W */
-#define EXT_CSD_FLUSH_CACHE 32 /* W */
-#define EXT_CSD_CACHE_CTRL 33 /* R/W */
-#define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */
-#define EXT_CSD_PACKED_FAILURE_INDEX 35 /* RO */
-#define EXT_CSD_PACKED_CMD_STATUS 36 /* RO */
-#define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO, 2 bytes */
-#define EXT_CSD_EXP_EVENTS_CTRL 56 /* R/W, 2 bytes */
-#define EXT_CSD_DATA_SECTOR_SIZE 61 /* R */
-#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
-#define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */
-#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */
-#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */
-#define EXT_CSD_HPI_MGMT 161 /* R/W */
-#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
-#define EXT_CSD_BKOPS_EN 163 /* R/W */
-#define EXT_CSD_BKOPS_START 164 /* W */
-#define EXT_CSD_SANITIZE_START 165 /* W */
-#define EXT_CSD_WR_REL_PARAM 166 /* RO */
-#define EXT_CSD_RPMB_MULT 168 /* RO */
-#define EXT_CSD_FW_CONFIG 169 /* R/W */
-#define EXT_CSD_BOOT_WP 173 /* R/W */
-#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
-#define EXT_CSD_PART_CONFIG 179 /* R/W */
-#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
-#define EXT_CSD_BUS_WIDTH 183 /* R/W */
-#define EXT_CSD_STROBE_SUPPORT 184 /* RO */
-#define EXT_CSD_HS_TIMING 185 /* R/W */
-#define EXT_CSD_POWER_CLASS 187 /* R/W */
-#define EXT_CSD_REV 192 /* RO */
-#define EXT_CSD_STRUCTURE 194 /* RO */
-#define EXT_CSD_CARD_TYPE 196 /* RO */
-#define EXT_CSD_DRIVER_STRENGTH 197 /* RO */
-#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */
-#define EXT_CSD_PART_SWITCH_TIME 199 /* RO */
-#define EXT_CSD_PWR_CL_52_195 200 /* RO */
-#define EXT_CSD_PWR_CL_26_195 201 /* RO */
-#define EXT_CSD_PWR_CL_52_360 202 /* RO */
-#define EXT_CSD_PWR_CL_26_360 203 /* RO */
-#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
-#define EXT_CSD_S_A_TIMEOUT 217 /* RO */
-#define EXT_CSD_REL_WR_SEC_C 222 /* RO */
-#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
-#define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */
-#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
-#define EXT_CSD_BOOT_MULT 226 /* RO */
-#define EXT_CSD_SEC_TRIM_MULT 229 /* RO */
-#define EXT_CSD_SEC_ERASE_MULT 230 /* RO */
-#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
-#define EXT_CSD_TRIM_MULT 232 /* RO */
-#define EXT_CSD_PWR_CL_200_195 236 /* RO */
-#define EXT_CSD_PWR_CL_200_360 237 /* RO */
-#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */
-#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */
-#define EXT_CSD_BKOPS_STATUS 246 /* RO */
-#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */
-#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
-#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */
-#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */
-#define EXT_CSD_FIRMWARE_VERSION 254 /* RO, 8 bytes */
-#define EXT_CSD_DEVICE_VERSION 262 /* RO, 2 bytes */
-#define EXT_CSD_PRE_EOL_INFO 267 /* RO */
-#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A 268 /* RO */
-#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B 269 /* RO */
-#define EXT_CSD_CMDQ_DEPTH 307 /* RO */
-#define EXT_CSD_CMDQ_SUPPORT 308 /* RO */
-#define EXT_CSD_SUPPORTED_MODE 493 /* RO */
-#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */
-#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */
-#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */
-#define EXT_CSD_MAX_PACKED_READS 501 /* RO */
-#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
-#define EXT_CSD_HPI_FEATURES 503 /* RO */
-
-/*
-* EXT_CSD field definitions
-*/
-
-#define EXT_CSD_WR_REL_PARAM_EN (1<<2)
-
-#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40)
-#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10)
-#define EXT_CSD_BOOT_WP_B_PERM_WP_EN (0x04)
-#define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01)
-
-#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7)
-#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
-#define EXT_CSD_PART_CONFIG_ACC_RPMB (0x3)
-#define EXT_CSD_PART_CONFIG_ACC_GP0 (0x4)
-
-#define EXT_CSD_PART_SETTING_COMPLETED (0x1)
-#define EXT_CSD_PART_SUPPORT_PART_EN (0x1)
-
-#define EXT_CSD_CMD_SET_NORMAL (1<<0)
-#define EXT_CSD_CMD_SET_SECURE (1<<1)
-#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
-
-#define EXT_CSD_CARD_TYPE_HS_26 (1<<0) /* Card can run at 26MHz */
-#define EXT_CSD_CARD_TYPE_HS_52 (1<<1) /* Card can run at 52MHz */
-#define EXT_CSD_CARD_TYPE_HS (EXT_CSD_CARD_TYPE_HS_26 | \
- EXT_CSD_CARD_TYPE_HS_52)
-#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */
-/* DDR mode @1.8V or 3V I/O */
-#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */
-/* DDR mode @1.2V I/O */
-#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
- | EXT_CSD_CARD_TYPE_DDR_1_2V)
-#define EXT_CSD_CARD_TYPE_HS200_1_8V (1<<4) /* Card can run at 200MHz */
-#define EXT_CSD_CARD_TYPE_HS200_1_2V (1<<5) /* Card can run at 200MHz */
-/* SDR mode @1.2V I/O */
-#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
- EXT_CSD_CARD_TYPE_HS200_1_2V)
-#define EXT_CSD_CARD_TYPE_HS400_1_8V (1<<6) /* Card can run at 200MHz DDR, 1.8V */
-#define EXT_CSD_CARD_TYPE_HS400_1_2V (1<<7) /* Card can run at 200MHz DDR, 1.2V */
-#define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \
- EXT_CSD_CARD_TYPE_HS400_1_2V)
-#define EXT_CSD_CARD_TYPE_HS400ES (1<<8) /* Card can run at HS400ES */
-
-#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
-#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
-#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
-#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
-#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
-#define EXT_CSD_BUS_WIDTH_STROBE (1<<7) /* Enhanced strobe mode */
-
-#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */
-#define EXT_CSD_TIMING_HS 1 /* High speed */
-#define EXT_CSD_TIMING_HS200 2 /* HS200 */
-#define EXT_CSD_TIMING_HS400 3 /* HS400 */
-#define EXT_CSD_DRV_STR_SHIFT 4 /* Driver Strength shift */
-
-#define EXT_CSD_SEC_ER_EN (1<<0)
-#define EXT_CSD_SEC_BD_BLK_EN (1<<2)
-#define EXT_CSD_SEC_GB_CL_EN (1<<4)
-#define EXT_CSD_SEC_SANITIZE (1<<6) /* v4.5 only */
-
-#define EXT_CSD_RST_N_EN_MASK 0x3
-#define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */
-
-#define EXT_CSD_NO_POWER_NOTIFICATION 0
-#define EXT_CSD_POWER_ON 1
-#define EXT_CSD_POWER_OFF_SHORT 2
-#define EXT_CSD_POWER_OFF_LONG 3
-
-#define EXT_CSD_PWR_CL_8BIT_MASK 0xF0 /* 8 bit PWR CLS */
-#define EXT_CSD_PWR_CL_4BIT_MASK 0x0F /* 8 bit PWR CLS */
-#define EXT_CSD_PWR_CL_8BIT_SHIFT 4
-#define EXT_CSD_PWR_CL_4BIT_SHIFT 0
-
-#define EXT_CSD_PACKED_EVENT_EN (1<<3)
-
-/*
-* EXCEPTION_EVENT_STATUS field
-*/
-#define EXT_CSD_URGENT_BKOPS (1<<0)
-#define EXT_CSD_DYNCAP_NEEDED (1<<1)
-#define EXT_CSD_SYSPOOL_EXHAUSTED (1<<2)
-#define EXT_CSD_PACKED_FAILURE (1<<3)
-
-#define EXT_CSD_PACKED_GENERIC_ERROR (1<<0)
-#define EXT_CSD_PACKED_INDEXED_ERROR (1<<1)
-
-/*
-* BKOPS status level
-*/
-#define EXT_CSD_BKOPS_LEVEL_2 0x2
-
-/*
-* BKOPS modes
-*/
-#define EXT_CSD_MANUAL_BKOPS_MASK 0x01
-#define EXT_CSD_AUTO_BKOPS_MASK 0x02
-
-/*
-* Command Queue
-*/
-#define EXT_CSD_CMDQ_MODE_ENABLED (1<<0)
-#define EXT_CSD_CMDQ_DEPTH_MASK 0x1F
-#define EXT_CSD_CMDQ_SUPPORTED (1<<0)
-
-/*
-* MMC_SWITCH access modes
-*/
-#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
-#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */
-#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */
-#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
-
-/*
-* Erase/trim/discard
-*/
-#define MMC_ERASE_ARG 0x00000000
-#define MMC_SECURE_ERASE_ARG 0x80000000
-#define MMC_TRIM_ARG 0x00000001
-#define MMC_DISCARD_ARG 0x00000003
-#define MMC_SECURE_TRIM1_ARG 0x80000001
-#define MMC_SECURE_TRIM2_ARG 0x80008000
-#define MMC_SECURE_ARGS 0x80000000
-#define MMC_TRIM_ARGS 0x00008001
-
-#endif /* LINUX_MMC_MMC_H */
diff --git a/nyx/nyx_gui/storage/nx_sd.h b/nyx/nyx_gui/storage/nx_sd.h
deleted file mode 100644
index fc1ad18..0000000
--- a/nyx/nyx_gui/storage/nx_sd.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef NX_SD_H
-#define NX_SD_H
-
-#include "sdmmc.h"
-#include "sdmmc_driver.h"
-#include "../libs/fatfs/ff.h"
-
-enum
-{
- SD_INIT_FAIL = 0,
- SD_1BIT_HS25 = 1,
- SD_4BIT_HS25 = 2,
- SD_UHS_SDR82 = 3,
- SD_UHS_SDR104 = 4
-};
-
-enum
-{
- SD_ERROR_INIT_FAIL = 0,
- SD_ERROR_RW_FAIL = 1,
- SD_ERROR_RW_RETRY = 2
-};
-
-extern sdmmc_t sd_sdmmc;
-extern sdmmc_storage_t sd_storage;
-extern FATFS sd_fs;
-
-void sd_error_count_increment(u8 type);
-u16 *sd_get_error_count();
-bool sd_get_card_removed();
-u32 sd_get_mode();
-int sd_init_retry(bool power_cycle);
-bool sd_initialize(bool power_cycle);
-bool sd_mount();
-void sd_unmount();
-void sd_end();
-void *sd_file_read(const char *path, u32 *fsize);
-int sd_save_to_file(void *buf, u32 size, const char *filename);
-
-#endif
\ No newline at end of file
diff --git a/nyx/nyx_gui/storage/sd.h b/nyx/nyx_gui/storage/sd.h
deleted file mode 100644
index a780ec8..0000000
--- a/nyx/nyx_gui/storage/sd.h
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * Copyright (c) 2005-2007 Pierre Ossman, All Rights Reserved.
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-
-#ifndef MMC_SD_H
-#define MMC_SD_H
-
-/* SD commands type argument response */
-/* class 0 */
-/* This is basically the same command as for MMC with some quirks. */
-#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
-#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */
-#define SD_SWITCH_VOLTAGE 11 /* ac R1 */
-
-/* class 10 */
-#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
-
-/* class 5 */
-#define SD_ERASE_WR_BLK_START 32 /* ac [31:0] data addr R1 */
-#define SD_ERASE_WR_BLK_END 33 /* ac [31:0] data addr R1 */
-
-/* Application commands */
-#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
-#define SD_APP_SD_STATUS 13 /* adtc R1 */
-#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
-#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
-#define SD_APP_SET_CLR_CARD_DETECT 42
-#define SD_APP_SEND_SCR 51 /* adtc R1 */
-
-/* OCR bit definitions */
-#define SD_OCR_S18R (1 << 24) /* 1.8V switching request */
-#define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */
-#define SD_OCR_XPC (1 << 28) /* SDXC power control */
-#define SD_OCR_CCS (1 << 30) /* Card Capacity Status */
-#define SD_OCR_VDD_27_34 (0x7F << 15) /* VDD voltage 2.7 ~ 3.4 */
-#define SD_OCR_VDD_32_33 (1 << 20) /* VDD voltage 3.2 ~ 3.3 */
-#define SD_OCR_VDD_18 (1 << 7) /* VDD voltage 1.8 */
-
-/*
-* SD_SWITCH argument format:
-*
-* [31] Check (0) or switch (1)
-* [30:24] Reserved (0)
-* [23:20] Function group 6
-* [19:16] Function group 5
-* [15:12] Function group 4
-* [11:8] Function group 3
-* [7:4] Function group 2
-* [3:0] Function group 1
-*/
-
-/*
-* SD_SEND_IF_COND argument format:
-*
-* [31:12] Reserved (0)
-* [11:8] Host Voltage Supply Flags
-* [7:0] Check Pattern (0xAA)
-*/
-
-/*
-* SCR field definitions
-*/
-#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
-#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
-#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00-3.0X */
-#define SD_SCR_BUS_WIDTH_1 (1<<0)
-#define SD_SCR_BUS_WIDTH_4 (1<<2)
-
-/*
-* SD bus widths
-*/
-#define SD_BUS_WIDTH_1 0
-#define SD_BUS_WIDTH_4 2
-
-/*
-* SD bus speeds
-*/
-#define UHS_SDR12_BUS_SPEED 0
-#define HIGH_SPEED_BUS_SPEED 1
-#define UHS_SDR25_BUS_SPEED 1
-#define UHS_SDR50_BUS_SPEED 2
-#define UHS_SDR104_BUS_SPEED 3
-#define UHS_DDR50_BUS_SPEED 4
-#define HS400_BUS_SPEED 5
-
-#define SD_MODE_HIGH_SPEED (1 << HIGH_SPEED_BUS_SPEED)
-#define SD_MODE_UHS_SDR12 (1 << UHS_SDR12_BUS_SPEED)
-#define SD_MODE_UHS_SDR25 (1 << UHS_SDR25_BUS_SPEED)
-#define SD_MODE_UHS_SDR50 (1 << UHS_SDR50_BUS_SPEED)
-#define SD_MODE_UHS_SDR104 (1 << UHS_SDR104_BUS_SPEED)
-#define SD_MODE_UHS_DDR50 (1 << UHS_DDR50_BUS_SPEED)
-
-#define SD_DRIVER_TYPE_B 0x01
-#define SD_DRIVER_TYPE_A 0x02
-
-#define SD_SET_CURRENT_LIMIT_200 0
-#define SD_SET_CURRENT_LIMIT_400 1
-#define SD_SET_CURRENT_LIMIT_600 2
-#define SD_SET_CURRENT_LIMIT_800 3
-
-#define SD_MAX_CURRENT_200 (1 << SD_SET_CURRENT_LIMIT_200)
-#define SD_MAX_CURRENT_400 (1 << SD_SET_CURRENT_LIMIT_400)
-#define SD_MAX_CURRENT_600 (1 << SD_SET_CURRENT_LIMIT_600)
-#define SD_MAX_CURRENT_800 (1 << SD_SET_CURRENT_LIMIT_800)
-
-/*
-* SD_SWITCH mode
-*/
-#define SD_SWITCH_CHECK 0
-#define SD_SWITCH_SET 1
-
-/*
-* SD_SWITCH function groups
-*/
-#define SD_SWITCH_GRP_ACCESS 0
-
-/*
-* SD_SWITCH access modes
-*/
-#define SD_SWITCH_ACCESS_DEF 0
-#define SD_SWITCH_ACCESS_HS 1
-
-#endif /* LINUX_MMC_SD_H */
diff --git a/nyx/nyx_gui/storage/sdmmc.c b/nyx/nyx_gui/storage/sdmmc.c
deleted file mode 100644
index 9198fe3..0000000
--- a/nyx/nyx_gui/storage/sdmmc.c
+++ /dev/null
@@ -1,1344 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-#include "sdmmc.h"
-#include "mmc.h"
-#include "nx_sd.h"
-#include "sd.h"
-#include "../../../common/memory_map.h"
-#include "../gfx/gfx.h"
-#include "../mem/heap.h"
-#include "../utils/util.h"
-
-//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
-#define DPRINTF(...)
-
-u32 sd_power_cycle_time_start;
-
-static inline u32 unstuff_bits(u32 *resp, u32 start, u32 size)
-{
- const u32 mask = (size < 32 ? 1 << size : 0) - 1;
- const u32 off = 3 - ((start) / 32);
- const u32 shft = (start) & 31;
- u32 res = resp[off] >> shft;
- if (size + shft > 32)
- res |= resp[off - 1] << ((32 - shft) % 32);
- return res & mask;
-}
-
-/*
-* Common functions for SD and MMC.
-*/
-
-static int _sdmmc_storage_check_result(u32 res)
-{
- //Error mask:
- //R1_OUT_OF_RANGE, R1_ADDRESS_ERROR, R1_BLOCK_LEN_ERROR,
- //R1_ERASE_SEQ_ERROR, R1_ERASE_PARAM, R1_WP_VIOLATION,
- //R1_LOCK_UNLOCK_FAILED, R1_COM_CRC_ERROR, R1_ILLEGAL_COMMAND,
- //R1_CARD_ECC_FAILED, R1_CC_ERROR, R1_ERROR, R1_CID_CSD_OVERWRITE,
- //R1_WP_ERASE_SKIP, R1_ERASE_RESET, R1_SWITCH_ERROR
- if (!(res & 0xFDF9A080))
- return 1;
- //TODO: R1_SWITCH_ERROR we can skip for certain card types.
- return 0;
-}
-
-static int _sdmmc_storage_execute_cmd_type1_ex(sdmmc_storage_t *storage, u32 *resp, u32 cmd, u32 arg, u32 check_busy, u32 expected_state, u32 mask)
-{
- sdmmc_cmd_t cmdbuf;
- sdmmc_init_cmd(&cmdbuf, cmd, arg, SDMMC_RSP_TYPE_1, check_busy);
- if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, 0, 0))
- return 0;
-
- sdmmc_get_rsp(storage->sdmmc, resp, 4, SDMMC_RSP_TYPE_1);
- if (mask)
- *resp &= ~mask;
-
- if (_sdmmc_storage_check_result(*resp))
- if (expected_state == 0x10 || R1_CURRENT_STATE(*resp) == expected_state)
- return 1;
-
- return 0;
-}
-
-static int _sdmmc_storage_execute_cmd_type1(sdmmc_storage_t *storage, u32 cmd, u32 arg, u32 check_busy, u32 expected_state)
-{
- u32 tmp;
- return _sdmmc_storage_execute_cmd_type1_ex(storage, &tmp, cmd, arg, check_busy, expected_state, 0);
-}
-
-static int _sdmmc_storage_go_idle_state(sdmmc_storage_t *storage)
-{
- sdmmc_cmd_t cmd;
- sdmmc_init_cmd(&cmd, MMC_GO_IDLE_STATE, 0, SDMMC_RSP_TYPE_0, 0);
-
- return sdmmc_execute_cmd(storage->sdmmc, &cmd, 0, 0);
-}
-
-static int _sdmmc_storage_get_cid(sdmmc_storage_t *storage, void *buf)
-{
- sdmmc_cmd_t cmd;
- sdmmc_init_cmd(&cmd, MMC_ALL_SEND_CID, 0, SDMMC_RSP_TYPE_2, 0);
- if (!sdmmc_execute_cmd(storage->sdmmc, &cmd, 0, 0))
- return 0;
-
- sdmmc_get_rsp(storage->sdmmc, buf, 0x10, SDMMC_RSP_TYPE_2);
-
- return 1;
-}
-
-static int _sdmmc_storage_select_card(sdmmc_storage_t *storage)
-{
- return _sdmmc_storage_execute_cmd_type1(storage, MMC_SELECT_CARD, storage->rca << 16, 1, 0x10);
-}
-
-static int _sdmmc_storage_get_csd(sdmmc_storage_t *storage, void *buf)
-{
- sdmmc_cmd_t cmdbuf;
- sdmmc_init_cmd(&cmdbuf, MMC_SEND_CSD, storage->rca << 16, SDMMC_RSP_TYPE_2, 0);
- if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, 0, 0))
- return 0;
-
- sdmmc_get_rsp(storage->sdmmc, buf, 0x10, SDMMC_RSP_TYPE_2);
-
- return 1;
-}
-
-static int _sdmmc_storage_set_blocklen(sdmmc_storage_t *storage, u32 blocklen)
-{
- return _sdmmc_storage_execute_cmd_type1(storage, MMC_SET_BLOCKLEN, blocklen, 0, R1_STATE_TRAN);
-}
-
-static int _sdmmc_storage_get_status(sdmmc_storage_t *storage, u32 *resp, u32 mask)
-{
- return _sdmmc_storage_execute_cmd_type1_ex(storage, resp, MMC_SEND_STATUS, storage->rca << 16, 0, R1_STATE_TRAN, mask);
-}
-
-static int _sdmmc_storage_check_status(sdmmc_storage_t *storage)
-{
- u32 tmp;
- return _sdmmc_storage_get_status(storage, &tmp, 0);
-}
-
-static int _sdmmc_storage_readwrite_ex(sdmmc_storage_t *storage, u32 *blkcnt_out, u32 sector, u32 num_sectors, void *buf, u32 is_write)
-{
- u32 tmp = 0;
- sdmmc_cmd_t cmdbuf;
- sdmmc_req_t reqbuf;
-
- sdmmc_init_cmd(&cmdbuf, is_write ? MMC_WRITE_MULTIPLE_BLOCK : MMC_READ_MULTIPLE_BLOCK, sector, SDMMC_RSP_TYPE_1, 0);
-
- reqbuf.buf = buf;
- reqbuf.num_sectors = num_sectors;
- reqbuf.blksize = 512;
- reqbuf.is_write = is_write;
- reqbuf.is_multi_block = 1;
- reqbuf.is_auto_cmd12 = 1;
-
- if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, blkcnt_out))
- {
- sdmmc_stop_transmission(storage->sdmmc, &tmp);
- _sdmmc_storage_get_status(storage, &tmp, 0);
-
- return 0;
- }
-
- return 1;
-}
-
-int sdmmc_storage_end(sdmmc_storage_t *storage)
-{
- if (!_sdmmc_storage_go_idle_state(storage))
- return 0;
-
- sdmmc_end(storage->sdmmc);
-
- return 1;
-}
-
-static int _sdmmc_storage_readwrite(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf, u32 is_write)
-{
- u8 *bbuf = (u8 *)buf;
- bool first_reinit = false;
- while (num_sectors)
- {
- u32 blkcnt = 0;
- // Retry 5 times if failed.
- u32 retries = 5;
- do
- {
-reinit_try:
- if (_sdmmc_storage_readwrite_ex(storage, &blkcnt, sector, MIN(num_sectors, 0xFFFF), bbuf, is_write))
- goto out;
- else
- retries--;
-
- sd_error_count_increment(SD_ERROR_RW_RETRY);
-
- msleep(50);
- } while (retries);
-
- // Disk IO failure! Reinit SD Card to a lower speed.
- if (storage->sdmmc->id == SDMMC_1)
- {
- int res;
-
- sd_error_count_increment(SD_ERROR_RW_FAIL);
-
- if (!first_reinit)
- res = sd_initialize(true);
- else
- {
- res = sd_init_retry(true);
- if (!res)
- sd_error_count_increment(SD_ERROR_INIT_FAIL);
- }
-
- retries = 3;
- first_reinit = true;
-
- if (res)
- goto reinit_try;
- }
-
- return 0;
-
-out:
-DPRINTF("readwrite: %08X\n", blkcnt);
- sector += blkcnt;
- num_sectors -= blkcnt;
- bbuf += 512 * blkcnt;
- }
-
- return 1;
-}
-
-int sdmmc_storage_read(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf)
-{
- // Ensure that buffer resides in DRAM and it's DMA aligned.
- if (((u32)buf >= DRAM_START) && !((u32)buf % 8))
- return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 0);
-
- if (num_sectors > (SDMMC_UP_BUF_SZ / 512))
- return 0;
-
- u8 *tmp_buf = (u8 *)SDMMC_UPPER_BUFFER;
- if (_sdmmc_storage_readwrite(storage, sector, num_sectors, tmp_buf, 0))
- {
- memcpy(buf, tmp_buf, 512 * num_sectors);
- return 1;
- }
- return 0;
-}
-
-int sdmmc_storage_write(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf)
-{
- // Ensure that buffer resides in DRAM and it's DMA aligned.
- if (((u32)buf >= DRAM_START) && !((u32)buf % 8))
- return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 1);
-
- if (num_sectors > (SDMMC_UP_BUF_SZ / 512))
- return 0;
-
- u8 *tmp_buf = (u8 *)SDMMC_UPPER_BUFFER;
- memcpy(tmp_buf, buf, 512 * num_sectors);
- return _sdmmc_storage_readwrite(storage, sector, num_sectors, tmp_buf, 1);
-}
-
-/*
-* MMC specific functions.
-*/
-
-static int _mmc_storage_get_op_cond_inner(sdmmc_storage_t *storage, u32 *pout, u32 power)
-{
- sdmmc_cmd_t cmd;
-
- u32 arg = 0;
- switch (power)
- {
- case SDMMC_POWER_1_8:
- arg = SD_OCR_CCS | SD_OCR_VDD_18;
- break;
- case SDMMC_POWER_3_3:
- arg = SD_OCR_CCS | SD_OCR_VDD_27_34;
- break;
- default:
- return 0;
- }
-
- sdmmc_init_cmd(&cmd, MMC_SEND_OP_COND, arg, SDMMC_RSP_TYPE_3, 0);
- if (!sdmmc_execute_cmd(storage->sdmmc, &cmd, 0, 0))
- return 0;
-
- return sdmmc_get_rsp(storage->sdmmc, pout, 4, SDMMC_RSP_TYPE_3);
-}
-
-static int _mmc_storage_get_op_cond(sdmmc_storage_t *storage, u32 power)
-{
- u32 timeout = get_tmr_ms() + 1500;
-
- while (1)
- {
- u32 cond = 0;
- if (!_mmc_storage_get_op_cond_inner(storage, &cond, power))
- break;
-
- if (cond & MMC_CARD_BUSY)
- {
- if (cond & SD_OCR_CCS)
- storage->has_sector_access = 1;
-
- return 1;
- }
- if (get_tmr_ms() > timeout)
- break;
-
- usleep(1000);
- }
-
- return 0;
-}
-
-static int _mmc_storage_set_relative_addr(sdmmc_storage_t *storage)
-{
- return _sdmmc_storage_execute_cmd_type1(storage, MMC_SET_RELATIVE_ADDR, storage->rca << 16, 0, 0x10);
-}
-
-static void _mmc_storage_parse_cid(sdmmc_storage_t *storage)
-{
- u32 *raw_cid = (u32 *)&(storage->raw_cid);
-
- switch (storage->csd.mmca_vsn)
- {
- case 0: /* MMC v1.0 - v1.2 */
- case 1: /* MMC v1.4 */
- storage->cid.prod_name[6] = unstuff_bits(raw_cid, 48, 8);
- storage->cid.manfid = unstuff_bits(raw_cid, 104, 24);
- storage->cid.hwrev = unstuff_bits(raw_cid, 44, 4);
- storage->cid.fwrev = unstuff_bits(raw_cid, 40, 4);
- storage->cid.serial = unstuff_bits(raw_cid, 16, 24);
- break;
- case 2: /* MMC v2.0 - v2.2 */
- case 3: /* MMC v3.1 - v3.3 */
- case 4: /* MMC v4 */
- storage->cid.manfid = unstuff_bits(raw_cid, 120, 8);
- storage->cid.card_bga = unstuff_bits(raw_cid, 112, 2);
- storage->cid.oemid = unstuff_bits(raw_cid, 104, 8);
- storage->cid.prv = unstuff_bits(raw_cid, 48, 8);
- storage->cid.serial = unstuff_bits(raw_cid, 16, 32);
- break;
- default:
- break;
- }
-
- storage->cid.prod_name[0] = unstuff_bits(raw_cid, 96, 8);
- storage->cid.prod_name[1] = unstuff_bits(raw_cid, 88, 8);
- storage->cid.prod_name[2] = unstuff_bits(raw_cid, 80, 8);
- storage->cid.prod_name[3] = unstuff_bits(raw_cid, 72, 8);
- storage->cid.prod_name[4] = unstuff_bits(raw_cid, 64, 8);
- storage->cid.prod_name[5] = unstuff_bits(raw_cid, 56, 8);
-
- storage->cid.month = unstuff_bits(raw_cid, 12, 4);
- storage->cid.year = unstuff_bits(raw_cid, 8, 4) + 1997;
- if (storage->ext_csd.rev >= 5)
- {
- if (storage->cid.year < 2010)
- storage->cid.year += 16;
- }
-}
-
-static void _mmc_storage_parse_csd(sdmmc_storage_t *storage)
-{
- u32 *raw_csd = (u32 *)&(storage->raw_csd);
-
- storage->csd.mmca_vsn = unstuff_bits(raw_csd, 122, 4);
- storage->csd.structure = unstuff_bits(raw_csd, 126, 2);
- storage->csd.cmdclass = unstuff_bits(raw_csd, 84, 12);
- storage->csd.read_blkbits = unstuff_bits(raw_csd, 80, 4);
- storage->csd.capacity = (1 + unstuff_bits(raw_csd, 62, 12)) << (unstuff_bits(raw_csd, 47, 3) + 2);
-}
-
-static void _mmc_storage_parse_ext_csd(sdmmc_storage_t *storage, u8 *buf)
-{
- storage->ext_csd.rev = buf[EXT_CSD_REV];
- storage->ext_csd.ext_struct = buf[EXT_CSD_STRUCTURE];
- storage->ext_csd.card_type = buf[EXT_CSD_CARD_TYPE];
- storage->ext_csd.dev_version = *(u16 *)&buf[EXT_CSD_DEVICE_VERSION];
- storage->ext_csd.boot_mult = buf[EXT_CSD_BOOT_MULT];
- storage->ext_csd.rpmb_mult = buf[EXT_CSD_RPMB_MULT];
- storage->ext_csd.sectors = *(u32 *)&buf[EXT_CSD_SEC_CNT];
- storage->ext_csd.bkops = buf[EXT_CSD_BKOPS_SUPPORT];
- storage->ext_csd.bkops_en = buf[EXT_CSD_BKOPS_EN];
- storage->ext_csd.bkops_status = buf[EXT_CSD_BKOPS_STATUS];
-
- storage->sec_cnt = *(u32 *)&buf[EXT_CSD_SEC_CNT];
-}
-
-static int _mmc_storage_get_ext_csd(sdmmc_storage_t *storage, void *buf)
-{
- sdmmc_cmd_t cmdbuf;
- sdmmc_init_cmd(&cmdbuf, MMC_SEND_EXT_CSD, 0, SDMMC_RSP_TYPE_1, 0);
-
- sdmmc_req_t reqbuf;
- reqbuf.buf = buf;
- reqbuf.blksize = 512;
- reqbuf.num_sectors = 1;
- reqbuf.is_write = 0;
- reqbuf.is_multi_block = 0;
- reqbuf.is_auto_cmd12 = 0;
-
- if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, 0))
- return 0;
-
- u32 tmp = 0;
- sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1);
- _mmc_storage_parse_ext_csd(storage, buf);
-
- return _sdmmc_storage_check_result(tmp);
-}
-
-static int _mmc_storage_switch(sdmmc_storage_t *storage, u32 arg)
-{
- return _sdmmc_storage_execute_cmd_type1(storage, MMC_SWITCH, arg, 1, 0x10);
-}
-
-static int _mmc_storage_switch_buswidth(sdmmc_storage_t *storage, u32 bus_width)
-{
- if (bus_width == SDMMC_BUS_WIDTH_1)
- return 1;
-
- u32 arg = 0;
- switch (bus_width)
- {
- case SDMMC_BUS_WIDTH_4:
- arg = SDMMC_SWITCH(MMC_SWITCH_MODE_WRITE_BYTE, EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_4);
- break;
- case SDMMC_BUS_WIDTH_8:
- arg = SDMMC_SWITCH(MMC_SWITCH_MODE_WRITE_BYTE, EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_8);
- break;
- }
-
- if (_mmc_storage_switch(storage, arg))
- if (_sdmmc_storage_check_status(storage))
- {
- sdmmc_set_bus_width(storage->sdmmc, bus_width);
-
- return 1;
- }
-
- return 0;
-}
-
-static int _mmc_storage_enable_HS(sdmmc_storage_t *storage, int check)
-{
- if (!_mmc_storage_switch(storage, SDMMC_SWITCH(MMC_SWITCH_MODE_WRITE_BYTE, EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS)))
- return 0;
-
- if (check && !_sdmmc_storage_check_status(storage))
- return 0;
-
- if (!sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_MMC_HS52))
- return 0;
-
-DPRINTF("[MMC] switched to HS\n");
- storage->csd.busspeed = 52;
-
- if (check || _sdmmc_storage_check_status(storage))
- return 1;
-
- return 0;
-}
-
-static int _mmc_storage_enable_HS200(sdmmc_storage_t *storage)
-{
- if (!_mmc_storage_switch(storage, SDMMC_SWITCH(MMC_SWITCH_MODE_WRITE_BYTE, EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS200)))
- return 0;
-
- if (!sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_MMC_HS200))
- return 0;
-
- if (!sdmmc_tuning_execute(storage->sdmmc, SDHCI_TIMING_MMC_HS200, MMC_SEND_TUNING_BLOCK_HS200))
- return 0;
-
-DPRINTF("[MMC] switched to HS200\n");
- storage->csd.busspeed = 200;
-
- return _sdmmc_storage_check_status(storage);
-}
-
-static int _mmc_storage_enable_HS400(sdmmc_storage_t *storage)
-{
- if (!_mmc_storage_enable_HS200(storage))
- return 0;
-
- sdmmc_set_tap_value(storage->sdmmc);
-
- if (!_mmc_storage_enable_HS(storage, 0))
- return 0;
-
- if (!_mmc_storage_switch(storage, SDMMC_SWITCH(MMC_SWITCH_MODE_WRITE_BYTE, EXT_CSD_BUS_WIDTH, EXT_CSD_DDR_BUS_WIDTH_8)))
- return 0;
-
- if (!_mmc_storage_switch(storage, SDMMC_SWITCH(MMC_SWITCH_MODE_WRITE_BYTE, EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS400)))
- return 0;
-
- if (!sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_MMC_HS400))
- return 0;
-
-DPRINTF("[MMC] switched to HS400\n");
- storage->csd.busspeed = 400;
-
- return _sdmmc_storage_check_status(storage);
-}
-
-static int _mmc_storage_enable_highspeed(sdmmc_storage_t *storage, u32 card_type, u32 type)
-{
- if (sdmmc_get_io_power(storage->sdmmc) != SDMMC_POWER_1_8)
- goto out;
-
- if (sdmmc_get_bus_width(storage->sdmmc) == SDMMC_BUS_WIDTH_8 &&
- card_type & EXT_CSD_CARD_TYPE_HS400_1_8V && type == SDHCI_TIMING_MMC_HS400)
- return _mmc_storage_enable_HS400(storage);
-
- if (sdmmc_get_bus_width(storage->sdmmc) == SDMMC_BUS_WIDTH_8 ||
- (sdmmc_get_bus_width(storage->sdmmc) == SDMMC_BUS_WIDTH_4
- && card_type & EXT_CSD_CARD_TYPE_HS200_1_8V
- && (type == SDHCI_TIMING_MMC_HS400 || type == SDHCI_TIMING_MMC_HS200)))
- return _mmc_storage_enable_HS200(storage);
-
-out:
- if (card_type & EXT_CSD_CARD_TYPE_HS_52)
- return _mmc_storage_enable_HS(storage, 1);
-
- return 1;
-}
-
-static int _mmc_storage_enable_bkops(sdmmc_storage_t *storage)
-{
- if (!_mmc_storage_switch(storage, SDMMC_SWITCH(MMC_SWITCH_MODE_SET_BITS, EXT_CSD_BKOPS_EN, EXT_CSD_BKOPS_LEVEL_2)))
- return 0;
-
- return _sdmmc_storage_check_status(storage);
-}
-
-int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type)
-{
- memset(storage, 0, sizeof(sdmmc_storage_t));
- storage->sdmmc = sdmmc;
- storage->rca = 2; //TODO: this could be a config item.
-
- if (!sdmmc_init(sdmmc, SDMMC_4, SDMMC_POWER_1_8, SDMMC_BUS_WIDTH_1, SDHCI_TIMING_MMC_ID, SDMMC_AUTO_CAL_DISABLE))
- return 0;
-DPRINTF("[MMC] after init\n");
-
- usleep(1000 + (74000 + sdmmc->divisor - 1) / sdmmc->divisor);
-
- if (!_sdmmc_storage_go_idle_state(storage))
- return 0;
-DPRINTF("[MMC] went to idle state\n");
-
- if (!_mmc_storage_get_op_cond(storage, SDMMC_POWER_1_8))
- return 0;
-DPRINTF("[MMC] got op cond\n");
-
- if (!_sdmmc_storage_get_cid(storage, storage->raw_cid))
- return 0;
-DPRINTF("[MMC] got cid\n");
-
- if (!_mmc_storage_set_relative_addr(storage))
- return 0;
-DPRINTF("[MMC] set relative addr\n");
-
- if (!_sdmmc_storage_get_csd(storage, storage->raw_csd))
- return 0;
-DPRINTF("[MMC] got csd\n");
- _mmc_storage_parse_csd(storage);
-
- if (!sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_MMC_LS26))
- return 0;
-DPRINTF("[MMC] after setup clock\n");
-
- if (!_sdmmc_storage_select_card(storage))
- return 0;
-DPRINTF("[MMC] card selected\n");
-
- if (!_sdmmc_storage_set_blocklen(storage, 512))
- return 0;
-DPRINTF("[MMC] set blocklen to 512\n");
-
- u32 *csd = (u32 *)storage->raw_csd;
- //Check system specification version, only version 4.0 and later support below features.
- if (unstuff_bits(csd, 122, 4) < CSD_SPEC_VER_4)
- {
- storage->sec_cnt = (1 + unstuff_bits(csd, 62, 12)) << (unstuff_bits(csd, 47, 3) + 2);
- return 1;
- }
-
- if (!_mmc_storage_switch_buswidth(storage, bus_width))
- return 0;
-DPRINTF("[MMC] switched buswidth\n");
-
- if (!_mmc_storage_get_ext_csd(storage, (u8 *)SDMMC_UPPER_BUFFER))
- return 0;
-DPRINTF("[MMC] got ext_csd\n");
-
- _mmc_storage_parse_cid(storage); //This needs to be after csd and ext_csd
- //gfx_hexdump(0, ext_csd, 512);
-
- /* When auto BKOPS is enabled the mmc device should be powered all the time until we disable this and check status.
- Disable it for now until BKOPS disable added to power down sequence at sdmmc_storage_end().
- Additionally this works only when we put the device in idle mode which we don't after enabling it. */
- if (0 && storage->ext_csd.bkops & 0x1 && !(storage->ext_csd.bkops_en & EXT_CSD_BKOPS_LEVEL_2))
- {
- _mmc_storage_enable_bkops(storage);
-DPRINTF("[MMC] BKOPS enabled\n");
- }
-
- if (!_mmc_storage_enable_highspeed(storage, storage->ext_csd.card_type, type))
- return 0;
-DPRINTF("[MMC] succesfully switched to HS mode\n");
-
- sdmmc_card_clock_ctrl(storage->sdmmc, SDMMC_AUTO_CAL_ENABLE);
-
- return 1;
-}
-
-int sdmmc_storage_set_mmc_partition(sdmmc_storage_t *storage, u32 partition)
-{
- if (!_mmc_storage_switch(storage, SDMMC_SWITCH(MMC_SWITCH_MODE_WRITE_BYTE, EXT_CSD_PART_CONFIG, partition)))
- return 0;
-
- if (!_sdmmc_storage_check_status(storage))
- return 0;
-
- storage->partition = partition;
- return 1;
-}
-
-/*
-* SD specific functions.
-*/
-
-static int _sd_storage_execute_app_cmd(sdmmc_storage_t *storage, u32 expected_state, u32 mask, sdmmc_cmd_t *cmd, sdmmc_req_t *req, u32 *blkcnt_out)
-{
- u32 tmp;
- if (!_sdmmc_storage_execute_cmd_type1_ex(storage, &tmp, MMC_APP_CMD, storage->rca << 16, 0, expected_state, mask))
- return 0;
-
- return sdmmc_execute_cmd(storage->sdmmc, cmd, req, blkcnt_out);
-}
-
-static int _sd_storage_execute_app_cmd_type1(sdmmc_storage_t *storage, u32 *resp, u32 cmd, u32 arg, u32 check_busy, u32 expected_state)
-{
- if (!_sdmmc_storage_execute_cmd_type1(storage, MMC_APP_CMD, storage->rca << 16, 0, R1_STATE_TRAN))
- return 0;
-
- return _sdmmc_storage_execute_cmd_type1_ex(storage, resp, cmd, arg, check_busy, expected_state, 0);
-}
-
-static int _sd_storage_send_if_cond(sdmmc_storage_t *storage)
-{
- sdmmc_cmd_t cmdbuf;
- sdmmc_init_cmd(&cmdbuf, SD_SEND_IF_COND, 0x1AA, SDMMC_RSP_TYPE_5, 0);
- if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, 0, 0))
- return 1; // The SD Card is version 1.X
-
- u32 resp = 0;
- if (!sdmmc_get_rsp(storage->sdmmc, &resp, 4, SDMMC_RSP_TYPE_5))
- return 2;
-
- return (resp & 0xFF) == 0xAA ? 0 : 2;
-}
-
-static int _sd_storage_get_op_cond_once(sdmmc_storage_t *storage, u32 *cond, int is_version_1, int supports_low_voltage)
-{
- sdmmc_cmd_t cmdbuf;
- // Support for Current > 150mA
- u32 arg = (~is_version_1 & 1) ? SD_OCR_XPC : 0;
- // Support for handling block-addressed SDHC cards
- arg |= (~is_version_1 & 1) ? SD_OCR_CCS : 0;
- // Support for 1.8V
- arg |= (supports_low_voltage & ~is_version_1 & 1) ? SD_OCR_S18R : 0;
- // This is needed for most cards. Do not set bit7 even if 1.8V is supported.
- arg |= SD_OCR_VDD_32_33;
- sdmmc_init_cmd(&cmdbuf, SD_APP_OP_COND, arg, SDMMC_RSP_TYPE_3, 0);
- if (!_sd_storage_execute_app_cmd(storage, 0x10, is_version_1 ? 0x400000 : 0, &cmdbuf, 0, 0))
- return 0;
-
- return sdmmc_get_rsp(storage->sdmmc, cond, 4, SDMMC_RSP_TYPE_3);
-}
-
-static int _sd_storage_get_op_cond(sdmmc_storage_t *storage, int is_version_1, int supports_low_voltage)
-{
- u32 timeout = get_tmr_ms() + 1500;
-
- while (1)
- {
- u32 cond = 0;
- if (!_sd_storage_get_op_cond_once(storage, &cond, is_version_1, supports_low_voltage))
- break;
- if (cond & MMC_CARD_BUSY)
- {
- if (cond & SD_OCR_CCS)
- storage->has_sector_access = 1;
-
- // Check if card supports 1.8V signaling.
- if (cond & SD_ROCR_S18A && supports_low_voltage)
- {
- //The low voltage regulator configuration is valid for SDMMC1 only.
- if (storage->sdmmc->id == SDMMC_1 &&
- _sdmmc_storage_execute_cmd_type1(storage, SD_SWITCH_VOLTAGE, 0, 0, R1_STATE_READY))
- {
- if (!sdmmc_enable_low_voltage(storage->sdmmc))
- return 0;
- storage->is_low_voltage = 1;
-
-DPRINTF("-> switched to low voltage\n");
- }
- }
-
- return 1;
- }
- if (get_tmr_ms() > timeout)
- break;
- msleep(10); // Needs to be at least 10ms for some SD Cards
- }
-
- return 0;
-}
-
-static int _sd_storage_get_rca(sdmmc_storage_t *storage)
-{
- sdmmc_cmd_t cmdbuf;
- sdmmc_init_cmd(&cmdbuf, SD_SEND_RELATIVE_ADDR, 0, SDMMC_RSP_TYPE_4, 0);
-
- u32 timeout = get_tmr_ms() + 1500;
-
- while (1)
- {
- if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, 0, 0))
- break;
-
- u32 resp = 0;
- if (!sdmmc_get_rsp(storage->sdmmc, &resp, 4, SDMMC_RSP_TYPE_4))
- break;
-
- if (resp >> 16)
- {
- storage->rca = resp >> 16;
- return 1;
- }
-
- if (get_tmr_ms() > timeout)
- break;
- usleep(1000);
- }
-
- return 0;
-}
-
-static void _sd_storage_parse_scr(sdmmc_storage_t *storage)
-{
- // unstuff_bits can parse only 4 u32
- u32 resp[4];
-
- resp[3] = *(u32 *)&storage->raw_scr[4];
- resp[2] = *(u32 *)&storage->raw_scr[0];
-
- storage->scr.sda_vsn = unstuff_bits(resp, 56, 4);
- storage->scr.bus_widths = unstuff_bits(resp, 48, 4);
- if (storage->scr.sda_vsn == SCR_SPEC_VER_2)
- /* Check if Physical Layer Spec v3.0 is supported */
- storage->scr.sda_spec3 = unstuff_bits(resp, 47, 1);
- if (storage->scr.sda_spec3)
- storage->scr.cmds = unstuff_bits(resp, 32, 2);
-}
-
-int _sd_storage_get_scr(sdmmc_storage_t *storage, u8 *buf)
-{
- sdmmc_cmd_t cmdbuf;
- sdmmc_init_cmd(&cmdbuf, SD_APP_SEND_SCR, 0, SDMMC_RSP_TYPE_1, 0);
-
- sdmmc_req_t reqbuf;
- reqbuf.buf = buf;
- reqbuf.blksize = 8;
- reqbuf.num_sectors = 1;
- reqbuf.is_write = 0;
- reqbuf.is_multi_block = 0;
- reqbuf.is_auto_cmd12 = 0;
-
- if (!_sd_storage_execute_app_cmd(storage, R1_STATE_TRAN, 0, &cmdbuf, &reqbuf, 0))
- return 0;
-
- u32 tmp = 0;
- sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1);
- //Prepare buffer for unstuff_bits
- for (int i = 0; i < 8; i+=4)
- {
- storage->raw_scr[i + 3] = buf[i];
- storage->raw_scr[i + 2] = buf[i + 1];
- storage->raw_scr[i + 1] = buf[i + 2];
- storage->raw_scr[i] = buf[i + 3];
- }
- _sd_storage_parse_scr(storage);
- //gfx_hexdump(0, storage->raw_scr, 8);
-
- return _sdmmc_storage_check_result(tmp);
-}
-
-int _sd_storage_switch_get(sdmmc_storage_t *storage, void *buf)
-{
- sdmmc_cmd_t cmdbuf;
- sdmmc_init_cmd(&cmdbuf, SD_SWITCH, 0xFFFFFF, SDMMC_RSP_TYPE_1, 0);
-
- sdmmc_req_t reqbuf;
- reqbuf.buf = buf;
- reqbuf.blksize = 64;
- reqbuf.num_sectors = 1;
- reqbuf.is_write = 0;
- reqbuf.is_multi_block = 0;
- reqbuf.is_auto_cmd12 = 0;
-
- if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, 0))
- return 0;
-
- u32 tmp = 0;
- sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1);
- return _sdmmc_storage_check_result(tmp);
-}
-
-int _sd_storage_switch(sdmmc_storage_t *storage, void *buf, int mode, int group, u32 arg)
-{
- sdmmc_cmd_t cmdbuf;
- u32 switchcmd = mode << 31 | 0x00FFFFFF;
- switchcmd &= ~(0xF << (group * 4));
- switchcmd |= arg << (group * 4);
- sdmmc_init_cmd(&cmdbuf, SD_SWITCH, switchcmd, SDMMC_RSP_TYPE_1, 0);
-
- sdmmc_req_t reqbuf;
- reqbuf.buf = buf;
- reqbuf.blksize = 64;
- reqbuf.num_sectors = 1;
- reqbuf.is_write = 0;
- reqbuf.is_multi_block = 0;
- reqbuf.is_auto_cmd12 = 0;
-
- if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, 0))
- return 0;
-
- u32 tmp = 0;
- sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1);
- return _sdmmc_storage_check_result(tmp);
-}
-
-void _sd_storage_set_current_limit(sdmmc_storage_t *storage, u16 current_limit, u8 *buf)
-{
- u32 pwr = SD_SET_CURRENT_LIMIT_200;
-
- if (current_limit & SD_MAX_CURRENT_800)
- pwr = SD_SET_CURRENT_LIMIT_800;
- else if (current_limit & SD_MAX_CURRENT_600)
- pwr = SD_SET_CURRENT_LIMIT_600;
- else if (current_limit & SD_MAX_CURRENT_400)
- pwr = SD_SET_CURRENT_LIMIT_400;
-
- _sd_storage_switch(storage, buf, SD_SWITCH_SET, 3, pwr);
-
- if (((buf[15] >> 4) & 0x0F) == pwr)
- {
- switch (pwr)
- {
- case SD_SET_CURRENT_LIMIT_800:
-DPRINTF("[SD] power limit raised to 800mA\n");
- break;
- case SD_SET_CURRENT_LIMIT_600:
-DPRINTF("[SD] power limit raised to 600mA\n");
- break;
- case SD_SET_CURRENT_LIMIT_400:
-DPRINTF("[SD] power limit raised to 400mA\n");
- break;
- default:
- case SD_SET_CURRENT_LIMIT_200:
-DPRINTF("[SD] power limit defaulted to 200mA\n");
- break;
- }
- }
-}
-
-int _sd_storage_enable_highspeed(sdmmc_storage_t *storage, u32 hs_type, u8 *buf)
-{
- if (!_sd_storage_switch(storage, buf, SD_SWITCH_CHECK, 0, hs_type))
- return 0;
-DPRINTF("[SD] supports switch to (U)HS mode\n");
-
- u32 type_out = buf[16] & 0xF;
- if (type_out != hs_type)
- return 0;
-DPRINTF("[SD] supports selected (U)HS mode\n");
-
- u16 total_pwr_consumption = ((u16)buf[0] << 8) | buf[1];
-DPRINTF("[SD] total max current: %d\n", total_pwr_consumption);
-
- if (total_pwr_consumption <= 800)
- {
- if (!_sd_storage_switch(storage, buf, SD_SWITCH_SET, 0, hs_type))
- return 0;
-
- if (type_out != (buf[16] & 0xF))
- return 0;
-
- return 1;
- }
-DPRINTF("[SD] card max current over limit\n");
-
- return 0;
-}
-
-int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u8 *buf)
-{
- if (sdmmc_get_bus_width(storage->sdmmc) != SDMMC_BUS_WIDTH_4)
- return 0;
-
- if (!_sd_storage_switch_get(storage, buf))
- return 0;
- //gfx_hexdump(0, (u8 *)buf, 64);
-
- u8 access_mode = buf[13];
- u16 current_limit = buf[7] | buf[6] << 8;
-
- // Try to raise the current limit to let the card perform better.
- _sd_storage_set_current_limit(storage, current_limit, buf);
-
- u32 hs_type = 0;
- switch (type)
- {
- case SDHCI_TIMING_UHS_SDR104:
- case SDHCI_TIMING_UHS_SDR82:
- // Fall through if not supported.
- if (access_mode & SD_MODE_UHS_SDR104)
- {
- hs_type = UHS_SDR104_BUS_SPEED;
-DPRINTF("[SD] bus speed set to SDR104\n");
- switch (type)
- {
- case SDHCI_TIMING_UHS_SDR104:
- storage->csd.busspeed = 104;
- break;
- case SDHCI_TIMING_UHS_SDR82:
- storage->csd.busspeed = 82;
- break;
- }
- break;
- }
- case SDHCI_TIMING_UHS_SDR50:
- if (access_mode & SD_MODE_UHS_SDR50)
- {
- type = SDHCI_TIMING_UHS_SDR50;
- hs_type = UHS_SDR50_BUS_SPEED;
-DPRINTF("[SD] bus speed set to SDR50\n");
- storage->csd.busspeed = 50;
- break;
- }
- case SDHCI_TIMING_UHS_SDR25:
- if (access_mode & SD_MODE_UHS_SDR25)
- {
- type = SDHCI_TIMING_UHS_SDR25;
- hs_type = UHS_SDR50_BUS_SPEED;
-DPRINTF("[SD] bus speed set to SDR25\n");
- storage->csd.busspeed = 25;
- break;
- }
- case SDHCI_TIMING_UHS_SDR12:
- if (!(access_mode & SD_MODE_UHS_SDR12))
- return 0;
- type = SDHCI_TIMING_UHS_SDR12;
- hs_type = UHS_SDR12_BUS_SPEED;
-DPRINTF("[SD] bus speed set to SDR12\n");
- storage->csd.busspeed = 12;
- break;
- default:
- return 0;
- break;
- }
-
- if (!_sd_storage_enable_highspeed(storage, hs_type, buf))
- return 0;
-DPRINTF("[SD] card accepted UHS\n");
- if (!sdmmc_setup_clock(storage->sdmmc, type))
- return 0;
-DPRINTF("[SD] setup clock\n");
- if (!sdmmc_tuning_execute(storage->sdmmc, type, MMC_SEND_TUNING_BLOCK))
- return 0;
-DPRINTF("[SD] config tuning\n");
- return _sdmmc_storage_check_status(storage);
-}
-
-int _sd_storage_enable_hs_high_volt(sdmmc_storage_t *storage, u8 *buf)
-{
- if (!_sd_storage_switch_get(storage, buf))
- return 0;
- //gfx_hexdump(0, (u8 *)buf, 64);
-
- u8 access_mode = buf[13];
- u16 current_limit = buf[7] | buf[6] << 8;
-
- // Try to raise the current limit to let the card perform better.
- _sd_storage_set_current_limit(storage, current_limit, buf);
-
- if (!(access_mode & SD_MODE_HIGH_SPEED))
- return 1;
-
- if (!_sd_storage_enable_highspeed(storage, HIGH_SPEED_BUS_SPEED, buf))
- return 0;
-
- if (!_sdmmc_storage_check_status(storage))
- return 0;
-
- return sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_SD_HS25);
-}
-
-static void _sd_storage_parse_ssr(sdmmc_storage_t *storage)
-{
- // unstuff_bits supports only 4 u32 so break into 2 x 16byte groups
- u32 raw_ssr1[4];
- u32 raw_ssr2[4];
-
- raw_ssr1[3] = *(u32 *)&storage->raw_ssr[12];
- raw_ssr1[2] = *(u32 *)&storage->raw_ssr[8];
- raw_ssr1[1] = *(u32 *)&storage->raw_ssr[4];
- raw_ssr1[0] = *(u32 *)&storage->raw_ssr[0];
-
- raw_ssr2[3] = *(u32 *)&storage->raw_ssr[28];
- raw_ssr2[2] = *(u32 *)&storage->raw_ssr[24];
- raw_ssr2[1] = *(u32 *)&storage->raw_ssr[20];
- raw_ssr2[0] = *(u32 *)&storage->raw_ssr[16];
-
- storage->ssr.bus_width = (unstuff_bits(raw_ssr1, 510 - 384, 2) & SD_BUS_WIDTH_4) ? 4 : 1;
- switch(unstuff_bits(raw_ssr1, 440 - 384, 8))
- {
- case 0:
- storage->ssr.speed_class = 0;
- break;
- case 1:
- storage->ssr.speed_class = 2;
- break;
- case 2:
- storage->ssr.speed_class = 4;
- break;
- case 3:
- storage->ssr.speed_class = 6;
- break;
- case 4:
- storage->ssr.speed_class = 10;
- break;
- default:
- storage->ssr.speed_class = unstuff_bits(raw_ssr1, 440 - 384, 8);
- break;
- }
- storage->ssr.uhs_grade = unstuff_bits(raw_ssr1, 396 - 384, 4);
- storage->ssr.video_class = unstuff_bits(raw_ssr1, 384 - 384, 8);
-
- storage->ssr.app_class = unstuff_bits(raw_ssr2, 336 - 256, 4);
-}
-
-static int _sd_storage_get_ssr(sdmmc_storage_t *storage, u8 *buf)
-{
- sdmmc_cmd_t cmdbuf;
- sdmmc_init_cmd(&cmdbuf, SD_APP_SD_STATUS, 0, SDMMC_RSP_TYPE_1, 0);
-
- sdmmc_req_t reqbuf;
- reqbuf.buf = buf;
- reqbuf.blksize = 64;
- reqbuf.num_sectors = 1;
- reqbuf.is_write = 0;
- reqbuf.is_multi_block = 0;
- reqbuf.is_auto_cmd12 = 0;
-
- if (!(storage->csd.cmdclass & CCC_APP_SPEC))
- {
-DPRINTF("[SD] ssr: Card lacks mandatory SD Status function\n");
- return 0;
- }
-
- if (!_sd_storage_execute_app_cmd(storage, R1_STATE_TRAN, 0, &cmdbuf, &reqbuf, 0))
- return 0;
-
- u32 tmp = 0;
- sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1);
- //Prepare buffer for unstuff_bits
- for (int i = 0; i < 64; i+=4)
- {
- storage->raw_ssr[i + 3] = buf[i];
- storage->raw_ssr[i + 2] = buf[i + 1];
- storage->raw_ssr[i + 1] = buf[i + 2];
- storage->raw_ssr[i] = buf[i + 3];
- }
- _sd_storage_parse_ssr(storage);
- //gfx_hexdump(0, storage->raw_ssr, 64);
-
- return _sdmmc_storage_check_result(tmp);
-}
-
-static void _sd_storage_parse_cid(sdmmc_storage_t *storage)
-{
- u32 *raw_cid = (u32 *)&(storage->raw_cid);
-
- storage->cid.manfid = unstuff_bits(raw_cid, 120, 8);
- storage->cid.oemid = unstuff_bits(raw_cid, 104, 16);
- storage->cid.prod_name[0] = unstuff_bits(raw_cid, 96, 8);
- storage->cid.prod_name[1] = unstuff_bits(raw_cid, 88, 8);
- storage->cid.prod_name[2] = unstuff_bits(raw_cid, 80, 8);
- storage->cid.prod_name[3] = unstuff_bits(raw_cid, 72, 8);
- storage->cid.prod_name[4] = unstuff_bits(raw_cid, 64, 8);
- storage->cid.hwrev = unstuff_bits(raw_cid, 60, 4);
- storage->cid.fwrev = unstuff_bits(raw_cid, 56, 4);
- storage->cid.serial = unstuff_bits(raw_cid, 24, 32);
- storage->cid.month = unstuff_bits(raw_cid, 8, 4);
- storage->cid.year = unstuff_bits(raw_cid, 12, 8) + 2000;
-}
-
-static void _sd_storage_parse_csd(sdmmc_storage_t *storage)
-{
- u32 *raw_csd = (u32 *)&(storage->raw_csd);
-
- storage->csd.structure = unstuff_bits(raw_csd, 126, 2);
- storage->csd.cmdclass = unstuff_bits(raw_csd, 84, 12);
- storage->csd.read_blkbits = unstuff_bits(raw_csd, 80, 4);
- storage->csd.write_protect = unstuff_bits(raw_csd, 12, 2);
- switch(storage->csd.structure)
- {
- case 0:
- storage->csd.capacity = (1 + unstuff_bits(raw_csd, 62, 12)) << (unstuff_bits(raw_csd, 47, 3) + 2);
- break;
- case 1:
- storage->csd.c_size = (1 + unstuff_bits(raw_csd, 48, 22));
- storage->csd.capacity = storage->csd.c_size << 10;
- storage->csd.read_blkbits = 9;
- break;
- }
-}
-
-static bool _sdmmc_storage_supports_low_voltage(u32 bus_width, u32 type)
-{
- switch (type)
- {
- case SDHCI_TIMING_UHS_SDR12:
- case SDHCI_TIMING_UHS_SDR25:
- case SDHCI_TIMING_UHS_SDR50:
- case SDHCI_TIMING_UHS_SDR104:
- case SDHCI_TIMING_UHS_SDR82:
- case SDHCI_TIMING_UHS_DDR50:
- if (bus_width == SDMMC_BUS_WIDTH_4)
- return true;
- default:
- return false;
- }
-}
-
-void sdmmc_storage_init_wait_sd()
-{
- u32 sd_poweroff_time = (u32)get_tmr_ms() - sd_power_cycle_time_start;
- if (sd_poweroff_time < 100)
- msleep(100 - sd_poweroff_time);
-}
-
-int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type)
-{
- int is_version_1 = 0;
- u8 *buf = (u8 *)SDMMC_UPPER_BUFFER;
-
- // Some cards (SanDisk U1), do not like a fast power cycle. Wait min 100ms.
- sdmmc_storage_init_wait_sd();
-
- memset(storage, 0, sizeof(sdmmc_storage_t));
- storage->sdmmc = sdmmc;
-
- if (!sdmmc_init(sdmmc, SDMMC_1, SDMMC_POWER_3_3, SDMMC_BUS_WIDTH_1, SDHCI_TIMING_SD_ID, SDMMC_AUTO_CAL_DISABLE))
- return 0;
-DPRINTF("[SD] after init\n");
-
- usleep(1000 + (74000 + sdmmc->divisor - 1) / sdmmc->divisor);
-
- if (!_sdmmc_storage_go_idle_state(storage))
- return 0;
-DPRINTF("[SD] went to idle state\n");
-
- is_version_1 = _sd_storage_send_if_cond(storage);
- if (is_version_1 == 2)
- return 0;
-DPRINTF("[SD] after send if cond\n");
-
- bool supports_low_voltage = _sdmmc_storage_supports_low_voltage(bus_width, type);
-
- if (!_sd_storage_get_op_cond(storage, is_version_1, supports_low_voltage))
- return 0;
-DPRINTF("[SD] got op cond\n");
-
- if (!_sdmmc_storage_get_cid(storage, storage->raw_cid))
- return 0;
-DPRINTF("[SD] got cid\n");
- _sd_storage_parse_cid(storage);
-
- if (!_sd_storage_get_rca(storage))
- return 0;
-DPRINTF("[SD] got rca (= %04X)\n", storage->rca);
-
- if (!_sdmmc_storage_get_csd(storage, storage->raw_csd))
- return 0;
-DPRINTF("[SD] got csd\n");
-
- //Parse CSD.
- _sd_storage_parse_csd(storage);
- switch (storage->csd.structure)
- {
- case 0:
- storage->sec_cnt = storage->csd.capacity;
- break;
- case 1:
- storage->sec_cnt = storage->csd.c_size << 10;
- break;
- default:
-DPRINTF("[SD] unknown CSD structure %d\n", storage->csd.structure);
- break;
- }
-
- if (!storage->is_low_voltage)
- {
- if (!sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_SD_DS12))
- return 0;
-DPRINTF("[SD] after setup clock\n");
- }
-
- if (!_sdmmc_storage_select_card(storage))
- return 0;
-DPRINTF("[SD] card selected\n");
-
- if (!_sdmmc_storage_set_blocklen(storage, 512))
- return 0;
-DPRINTF("[SD] set blocklen to 512\n");
-
- u32 tmp = 0;
- if (!_sd_storage_execute_app_cmd_type1(storage, &tmp, SD_APP_SET_CLR_CARD_DETECT, 0, 0, R1_STATE_TRAN))
- return 0;
-DPRINTF("[SD] cleared card detect\n");
-
- if (!_sd_storage_get_scr(storage, buf))
- return 0;
-
- //gfx_hexdump(0, storage->raw_scr, 8);
-DPRINTF("[SD] got scr\n");
-
- // Check if card supports a wider bus and if it's not SD Version 1.X
- if (bus_width == SDMMC_BUS_WIDTH_4 && (storage->scr.bus_widths & 4) && (storage->scr.sda_vsn & 0xF))
- {
- if (!_sd_storage_execute_app_cmd_type1(storage, &tmp, SD_APP_SET_BUS_WIDTH, SD_BUS_WIDTH_4, 0, R1_STATE_TRAN))
- return 0;
-
- sdmmc_set_bus_width(storage->sdmmc, SDMMC_BUS_WIDTH_4);
-DPRINTF("[SD] switched to wide bus width\n");
- }
- else
- {
-DPRINTF("[SD] SD does not support wide bus width\n");
- }
-
- if (storage->is_low_voltage)
- {
- if (!_sd_storage_enable_uhs_low_volt(storage, type, buf))
- return 0;
-DPRINTF("[SD] enabled UHS\n");
-
- sdmmc_card_clock_ctrl(sdmmc, SDMMC_AUTO_CAL_ENABLE);
- }
- else if (type != SDHCI_TIMING_SD_DS12 && (storage->scr.sda_vsn & 0xF) != 0)
- {
- if (!_sd_storage_enable_hs_high_volt(storage, buf))
- return 0;
-
-DPRINTF("[SD] enabled HS\n");
- switch (bus_width)
- {
- case SDMMC_BUS_WIDTH_4:
- storage->csd.busspeed = 25;
- break;
- case SDMMC_BUS_WIDTH_1:
- storage->csd.busspeed = 6;
- break;
- }
- }
-
- // Parse additional card info from sd status.
- if (_sd_storage_get_ssr(storage, buf))
- {
-DPRINTF("[SD] got sd status\n");
- }
-
- return 1;
-}
-
-/*
-* Gamecard specific functions.
-*/
-
-int _gc_storage_custom_cmd(sdmmc_storage_t *storage, void *buf)
-{
- u32 resp;
- sdmmc_cmd_t cmdbuf;
- sdmmc_init_cmd(&cmdbuf, 60, 0, SDMMC_RSP_TYPE_1, 1);
-
- sdmmc_req_t reqbuf;
- reqbuf.buf = buf;
- reqbuf.blksize = 64;
- reqbuf.num_sectors = 1;
- reqbuf.is_write = 1;
- reqbuf.is_multi_block = 0;
- reqbuf.is_auto_cmd12 = 0;
-
- if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, 0))
- {
- sdmmc_stop_transmission(storage->sdmmc, &resp);
- return 0;
- }
-
- if (!sdmmc_get_rsp(storage->sdmmc, &resp, 4, SDMMC_RSP_TYPE_1))
- return 0;
- if (!_sdmmc_storage_check_result(resp))
- return 0;
- return _sdmmc_storage_check_status(storage);
-}
-
-int sdmmc_storage_init_gc(sdmmc_storage_t *storage, sdmmc_t *sdmmc)
-{
- memset(storage, 0, sizeof(sdmmc_storage_t));
- storage->sdmmc = sdmmc;
-
- if (!sdmmc_init(sdmmc, SDMMC_2, SDMMC_POWER_1_8, SDMMC_BUS_WIDTH_8, SDHCI_TIMING_MMC_DDR52, SDMMC_AUTO_CAL_DISABLE))
- return 0;
-DPRINTF("[gc] after init\n");
-
- usleep(1000 + (10000 + sdmmc->divisor - 1) / sdmmc->divisor);
-
- if (!sdmmc_tuning_execute(storage->sdmmc, SDHCI_TIMING_MMC_DDR52, MMC_SEND_TUNING_BLOCK_HS200))
- return 0;
-DPRINTF("[gc] after tuning\n");
-
- sdmmc_card_clock_ctrl(sdmmc, SDMMC_AUTO_CAL_ENABLE);
-
- return 1;
-}
diff --git a/nyx/nyx_gui/storage/sdmmc.h b/nyx/nyx_gui/storage/sdmmc.h
deleted file mode 100644
index aacc26a..0000000
--- a/nyx/nyx_gui/storage/sdmmc.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _SDMMC_H_
-#define _SDMMC_H_
-
-#include "../utils/types.h"
-#include "sdmmc_driver.h"
-
-extern u32 sd_power_cycle_time_start;
-
-typedef enum _sdmmc_type
-{
- MMC_SD = 0,
- MMC_EMMC = 1,
-
- EMMC_GPP = 0,
- EMMC_BOOT0 = 1,
- EMMC_BOOT1 = 2
-} sdmmc_type;
-
-typedef struct _mmc_cid
-{
- u32 manfid;
- u8 prod_name[8];
- u8 card_bga;
- u8 prv;
- u32 serial;
- u16 oemid;
- u16 year;
- u8 hwrev;
- u8 fwrev;
- u8 month;
-} mmc_cid_t;
-
-typedef struct _mmc_csd
-{
- u8 structure;
- u8 mmca_vsn;
- u16 cmdclass;
- u32 c_size;
- u32 r2w_factor;
- u32 max_dtr;
- u32 erase_size; /* In sectors */
- u32 read_blkbits;
- u32 write_blkbits;
- u32 capacity;
- u8 write_protect;
- u16 busspeed;
-} mmc_csd_t;
-
-typedef struct _mmc_ext_csd
-{
- u8 rev;
- u32 sectors;
- int bkops; /* background support bit */
- int bkops_en; /* manual bkops enable bit */
- u8 ext_struct; /* 194 */
- u8 card_type; /* 196 */
- u8 bkops_status; /* 246 */
- u16 dev_version;
- u8 boot_mult;
- u8 rpmb_mult;
-} mmc_ext_csd_t;
-
-typedef struct _sd_scr
-{
- u8 sda_vsn;
- u8 sda_spec3;
- u8 bus_widths;
- u8 cmds;
-} sd_scr_t;
-
-typedef struct _sd_ssr
-{
- u8 bus_width;
- u8 speed_class;
- u8 uhs_grade;
- u8 video_class;
- u8 app_class;
-} sd_ssr_t;
-
-/*! SDMMC storage context. */
-typedef struct _sdmmc_storage_t
-{
- sdmmc_t *sdmmc;
- u32 rca;
- int has_sector_access;
- u32 sec_cnt;
- int is_low_voltage;
- u32 partition;
- u8 raw_cid[0x10];
- u8 raw_csd[0x10];
- u8 raw_scr[8];
- u8 raw_ssr[0x40];
- mmc_cid_t cid;
- mmc_csd_t csd;
- mmc_ext_csd_t ext_csd;
- sd_scr_t scr;
- sd_ssr_t ssr;
-} sdmmc_storage_t;
-
-int sdmmc_storage_end(sdmmc_storage_t *storage);
-int sdmmc_storage_read(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf);
-int sdmmc_storage_write(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf);
-int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type);
-int sdmmc_storage_set_mmc_partition(sdmmc_storage_t *storage, u32 partition);
-void sdmmc_storage_init_wait_sd();
-int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type);
-int sdmmc_storage_init_gc(sdmmc_storage_t *storage, sdmmc_t *sdmmc);
-
-#endif
diff --git a/nyx/nyx_gui/storage/sdmmc_driver.c b/nyx/nyx_gui/storage/sdmmc_driver.c
deleted file mode 100644
index 957a0bc..0000000
--- a/nyx/nyx_gui/storage/sdmmc_driver.c
+++ /dev/null
@@ -1,1302 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-
-#include "mmc.h"
-#include "sdmmc.h"
-#include "../gfx/gfx.h"
-#include "../power/max7762x.h"
-#include "../soc/bpmp.h"
-#include "../soc/clock.h"
-#include "../soc/gpio.h"
-#include "../soc/pinmux.h"
-#include "../soc/pmc.h"
-#include "../soc/t210.h"
-#include "../utils/util.h"
-
-//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
-//#define ERROR_EXTRA_PRINTING
-#define DPRINTF(...)
-
-#ifdef NYX
-#define ERROR_EXTRA_PRINTING
-#define SDMMC_EMMC_OC
-#endif
-
-/*! SCMMC controller base addresses. */
-static const u32 _sdmmc_bases[4] = {
- 0x700B0000,
- 0x700B0200,
- 0x700B0400,
- 0x700B0600,
-};
-
-int sdmmc_get_io_power(sdmmc_t *sdmmc)
-{
- u32 p = sdmmc->regs->pwrcon;
- if (!(p & SDHCI_POWER_ON))
- return SDMMC_POWER_OFF;
- if (p & SDHCI_POWER_180)
- return SDMMC_POWER_1_8;
- if (p & SDHCI_POWER_330)
- return SDMMC_POWER_3_3;
- return -1;
-}
-
-static int _sdmmc_set_io_power(sdmmc_t *sdmmc, u32 power)
-{
- switch (power)
- {
- case SDMMC_POWER_OFF:
- sdmmc->regs->pwrcon &= ~SDHCI_POWER_ON;
- break;
- case SDMMC_POWER_1_8:
- sdmmc->regs->pwrcon = SDHCI_POWER_180;
- break;
- case SDMMC_POWER_3_3:
- sdmmc->regs->pwrcon = SDHCI_POWER_330;
- break;
- default:
- return 0;
- }
-
- if (power != SDMMC_POWER_OFF)
- sdmmc->regs->pwrcon |= SDHCI_POWER_ON;
-
- return 1;
-}
-
-u32 sdmmc_get_bus_width(sdmmc_t *sdmmc)
-{
- u32 h = sdmmc->regs->hostctl;
- if (h & SDHCI_CTRL_8BITBUS)
- return SDMMC_BUS_WIDTH_8;
- if (h & SDHCI_CTRL_4BITBUS)
- return SDMMC_BUS_WIDTH_4;
- return SDMMC_BUS_WIDTH_1;
-}
-
-void sdmmc_set_bus_width(sdmmc_t *sdmmc, u32 bus_width)
-{
- u32 host_control = sdmmc->regs->hostctl & ~(SDHCI_CTRL_4BITBUS | SDHCI_CTRL_8BITBUS);
-
- if (bus_width == SDMMC_BUS_WIDTH_1)
- sdmmc->regs->hostctl = host_control;
- else if (bus_width == SDMMC_BUS_WIDTH_4)
- sdmmc->regs->hostctl = host_control | SDHCI_CTRL_4BITBUS;
- else if (bus_width == SDMMC_BUS_WIDTH_8)
- sdmmc->regs->hostctl = host_control | SDHCI_CTRL_8BITBUS;
-}
-
-void sdmmc_set_tap_value(sdmmc_t *sdmmc)
-{
- sdmmc->venclkctl_tap = sdmmc->regs->venclkctl >> 16;
- sdmmc->venclkctl_set = 1;
-}
-
-static int _sdmmc_config_tap_val(sdmmc_t *sdmmc, u32 type)
-{
- const u32 dqs_trim_val = 0x28;
- const u32 tap_values[] = { 4, 0, 3, 0 };
-
- u32 tap_val = 0;
-
- if (type == SDHCI_TIMING_MMC_HS400)
- sdmmc->regs->vencapover = (sdmmc->regs->vencapover & 0xFFFFC0FF) | (dqs_trim_val << 8);
-
- sdmmc->regs->ventunctl0 &= ~TEGRA_MMC_VNDR_TUN_CTRL0_TAP_VAL_UPDATED_BY_HW;
-
- if (type == SDHCI_TIMING_MMC_HS400)
- {
- if (!sdmmc->venclkctl_set)
- return 0;
-
- tap_val = sdmmc->venclkctl_tap;
- }
- else
- {
- tap_val = tap_values[sdmmc->id];
- }
- sdmmc->regs->venclkctl = (sdmmc->regs->venclkctl & 0xFF00FFFF) | (tap_val << 16);
-
- return 1;
-}
-
-static int _sdmmc_get_clkcon(sdmmc_t *sdmmc)
-{
- return sdmmc->regs->clkcon;
-}
-
-static void _sdmmc_pad_config_fallback(sdmmc_t *sdmmc, u32 power)
-{
- _sdmmc_get_clkcon(sdmmc);
- switch (sdmmc->id)
- {
- case SDMMC_1: // 33 Ohm 2X Driver.
- if (power == SDMMC_POWER_OFF)
- break;
- u32 sdmmc1_pad_cfg = APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) & 0xF8080FFF;
- if (power == SDMMC_POWER_1_8)
- APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) = sdmmc1_pad_cfg | (0xB0F << 12); // Up: 11, Dn: 15. For 33 ohm.
- else if (power == SDMMC_POWER_3_3)
- APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) = sdmmc1_pad_cfg | (0xC0C << 12); // Up: 12, Dn: 12. For 33 ohm.
- break;
- case SDMMC_2:
- case SDMMC_4: // 50 Ohm 2X Driver. PU:16, PD:16.
- APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) = (APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) & 0xFFFFC003) | 0x1040;
- break;
- }
-}
-
-static void _sdmmc_autocal_execute(sdmmc_t *sdmmc, u32 power)
-{
- bool should_enable_sd_clock = false;
- if (sdmmc->regs->clkcon & SDHCI_CLOCK_CARD_EN)
- {
- should_enable_sd_clock = true;
- sdmmc->regs->clkcon &= ~SDHCI_CLOCK_CARD_EN;
- }
-
- // Enable E_INPUT power.
- if (!(sdmmc->regs->sdmemcmppadctl & TEGRA_MMC_SDMEMCOMPPADCTRL_PAD_E_INPUT_PWRD))
- {
- sdmmc->regs->sdmemcmppadctl |= TEGRA_MMC_SDMEMCOMPPADCTRL_PAD_E_INPUT_PWRD;
- _sdmmc_get_clkcon(sdmmc);
- usleep(1);
- }
-
- // Enable auto calibration and start auto configuration.
- sdmmc->regs->autocalcfg |= TEGRA_MMC_AUTOCALCFG_AUTO_CAL_ENABLE | TEGRA_MMC_AUTOCALCFG_AUTO_CAL_START;
- _sdmmc_get_clkcon(sdmmc);
- usleep(2);
-
- u32 timeout = get_tmr_ms() + 10;
- while (sdmmc->regs->autocalsts & TEGRA_MMC_AUTOCALSTS_AUTO_CAL_ACTIVE)
- {
- if (get_tmr_ms() > timeout)
- {
- timeout = 0; // Set timeout to 0 if we timed out.
- break;
- }
- }
-/*
- // Check if PU results are inside limits.
- // SDMMC1: CZ pads - 7-bit PU. SDMMC2/4: LV_CZ pads - 5-bit PU.
- u8 autocal_pu_status = sdmmc->regs->autocalsts & 0x7F;
- switch (sdmmc->id)
- {
- case SDMMC_1:
- if (!autocal_pu_status || autocal_pu_status == 0x7F)
- timeout = 0;
- break;
- case SDMMC_2:
- case SDMMC_4:
- autocal_pu_status &= 0x1F;
- if (!autocal_pu_status || autocal_pu_status == 0x1F)
- timeout = 0;
- break;
- }
-*/
- // In case auto calibration fails, we load suggested standard values.
- if (!timeout)
- {
- _sdmmc_pad_config_fallback(sdmmc, power);
- sdmmc->regs->autocalcfg &= ~TEGRA_MMC_AUTOCALCFG_AUTO_CAL_ENABLE;
- }
-
- // Disable E_INPUT to conserve power.
- sdmmc->regs->sdmemcmppadctl &= ~TEGRA_MMC_SDMEMCOMPPADCTRL_PAD_E_INPUT_PWRD;
-
- if(should_enable_sd_clock)
- sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
-}
-
-#ifdef SDMMC_EMMC_OC
-static int _sdmmc_dll_cal_execute(sdmmc_t *sdmmc, bool overclock)
-#else
-static int _sdmmc_dll_cal_execute(sdmmc_t *sdmmc)
-#endif
-{
- int result = 1, should_disable_sd_clock = 0;
-
- if (!(sdmmc->regs->clkcon & SDHCI_CLOCK_CARD_EN))
- {
- should_disable_sd_clock = 1;
- sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
- }
-
-#ifdef SDMMC_EMMC_OC
- if (sdmmc->id == SDMMC_4 && overclock)
- sdmmc->regs->vendllcalcfg = sdmmc->regs->vendllcalcfg &= 0xFFFFC07F | (0x7C << 7); // Add -4 TX_DLY_CODE_OFFSET if HS533.
-#endif
-
- sdmmc->regs->vendllcalcfg |= TEGRA_MMC_DLLCAL_CFG_EN_CALIBRATE;
- _sdmmc_get_clkcon(sdmmc);
-
- u32 timeout = get_tmr_ms() + 5;
- while (sdmmc->regs->vendllcalcfg & TEGRA_MMC_DLLCAL_CFG_EN_CALIBRATE)
- {
- if (get_tmr_ms() > timeout)
- {
- result = 0;
- goto out;
- }
- }
-
- timeout = get_tmr_ms() + 10;
- while (sdmmc->regs->vendllcalcfgsts & TEGRA_MMC_DLLCAL_CFG_STATUS_DLL_ACTIVE)
- {
- if (get_tmr_ms() > timeout)
- {
- result = 0;
- goto out;
- }
- }
-
-out:;
- if (should_disable_sd_clock)
- sdmmc->regs->clkcon &= ~SDHCI_CLOCK_CARD_EN;
- return result;
-}
-
-static void _sdmmc_reset(sdmmc_t *sdmmc)
-{
- sdmmc->regs->swrst |= SDHCI_RESET_CMD | SDHCI_RESET_DATA;
- _sdmmc_get_clkcon(sdmmc);
- u32 timeout = get_tmr_ms() + 2000;
- while ((sdmmc->regs->swrst & (SDHCI_RESET_CMD | SDHCI_RESET_DATA)) && get_tmr_ms() < timeout)
- ;
-}
-
-int sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type)
-{
- // Disable the SD clock if it was enabled, and reenable it later.
- bool should_enable_sd_clock = false;
- if (sdmmc->regs->clkcon & SDHCI_CLOCK_CARD_EN)
- {
- should_enable_sd_clock = true;
- sdmmc->regs->clkcon &= ~SDHCI_CLOCK_CARD_EN;
- }
-
- _sdmmc_config_tap_val(sdmmc, type);
-
- _sdmmc_reset(sdmmc);
-
- switch (type)
- {
- case SDHCI_TIMING_MMC_ID:
- case SDHCI_TIMING_MMC_LS26:
- case SDHCI_TIMING_SD_ID:
- case SDHCI_TIMING_SD_DS12:
- sdmmc->regs->hostctl &= ~SDHCI_CTRL_HISPD;
- sdmmc->regs->hostctl2 &= ~SDHCI_CTRL_VDD_180;
- break;
- case SDHCI_TIMING_MMC_HS52:
- case SDHCI_TIMING_SD_HS25:
- sdmmc->regs->hostctl |= SDHCI_CTRL_HISPD;
- sdmmc->regs->hostctl2 &= ~SDHCI_CTRL_VDD_180;
- break;
- case SDHCI_TIMING_MMC_HS200:
- case SDHCI_TIMING_UHS_SDR50: // T210 Errata for SDR50, the host must be set to SDR104.
- case SDHCI_TIMING_UHS_SDR104:
- case SDHCI_TIMING_UHS_SDR82:
- case SDHCI_TIMING_UHS_DDR50:
- case SDHCI_TIMING_MMC_DDR52:
- sdmmc->regs->hostctl2 = (sdmmc->regs->hostctl2 & SDHCI_CTRL_UHS_MASK) | UHS_SDR104_BUS_SPEED;
- sdmmc->regs->hostctl2 |= SDHCI_CTRL_VDD_180;
- break;
- case SDHCI_TIMING_MMC_HS400:
- // Non standard.
- sdmmc->regs->hostctl2 = (sdmmc->regs->hostctl2 & SDHCI_CTRL_UHS_MASK) | HS400_BUS_SPEED;
- sdmmc->regs->hostctl2 |= SDHCI_CTRL_VDD_180;
- break;
- case SDHCI_TIMING_UHS_SDR25:
- sdmmc->regs->hostctl2 = (sdmmc->regs->hostctl2 & SDHCI_CTRL_UHS_MASK) | UHS_SDR25_BUS_SPEED;
- sdmmc->regs->hostctl2 |= SDHCI_CTRL_VDD_180;
- break;
- case SDHCI_TIMING_UHS_SDR12:
- sdmmc->regs->hostctl2 = (sdmmc->regs->hostctl2 & SDHCI_CTRL_UHS_MASK) | UHS_SDR12_BUS_SPEED;
- sdmmc->regs->hostctl2 |= SDHCI_CTRL_VDD_180;
- break;
- }
-
- _sdmmc_get_clkcon(sdmmc);
-
- u32 clock;
- u16 divisor;
- clock_sdmmc_get_card_clock_div(&clock, &divisor, type);
- clock_sdmmc_config_clock_source(&clock, sdmmc->id, clock);
- sdmmc->divisor = (clock + divisor - 1) / divisor;
-
- //if divisor != 1 && divisor << 31 -> error
-
- u16 div = divisor >> 1;
- divisor = 0;
- if (div > 0xFF)
- divisor = div >> SDHCI_DIVIDER_SHIFT;
-
- sdmmc->regs->clkcon = (sdmmc->regs->clkcon & ~(SDHCI_DIV_MASK | SDHCI_DIV_HI_MASK))
- | (div << SDHCI_DIVIDER_SHIFT) | (divisor << SDHCI_DIVIDER_HI_SHIFT);
-
- // Enable the SD clock again.
- if (should_enable_sd_clock)
- sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
-
- if (type == SDHCI_TIMING_MMC_HS400)
- {
-#ifdef SDMMC_EMMC_OC
- bool overclock_en = clock > 208000;
- return _sdmmc_dll_cal_execute(sdmmc, overclock_en);
-#else
- return _sdmmc_dll_cal_execute(sdmmc);
-#endif
- }
-
- return 1;
-}
-
-static void _sdmmc_card_clock_enable(sdmmc_t *sdmmc)
-{
- // Recalibrate conditionally.
- if ((sdmmc->id == SDMMC_1) && !sdmmc->auto_cal_enabled)
- _sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc));
-
- if (!sdmmc->auto_cal_enabled)
- {
- if (!(sdmmc->regs->clkcon & SDHCI_CLOCK_CARD_EN))
- sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
- }
- sdmmc->card_clock_enabled = 1;
-}
-
-static void _sdmmc_sd_clock_disable(sdmmc_t *sdmmc)
-{
- sdmmc->card_clock_enabled = 0;
- sdmmc->regs->clkcon &= ~SDHCI_CLOCK_CARD_EN;
-}
-
-void sdmmc_card_clock_ctrl(sdmmc_t *sdmmc, int auto_cal_enable)
-{
- // Recalibrate periodically for SDMMC1.
- if ((sdmmc->id == SDMMC_1) && !auto_cal_enable && sdmmc->card_clock_enabled)
- _sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc));
-
- sdmmc->auto_cal_enabled = auto_cal_enable;
- if (auto_cal_enable)
- {
- if (!(sdmmc->regs->clkcon & SDHCI_CLOCK_CARD_EN))
- return;
- sdmmc->regs->clkcon &= ~SDHCI_CLOCK_CARD_EN;
- return;
- }
-
- if (sdmmc->card_clock_enabled)
- if (!(sdmmc->regs->clkcon & SDHCI_CLOCK_CARD_EN))
- sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
-}
-
-static int _sdmmc_cache_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type)
-{
- switch (type)
- {
- case SDMMC_RSP_TYPE_1:
- case SDMMC_RSP_TYPE_3:
- case SDMMC_RSP_TYPE_4:
- case SDMMC_RSP_TYPE_5:
- if (size < 4)
- return 0;
- rsp[0] = sdmmc->regs->rspreg0;
- break;
- case SDMMC_RSP_TYPE_2:
- if (size < 0x10)
- return 0;
- // CRC is stripped, so shifting is needed.
- u32 tempreg;
- for (int i = 0; i < 4; i++)
- {
- switch(i)
- {
- case 0:
- tempreg = sdmmc->regs->rspreg3;
- break;
- case 1:
- tempreg = sdmmc->regs->rspreg2;
- break;
- case 2:
- tempreg = sdmmc->regs->rspreg1;
- break;
- case 3:
- tempreg = sdmmc->regs->rspreg0;
- break;
- }
- rsp[i] = tempreg << 8;
-
- if (i != 0)
- rsp[i - 1] |= (tempreg >> 24) & 0xFF;
- }
- break;
- default:
- return 0;
- break;
- }
-
- return 1;
-}
-
-int sdmmc_get_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type)
-{
- if (!rsp || sdmmc->expected_rsp_type != type)
- return 0;
-
- switch (type)
- {
- case SDMMC_RSP_TYPE_1:
- case SDMMC_RSP_TYPE_3:
- case SDMMC_RSP_TYPE_4:
- case SDMMC_RSP_TYPE_5:
- if (size < 4)
- return 0;
- rsp[0] = sdmmc->rsp[0];
- break;
- case SDMMC_RSP_TYPE_2:
- if (size < 0x10)
- return 0;
- rsp[0] = sdmmc->rsp[0];
- rsp[1] = sdmmc->rsp[1];
- rsp[2] = sdmmc->rsp[2];
- rsp[3] = sdmmc->rsp[3];
- break;
- default:
- return 0;
- break;
- }
-
- return 1;
-}
-
-static int _sdmmc_wait_cmd_data_inhibit(sdmmc_t *sdmmc, bool wait_dat)
-{
- _sdmmc_get_clkcon(sdmmc);
-
- u32 timeout = get_tmr_ms() + 2000;
- while(sdmmc->regs->prnsts & SDHCI_CMD_INHIBIT)
- if (get_tmr_ms() > timeout)
- {
- _sdmmc_reset(sdmmc);
- return 0;
- }
-
- if (wait_dat)
- {
- timeout = get_tmr_ms() + 2000;
- while (sdmmc->regs->prnsts & SDHCI_DATA_INHIBIT)
- if (get_tmr_ms() > timeout)
- {
- _sdmmc_reset(sdmmc);
- return 0;
- }
- }
-
- return 1;
-}
-
-static int _sdmmc_wait_card_busy(sdmmc_t *sdmmc)
-{
- _sdmmc_get_clkcon(sdmmc);
-
- u32 timeout = get_tmr_ms() + 2000;
- while (!(sdmmc->regs->prnsts & SDHCI_DATA_0_LVL_MASK))
- if (get_tmr_ms() > timeout)
- {
- _sdmmc_reset(sdmmc);
- return 0;
- }
-
- return 1;
-}
-
-static int _sdmmc_setup_read_small_block(sdmmc_t *sdmmc)
-{
- switch (sdmmc_get_bus_width(sdmmc))
- {
- case SDMMC_BUS_WIDTH_1:
- return 0;
- break;
- case SDMMC_BUS_WIDTH_4:
- sdmmc->regs->blksize = 64;
- break;
- case SDMMC_BUS_WIDTH_8:
- sdmmc->regs->blksize = 128;
- break;
- }
- sdmmc->regs->blkcnt = 1;
- sdmmc->regs->trnmod = SDHCI_TRNS_READ;
- return 1;
-}
-
-static int _sdmmc_send_cmd(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, bool is_data_present)
-{
- u16 cmdflags = 0;
-
- switch (cmd->rsp_type)
- {
- case SDMMC_RSP_TYPE_0:
- break;
- case SDMMC_RSP_TYPE_1:
- case SDMMC_RSP_TYPE_4:
- case SDMMC_RSP_TYPE_5:
- if (cmd->check_busy)
- cmdflags = SDHCI_CMD_RESP_LEN48_BUSY | SDHCI_CMD_INDEX | SDHCI_CMD_CRC;
- else
- cmdflags = SDHCI_CMD_RESP_LEN48 | SDHCI_CMD_INDEX | SDHCI_CMD_CRC;
- break;
- case SDMMC_RSP_TYPE_2:
- cmdflags = SDHCI_CMD_RESP_LEN136 | SDHCI_CMD_CRC;
- break;
- case SDMMC_RSP_TYPE_3:
- cmdflags = SDHCI_CMD_RESP_LEN48;
- break;
- default:
- return 0;
- break;
- }
-
- if (is_data_present)
- cmdflags |= SDHCI_CMD_DATA;
- sdmmc->regs->argument = cmd->arg;
- sdmmc->regs->cmdreg = (cmd->cmd << 8) | cmdflags;
-
- return 1;
-}
-
-static void _sdmmc_send_tuning_cmd(sdmmc_t *sdmmc, u32 cmd)
-{
- sdmmc_cmd_t cmdbuf;
- cmdbuf.cmd = cmd;
- cmdbuf.arg = 0;
- cmdbuf.rsp_type = SDMMC_RSP_TYPE_1;
- cmdbuf.check_busy = 0;
- _sdmmc_send_cmd(sdmmc, &cmdbuf, true);
-}
-
-static int _sdmmc_tuning_execute_once(sdmmc_t *sdmmc, u32 cmd)
-{
- if (sdmmc->auto_cal_enabled)
- return 0;
- if (!_sdmmc_wait_cmd_data_inhibit(sdmmc, true))
- return 0;
-
- _sdmmc_setup_read_small_block(sdmmc);
-
- sdmmc->regs->norintstsen |= SDHCI_INT_DATA_AVAIL;
- sdmmc->regs->norintsts = sdmmc->regs->norintsts;
- sdmmc->regs->clkcon &= ~SDHCI_CLOCK_CARD_EN;
-
- _sdmmc_send_tuning_cmd(sdmmc, cmd);
- _sdmmc_get_clkcon(sdmmc);
- usleep(1);
-
- _sdmmc_reset(sdmmc);
-
- sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
- _sdmmc_get_clkcon(sdmmc);
-
- u32 timeout = get_tmr_us() + 5000;
- while (get_tmr_us() < timeout)
- {
- if (sdmmc->regs->norintsts & SDHCI_INT_DATA_AVAIL)
- {
- sdmmc->regs->norintsts = SDHCI_INT_DATA_AVAIL;
- sdmmc->regs->norintstsen &= ~SDHCI_INT_DATA_AVAIL;
- _sdmmc_get_clkcon(sdmmc);
- usleep((1000 * 8 + sdmmc->divisor - 1) / sdmmc->divisor);
- return 1;
- }
- }
-
- _sdmmc_reset(sdmmc);
-
- sdmmc->regs->norintstsen &= ~SDHCI_INT_DATA_AVAIL;
- _sdmmc_get_clkcon(sdmmc);
- usleep((1000 * 8 + sdmmc->divisor - 1) / sdmmc->divisor);
-
- return 0;
-}
-
-int sdmmc_tuning_execute(sdmmc_t *sdmmc, u32 type, u32 cmd)
-{
- u32 max = 0, flag = 0;
-
- switch (type)
- {
- case SDHCI_TIMING_MMC_HS200:
- case SDHCI_TIMING_MMC_HS400:
- case SDHCI_TIMING_UHS_SDR104:
- case SDHCI_TIMING_UHS_SDR82:
- max = 128;
- flag = (2 << 13); // 128 iterations.
- break;
- case SDHCI_TIMING_UHS_SDR50:
- case SDHCI_TIMING_UHS_DDR50:
- case SDHCI_TIMING_MMC_DDR52:
- max = 256;
- flag = (4 << 13); // 256 iterations.
- break;
- case SDHCI_TIMING_UHS_SDR12:
- case SDHCI_TIMING_UHS_SDR25:
- return 1;
- default:
- return 0;
- }
-
- sdmmc->regs->ventunctl1 = 0; // step_size 1.
-
- sdmmc->regs->ventunctl0 = (sdmmc->regs->ventunctl0 & 0xFFFF1FFF) | flag; // Tries.
- sdmmc->regs->ventunctl0 = (sdmmc->regs->ventunctl0 & 0xFFFFE03F) | (1 << 6); // 1x Multiplier.
- sdmmc->regs->ventunctl0 |= TEGRA_MMC_VNDR_TUN_CTRL0_TAP_VAL_UPDATED_BY_HW;
- sdmmc->regs->hostctl2 |= SDHCI_CTRL_EXEC_TUNING;
-
- for (u32 i = 0; i < max; i++)
- {
- _sdmmc_tuning_execute_once(sdmmc, cmd);
- if (!(sdmmc->regs->hostctl2 & SDHCI_CTRL_EXEC_TUNING))
- break;
- }
-
- if (sdmmc->regs->hostctl2 & SDHCI_CTRL_TUNED_CLK)
- return 1;
-
- return 0;
-}
-
-static int _sdmmc_enable_internal_clock(sdmmc_t *sdmmc)
-{
- //Enable internal clock and wait till it is stable.
- sdmmc->regs->clkcon |= SDHCI_CLOCK_INT_EN;
- _sdmmc_get_clkcon(sdmmc);
- u32 timeout = get_tmr_ms() + 2000;
- while (!(sdmmc->regs->clkcon & SDHCI_CLOCK_INT_STABLE))
- {
- if (get_tmr_ms() > timeout)
- return 0;
- }
-
- sdmmc->regs->hostctl2 &= ~SDHCI_CTRL_PRESET_VAL_EN;
- sdmmc->regs->clkcon &= ~SDHCI_PROG_CLOCK_MODE;
- sdmmc->regs->hostctl2 |= SDHCI_HOST_VERSION_4_EN;
-
- if (!(sdmmc->regs->capareg & SDHCI_CAN_64BIT))
- return 0;
-
- sdmmc->regs->hostctl2 |= SDHCI_ADDRESSING_64BIT_EN;
- sdmmc->regs->hostctl &= ~SDHCI_CTRL_DMA_MASK;
- sdmmc->regs->timeoutcon = (sdmmc->regs->timeoutcon & 0xF0) | 0xE;
-
- return 1;
-}
-
-static int _sdmmc_autocal_config_offset(sdmmc_t *sdmmc, u32 power)
-{
- u32 off_pd = 0;
- u32 off_pu = 0;
-
- switch (sdmmc->id)
- {
- case SDMMC_2:
- case SDMMC_4:
- if (power != SDMMC_POWER_1_8)
- return 0;
- off_pd = 5;
- off_pu = 5;
- break;
- case SDMMC_1:
- case SDMMC_3:
- if (power == SDMMC_POWER_1_8)
- {
- off_pd = 123;
- off_pu = 123;
- }
- else if (power == SDMMC_POWER_3_3)
- {
- off_pd = 125;
- off_pu = 0;
- }
- else
- return 0;
- break;
- }
-
- sdmmc->regs->autocalcfg = (sdmmc->regs->autocalcfg & 0xFFFF8080) | (off_pd << 8) | off_pu;
- return 1;
-}
-
-static void _sdmmc_enable_interrupts(sdmmc_t *sdmmc)
-{
- sdmmc->regs->norintstsen |= SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
- sdmmc->regs->errintstsen |= SDHCI_ERR_INT_ALL_EXCEPT_ADMA_BUSPWR;
- sdmmc->regs->norintsts = sdmmc->regs->norintsts;
- sdmmc->regs->errintsts = sdmmc->regs->errintsts;
-}
-
-static void _sdmmc_mask_interrupts(sdmmc_t *sdmmc)
-{
- sdmmc->regs->errintstsen &= ~SDHCI_ERR_INT_ALL_EXCEPT_ADMA_BUSPWR;
- sdmmc->regs->norintstsen &= ~(SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE);
-}
-
-static int _sdmmc_check_mask_interrupt(sdmmc_t *sdmmc, u16 *pout, u16 mask)
-{
- u16 norintsts = sdmmc->regs->norintsts;
- u16 errintsts = sdmmc->regs->errintsts;
-
-DPRINTF("norintsts %08X; errintsts %08X\n", norintsts, errintsts);
-
- if (pout)
- *pout = norintsts;
-
- // Check for error interrupt.
- if (norintsts & SDHCI_INT_ERROR)
- {
- sdmmc->regs->errintsts = errintsts;
- return SDMMC_MASKINT_ERROR;
- }
- else if (norintsts & mask)
- {
- sdmmc->regs->norintsts = norintsts & mask;
- return SDMMC_MASKINT_MASKED;
- }
-
- return SDMMC_MASKINT_NOERROR;
-}
-
-static int _sdmmc_wait_response(sdmmc_t *sdmmc)
-{
- _sdmmc_get_clkcon(sdmmc);
-
- u32 timeout = get_tmr_ms() + 2000;
- while (true)
- {
- int result = _sdmmc_check_mask_interrupt(sdmmc, NULL, SDHCI_INT_RESPONSE);
- if (result == SDMMC_MASKINT_MASKED)
- break;
- if (result != SDMMC_MASKINT_NOERROR || get_tmr_ms() > timeout)
- {
- _sdmmc_reset(sdmmc);
- return 0;
- }
- }
-
- return 1;
-}
-
-static int _sdmmc_stop_transmission_inner(sdmmc_t *sdmmc, u32 *rsp)
-{
- sdmmc_cmd_t cmd;
-
- if (!_sdmmc_wait_cmd_data_inhibit(sdmmc, false))
- return 0;
-
- _sdmmc_enable_interrupts(sdmmc);
-
- cmd.cmd = MMC_STOP_TRANSMISSION;
- cmd.arg = 0;
- cmd.rsp_type = SDMMC_RSP_TYPE_1;
- cmd.check_busy = 1;
-
- _sdmmc_send_cmd(sdmmc, &cmd, false);
-
- int result = _sdmmc_wait_response(sdmmc);
- _sdmmc_mask_interrupts(sdmmc);
-
- if (!result)
- return 0;
-
- _sdmmc_cache_rsp(sdmmc, rsp, 4, SDMMC_RSP_TYPE_1);
-
- return _sdmmc_wait_card_busy(sdmmc);
-}
-
-int sdmmc_stop_transmission(sdmmc_t *sdmmc, u32 *rsp)
-{
- if (!sdmmc->card_clock_enabled)
- return 0;
-
- // Recalibrate periodically for SDMMC1.
- if ((sdmmc->id == SDMMC_1) && sdmmc->auto_cal_enabled)
- _sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc));
-
- bool should_disable_sd_clock = false;
- if (!(sdmmc->regs->clkcon & SDHCI_CLOCK_CARD_EN))
- {
- should_disable_sd_clock = true;
- sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
- _sdmmc_get_clkcon(sdmmc);
- usleep((8000 + sdmmc->divisor - 1) / sdmmc->divisor);
- }
-
- int result = _sdmmc_stop_transmission_inner(sdmmc, rsp);
- usleep((8000 + sdmmc->divisor - 1) / sdmmc->divisor);
-
- if (should_disable_sd_clock)
- sdmmc->regs->clkcon &= ~SDHCI_CLOCK_CARD_EN;
-
- return result;
-}
-
-static int _sdmmc_config_dma(sdmmc_t *sdmmc, u32 *blkcnt_out, sdmmc_req_t *req)
-{
- if (!req->blksize || !req->num_sectors)
- return 0;
-
- u32 blkcnt = req->num_sectors;
- if (blkcnt >= 0xFFFF)
- blkcnt = 0xFFFF;
- u32 admaaddr = (u32)req->buf;
-
- // Check alignment.
- if (admaaddr & 7)
- return 0;
-
- sdmmc->regs->admaaddr = admaaddr;
- sdmmc->regs->admaaddr_hi = 0;
-
- sdmmc->dma_addr_next = (admaaddr + 0x80000) & 0xFFF80000;
-
- sdmmc->regs->blksize = req->blksize | 0x7000; // DMA 512KB (Detects A18 carry out).
- sdmmc->regs->blkcnt = blkcnt;
-
- if (blkcnt_out)
- *blkcnt_out = blkcnt;
-
- u32 trnmode = SDHCI_TRNS_DMA;
- if (req->is_multi_block)
- trnmode = SDHCI_TRNS_MULTI | SDHCI_TRNS_BLK_CNT_EN | SDHCI_TRNS_DMA;
- if (!req->is_write)
- trnmode |= SDHCI_TRNS_READ;
- if (req->is_auto_cmd12)
- trnmode = (trnmode & ~(SDHCI_TRNS_AUTO_CMD12 | SDHCI_TRNS_AUTO_CMD23)) | SDHCI_TRNS_AUTO_CMD12;
-
- sdmmc->regs->trnmod = trnmode;
-
- return 1;
-}
-
-static int _sdmmc_update_dma(sdmmc_t *sdmmc)
-{
- u16 blkcnt = 0;
- do
- {
- blkcnt = sdmmc->regs->blkcnt;
- u32 timeout = get_tmr_ms() + 1500;
- do
- {
- int result = 0;
- while (true)
- {
- u16 intr = 0;
- result = _sdmmc_check_mask_interrupt(sdmmc, &intr,
- SDHCI_INT_DATA_END | SDHCI_INT_DMA_END);
- if (result < 0)
- break;
-
- if (intr & SDHCI_INT_DATA_END)
- return 1; // Transfer complete.
-
- if (intr & SDHCI_INT_DMA_END)
- {
- // Update DMA.
- sdmmc->regs->admaaddr = sdmmc->dma_addr_next;
- sdmmc->regs->admaaddr_hi = 0;
- sdmmc->dma_addr_next += 0x80000;
- }
- }
- if (result != SDMMC_MASKINT_NOERROR)
- {
-#ifdef ERROR_EXTRA_PRINTING
- EPRINTFARGS("%08X!", result);
-#endif
- _sdmmc_reset(sdmmc);
- return 0;
- }
- } while (get_tmr_ms() < timeout);
- } while (sdmmc->regs->blkcnt != blkcnt);
-
- _sdmmc_reset(sdmmc);
- return 0;
-}
-
-static int _sdmmc_execute_cmd_inner(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_t *req, u32 *blkcnt_out)
-{
- int has_req_or_check_busy = req || cmd->check_busy;
- if (!_sdmmc_wait_cmd_data_inhibit(sdmmc, has_req_or_check_busy))
- return 0;
-
- u32 blkcnt = 0;
- bool is_data_present = false;
- if (req)
- {
- if (!_sdmmc_config_dma(sdmmc, &blkcnt, req))
- {
-#ifdef ERROR_EXTRA_PRINTING
- EPRINTF("SDMMC: DMA Wrong cfg!");
-#endif
- return 0;
- }
-
- // Flush cache before starting the transfer.
- bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false);
-
- is_data_present = true;
- }
- else
- is_data_present = false;
-
- _sdmmc_enable_interrupts(sdmmc);
-
- if (!_sdmmc_send_cmd(sdmmc, cmd, is_data_present))
- {
-#ifdef ERROR_EXTRA_PRINTING
- EPRINTFARGS("SDMMC: Wrong Response type %08X!", cmd->rsp_type);
-#endif
- return 0;
- }
-
- int result = _sdmmc_wait_response(sdmmc);
- if (!result)
- {
-#ifdef ERROR_EXTRA_PRINTING
- EPRINTF("SDMMC: Transfer timeout!");
-#endif
- }
- DPRINTF("rsp(%d): %08X, %08X, %08X, %08X\n", result,
- sdmmc->regs->rspreg0, sdmmc->regs->rspreg1, sdmmc->regs->rspreg2, sdmmc->regs->rspreg3);
- if (result)
- {
- if (cmd->rsp_type)
- {
- sdmmc->expected_rsp_type = cmd->rsp_type;
- result = _sdmmc_cache_rsp(sdmmc, sdmmc->rsp, 0x10, cmd->rsp_type);
- if (!result)
- {
-#ifdef ERROR_EXTRA_PRINTING
- EPRINTFARGS("SDMMC: Unknown response %08X!", sdmmc->rsp[0]);
-#endif
- }
- }
- if (req && result)
- {
- result = _sdmmc_update_dma(sdmmc);
- if (!result)
- {
-#ifdef ERROR_EXTRA_PRINTING
- EPRINTF("SDMMC: DMA Update failed!");
-#endif
- }
- }
- }
-
- _sdmmc_mask_interrupts(sdmmc);
-
- if (result)
- {
- if (req)
- {
- // Flush cache after transfer.
- bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false);
-
- if (blkcnt_out)
- *blkcnt_out = blkcnt;
-
- if (req->is_auto_cmd12)
- sdmmc->rsp3 = sdmmc->regs->rspreg3;
- }
-
- if (cmd->check_busy || req)
- {
- result = _sdmmc_wait_card_busy(sdmmc);
- if (!result)
- {
-#ifdef ERROR_EXTRA_PRINTING
- EPRINTF("SDMMC: Busy timeout!");
-#endif
- }
- return result;
- }
- }
-
- return result;
-}
-
-bool sdmmc_get_sd_inserted()
-{
- return (!gpio_read(GPIO_PORT_Z, GPIO_PIN_1));
-}
-
-static int _sdmmc_config_sdmmc1()
-{
- // Configure SD card detect.
- PINMUX_AUX(PINMUX_AUX_GPIO_PZ1) = PINMUX_INPUT_ENABLE | PINMUX_PULL_UP | 2; // GPIO control, pull up.
- APB_MISC(APB_MISC_GP_VGPIO_GPIO_MUX_SEL) = 0;
- gpio_config(GPIO_PORT_Z, GPIO_PIN_1, GPIO_MODE_GPIO);
- gpio_output_enable(GPIO_PORT_Z, GPIO_PIN_1, GPIO_OUTPUT_DISABLE);
- usleep(100);
-
- // Check if SD card is inserted.
- if(!sdmmc_get_sd_inserted())
- return 0;
-
- /*
- * Pinmux config:
- * DRV_TYPE = DRIVE_2X
- * E_SCHMT = ENABLE (for 1.8V), DISABLE (for 3.3V)
- * E_INPUT = ENABLE
- * TRISTATE = PASSTHROUGH
- * APB_MISC_GP_SDMMCx_CLK_LPBK_CONTROL = SDMMCx_CLK_PAD_E_LPBK for CLK
- */
-
- // Configure SDMMC1 pinmux.
- APB_MISC(APB_MISC_GP_SDMMC1_CLK_LPBK_CONTROL) = 1; // Enable deep loopback for SDMMC1 CLK pad.
- PINMUX_AUX(PINMUX_AUX_SDMMC1_CLK) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED;
- PINMUX_AUX(PINMUX_AUX_SDMMC1_CMD) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
- PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT3) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
- PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT2) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
- PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT1) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
- PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT0) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
-
- // Make sure the SDMMC1 controller is powered.
- PMC(APBDEV_PMC_NO_IOPOWER) |= PMC_NO_IOPOWER_SDMMC1_IO_EN;
- usleep(1000);
- PMC(APBDEV_PMC_NO_IOPOWER) &= ~(PMC_NO_IOPOWER_SDMMC1_IO_EN);
-
- // Inform IO pads that voltage is gonna be 3.3V.
- PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_SDMMC1_IO_EN;
-
- // Set enable SD card power.
- PINMUX_AUX(PINMUX_AUX_DMIC3_CLK) = PINMUX_PULL_DOWN | 2; // Pull down.
- gpio_config(GPIO_PORT_E, GPIO_PIN_4, GPIO_MODE_GPIO);
- gpio_write(GPIO_PORT_E, GPIO_PIN_4, GPIO_HIGH);
- gpio_output_enable(GPIO_PORT_E, GPIO_PIN_4, GPIO_OUTPUT_ENABLE);
- usleep(1000);
-
- // Enable SD card power.
- max77620_regulator_set_voltage(REGULATOR_LDO2, 3300000);
- max77620_regulator_enable(REGULATOR_LDO2, 1);
- usleep(1000);
-
- // Set pad slew codes to get good quality clock.
- APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) = (APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) & 0xFFFFFFF) | 0x50000000;
- usleep(1000);
-
- return 1;
-}
-
-static void _sdmmc_config_emmc(u32 id)
-{
- switch (id)
- {
- case SDMMC_2:
- // Unset park for pads.
- APB_MISC(APB_MISC_GP_EMMC2_PAD_CFGPADCTRL) &= 0xF8003FFF;
- break;
- case SDMMC_4:
- // Unset park for pads.
- APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) &= 0xF8003FFF;
- // Set default pad cfg.
- APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) = (APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) & 0xFFFFC003) | 0x1040;
-
- // Enabled schmitt trigger.
- APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) |= 1; // Enable Schmitt trigger.
- break;
- }
-}
-
-int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int auto_cal_enable)
-{
- const u32 trim_values[] = { 2, 8, 3, 8 };
-
- if (id > SDMMC_4)
- return 0;
-
- memset(sdmmc, 0, sizeof(sdmmc_t));
-
- sdmmc->regs = (t210_sdmmc_t *)_sdmmc_bases[id];
- sdmmc->id = id;
- sdmmc->clock_stopped = 1;
-
- // Do specific SDMMC HW configuration.
- switch (id)
- {
- case SDMMC_1:
- if (!_sdmmc_config_sdmmc1())
- return 0;
- break;
- case SDMMC_2:
- case SDMMC_4:
- _sdmmc_config_emmc(id);
- break;
- }
-
- if (clock_sdmmc_is_not_reset_and_enabled(id))
- {
- _sdmmc_sd_clock_disable(sdmmc);
- _sdmmc_get_clkcon(sdmmc);
- }
-
- u32 clock;
- u16 divisor;
- clock_sdmmc_get_card_clock_div(&clock, &divisor, type);
- clock_sdmmc_enable(id, clock);
-
- sdmmc->clock_stopped = 0;
-
- //TODO: make this skip-able.
- sdmmc->regs->iospare |= 0x80000; // Enable muxing.
- sdmmc->regs->veniotrimctl &= 0xFFFFFFFB; // Set Band Gap VREG to supply DLL.
- sdmmc->regs->venclkctl = (sdmmc->regs->venclkctl & 0xE0FFFFFB) | (trim_values[sdmmc->id] << 24);
- sdmmc->regs->sdmemcmppadctl =
- (sdmmc->regs->sdmemcmppadctl & TEGRA_MMC_SDMEMCOMPPADCTRL_COMP_VREF_SEL_MASK) | 7;
-
- if (!_sdmmc_autocal_config_offset(sdmmc, power))
- return 0;
-
- _sdmmc_autocal_execute(sdmmc, power);
-
- if (_sdmmc_enable_internal_clock(sdmmc))
- {
- sdmmc_set_bus_width(sdmmc, bus_width);
- _sdmmc_set_io_power(sdmmc, power);
-
- if (sdmmc_setup_clock(sdmmc, type))
- {
- sdmmc_card_clock_ctrl(sdmmc, auto_cal_enable);
- _sdmmc_card_clock_enable(sdmmc);
- _sdmmc_get_clkcon(sdmmc);
-
- return 1;
- }
-
- return 0;
- }
- return 0;
-}
-
-void sdmmc_end(sdmmc_t *sdmmc)
-{
- if (!sdmmc->clock_stopped)
- {
- _sdmmc_sd_clock_disable(sdmmc);
- // Disable SDMMC power.
- _sdmmc_set_io_power(sdmmc, SDMMC_POWER_OFF);
-
- // Disable SD card power.
- if (sdmmc->id == SDMMC_1)
- {
- gpio_output_enable(GPIO_PORT_E, GPIO_PIN_4, GPIO_OUTPUT_DISABLE);
- max77620_regulator_enable(REGULATOR_LDO2, 0);
-
- // Inform IO pads that next voltage might be 3.3V.
- PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_SDMMC1_IO_EN;
-
- sd_power_cycle_time_start = get_tmr_ms(); // Some SanDisk U1 cards need 100ms for a power cycle.
- usleep(1000); // To power cycle, min 1ms without power is needed.
- }
-
- _sdmmc_get_clkcon(sdmmc);
- clock_sdmmc_disable(sdmmc->id);
- sdmmc->clock_stopped = 1;
- }
-}
-
-void sdmmc_init_cmd(sdmmc_cmd_t *cmdbuf, u16 cmd, u32 arg, u32 rsp_type, u32 check_busy)
-{
- cmdbuf->cmd = cmd;
- cmdbuf->arg = arg;
- cmdbuf->rsp_type = rsp_type;
- cmdbuf->check_busy = check_busy;
-}
-
-int sdmmc_execute_cmd(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_t *req, u32 *blkcnt_out)
-{
- if (!sdmmc->card_clock_enabled)
- return 0;
-
- // Recalibrate periodically for SDMMC1.
- if (sdmmc->id == SDMMC_1 && sdmmc->auto_cal_enabled)
- _sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc));
-
- int should_disable_sd_clock = 0;
- if (!(sdmmc->regs->clkcon & SDHCI_CLOCK_CARD_EN))
- {
- should_disable_sd_clock = 1;
- sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
- _sdmmc_get_clkcon(sdmmc);
- usleep((8000 + sdmmc->divisor - 1) / sdmmc->divisor);
- }
-
- int result = _sdmmc_execute_cmd_inner(sdmmc, cmd, req, blkcnt_out);
- usleep((8000 + sdmmc->divisor - 1) / sdmmc->divisor);
-
- if (should_disable_sd_clock)
- sdmmc->regs->clkcon &= ~SDHCI_CLOCK_CARD_EN;
-
- return result;
-}
-
-int sdmmc_enable_low_voltage(sdmmc_t *sdmmc)
-{
- if(sdmmc->id != SDMMC_1)
- return 0;
-
- if (!sdmmc_setup_clock(sdmmc, SDHCI_TIMING_UHS_SDR12))
- return 0;
-
- _sdmmc_get_clkcon(sdmmc);
-
- // Switch to 1.8V and wait for regulator to stabilize. Assume max possible wait needed.
- max77620_regulator_set_voltage(REGULATOR_LDO2, 1800000);
- usleep(300);
-
- // Inform IO pads that we switched to 1.8V.
- PMC(APBDEV_PMC_PWR_DET_VAL) &= ~(PMC_PWR_DET_SDMMC1_IO_EN);
-
- // Enable schmitt trigger for better duty cycle and low jitter clock.
- PINMUX_AUX(PINMUX_AUX_SDMMC1_CLK) |= PINMUX_SCHMT;
- PINMUX_AUX(PINMUX_AUX_SDMMC1_CMD) |= PINMUX_SCHMT;
- PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT3) |= PINMUX_SCHMT;
- PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT2) |= PINMUX_SCHMT;
- PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT1) |= PINMUX_SCHMT;
- PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT0) |= PINMUX_SCHMT;
-
- _sdmmc_autocal_config_offset(sdmmc, SDMMC_POWER_1_8);
- _sdmmc_autocal_execute(sdmmc, SDMMC_POWER_1_8);
- _sdmmc_set_io_power(sdmmc, SDMMC_POWER_1_8);
- _sdmmc_get_clkcon(sdmmc);
- msleep(5); // Wait minimum 5ms before turning on the card clock.
-
- // Turn on SDCLK.
- if (sdmmc->regs->hostctl2 & SDHCI_CTRL_VDD_180)
- {
- sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
- _sdmmc_get_clkcon(sdmmc);
- usleep(1000);
- if ((sdmmc->regs->prnsts & 0xF00000) == 0xF00000)
- return 1;
- }
-
- return 0;
-}
diff --git a/nyx/nyx_gui/storage/sdmmc_driver.h b/nyx/nyx_gui/storage/sdmmc_driver.h
deleted file mode 100644
index 736faa8..0000000
--- a/nyx/nyx_gui/storage/sdmmc_driver.h
+++ /dev/null
@@ -1,262 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _SDMMC_DRIVER_H_
-#define _SDMMC_DRIVER_H_
-
-#include "../utils/types.h"
-#include "sdmmc_t210.h"
-
-/*! SDMMC controller IDs. */
-#define SDMMC_1 0
-#define SDMMC_2 1
-#define SDMMC_3 2
-#define SDMMC_4 3
-
-/*! SDMMC power types. */
-#define SDMMC_POWER_OFF 0
-#define SDMMC_POWER_1_8 1
-#define SDMMC_POWER_3_3 2
-
-/*! SDMMC bus widths. */
-#define SDMMC_BUS_WIDTH_1 0
-#define SDMMC_BUS_WIDTH_4 1
-#define SDMMC_BUS_WIDTH_8 2
-
-/*! SDMMC response types. */
-#define SDMMC_RSP_TYPE_0 0
-#define SDMMC_RSP_TYPE_1 1
-#define SDMMC_RSP_TYPE_2 2
-#define SDMMC_RSP_TYPE_3 3
-#define SDMMC_RSP_TYPE_4 4
-#define SDMMC_RSP_TYPE_5 5
-
-/*! SDMMC mask interrupt status. */
-#define SDMMC_MASKINT_MASKED 0
-#define SDMMC_MASKINT_NOERROR -1
-#define SDMMC_MASKINT_ERROR -2
-
-/*! SDMMC present state. */
-#define SDHCI_CMD_INHIBIT 0x1
-#define SDHCI_DATA_INHIBIT 0x2
-#define SDHCI_DOING_WRITE 0x100
-#define SDHCI_DOING_READ 0x200
-#define SDHCI_SPACE_AVAILABLE 0x400
-#define SDHCI_DATA_AVAILABLE 0x800
-#define SDHCI_CARD_PRESENT 0x10000
-#define SDHCI_CD_STABLE 0x20000
-#define SDHCI_CD_LVL 0x40000
-#define SDHCI_WRITE_PROTECT 0x80000
-#define SDHCI_DATA_LVL_MASK 0xF00000
-#define SDHCI_DATA_0_LVL_MASK 0x100000
-#define SDHCI_CMD_LVL 0x1000000
-
-/*! SDMMC transfer mode. */
-#define SDHCI_TRNS_DMA 0x01
-#define SDHCI_TRNS_BLK_CNT_EN 0x02
-#define SDHCI_TRNS_AUTO_CMD12 0x04
-#define SDHCI_TRNS_AUTO_CMD23 0x08
-#define SDHCI_TRNS_AUTO_SEL 0x0C
-#define SDHCI_TRNS_WRITE 0x00
-#define SDHCI_TRNS_READ 0x10
-#define SDHCI_TRNS_MULTI 0x20
-
-/*! SDMMC command. */
-#define SDHCI_CMD_RESP_MASK 0x3
-#define SDHCI_CMD_RESP_NO_RESP 0x0
-#define SDHCI_CMD_RESP_LEN136 0x1
-#define SDHCI_CMD_RESP_LEN48 0x2
-#define SDHCI_CMD_RESP_LEN48_BUSY 0x3
-#define SDHCI_CMD_CRC 0x08
-#define SDHCI_CMD_INDEX 0x10
-#define SDHCI_CMD_DATA 0x20
-#define SDHCI_CMD_ABORTCMD 0xC0
-
-/*! SDMMC host control. */
-#define SDHCI_CTRL_LED 0x01
-#define SDHCI_CTRL_4BITBUS 0x02
-#define SDHCI_CTRL_HISPD 0x04
-#define SDHCI_CTRL_DMA_MASK 0x18
-#define SDHCI_CTRL_SDMA 0x00
-#define SDHCI_CTRL_ADMA1 0x08
-#define SDHCI_CTRL_ADMA32 0x10
-#define SDHCI_CTRL_ADMA64 0x18
-#define SDHCI_CTRL_8BITBUS 0x20
-#define SDHCI_CTRL_CDTEST_INS 0x40
-#define SDHCI_CTRL_CDTEST_EN 0x80
-
-/*! SDMMC host control 2. */
-#define SDHCI_CTRL_UHS_MASK 0xFFF8
-#define SDHCI_CTRL_VDD_180 8
-#define SDHCI_CTRL_DRV_TYPE_B 0x00
-#define SDHCI_CTRL_DRV_TYPE_A 0x10
-#define SDHCI_CTRL_DRV_TYPE_C 0x20
-#define SDHCI_CTRL_DRV_TYPE_D 0x30
-#define SDHCI_CTRL_EXEC_TUNING 0x40
-#define SDHCI_CTRL_TUNED_CLK 0x80
-#define SDHCI_HOST_VERSION_4_EN 0x1000
-#define SDHCI_ADDRESSING_64BIT_EN 0x2000
-#define SDHCI_CTRL_PRESET_VAL_EN 0x8000
-
-/*! SDMMC power control. */
-#define SDHCI_POWER_ON 0x01
-#define SDHCI_POWER_180 0x0A
-#define SDHCI_POWER_300 0x0C
-#define SDHCI_POWER_330 0x0E
-#define SDHCI_POWER_MASK 0xF1
-
-// /*! SDMMC max current. */
-// #define SDHCI_MAX_CURRENT_330_MASK 0xFF
-// #define SDHCI_MAX_CURRENT_180_MASK 0xFF0000
-// #define SDHCI_MAX_CURRENT_MULTIPLIER 4
-
-/*! SDMMC clock control. */
-#define SDHCI_DIVIDER_SHIFT 8
-#define SDHCI_DIVIDER_HI_SHIFT 6
-#define SDHCI_DIV_MASK 0xFF00
-#define SDHCI_DIV_HI_MASK 0xC0
-#define SDHCI_PROG_CLOCK_MODE 0x20
-#define SDHCI_CLOCK_CARD_EN 0x4
-#define SDHCI_CLOCK_INT_STABLE 0x2
-#define SDHCI_CLOCK_INT_EN 0x1
-
-/*! SDMMC software reset. */
-#define SDHCI_RESET_ALL 0x01
-#define SDHCI_RESET_CMD 0x02
-#define SDHCI_RESET_DATA 0x04
-
-/*! SDMMC interrupt status and control. */
-#define SDHCI_INT_RESPONSE 0x1
-#define SDHCI_INT_DATA_END 0x2
-#define SDHCI_INT_BLK_GAP 0x4
-#define SDHCI_INT_DMA_END 0x8
-#define SDHCI_INT_SPACE_AVAIL 0x10
-#define SDHCI_INT_DATA_AVAIL 0x20
-#define SDHCI_INT_CARD_INSERT 0x40
-#define SDHCI_INT_CARD_REMOVE 0x80
-#define SDHCI_INT_CARD_INT 0x100
-#define SDHCI_INT_RETUNE 0x1000
-#define SDHCI_INT_CQE 0x4000
-#define SDHCI_INT_ERROR 0x8000
-
-/*! SDMMC error interrupt status and control. */
-#define SDHCI_ERR_INT_TIMEOUT 0x1
-#define SDHCI_ERR_INT_CRC 0x2
-#define SDHCI_ERR_INT_END_BIT 0x4
-#define SDHCI_ERR_INT_INDEX 0x8
-#define SDHCI_ERR_INT_DATA_TIMEOUT 0x10
-#define SDHCI_ERR_INT_DATA_CRC 0x20
-#define SDHCI_ERR_INT_DATA_END_BIT 0x40
-#define SDHCI_ERR_INT_BUS_POWER 0x80
-#define SDHCI_ERR_INT_AUTO_CMD_ERR 0x100
-#define SDHCI_ERR_INT_ADMA_ERROR 0x200
-
-#define SDHCI_ERR_INT_ALL_EXCEPT_ADMA_BUSPWR \
- (SDHCI_ERR_INT_AUTO_CMD_ERR | SDHCI_ERR_INT_DATA_END_BIT | \
- SDHCI_ERR_INT_DATA_CRC | SDHCI_ERR_INT_DATA_TIMEOUT | \
- SDHCI_ERR_INT_INDEX | SDHCI_ERR_INT_END_BIT | \
- SDHCI_ERR_INT_CRC | SDHCI_ERR_INT_TIMEOUT)
-
-/*! SD bus speeds. */
-#define UHS_SDR12_BUS_SPEED 0
-#define HIGH_SPEED_BUS_SPEED 1
-#define UHS_SDR25_BUS_SPEED 1
-#define UHS_SDR50_BUS_SPEED 2
-#define UHS_SDR104_BUS_SPEED 3
-#define UHS_DDR50_BUS_SPEED 4
-#define HS400_BUS_SPEED 5
-
-/*! SDMMC timmings. */
-#define SDHCI_TIMING_MMC_ID 0
-#define SDHCI_TIMING_MMC_LS26 1
-#define SDHCI_TIMING_MMC_HS52 2
-#define SDHCI_TIMING_MMC_HS200 3
-#define SDHCI_TIMING_MMC_HS400 4
-#define SDHCI_TIMING_SD_ID 5
-#define SDHCI_TIMING_SD_DS12 6
-#define SDHCI_TIMING_SD_HS25 7
-#define SDHCI_TIMING_UHS_SDR12 8
-#define SDHCI_TIMING_UHS_SDR25 9
-#define SDHCI_TIMING_UHS_SDR50 10
-#define SDHCI_TIMING_UHS_SDR104 11
-#define SDHCI_TIMING_UHS_SDR82 12 // SDR104 with a 163.2MHz -> 81.6MHz clock.
-#define SDHCI_TIMING_UHS_DDR50 13
-#define SDHCI_TIMING_MMC_DDR52 14
-
-#define SDHCI_CAN_64BIT 0x10000000
-
-/*! SDMMC Low power features. */
-#define SDMMC_AUTO_CAL_DISABLE 0
-#define SDMMC_AUTO_CAL_ENABLE 1
-
-/*! Helper for SWITCH command argument. */
-#define SDMMC_SWITCH(mode, index, value) (((mode) << 24) | ((index) << 16) | ((value) << 8))
-
-/*! SDMMC controller context. */
-typedef struct _sdmmc_t
-{
- t210_sdmmc_t *regs;
- u32 id;
- u32 divisor;
- u32 clock_stopped;
- int auto_cal_enabled;
- int card_clock_enabled;
- int venclkctl_set;
- u32 venclkctl_tap;
- u32 expected_rsp_type;
- u32 dma_addr_next;
- u32 rsp[4];
- u32 rsp3;
-} sdmmc_t;
-
-/*! SDMMC command. */
-typedef struct _sdmmc_cmd_t
-{
- u16 cmd;
- u32 arg;
- u32 rsp_type;
- u32 check_busy;
-} sdmmc_cmd_t;
-
-/*! SDMMC request. */
-typedef struct _sdmmc_req_t
-{
- void *buf;
- u32 blksize;
- u32 num_sectors;
- int is_write;
- int is_multi_block;
- int is_auto_cmd12;
-} sdmmc_req_t;
-
-int sdmmc_get_io_power(sdmmc_t *sdmmc);
-u32 sdmmc_get_bus_width(sdmmc_t *sdmmc);
-void sdmmc_set_bus_width(sdmmc_t *sdmmc, u32 bus_width);
-void sdmmc_set_tap_value(sdmmc_t *sdmmc);
-int sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type);
-void sdmmc_card_clock_ctrl(sdmmc_t *sdmmc, int auto_cal_enable);
-int sdmmc_get_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type);
-int sdmmc_tuning_execute(sdmmc_t *sdmmc, u32 type, u32 cmd);
-int sdmmc_stop_transmission(sdmmc_t *sdmmc, u32 *rsp);
-bool sdmmc_get_sd_inserted();
-int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int auto_cal_enable);
-void sdmmc_end(sdmmc_t *sdmmc);
-void sdmmc_init_cmd(sdmmc_cmd_t *cmdbuf, u16 cmd, u32 arg, u32 rsp_type, u32 check_busy);
-int sdmmc_execute_cmd(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_t *req, u32 *blkcnt_out);
-int sdmmc_enable_low_voltage(sdmmc_t *sdmmc);
-
-#endif
diff --git a/nyx/nyx_gui/storage/sdmmc_t210.h b/nyx/nyx_gui/storage/sdmmc_t210.h
deleted file mode 100644
index eb17714..0000000
--- a/nyx/nyx_gui/storage/sdmmc_t210.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _SDMMC_T210_H_
-#define _SDMMC_T210_H_
-
-#include "../utils/types.h"
-
-#define TEGRA_MMC_VNDR_TUN_CTRL0_TAP_VAL_UPDATED_BY_HW 0x20000
-#define TEGRA_MMC_DLLCAL_CFG_EN_CALIBRATE 0x80000000
-#define TEGRA_MMC_DLLCAL_CFG_STATUS_DLL_ACTIVE 0x80000000
-#define TEGRA_MMC_SDMEMCOMPPADCTRL_PAD_E_INPUT_PWRD 0x80000000
-#define TEGRA_MMC_SDMEMCOMPPADCTRL_COMP_VREF_SEL_MASK 0xFFFFFFF0
-#define TEGRA_MMC_AUTOCALCFG_AUTO_CAL_ENABLE 0x20000000
-#define TEGRA_MMC_AUTOCALCFG_AUTO_CAL_START 0x80000000
-#define TEGRA_MMC_AUTOCALSTS_AUTO_CAL_ACTIVE 0x80000000
-
-typedef struct _t210_sdmmc_t
-{
- vu32 sysad;
- vu16 blksize;
- vu16 blkcnt;
- vu32 argument;
- vu16 trnmod;
- vu16 cmdreg;
- vu32 rspreg0;
- vu32 rspreg1;
- vu32 rspreg2;
- vu32 rspreg3;
- vu32 bdata;
- vu32 prnsts;
- vu8 hostctl;
- vu8 pwrcon;
- vu8 blkgap;
- vu8 wakcon;
- vu16 clkcon;
- vu8 timeoutcon;
- vu8 swrst;
- vu16 norintsts;
- vu16 errintsts;
- vu16 norintstsen; // Enable irq status.
- vu16 errintstsen; // Enable irq status.
- vu16 norintsigen; // Enable irq signal to LIC/GIC.
- vu16 errintsigen; // Enable irq signal to LIC/GIC.
- vu16 acmd12errsts;
- vu16 hostctl2;
- vu32 capareg;
- vu32 capareg_1;
- vu32 maxcurr;
- vu8 rsvd0[4]; // 4C-4F reserved for more max current.
- vu16 setacmd12err;
- vu16 setinterr;
- vu8 admaerr;
- vu8 rsvd1[3]; // 55-57 reserved.
- vu32 admaaddr;
- vu32 admaaddr_hi;
- vu8 rsvd2[156]; // 60-FB reserved.
- vu16 slotintsts;
- vu16 hcver;
- vu32 venclkctl;
- vu32 vensysswctl;
- vu32 venerrintsts;
- vu32 vencapover;
- vu32 venbootctl;
- vu32 venbootacktout;
- vu32 venbootdattout;
- vu32 vendebouncecnt;
- vu32 venmiscctl;
- vu32 maxcurrover;
- vu32 maxcurrover_hi;
- vu32 unk0[32]; // 0x12C
- vu32 veniotrimctl;
- vu32 vendllcalcfg;
- vu32 vendllctl0;
- vu32 vendllctl1;
- vu32 vendllcalcfgsts;
- vu32 ventunctl0;
- vu32 ventunctl1;
- vu32 ventunsts0;
- vu32 ventunsts1;
- vu32 venclkgatehystcnt;
- vu32 venpresetval0;
- vu32 venpresetval1;
- vu32 venpresetval2;
- vu32 sdmemcmppadctl;
- vu32 autocalcfg;
- vu32 autocalintval;
- vu32 autocalsts;
- vu32 iospare;
- vu32 mcciffifoctl;
- vu32 timeoutwcoal;
-} t210_sdmmc_t;
-
-#endif
diff --git a/nyx/nyx_gui/utils/aarch64_util.h b/nyx/nyx_gui/utils/aarch64_util.h
deleted file mode 100644
index a5002c0..0000000
--- a/nyx/nyx_gui/utils/aarch64_util.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2019 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _ARM64_H_
-#define _ARM64_H_
-
-#include "types.h"
-
-#define LSL0 0
-#define LSL16 16
-#define LSL32 32
-
-#define _PAGEOFF(x) ((x) & 0xFFFFF000)
-
-#define _ADRP(r, o) (0x90000000 | ((((o) >> 12) & 0x3) << 29) | ((((o) >> 12) & 0x1FFFFC) << 3) | ((r) & 0x1F))
-#define _BL(a, o) (0x94000000 | ((((o) - (a)) >> 2) & 0x3FFFFFF))
-#define _B(a, o) (0x14000000 | ((((o) - (a)) >> 2) & 0x3FFFFFF))
-#define _MOVKX(r, i, s) (0xF2800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F))
-#define _MOVZX(r, i, s) (0xD2800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F))
-#define _MOVZW(r, i, s) (0x52800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F))
-#define _NOP() 0xD503201F
-
-#endif
diff --git a/nyx/nyx_gui/utils/btn.c b/nyx/nyx_gui/utils/btn.c
deleted file mode 100644
index b6e5db3..0000000
--- a/nyx/nyx_gui/utils/btn.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "btn.h"
-#include "../soc/i2c.h"
-#include "../soc/gpio.h"
-#include "../soc/t210.h"
-#include "util.h"
-#include "../power/max77620.h"
-
-u8 btn_read()
-{
- u8 res = 0;
- if (!gpio_read(GPIO_PORT_X, GPIO_PIN_7))
- res |= BTN_VOL_DOWN;
- if (!gpio_read(GPIO_PORT_X, GPIO_PIN_6))
- res |= BTN_VOL_UP;
- if (i2c_recv_byte(4, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFSTAT) & 0x4)
- res |= BTN_POWER;
- return res;
-}
-
-u8 btn_read_vol()
-{
- u8 res = 0;
- if (!gpio_read(GPIO_PORT_X, GPIO_PIN_7))
- res |= BTN_VOL_DOWN;
- if (!gpio_read(GPIO_PORT_X, GPIO_PIN_6))
- res |= BTN_VOL_UP;
- return res;
-}
-
-u8 btn_wait()
-{
- u8 res = 0, btn = btn_read();
- bool pwr = false;
-
- //Power button down, raise a filter.
- if (btn & BTN_POWER)
- {
- pwr = true;
- btn &= ~BTN_POWER;
- }
-
- do
- {
- res = btn_read();
- //Power button up, remove filter.
- if (!(res & BTN_POWER) && pwr)
- pwr = false;
- else if (pwr) //Power button still down.
- res &= ~BTN_POWER;
- } while (btn == res);
-
- return res;
-}
-
-u8 btn_wait_timeout(u32 time_ms, u8 mask)
-{
- u32 timeout = get_tmr_ms() + time_ms;
- u8 res = btn_read() & mask;
-
- while (get_tmr_ms() < timeout)
- {
- if (res == mask)
- break;
- else
- res = btn_read() & mask;
- };
-
- return res;
-}
-
-u8 btn_wait_timeout_single(u32 time_ms, u8 mask)
-{
- u8 single_button = mask & BTN_SINGLE;
- mask &= ~BTN_SINGLE;
-
- u32 timeout = get_tmr_ms() + time_ms;
- u8 res = btn_read();
-
- while (get_tmr_ms() < timeout)
- {
- if ((res & mask) == mask)
- {
- if (single_button && (res & ~mask)) // Undesired button detected.
- res = btn_read();
- else
- return (res & mask);
- }
- else
- res = btn_read();
- };
-
- // Timed out.
- if (!single_button || !time_ms)
- return (res & mask);
- else
- return 0; // Return no button press if single button requested.
-}
diff --git a/nyx/nyx_gui/utils/btn.h b/nyx/nyx_gui/utils/btn.h
deleted file mode 100644
index 1c42cc2..0000000
--- a/nyx/nyx_gui/utils/btn.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _BTN_H_
-#define _BTN_H_
-
-#include "types.h"
-
-#define BTN_POWER (1 << 0)
-#define BTN_VOL_DOWN (1 << 1)
-#define BTN_VOL_UP (1 << 2)
-#define BTN_SINGLE (1 << 7)
-
-u8 btn_read();
-u8 btn_read_vol();
-u8 btn_wait();
-u8 btn_wait_timeout(u32 time_ms, u8 mask);
-u8 btn_wait_timeout_single(u32 time_ms, u8 mask);
-
-#endif
diff --git a/nyx/nyx_gui/utils/dirlist.c b/nyx/nyx_gui/utils/dirlist.c
deleted file mode 100644
index 7aa3770..0000000
--- a/nyx/nyx_gui/utils/dirlist.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include
-#include
-
-#include "../libs/fatfs/ff.h"
-#include "../mem/heap.h"
-#include "../utils/types.h"
-
-char *dirlist(const char *directory, const char *pattern, bool includeHiddenFiles, bool parse_dirs)
-{
- u8 max_entries = 61;
-
- int res = 0;
- u32 i = 0, j = 0, k = 0;
- DIR dir;
- FILINFO fno;
-
- char *dir_entries = (char *)calloc(max_entries, 256);
- char *temp = (char *)calloc(1, 256);
-
- if (!pattern && !f_opendir(&dir, directory))
- {
- for (;;)
- {
- res = f_readdir(&dir, &fno);
- if (res || !fno.fname[0])
- break;
-
- bool curr_parse = parse_dirs ? (fno.fattrib & AM_DIR) : !(fno.fattrib & AM_DIR);
-
- if (curr_parse)
- {
- if ((fno.fname[0] != '.') && (includeHiddenFiles || !(fno.fattrib & AM_HID)))
- {
- strcpy(dir_entries + (k * 256), fno.fname);
- k++;
- if (k > (max_entries - 1))
- break;
- }
- }
- }
- f_closedir(&dir);
- }
- else if (pattern && !f_findfirst(&dir, &fno, directory, pattern) && fno.fname[0])
- {
- do
- {
- if (!(fno.fattrib & AM_DIR) && (fno.fname[0] != '.') && (includeHiddenFiles || !(fno.fattrib & AM_HID)))
- {
- strcpy(dir_entries + (k * 256), fno.fname);
- k++;
- if (k > (max_entries - 1))
- break;
- }
- res = f_findnext(&dir, &fno);
- } while (fno.fname[0] && !res);
- f_closedir(&dir);
- }
-
- if (!k)
- {
- free(temp);
- free(dir_entries);
-
- return NULL;
- }
-
- // Reorder ini files by ASCII ordering.
- for (i = 0; i < k - 1 ; i++)
- {
- for (j = i + 1; j < k; j++)
- {
- if (strcmp(&dir_entries[i * 256], &dir_entries[j * 256]) > 0)
- {
- strcpy(temp, &dir_entries[i * 256]);
- strcpy(&dir_entries[i * 256], &dir_entries[j * 256]);
- strcpy(&dir_entries[j * 256], temp);
- }
- }
- }
-
- free(temp);
-
- return dir_entries;
-}
\ No newline at end of file
diff --git a/nyx/nyx_gui/utils/dirlist.h b/nyx/nyx_gui/utils/dirlist.h
deleted file mode 100644
index 9ad3c38..0000000
--- a/nyx/nyx_gui/utils/dirlist.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#include "../utils/types.h"
-
-char *dirlist(const char *directory, const char *pattern, bool includeHiddenFiles, bool parse_dirs);
diff --git a/nyx/nyx_gui/utils/list.h b/nyx/nyx_gui/utils/list.h
deleted file mode 100644
index 80e4498..0000000
--- a/nyx/nyx_gui/utils/list.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2020 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _LIST_H_
-#define _LIST_H_
-
-#include "types.h"
-
-/*! Initialize list. */
-#define LIST_INIT(name) link_t name = {&name, &name}
-
-/*! Initialize static list. */
-#define LIST_INIT_STATIC(name) static link_t name = {&name, &name}
-
-/*! Iterate over all list links. */
-#define LIST_FOREACH(iter, list) \
- for(link_t *iter = (list)->next; iter != (list); iter = iter->next)
-
-/*! Safely iterate over all list links. */
-#define LIST_FOREACH_SAFE(iter, list) \
- for(link_t *iter = (list)->next, *safe = iter->next; iter != (list); iter = safe, safe = iter->next)
-
-/*! Iterate over all list members and make sure that the list has at least one entry. */
-#define LIST_FOREACH_ENTRY(etype, iter, list, mn) \
- if ((list)->next != (list)) \
- for(etype *iter = CONTAINER_OF((list)->next, etype, mn); &iter->mn != (list); iter = CONTAINER_OF(iter->mn.next, etype, mn))
-
-typedef struct _link_t
-{
- struct _link_t *prev;
- struct _link_t *next;
-} link_t;
-
-static inline void link_init(link_t *l)
-{
- l->prev = NULL;
- l->next = NULL;
-}
-
-static inline int link_used(link_t *l)
-{
- if(l->next == NULL)
- return 1;
- return 0;
-}
-
-static inline void list_init(link_t *lh)
-{
- lh->prev = lh;
- lh->next = lh;
-}
-
-static inline void list_prepend(link_t *lh, link_t *l)
-{
- l->next = lh->next;
- l->prev = lh;
- lh->next->prev = l;
- lh->next = l;
-}
-
-static inline void list_append(link_t *lh, link_t *l)
-{
- l->prev = lh->prev;
- l->next = lh;
- lh->prev->next = l;
- lh->prev = l;
-}
-
-static inline void list_remove(link_t *l)
-{
- l->next->prev = l->prev;
- l->prev->next = l->next;
- link_init(l);
-}
-
-static inline int list_empty(link_t *lh)
-{
- if(lh->next == lh)
- return 1;
- return 0;
-}
-
-#endif
diff --git a/nyx/nyx_gui/utils/types.h b/nyx/nyx_gui/utils/types.h
deleted file mode 100644
index 42c45f7..0000000
--- a/nyx/nyx_gui/utils/types.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
-* Copyright (c) 2018 naehrwert
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms and conditions of the GNU General Public License,
-* version 2, as published by the Free Software Foundation.
-*
-* This program is distributed in the hope it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see .
-*/
-
-#ifndef _TYPES_H_
-#define _TYPES_H_
-
-#define NULL ((void *)0)
-
-#define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
-#define ALIGN_DOWN(x, a) (((x) - ((a) - 1)) & ~((a) - 1))
-#define MAX(a, b) ((a) > (b) ? (a) : (b))
-#define MIN(a, b) ((a) < (b) ? (a) : (b))
-
-#define OFFSET_OF(t, m) ((u32)&((t *)NULL)->m)
-#define CONTAINER_OF(mp, t, mn) ((t *)((u32)mp - OFFSET_OF(t, mn)))
-
-typedef signed char s8;
-typedef short s16;
-typedef short SHORT;
-typedef int s32;
-typedef int INT;
-typedef long LONG;
-typedef long long int s64;
-typedef unsigned char u8;
-typedef unsigned char BYTE;
-typedef unsigned short u16;
-typedef unsigned short WORD;
-typedef unsigned short WCHAR;
-typedef unsigned int u32;
-typedef unsigned int UINT;
-typedef unsigned long DWORD;
-typedef unsigned long long QWORD;
-typedef unsigned long long int u64;
-typedef volatile unsigned char vu8;
-typedef volatile unsigned short vu16;
-typedef volatile unsigned int vu32;
-
-typedef int bool;
-#define true 1
-#define false 0
-
-#define BOOT_CFG_AUTOBOOT_EN (1 << 0)
-#define BOOT_CFG_FROM_LAUNCH (1 << 1)
-#define BOOT_CFG_FROM_ID (1 << 2)
-#define BOOT_CFG_TO_EMUMMC (1 << 3)
-#define BOOT_CFG_SEPT_RUN (1 << 7)
-
-#define EXTRA_CFG_KEYS (1 << 0)
-#define EXTRA_CFG_PAYLOAD (1 << 1)
-#define EXTRA_CFG_MODULE (1 << 2)
-
-#define EXTRA_CFG_NYX_UMS (1 << 5)
-#define EXTRA_CFG_NYX_RELOAD (1 << 6)
-#define EXTRA_CFG_NYX_DUMP (1 << 7)
-
-typedef enum _nyx_ums_type
-{
- NYX_UMS_SD_CARD = 0,
- NYX_UMS_EMMC_BOOT0,
- NYX_UMS_EMMC_BOOT1,
- NYX_UMS_EMMC_GPP,
- NYX_UMS_EMUMMC_BOOT0,
- NYX_UMS_EMUMMC_BOOT1,
- NYX_UMS_EMUMMC_GPP
-} nyx_ums_type;
-
-typedef struct __attribute__((__packed__)) _boot_cfg_t
-{
- u8 boot_cfg;
- u8 autoboot;
- u8 autoboot_list;
- u8 extra_cfg;
- union
- {
- struct
- {
- char id[8]; // 7 char ASCII null teminated.
- char emummc_path[0x78]; // emuMMC/XXX, ASCII null teminated.
- };
- u8 ums; // nyx_ums_type.
- u8 xt_str[0x80];
- };
-} boot_cfg_t;
-
-typedef struct __attribute__((__packed__)) _ipl_ver_meta_t
-{
- u32 magic;
- u32 version;
- u16 rsvd0;
- u16 rsvd1;
-} ipl_ver_meta_t;
-
-typedef struct __attribute__((__packed__)) _reloc_meta_t
-{
- u32 start;
- u32 stack;
- u32 end;
- u32 ep;
-} reloc_meta_t;
-
-#endif
diff --git a/nyx/nyx_gui/utils/util.c b/nyx/nyx_gui/utils/util.c
deleted file mode 100644
index b1a7eec..0000000
--- a/nyx/nyx_gui/utils/util.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
-* Copyright (c) 2018 naehrwert
-* Copyright (c) 2018 CTCaer
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms and conditions of the GNU General Public License,
-* version 2, as published by the Free Software Foundation.
-*
-* This program is distributed in the hope it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program. If not, see .
-*/
-
-#include "util.h"
-#include "../gfx/di.h"
-#include "../mem/heap.h"
-#include "../mem/minerva.h"
-#include "../power/max77620.h"
-#include "../rtc/max77620-rtc.h"
-#include "../soc/bpmp.h"
-#include "../soc/hw_init.h"
-#include "../soc/i2c.h"
-#include "../soc/pmc.h"
-#include "../soc/t210.h"
-#include "../storage/nx_sd.h"
-
-#define USE_RTC_TIMER
-
-extern volatile nyx_storage_t *nyx_str;
-
-u32 get_tmr_s()
-{
- return RTC(APBDEV_RTC_SECONDS);
-}
-
-u32 get_tmr_ms()
-{
- // The registers must be read with the following order:
- // RTC_MILLI_SECONDS (0x10) -> RTC_SHADOW_SECONDS (0xC)
- return (RTC(APBDEV_RTC_MILLI_SECONDS) + (RTC(APBDEV_RTC_SHADOW_SECONDS) * 1000));
-}
-
-u32 get_tmr_us()
-{
- return TMR(TIMERUS_CNTR_1US); //TIMERUS_CNTR_1US
-}
-
-void msleep(u32 ms)
-{
-#ifdef USE_RTC_TIMER
- u32 start = RTC(APBDEV_RTC_MILLI_SECONDS) + (RTC(APBDEV_RTC_SHADOW_SECONDS) * 1000);
- // Casting to u32 is important!
- while (((u32)(RTC(APBDEV_RTC_MILLI_SECONDS) + (RTC(APBDEV_RTC_SHADOW_SECONDS) * 1000)) - start) <= ms)
- ;
-#else
- bpmp_msleep(ms);
-#endif
-}
-
-void usleep(u32 us)
-{
-#ifdef USE_RTC_TIMER
- u32 start = TMR(TIMERUS_CNTR_1US);
-
- // Check if timer is at upper limits and use BPMP sleep so it doesn't wake up immediately.
- if ((start + us) < start)
- bpmp_usleep(us);
- else
- while ((u32)(TMR(TIMERUS_CNTR_1US) - start) <= us) // Casting to u32 is important!
- ;
-#else
- bpmp_usleep(us);
-#endif
-}
-
-void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops)
-{
- for(u32 i = 0; i < num_ops; i++)
- base[ops[i].off] = ops[i].val;
-}
-
-u32 crc32_calc(u32 crc, const u8 *buf, u32 len)
-{
- const u8 *p, *q;
- static u32 *table = NULL;
-
- // Calculate CRC table.
- if (!table)
- {
- table = calloc(256, sizeof(u32));
- for (u32 i = 0; i < 256; i++)
- {
- u32 rem = i;
- for (u32 j = 0; j < 8; j++)
- {
- if (rem & 1)
- {
- rem >>= 1;
- rem ^= 0xedb88320;
- }
- else
- rem >>= 1;
- }
- table[i] = rem;
- }
- }
-
- crc = ~crc;
- q = buf + len;
- for (p = buf; p < q; p++)
- {
- u8 oct = *p;
- crc = (crc >> 8) ^ table[(crc & 0xff) ^ oct];
- }
-
- return ~crc;
-}
-
-void panic(u32 val)
-{
- // Set panic code.
- PMC(APBDEV_PMC_SCRATCH200) = val;
- //PMC(APBDEV_PMC_CRYPTO_OP) = PMC_CRYPTO_OP_SE_DISABLE;
- TMR(TIMER_WDT4_UNLOCK_PATTERN) = TIMER_MAGIC_PTRN;
- TMR(TIMER_TMR9_TMR_PTV) = TIMER_EN | TIMER_PER_EN;
- TMR(TIMER_WDT4_CONFIG) = TIMER_SRC(9) | TIMER_PER(1) | TIMER_PMCRESET_EN;
- TMR(TIMER_WDT4_COMMAND) = TIMER_START_CNT;
-
- while (true)
- usleep(1);
-}
-
-void reboot_normal()
-{
- sd_end();
- reconfig_hw_workaround(false, 0);
-
- panic(0x21); // Bypass fuse programming in package1.
-}
-
-void reboot_rcm()
-{
- sd_end();
- reconfig_hw_workaround(false, 0);
-
- PMC(APBDEV_PMC_SCRATCH0) = PMC_SCRATCH0_MODE_RCM;
- PMC(APBDEV_PMC_CNTRL) |= PMC_CNTRL_MAIN_RST;
-
- while (true)
- bpmp_halt();
-}
-
-void power_off()
-{
- sd_end();
- reconfig_hw_workaround(false, 0);
-
- // Stop the alarm, in case we injected and powered off too fast.
- max77620_rtc_stop_alarm();
-
- i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
-
- while (true)
- bpmp_halt();
-}
diff --git a/nyx/nyx_gui/utils/util.h b/nyx/nyx_gui/utils/util.h
deleted file mode 100644
index d918194..0000000
--- a/nyx/nyx_gui/utils/util.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018 CTCaer
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- */
-
-#ifndef _UTIL_H_
-#define _UTIL_H_
-
-#include "types.h"
-#include "../mem/minerva.h"
-
-typedef enum
-{
- NYX_CFG_UMS = (1 << 6),
- NYX_CFG_DUMP = (1 << 7),
-} nyx_cfg_t;
-
-typedef enum
-{
- ERR_LIBSYS_LP0 = (1 << 0),
- ERR_SYSOLD_NYX = (1 << 1),
- ERR_SYSOLD_MTC = (1 << 2),
- ERR_EXCEPT_ENB = (1 << 31),
-} hekate_errors_t;
-
-#define byte_swap_32(num) (((num >> 24) & 0xff) | ((num << 8) & 0xff0000) | \
- ((num >> 8 )& 0xff00) | ((num << 24) & 0xff000000))
-
-typedef struct _cfg_op_t
-{
- u32 off;
- u32 val;
-} cfg_op_t;
-
-typedef struct _nyx_info_t
-{
- u32 disp_id;
- u32 errors;
-} nyx_info_t;
-
-typedef struct _nyx_storage_t
-{
- u32 version;
- u32 cfg;
- u8 irama[0x8000];
- u8 hekate[0x30000];
- u8 rsvd[0x800000 - sizeof(nyx_info_t)];
- nyx_info_t info;
- mtc_config_t mtc_cfg;
- emc_table_t mtc_table[10];
-} nyx_storage_t;
-
-u32 get_tmr_us();
-u32 get_tmr_ms();
-u32 get_tmr_s();
-void usleep(u32 us);
-void msleep(u32 ms);
-void panic(u32 val);
-void reboot_normal();
-void reboot_rcm();
-void power_off();
-void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops);
-u32 crc32_calc(u32 crc, const u8 *buf, u32 len);
-
-#endif