From 17cdd5af0d152a8af32089532e0c57551b6a098a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 22 Feb 2023 14:48:43 +0200 Subject: [PATCH] bdk: hwdeinit: restore order of bpmp clock set Restore order of bpmp clock scale down in deinit, in order to decrease pressure on clock deinits. --- bdk/soc/hw_init.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index ae2270b..91160d0 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -376,7 +376,7 @@ void hw_init() // Initialize I2C5, mandatory for PMIC. i2c_init(I2C_5); - // Power up Joycon MCU (Sio) on Hoag as it's required for I2C1 communication. + // Enable LDO8 on HOAG as it also powers I2C1 IO pads. if (nx_hoag) { max7762x_regulator_set_voltage(REGULATOR_LDO8, 2800000); @@ -415,6 +415,9 @@ void hw_reinit_workaround(bool coreboot, u32 bl_magic) { bool tegra_t210 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210; + // Scale down BPMP clock. + bpmp_clk_rate_set(BPMP_CLK_NORMAL); + #ifdef BDK_HW_EXTRA_DEINIT // Disable temperature sensor, touchscreen, 5V regulators, Joy-Con and VIC. vic_end(); @@ -429,9 +432,8 @@ void hw_reinit_workaround(bool coreboot, u32 bl_magic) minerva_change_freq(FREQ_204); nyx_str->mtc_cfg.init_done = 0; - // Flush/disable MMU cache and scale down BPMP clock also. + // Flush/disable MMU cache. bpmp_mmu_disable(); - bpmp_clk_rate_set(BPMP_CLK_NORMAL); // Re-enable clocks to Audio Processing Engine as a workaround to hanging. if (tegra_t210)