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https://github.com/CTCaer/hekate
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sdram: Document cfg and use vendor patches
This commit is contained in:
parent
63768ccc99
commit
093f14923c
4 changed files with 1425 additions and 2283 deletions
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@ -16,6 +16,8 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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*/
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#include <string.h>
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#include "mc.h"
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#include "mc.h"
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#include "emc.h"
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#include "emc.h"
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#include "sdram_param_t210.h"
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#include "sdram_param_t210.h"
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@ -29,8 +31,6 @@
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#include "../soc/t210.h"
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#include "../soc/t210.h"
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#include "../utils/util.h"
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#include "../utils/util.h"
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#define CONFIG_SDRAM_COMPRESS_CFG
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#ifdef CONFIG_SDRAM_COMPRESS_CFG
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#ifdef CONFIG_SDRAM_COMPRESS_CFG
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#include "../libs/compr/lz.h"
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#include "../libs/compr/lz.h"
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#include "sdram_config_lz.inl"
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#include "sdram_config_lz.inl"
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@ -40,13 +40,7 @@
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static u32 _get_sdram_id()
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static u32 _get_sdram_id()
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{
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{
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u32 sdram_id = (fuse_read_odm(4) & 0x38) >> 3;
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return ((fuse_read_odm(4) & 0x38) >> 3);
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// Check if id is proper.
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if (sdram_id > 7)
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sdram_id = 0;
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return sdram_id;
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}
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}
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static bool _sdram_wait_emc_status(u32 reg_offset, u32 bit_mask, bool updated_state, s32 emc_channel)
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static bool _sdram_wait_emc_status(u32 reg_offset, u32 bit_mask, bool updated_state, s32 emc_channel)
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@ -691,18 +685,47 @@ break_nosleep:
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MC(MC_SEC_CARVEOUT_REG_CTRL) = params->mc_sec_carveout_protect_write_access;
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MC(MC_SEC_CARVEOUT_REG_CTRL) = params->mc_sec_carveout_protect_write_access;
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MC(MC_MTS_CARVEOUT_REG_CTRL) = params->mc_mts_carveout_reg_ctrl;
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MC(MC_MTS_CARVEOUT_REG_CTRL) = params->mc_mts_carveout_reg_ctrl;
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//Disable write access to a bunch of EMC registers.
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// Disable write access to a bunch of EMC registers.
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MC(MC_EMEM_CFG_ACCESS_CTRL) = 1;
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MC(MC_EMEM_CFG_ACCESS_CTRL) = 1;
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}
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}
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#ifndef CONFIG_SDRAM_COMPRESS_CFG
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static void _sdram_patch_model_params(u32 dramid, u32 *params)
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{
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for (u32 i = 0; i < sizeof(sdram_cfg_vendor_patches) / sizeof(sdram_vendor_patch_t); i++)
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if (sdram_cfg_vendor_patches[i].dramid & DRAM_ID(dramid))
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params[sdram_cfg_vendor_patches[i].addr] = sdram_cfg_vendor_patches[i].val;
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}
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#endif
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sdram_params_t *sdram_get_params()
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sdram_params_t *sdram_get_params()
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{
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{
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// Check if id is proper.
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u32 dramid = _get_sdram_id();
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if (dramid > 6)
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dramid = 0;
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#ifdef CONFIG_SDRAM_COMPRESS_CFG
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#ifdef CONFIG_SDRAM_COMPRESS_CFG
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u8 *buf = (u8 *)SDRAM_PARAMS_ADDR;
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u8 *buf = (u8 *)SDRAM_PARAMS_ADDR;
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LZ_Uncompress(_dram_cfg_lz, buf, sizeof(_dram_cfg_lz));
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LZ_Uncompress(_dram_cfg_lz, buf, sizeof(_dram_cfg_lz));
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return (sdram_params_t *)&buf[sizeof(sdram_params_t) * _get_sdram_id()];
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return (sdram_params_t *)&buf[sizeof(sdram_params_t) * dramid];
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#else
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#else
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return _dram_cfgs[_get_sdram_id()];
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sdram_params_t *buf = (sdram_params_t *)SDRAM_PARAMS_ADDR;
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memcpy(buf, &_dram_cfg_0_samsung_4gb, sizeof(sdram_params_t));
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switch (dramid)
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{
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case DRAM_4GB_SAMSUNG_K4F6E304HB_MGCH:
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case DRAM_4GB_MICRON_MT53B512M32D2NP_062_WT:
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break;
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case DRAM_4GB_HYNIX_H9HCNNNBPUMLHR_NLN:
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case DRAM_4GB_COPPER_UNK_3:
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case DRAM_6GB_SAMSUNG_K4FHE3D4HM_MFCH:
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case DRAM_4GB_COPPER_UNK_5:
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case DRAM_4GB_COPPER_UNK_6:
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_sdram_patch_model_params(dramid, (u32 *)buf);
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break;
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}
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return buf;
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#endif
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#endif
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}
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}
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File diff suppressed because it is too large
Load diff
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@ -16,6 +16,8 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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*/
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#include <string.h>
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#include "mc.h"
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#include "mc.h"
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#include "emc.h"
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#include "emc.h"
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#include "sdram_param_t210.h"
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#include "sdram_param_t210.h"
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@ -29,8 +31,6 @@
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#include "../soc/t210.h"
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#include "../soc/t210.h"
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#include "../utils/util.h"
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#include "../utils/util.h"
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#define CONFIG_SDRAM_COMPRESS_CFG
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#ifdef CONFIG_SDRAM_COMPRESS_CFG
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#ifdef CONFIG_SDRAM_COMPRESS_CFG
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#include "../libs/compr/lz.h"
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#include "../libs/compr/lz.h"
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#include "sdram_config_lz.inl"
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#include "sdram_config_lz.inl"
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@ -685,18 +685,47 @@ break_nosleep:
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MC(MC_SEC_CARVEOUT_REG_CTRL) = params->mc_sec_carveout_protect_write_access;
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MC(MC_SEC_CARVEOUT_REG_CTRL) = params->mc_sec_carveout_protect_write_access;
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MC(MC_MTS_CARVEOUT_REG_CTRL) = params->mc_mts_carveout_reg_ctrl;
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MC(MC_MTS_CARVEOUT_REG_CTRL) = params->mc_mts_carveout_reg_ctrl;
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//Disable write access to a bunch of EMC registers.
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// Disable write access to a bunch of EMC registers.
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MC(MC_EMEM_CFG_ACCESS_CTRL) = 1;
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MC(MC_EMEM_CFG_ACCESS_CTRL) = 1;
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}
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}
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#ifndef CONFIG_SDRAM_COMPRESS_CFG
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static void _sdram_patch_model_params(u32 dramid, u32 *params)
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{
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for (u32 i = 0; i < sizeof(sdram_cfg_vendor_patches) / sizeof(sdram_vendor_patch_t); i++)
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if (sdram_cfg_vendor_patches[i].dramid & DRAM_ID(dramid))
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params[sdram_cfg_vendor_patches[i].addr] = sdram_cfg_vendor_patches[i].val;
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}
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#endif
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sdram_params_t *sdram_get_params()
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sdram_params_t *sdram_get_params()
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{
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{
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// Check if id is proper.
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u32 dramid = _get_sdram_id();
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if (dramid > 6)
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dramid = 0;
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#ifdef CONFIG_SDRAM_COMPRESS_CFG
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#ifdef CONFIG_SDRAM_COMPRESS_CFG
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u8 *buf = (u8 *)SDRAM_PARAMS_ADDR;
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u8 *buf = (u8 *)SDRAM_PARAMS_ADDR;
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LZ_Uncompress(_dram_cfg_lz, buf, sizeof(_dram_cfg_lz));
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LZ_Uncompress(_dram_cfg_lz, buf, sizeof(_dram_cfg_lz));
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return (sdram_params_t *)&buf[sizeof(sdram_params_t) * _get_sdram_id()];
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return (sdram_params_t *)&buf[sizeof(sdram_params_t) * dramid];
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#else
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#else
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return _dram_cfgs[_get_sdram_id()];
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sdram_params_t *buf = (sdram_params_t *)SDRAM_PARAMS_ADDR;
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memcpy(buf, &_dram_cfg_0_samsung_4gb, sizeof(sdram_params_t));
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switch (dramid)
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{
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case DRAM_4GB_SAMSUNG_K4F6E304HB_MGCH:
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case DRAM_4GB_MICRON_MT53B512M32D2NP_062_WT:
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break;
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case DRAM_4GB_HYNIX_H9HCNNNBPUMLHR_NLN:
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case DRAM_4GB_COPPER_UNK_3:
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case DRAM_6GB_SAMSUNG_K4FHE3D4HM_MFCH:
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case DRAM_4GB_COPPER_UNK_5:
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case DRAM_4GB_COPPER_UNK_6:
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_sdram_patch_model_params(dramid, (u32 *)buf);
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break;
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}
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return buf;
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#endif
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#endif
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}
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}
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