From 03268c46555f7d536fffffd7d406407bff29f757 Mon Sep 17 00:00:00 2001
From: "ctcaer@gmail.com" <ctcaer@gmail.com>
Date: Tue, 23 Apr 2019 18:23:17 +0300
Subject: [PATCH] Bump version to v4.10.1

---
 Makefile                          |  2 +-
 bootloader/main.c                 |  2 +-
 bootloader/storage/sdmmc_driver.c | 20 ++++++++++----------
 bootloader/storage/sdmmc_t210.h   | 10 +++++-----
 4 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/Makefile b/Makefile
index c3ff505..b40c4ed 100755
--- a/Makefile
+++ b/Makefile
@@ -10,7 +10,7 @@ IPL_LOAD_ADDR := 0x40008000
 IPL_MAGIC := 0x43544349 #"ICTC"
 BLVERSION_MAJOR := 4
 BLVERSION_MINOR := 10
-BLVERSION_HOTFX := 0
+BLVERSION_HOTFX := 1
 
 BL_RESERVED := 0
 
diff --git a/bootloader/main.c b/bootloader/main.c
index 0af1faf..0798ebb 100644
--- a/bootloader/main.c
+++ b/bootloader/main.c
@@ -1157,7 +1157,7 @@ ment_t ment_top[] = {
 };
 menu_t menu_top = {
 	ment_top,
-	"hekate - CTCaer mod v4.10.0", 0, 0
+	"hekate - CTCaer mod v4.10.1", 0, 0
 };
 
 #define IPL_STACK_TOP  0x90010000
diff --git a/bootloader/storage/sdmmc_driver.c b/bootloader/storage/sdmmc_driver.c
index 5299171..c0a2a18 100644
--- a/bootloader/storage/sdmmc_driver.c
+++ b/bootloader/storage/sdmmc_driver.c
@@ -119,7 +119,7 @@ static int _sdmmc_config_ven_ceata_clk(sdmmc_t *sdmmc, u32 id)
 
 	if (id == 4)
 		sdmmc->regs->venceatactl = (sdmmc->regs->venceatactl & 0xFFFFC0FF) | 0x2800;
-	sdmmc->regs->field_1C0 &= 0xFFFDFFFF;
+	sdmmc->regs->ventunctl0 &= 0xFFFDFFFF;
 	if (id == 4)
 	{
 		if (!sdmmc->venclkctl_set)
@@ -171,11 +171,11 @@ static int _sdmmc_wait_type4(sdmmc_t *sdmmc)
 		sdmmc->regs->clkcon |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE;
 	}
 
-	sdmmc->regs->field_1B0 |= 0x80000000;
+	sdmmc->regs->vendllcal |= 0x80000000;
 	_sdmmc_get_clkcon(sdmmc);
 
 	u32 timeout = get_tmr_ms() + 5;
-	while (sdmmc->regs->field_1B0 & 0x80000000)
+	while (sdmmc->regs->vendllcal & 0x80000000)
 	{
 		if (get_tmr_ms() > timeout)
 		{
@@ -185,7 +185,7 @@ static int _sdmmc_wait_type4(sdmmc_t *sdmmc)
 	}
 
 	timeout = get_tmr_ms() + 10;
-	while (sdmmc->regs->field_1BC & 0x80000000)
+	while (sdmmc->regs->dllcfgstatus & 0x80000000)
 	{
 		if (get_tmr_ms() > timeout)
 		{
@@ -564,9 +564,9 @@ int sdmmc_config_tuning(sdmmc_t *sdmmc, u32 type, u32 cmd)
 		return 0;
 	}
 
-	sdmmc->regs->field_1C0 = (sdmmc->regs->field_1C0 & 0xFFFF1FFF) | flag;
-	sdmmc->regs->field_1C0 = (sdmmc->regs->field_1C0 & 0xFFFFE03F) | 0x40;
-	sdmmc->regs->field_1C0 |= 0x20000;
+	sdmmc->regs->ventunctl0 = (sdmmc->regs->ventunctl0 & 0xFFFF1FFF) | flag;
+	sdmmc->regs->ventunctl0 = (sdmmc->regs->ventunctl0 & 0xFFFFE03F) | 0x40;
+	sdmmc->regs->ventunctl0 |= 0x20000;
 	sdmmc->regs->hostctl2  |= SDHCI_CTRL_EXEC_TUNING;
 
 	for (u32 i = 0; i < max; i++)
@@ -1003,8 +1003,8 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int n
 	sdmmc->clock_stopped = 0;
 
 	//TODO: make this skip-able.
-	sdmmc->regs->field_1F0 |= 0x80000;
-	sdmmc->regs->field_1AC &= 0xFFFFFFFB;
+	sdmmc->regs->iospare |= 0x80000;
+	sdmmc->regs->veniotrimctl &= 0xFFFFFFFB;
 	static const u32 trim_values[] = { 2, 8, 3, 8 };
 	sdmmc->regs->venclkctl = (sdmmc->regs->venclkctl & 0xE0FFFFFF) | (trim_values[sdmmc->id] << 24);
 	sdmmc->regs->sdmemcmppadctl = (sdmmc->regs->sdmemcmppadctl & 0xF) | 7;
@@ -1041,7 +1041,7 @@ void sdmmc_end(sdmmc_t *sdmmc)
 			gpio_output_enable(GPIO_PORT_E, GPIO_PIN_4, GPIO_OUTPUT_DISABLE);
 			max77620_regulator_enable(REGULATOR_LDO2, 0);
 			h_cfg.sd_timeoff = get_tmr_ms(); // Some sandisc U1 cards need 100ms for a power cycle.
-			msleep(1); // To power cycle min 1ms without power is needed.
+			msleep(1); // To power cycle, min 1ms without power is needed.
 		}
 
 		_sdmmc_get_clkcon(sdmmc);
diff --git a/bootloader/storage/sdmmc_t210.h b/bootloader/storage/sdmmc_t210.h
index 66ff9f1..e11c3ff 100644
--- a/bootloader/storage/sdmmc_t210.h
+++ b/bootloader/storage/sdmmc_t210.h
@@ -115,18 +115,18 @@ typedef struct _t210_sdmmc_t
 	vu32 vendebouncecnt;
 	vu32 venmiscctl;
 	vu32 res6[34];
-	vu32 field_1AC;
-	vu32 field_1B0;
+	vu32 veniotrimctl;
+	vu32 vendllcal;
 	vu8 res7[8];
-	vu32 field_1BC;
-	vu32 field_1C0;
+	vu32 dllcfgstatus;
+	vu32 ventunctl0;
 	vu32 field_1C4;
 	vu8 field_1C8[24];
 	vu32 sdmemcmppadctl;
 	vu32 autocalcfg;
 	vu32 autocalintval;
 	vu32 autocalsts;
-	vu32 field_1F0;
+	vu32 iospare;
 } t210_sdmmc_t;
 
 #endif