mirror of
https://github.com/Atmosphere-NX/Atmosphere
synced 2024-11-09 22:56:35 +00:00
143 lines
No EOL
3.4 KiB
C
143 lines
No EOL
3.4 KiB
C
#include <stbool.h>
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#include <stdint.h>
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#include <string.h>
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#include "fuse.h"
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#include "utils.h"
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#include "timers.h"
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/* Prototypes for internal commands. */
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void fuse_make_regs_visible(void);
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void fuse_enable_power(void);
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void fuse_disable_power(void);
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void fuse_wait_idle(void);
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/* Initialize the FUSE driver */
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void fuse_init(void)
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{
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fuse_make_regs_visible();
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/* TODO: Overrides (iROM patches) and various reads happen here */
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}
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/* Make all fuse registers visible */
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void fuse_make_regs_visible(void)
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{
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/* TODO: Replace this with a proper CLKRST driver */
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uint32_t* misc_clk_reg = (volatile uint32_t *)mmio_get_device_address(MMIO_DEVID_CLKRST) + 0x48;
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uint32_t misc_clk_val = *misc_clk_reg;
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*misc_clk_reg = (misc_clk_val | (1 << 28));
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}
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/* Enable power to the fuse hardware array */
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void fuse_enable_power(void)
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{
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FUSE_REGS->FUSE_PWR_GOOD_SW = 1;
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wait(1);
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}
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/* Disable power to the fuse hardware array */
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void fuse_disable_power(void)
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{
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FUSE_REGS->FUSE_PWR_GOOD_SW = 0;
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wait(1);
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}
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/* Wait for the fuse driver to go idle */
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void fuse_wait_idle(void)
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{
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uint32_t ctrl_val = 0;
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/* Wait for STATE_IDLE */
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while ((ctrl_val & (0xF0000)) != 0x40000)
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{
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wait(1);
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ctrl_val = FUSE_REGS->FUSE_CTRL;
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}
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}
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/* Read a fuse from the hardware array */
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uint32_t fuse_hw_read(uint32_t addr)
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{
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fuse_wait_idle();
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/* Program the target address */
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FUSE_REGS->FUSE_REG_ADDR = addr;
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/* Enable read operation in control register */
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uint32_t ctrl_val = FUSE_REGS->FUSE_CTRL;
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ctrl_val &= ~0x3;
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ctrl_val |= 0x1; /* Set FUSE_READ command */
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FUSE_REGS->FUSE_CTRL = ctrl_val;
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fuse_wait_idle();
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return FUSE_REGS->FUSE_REG_READ;
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}
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/* Write a fuse in the hardware array */
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void fuse_hw_write(uint32_t, value, uint32_t addr)
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{
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fuse_wait_idle();
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/* Program the target address and value */
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FUSE_REGS->FUSE_REG_ADDR = addr;
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FUSE_REGS->FUSE_REG_WRITE = value;
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/* Enable write operation in control register */
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uint32_t ctrl_val = FUSE_REGS->FUSE_CTRL;
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ctrl_val &= ~0x3;
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ctrl_val |= 0x2; /* Set FUSE_WRITE command */
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FUSE_REGS->FUSE_CTRL = ctrl_val;
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fuse_wait_idle();
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}
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/* Sense the fuse hardware array into the shadow cache */
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void fuse_hw_sense(void)
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{
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fuse_wait_idle();
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/* Enable sense operation in control register */
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uint32_t ctrl_val = FUSE_REGS->FUSE_CTRL;
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ctrl_val &= ~0x3;
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ctrl_val |= 0x3; /* Set FUSE_SENSE command */
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FUSE_REGS->FUSE_CTRL = ctrl_val;
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fuse_wait_idle();
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}
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/* Read the SKU info register from the shadow cache */
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uint32_t fuse_get_sku_info(void)
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{
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return FUSE_CHIP_REGS->FUSE_SKU_INFO;
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}
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/* Read the bootrom patch version from a register in the shadow cache */
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uint32_t fuse_get_bootrom_patch_version(void)
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{
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return FUSE_CHIP_REGS->FUSE_SOC_SPEEDO_1;
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}
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/* Read a spare bit register from the shadow cache */
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uint32_t fuse_get_spare_bit(uint32_t idx)
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{
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uint32_t spare_bit_val = 0;
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if ((idx >= 0) && (idx < 32))
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spare_bit_val = FUSE_CHIP_REGS->FUSE_SPARE_BIT[idx];
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return spare_bit_val;
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}
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/* Read a reserved ODM register from the shadow cache */
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uint32_t fuse_get_reserved_odm(uint32_t idx)
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{
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uint32_t reserved_odm_val = 0;
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if ((idx >= 0) && (idx < 8))
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reserved_odm_val = FUSE_CHIP_REGS->FUSE_RESERVED_ODM[idx];
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return reserved_odm_val;
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} |