mirror of
https://github.com/Atmosphere-NX/Atmosphere
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115 lines
3.4 KiB
C
115 lines
3.4 KiB
C
/*
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* Copyright (c) 2018-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef EXOSPHERE_BOOTUP_H
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#define EXOSPHERE_BOOTUP_H
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#include <stdint.h>
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/* 21.1.7 AP Control Registers */
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/* 21.1.7.1 APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG0_0 slaves */
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typedef enum {
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APB_SSER0_MISC_REGS = 1 << 1, /* PP, SC1x pads and GP registers */
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APB_SSER0_SATA_AUX = 1 << 2,
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APB_SSER0_PINMUX_AUX = 1 << 3,
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APB_SSER0_APE = 1 << 4,
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APB_SSER0_DTV = 1 << 6,
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APB_SSER0_PWM = 1 << 8, /* PWFM */
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APB_SSER0_QSPI = 1 << 9,
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APB_SSER0_CSITE = 1 << 10, /* Core Site */
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APB_SSER0_RTC = 1 << 11,
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APB_SSER0_PMC = 1 << 13,
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APB_SSER0_SE = 1 << 14, /* Security Engine */
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APB_SSER0_FUSE = 1 << 15,
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APB_SSER0_KFUSE = 1 << 16,
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APB_SSER0_UNUSED = 1 << 18, /* reserved, unused but listed as accessible */
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APB_SSER0_SATA = 1 << 20,
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APB_SSER0_HDA = 1 << 21,
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APB_SSER0_LA = 1 << 22,
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APB_SSER0_ATOMICS = 1 << 23,
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APB_SSER0_CEC = 1 << 24,
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STM = 1 << 29
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} APB_SSER0;
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/* 21.1.7.2 APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG1_0 slaves */
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typedef enum {
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APB_SSER1_MC0 = 1 << 4,
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APB_SSER1_EMC0 = 1 << 5,
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APB_SSER1_MC1 = 1 << 8,
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APB_SSER1_EMC1 = 1 << 9,
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APB_SSER1_MCB = 1 << 10,
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APB_SSER1_EMBC = 1 << 11,
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APB_SSER1_UART_A = 1 << 12,
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APB_SSER1_UART_B = 1 << 13,
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APB_SSER1_UART_C = 1 << 14,
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APB_SSER1_UART_D = 1 << 15,
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APB_SSER1_SPI1 = 1 << 20,
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APB_SSER1_SPI2 = 1 << 21,
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APB_SSER1_SPI3 = 1 << 22,
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APB_SSER1_SPI4 = 1 << 23,
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APB_SSER1_SPI5 = 1 << 24,
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APB_SSER1_SPI6 = 1 << 25,
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APB_SSER1_I2C1 = 1 << 26,
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APB_SSER1_I2C2 = 1 << 27,
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APB_SSER1_I2C3 = 1 << 28,
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APB_SSER1_I2C4 = 1 << 29,
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APB_SSER1_DVC = 1 << 30,
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APB_SSER1_I2C5 = 1 << 30,
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APB_SSER1_I2C6 = 1 << 31 /* this will show as negative because of the 32bit sign bit being set */
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} APB_SSER1;
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/* 21.1.7.3 APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG2_0 slaves */
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typedef enum {
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APB_SSER2_SDMMC1 = 1 << 0,
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APB_SSER2_SDMMC2 = 1 << 1,
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APB_SSER2_SDMMC3 = 1 << 2,
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APB_SSER2_SDMMC4 = 1 << 3,
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APB_SSER2_MIPIBIF = 1 << 7, /* reserved */
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APB_SSER2_DDS = 1 << 8,
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APB_SSER2_DP2 = 1 << 9,
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APB_SSER2_SOC_THERM = 1 << 10,
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APB_SSER2_APB2JTAG = 1 << 11,
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APB_SSER2_XUSB_HOST = 1 << 12,
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APB_SSER2_XUSB_DEV = 1 << 13,
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APB_SSER2_XUSB_PADCTL = 1 << 14,
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APB_SSER2_MIPI_CAL = 1 << 15,
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APB_SSER2_DVFS = 1 << 16
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} APB_SSER2;
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void bootup_misc_mmio(void);
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void setup_4x_mmio(void);
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void setup_dram_magic_numbers(void);
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void setup_current_core_state(void);
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void identity_unmap_iram_cd_tzram(void);
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void secure_additional_devices(void);
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void set_extabt_serror_taken_to_el3(bool taken_to_el3);
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#endif
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