mirror of
https://github.com/Atmosphere-NX/Atmosphere
synced 2024-11-14 00:56:35 +00:00
104 lines
4.2 KiB
C++
104 lines
4.2 KiB
C++
/*
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* Copyright (c) 2018-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include "i2c_driver_types.hpp"
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namespace ams::i2c::driver::impl {
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struct Registers {
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volatile u32 I2C_I2C_CNFG_0;
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volatile u32 I2C_I2C_CMD_ADDR0_0;
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volatile u32 I2C_I2C_CMD_ADDR1_0;
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volatile u32 I2C_I2C_CMD_DATA1_0;
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volatile u32 I2C_I2C_CMD_DATA2_0;
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volatile u32 _0x14;
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volatile u32 _0x18;
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volatile u32 I2C_I2C_STATUS_0;
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volatile u32 I2C_I2C_SL_CNFG_0;
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volatile u32 I2C_I2C_SL_RCVD_0;
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volatile u32 I2C_I2C_SL_STATUS_0;
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volatile u32 I2C_I2C_SL_ADDR1_0;
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volatile u32 I2C_I2C_SL_ADDR2_0;
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volatile u32 I2C_I2C_TLOW_SEXT_0;
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volatile u32 _0x38;
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volatile u32 I2C_I2C_SL_DELAY_COUNT_0;
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volatile u32 I2C_I2C_SL_INT_MASK_0;
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volatile u32 I2C_I2C_SL_INT_SOURCE_0;
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volatile u32 I2C_I2C_SL_INT_SET_0;
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volatile u32 _0x4C;
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volatile u32 I2C_I2C_TX_PACKET_FIFO_0;
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volatile u32 I2C_I2C_RX_FIFO_0;
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volatile u32 I2C_PACKET_TRANSFER_STATUS_0;
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volatile u32 I2C_FIFO_CONTROL_0;
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volatile u32 I2C_FIFO_STATUS_0;
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volatile u32 I2C_INTERRUPT_MASK_REGISTER_0;
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volatile u32 I2C_INTERRUPT_STATUS_REGISTER_0;
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volatile u32 I2C_I2C_CLK_DIVISOR_REGISTER_0;
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volatile u32 I2C_I2C_INTERRUPT_SOURCE_REGISTER_0;
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volatile u32 I2C_I2C_INTERRUPT_SET_REGISTER_0;
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volatile u32 I2C_I2C_SLV_TX_PACKET_FIFO_0;
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volatile u32 I2C_I2C_SLV_RX_FIFO_0;
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volatile u32 I2C_I2C_SLV_PACKET_STATUS_0;
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volatile u32 I2C_I2C_BUS_CLEAR_CONFIG_0;
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volatile u32 I2C_I2C_BUS_CLEAR_STATUS_0;
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volatile u32 I2C_I2C_CONFIG_LOAD_0;
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volatile u32 _0x90;
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volatile u32 I2C_I2C_INTERFACE_TIMING_0_0;
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volatile u32 I2C_I2C_INTERFACE_TIMING_1_0;
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volatile u32 I2C_I2C_HS_INTERFACE_TIMING_0_0;
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volatile u32 I2C_I2C_HS_INTERFACE_TIMING_1_0;
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};
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struct ClkRstRegisters {
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public:
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uintptr_t clk_src_reg;
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uintptr_t clk_en_reg;
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uintptr_t rst_reg;
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u32 mask;
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public:
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void SetBus(Bus bus) {
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static constexpr uintptr_t s_clk_src_offsets[ConvertToIndex(Bus::Count)] = {
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0x124, 0x198, 0x1b8, 0x3c4, 0x128, 0x65c
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};
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static constexpr uintptr_t s_clk_en_offsets[ConvertToIndex(Bus::Count)] = {
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0x010, 0x014, 0x018, 0x360, 0x014, 0x280
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};
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static constexpr uintptr_t s_rst_offsets[ConvertToIndex(Bus::Count)] = {
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0x004, 0x008, 0x00c, 0x358, 0x008, 0x28c
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};
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static constexpr size_t s_bit_shifts[ConvertToIndex(Bus::Count)] = {
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12, 22, 3, 7, 15, 6
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};
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const uintptr_t registers = dd::GetIoMapping(0x60006000ul, os::MemoryPageSize);
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const size_t idx = ConvertToIndex(bus);
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this->clk_src_reg = registers + s_clk_src_offsets[idx];
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this->clk_en_reg = registers + s_clk_en_offsets[idx];
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this->rst_reg = registers + s_rst_offsets[idx];
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this->mask = (1u << s_bit_shifts[idx]);
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}
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};
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inline Registers *GetRegisters(Bus bus) {
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static constexpr uintptr_t s_offsets[ConvertToIndex(Bus::Count)] = {
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0x0000, 0x0400, 0x0500, 0x0700, 0x1000, 0x1100
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};
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const uintptr_t registers = dd::GetIoMapping(0x7000c000ul, 2 * os::MemoryPageSize) + s_offsets[ConvertToIndex(bus)];
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return reinterpret_cast<Registers *>(registers);
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}
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}
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