TuxSH 114cdc5aa4 thermosphere: use barriers and caches *properly*. Cache code refactoring ... - set/way cache ops create losses of coherency, do not broadcast and are only meant to be used on boot, period. Cache ops by VA are **the only way** to do data cache maintenance. Fix a bug where the L2 cache was evicted by each core. It shouldn't have. - Cleaning dcache to PoU and invalidating icache to PoU, by VA is sufficient for self-modifying code - Since we operate within a single cluster and don't do DMA, we almost always operate within the inner shareability domain (commit untested on real hw)		2020-02-04 19:12:21 +00:00
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src	thermosphere: use barriers and caches *properly*. Cache code refactoring	2020-02-04 19:12:21 +00:00
linker.ld	thermosphere: properly implement guest timer stuff	2020-02-04 19:12:21 +00:00
linker.specs	thermosphere: add qemu support	2020-02-04 19:12:18 +00:00
Makefile	thermosphere: pl011 uart refactor	2020-02-04 19:12:20 +00:00
qemu.mem	thermosphere: rework linkscrips, use discardable sections, better sp pivot on crash	2020-02-04 19:12:19 +00:00
tegra-t210-arm-tf.mem	thermosphere: rework linkscrips, use discardable sections, better sp pivot on crash	2020-02-04 19:12:19 +00:00
tegra-t210-nintendo.mem	thermosphere: rework linkscrips, use discardable sections, better sp pivot on crash	2020-02-04 19:12:19 +00:00