/* * Copyright (c) 2018-2020 Atmosphère-NX * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ SetRegisterAllowed(MC_INTSTATUS); /* 0x000 */ SetRegisterAllowed(MC_INTMASK); /* 0x004 */ SetRegisterAllowed(MC_ERR_STATUS); /* 0x008 */ SetRegisterAllowed(MC_ERR_ADR); /* 0x00C */ SetRegisterAllowed(MC_SMMU_CONFIG); /* 0x010 */ SetRegisterAllowed(MC_SMMU_PTB_ASID); /* 0x01C */ SetRegisterAllowed(MC_SMMU_PTB_DATA); /* 0x020 */ SetRegisterAllowed(MC_SMMU_TLB_FLUSH); /* 0x030 */ SetRegisterAllowed(MC_SMMU_PTC_FLUSH_0); /* 0x034 */ SetRegisterAllowed(MC_EMEM_CFG); /* 0x050 */ SetRegisterAllowed(MC_EMEM_ADR_CFG); /* 0x054 */ SetRegisterAllowed(MC_EMEM_ARB_CFG); /* 0x090 */ SetRegisterAllowed(MC_EMEM_ARB_OUTSTANDING_REQ); /* 0x094 */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_RCD); /* 0x098 */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_RP); /* 0x09C */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_RC); /* 0x0A0 */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_RAS); /* 0x0A4 */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_FAW); /* 0x0A8 */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_RRD); /* 0x0AC */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_RAP2PRE); /* 0x0B0 */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_WAP2PRE); /* 0x0B4 */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_R2R); /* 0x0B8 */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_W2W); /* 0x0BC */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_R2W); /* 0x0C0 */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_W2R); /* 0x0C4 */ SetRegisterAllowed(MC_EMEM_ARB_MISC2); /* 0x0C8 */ SetRegisterAllowed(MC_EMEM_ARB_DA_TURNS); /* 0x0D0 */ SetRegisterAllowed(MC_EMEM_ARB_DA_COVERS); /* 0x0D4 */ SetRegisterAllowed(MC_EMEM_ARB_MISC0); /* 0x0D8 */ SetRegisterAllowed(MC_EMEM_ARB_MISC1); /* 0x0DC */ SetRegisterAllowed(MC_EMEM_ARB_RING1_THROTTLE); /* 0x0E0 */ SetRegisterAllowed(MC_CLIENT_HOTRESET_CTRL); /* 0x200 */ SetRegisterAllowed(MC_CLIENT_HOTRESET_STATUS); /* 0x204 */ SetRegisterAllowed(MC_SMMU_AFI_ASID); /* 0x238 */ SetRegisterAllowed(MC_SMMU_DC_ASID); /* 0x240 */ SetRegisterAllowed(MC_SMMU_DCB_ASID); /* 0x244 */ SetRegisterAllowed(MC_SMMU_HC_ASID); /* 0x250 */ SetRegisterAllowed(MC_SMMU_HDA_ASID); /* 0x254 */ SetRegisterAllowed(MC_SMMU_ISP2_ASID); /* 0x258 */ SetRegisterAllowed(MC_SMMU_MSENC_NVENC_ASID); /* 0x264 */ SetRegisterAllowed(MC_SMMU_NV_ASID); /* 0x268 */ SetRegisterAllowed(MC_SMMU_NV2_ASID); /* 0x26C */ SetRegisterAllowed(MC_SMMU_PPCS_ASID); /* 0x270 */ SetRegisterAllowed(MC_SMMU_SATA_ASID); /* 0x274 */ SetRegisterAllowed(MC_SMMU_VI_ASID); /* 0x280 */ SetRegisterAllowed(MC_SMMU_VIC_ASID); /* 0x284 */ SetRegisterAllowed(MC_SMMU_XUSB_HOST_ASID); /* 0x288 */ SetRegisterAllowed(MC_SMMU_XUSB_DEV_ASID); /* 0x28C */ SetRegisterAllowed(MC_SMMU_TSEC_ASID); /* 0x294 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_AVPC_0); /* 0x2E4 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_DC_0); /* 0x2E8 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_DC_1); /* 0x2EC */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_DCB_0); /* 0x2F4 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_DCB_1); /* 0x2F8 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_HC_0); /* 0x310 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_HC_1); /* 0x314 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_MPCORE_0); /* 0x320 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_NVENC_0); /* 0x328 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_PPCS_0); /* 0x344 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_PPCS_1); /* 0x348 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_ISP2_0); /* 0x370 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_ISP2_1); /* 0x374 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_XUSB_0); /* 0x37C */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_XUSB_1); /* 0x380 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_TSEC_0); /* 0x390 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_VIC_0); /* 0x394 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_VI2_0); /* 0x398 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_GPU_0); /* 0x3AC */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_SDMMCA_0); /* 0x3B8 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_SDMMCAA_0); /* 0x3BC */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_SDMMC_0); /* 0x3C0 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_SDMMCAB_0); /* 0x3C4 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_NVDEC_0); /* 0x3D8 */ SetRegisterAllowed(MC_LATENCY_ALLOWANCE_GPU2_0); /* 0x3E8 */ SetRegisterAllowed(MC_DIS_PTSA_RATE); /* 0x41C */ SetRegisterAllowed(MC_DIS_PTSA_MIN); /* 0x420 */ SetRegisterAllowed(MC_DIS_PTSA_MAX); /* 0x424 */ SetRegisterAllowed(MC_DISB_PTSA_RATE); /* 0x428 */ SetRegisterAllowed(MC_DISB_PTSA_MIN); /* 0x42C */ SetRegisterAllowed(MC_DISB_PTSA_MAX); /* 0x430 */ SetRegisterAllowed(MC_VE_PTSA_RATE); /* 0x434 */ SetRegisterAllowed(MC_VE_PTSA_MIN); /* 0x438 */ SetRegisterAllowed(MC_VE_PTSA_MAX); /* 0x43C */ SetRegisterAllowed(MC_MLL_MPCORER_PTSA_RATE); /* 0x44C */ SetRegisterAllowed(MC_RING1_PTSA_RATE); /* 0x47C */ SetRegisterAllowed(MC_RING1_PTSA_MIN); /* 0x480 */ SetRegisterAllowed(MC_RING1_PTSA_MAX); /* 0x484 */ SetRegisterAllowed(MC_PCX_PTSA_RATE); /* 0x4AC */ SetRegisterAllowed(MC_PCX_PTSA_MIN); /* 0x4B0 */ SetRegisterAllowed(MC_PCX_PTSA_MAX); /* 0x4B4 */ SetRegisterAllowed(MC_MSE_PTSA_RATE); /* 0x4C4 */ SetRegisterAllowed(MC_MSE_PTSA_MIN); /* 0x4C8 */ SetRegisterAllowed(MC_MSE_PTSA_MAX); /* 0x4CC */ SetRegisterAllowed(MC_AHB_PTSA_RATE); /* 0x4DC */ SetRegisterAllowed(MC_AHB_PTSA_MIN); /* 0x4E0 */ SetRegisterAllowed(MC_AHB_PTSA_MAX); /* 0x4E4 */ SetRegisterAllowed(MC_APB_PTSA_RATE); /* 0x4E8 */ SetRegisterAllowed(MC_APB_PTSA_MIN); /* 0x4EC */ SetRegisterAllowed(MC_APB_PTSA_MAX); /* 0x4F0 */ SetRegisterAllowed(MC_FTOP_PTSA_RATE); /* 0x50C */ SetRegisterAllowed(MC_HOST_PTSA_RATE); /* 0x518 */ SetRegisterAllowed(MC_HOST_PTSA_MIN); /* 0x51C */ SetRegisterAllowed(MC_HOST_PTSA_MAX); /* 0x520 */ SetRegisterAllowed(MC_USBX_PTSA_RATE); /* 0x524 */ SetRegisterAllowed(MC_USBX_PTSA_MIN); /* 0x528 */ SetRegisterAllowed(MC_USBX_PTSA_MAX); /* 0x52C */ SetRegisterAllowed(MC_USBD_PTSA_RATE); /* 0x530 */ SetRegisterAllowed(MC_USBD_PTSA_MIN); /* 0x534 */ SetRegisterAllowed(MC_USBD_PTSA_MAX); /* 0x538 */ SetRegisterAllowed(MC_GK_PTSA_RATE); /* 0x53C */ SetRegisterAllowed(MC_GK_PTSA_MIN); /* 0x540 */ SetRegisterAllowed(MC_GK_PTSA_MAX); /* 0x544 */ SetRegisterAllowed(MC_AUD_PTSA_RATE); /* 0x548 */ SetRegisterAllowed(MC_AUD_PTSA_MIN); /* 0x54C */ SetRegisterAllowed(MC_AUD_PTSA_MAX); /* 0x550 */ SetRegisterAllowed(MC_VICPC_PTSA_RATE); /* 0x554 */ SetRegisterAllowed(MC_VICPC_PTSA_MIN); /* 0x558 */ SetRegisterAllowed(MC_VICPC_PTSA_MAX); /* 0x55C */ SetRegisterAllowed(MC_JPG_PTSA_RATE); /* 0x584 */ SetRegisterAllowed(MC_JPG_PTSA_MIN); /* 0x588 */ SetRegisterAllowed(MC_JPG_PTSA_MAX); /* 0x58C */ SetRegisterAllowed(MC_GK2_PTSA_RATE); /* 0x610 */ SetRegisterAllowed(MC_GK2_PTSA_MIN); /* 0x614 */ SetRegisterAllowed(MC_GK2_PTSA_MAX); /* 0x618 */ SetRegisterAllowed(MC_SDM_PTSA_RATE); /* 0x61C */ SetRegisterAllowed(MC_SDM_PTSA_MIN); /* 0x620 */ SetRegisterAllowed(MC_SDM_PTSA_MAX); /* 0x624 */ SetRegisterAllowed(MC_HDAPC_PTSA_RATE); /* 0x628 */ SetRegisterAllowed(MC_HDAPC_PTSA_MIN); /* 0x62C */ SetRegisterAllowed(MC_HDAPC_PTSA_MAX); /* 0x630 */ SetRegisterAllowed(MC_SEC_CARVEOUT_BOM); /* 0x670 */ SetRegisterAllowed(MC_SEC_CARVEOUT_SIZE_MB); /* 0x674 */ SetRegisterAllowed(MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0A); /* 0x690 */ SetRegisterAllowed(MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0AB); /* 0x694 */ SetRegisterAllowed(MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0B); /* 0x698 */ SetRegisterAllowed(MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0BB); /* 0x69C */ SetRegisterAllowed(MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0C); /* 0x6A0 */ SetRegisterAllowed(MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0CB); /* 0x6A4 */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_RFCPB); /* 0x6C0 */ SetRegisterAllowed(MC_EMEM_ARB_TIMING_CCDMW); /* 0x6C4 */ SetRegisterAllowed(MC_EMEM_ARB_REFPB_HP_CTRL); /* 0x6F0 */ SetRegisterAllowed(MC_EMEM_ARB_REFPB_BANK_CTRL); /* 0x6F4 */ SetRegisterAllowed(MC_PTSA_GRANT_DECREMENT); /* 0x960 */ SetRegisterAllowed(MC_CLIENT_HOTRESET_CTRL_1); /* 0x970 */ SetRegisterAllowed(MC_CLIENT_HOTRESET_STATUS_1); /* 0x974 */ SetRegisterAllowed(MC_SMMU_PTC_FLUSH_1); /* 0x9B8 */ SetRegisterAllowed(MC_SMMU_DC1_ASID); /* 0xA88 */ SetRegisterAllowed(MC_SMMU_SDMMC1A_ASID); /* 0xA94 */ SetRegisterAllowed(MC_SMMU_SDMMC2A_ASID); /* 0xA98 */ SetRegisterAllowed(MC_SMMU_SDMMC3A_ASID); /* 0xA9C */ SetRegisterAllowed(MC_SMMU_SDMMC4A_ASID); /* 0xAA0 */ SetRegisterAllowed(MC_SMMU_ISP2B_ASID); /* 0xAA4 */ SetRegisterAllowed(MC_SMMU_GPU_ASID); /* 0xAA8 */ SetRegisterAllowed(MC_SMMU_GPUB_ASID); /* 0xAAC */ SetRegisterAllowed(MC_SMMU_PPCS2_ASID); /* 0xAB0 */ SetRegisterAllowed(MC_SMMU_NVDEC_ASID); /* 0xAB4 */ SetRegisterAllowed(MC_SMMU_APE_ASID); /* 0xAB8 */ SetRegisterAllowed(MC_SMMU_SE_ASID); /* 0xABC */ SetRegisterAllowed(MC_SMMU_NVJPG_ASID); /* 0xAC0 */ SetRegisterAllowed(MC_SMMU_HC1_ASID); /* 0xAC4 */ SetRegisterAllowed(MC_SMMU_SE1_ASID); /* 0xAC8 */ SetRegisterAllowed(MC_SMMU_AXIAP_ASID); /* 0xACC */ SetRegisterAllowed(MC_SMMU_ETR_ASID); /* 0xAD0 */ SetRegisterAllowed(MC_SMMU_TSECB_ASID); /* 0xAD4 */ SetRegisterAllowed(MC_SMMU_TSEC1_ASID); /* 0xAD8 */ SetRegisterAllowed(MC_SMMU_TSECB1_ASID); /* 0xADC */ SetRegisterAllowed(MC_SMMU_NVDEC1_ASID); /* 0xAE0 */ SetRegisterAllowed(MC_EMEM_ARB_DHYST_CTRL); /* 0xBCC */ SetRegisterAllowed(MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0); /* 0xBD0 */ SetRegisterAllowed(MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1); /* 0xBD4 */ SetRegisterAllowed(MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2); /* 0xBD8 */ SetRegisterAllowed(MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3); /* 0xBDC */ SetRegisterAllowed(MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4); /* 0xBE0 */ SetRegisterAllowed(MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5); /* 0xBE4 */ SetRegisterAllowed(MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6); /* 0xBE8 */ SetRegisterAllowed(MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7); /* 0xBEC */ SetRegisterAllowed(MC_ERR_GENERALIZED_CARVEOUT_STATUS); /* 0xC00 */ SetRegisterAllowed(MC_SECURITY_CARVEOUT2_BOM); /* 0xC5C */ SetRegisterAllowed(MC_SECURITY_CARVEOUT3_BOM); /* 0xCAC */