3 commits

Author	SHA1	Message	Date
TuxSH	217c1ad054	thermosphere: implement reading and writing guest memory	2021-02-19 21:51:50 +00:00
TuxSH	6b8a843ffb	thermosphere: trap set/way dcache access ... note: qemu does not implement the trap	2021-02-19 21:51:47 +00:00
TuxSH	72d1992eec	thermosphere: use barriers and caches *properly*. Cache code refactoring ... - set/way cache ops create losses of coherency, do not broadcast and are only meant to be used on boot, period. Cache ops by VA are **the only way** to do data cache maintenance. Fix a bug where the L2 cache was evicted by each core. It shouldn't have. - Cleaning dcache to PoU and invalidating icache to PoU, by VA is sufficient for self-modifying code - Since we operate within a single cluster and don't do DMA, we almost always operate within the inner shareability domain (commit untested on real hw)	2021-02-19 21:51:47 +00:00