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Author SHA1 Message Date
Michael Scire
9e03852703 Loader: Fix bugs ldr:ro, Loader now works fully on hardware. 2018-05-02 01:39:24 -06:00
Michael Scire
361e9607a9 SM: After checking docs, kernelAbove400() -> kernelAbove500() 2018-05-01 23:24:57 -06:00
Michael Scire
3c87c4c3c3 SM: Add compile-time smhax flag, finishing module. (Closes #62) 2018-05-01 23:21:39 -06:00
Michael Scire
bda056562c Push all graphical resources to main repo, add credits 2018-05-01 18:42:23 -06:00
Michael Scire
e05f199394 Loader: Fix (all?) remaining bugs in ldr:pm. 
Loader now works when booted as a KIP1. NOTE: ldr:ro still needs
debugging.
 2018-05-01 16:49:20 -06:00
Michael Scire
9944d8e7e1 Boot2: Remove svcExitProcess (handled by libnx). 2018-05-01 11:08:21 -06:00
Michael Scire
c12de33440 Boot2: Fix comment. 2018-05-01 11:04:39 -06:00
Michael Scire
64bf2052e5 boot2: exit process at end of main(). 2018-05-01 11:02:16 -06:00
Michael Scire
e7e28fbc57 Implement boot2 sysmodule. 2018-05-01 10:58:33 -06:00
Resaec
1c32f1ae34 replacing tabs with spaces 2018-05-01 18:33:39 +02:00
hexkyz
6a7afc5ce8
Fix typo. 2018-05-01 17:17:34 +01:00
Michael Scire
30f975a558 Stratosphere: Fix remaining bugs in sm, which now works as a KIP1 on hardware 2018-04-30 22:27:26 -06:00
hexkyz
52730d2188
Adding credits section 2018-04-30 17:48:03 +01:00
Resaec
5430415578 somehow forgot to rename them 2018-04-28 01:27:16 +02:00
Resaec
dd319debe8 adding comment for uart_wait_idle to warn about a possible dead lock 2018-04-28 01:13:16 +02:00
Resaec
5dcf2cb319 adding UartFifoControl and UartInterruptIdentification for the UART_IIR_FCR_0 register 
adding reference manual intem numbers for register enums
 2018-04-28 00:58:42 +02:00
Resaec
b6b0073178 minor style fixes 2018-04-28 00:55:28 +02:00
Resaec
e0f586d2d5 change multiline comments, they game (only?) me strange spacing errors in the VS info popup 2018-04-28 00:54:43 +02:00
Resaec
ae69126509 adding UartVendorStatus, UartLineStatus and UartLineControl 
refactor defines
edited uart_wait_idle() second parameter type to UartVendorStatus
 2018-04-27 23:57:20 +02:00
Michael Scire
f7434672bf Update banner placement in README 2018-04-27 03:56:48 -06:00
Michael Scire
0d25f342c6 Add banner to README 2018-04-27 03:56:06 -06:00
Michael Scire
4e1a29f618 Loader: Finish ldr:ro 2018-04-27 03:33:44 -06:00
Michael Scire
772e41971d Loader: Add ldr:ro->LoadNro() 2018-04-27 03:17:18 -06:00
Kurt
10171313df Update README.md (#70) 2018-04-26 20:45:11 -07:00
Michael Scire
e43c6df986 Loader: fix missing NULL assignment 2018-04-26 20:51:12 -06:00
Michael Scire
2e7b6de195 Loader: Automatically unload NRRs on service close. 2018-04-26 20:50:27 -06:00
Michael Scire
e7aa5c246b Loader: Implement ldr:ro->UnloadNrr() 2018-04-26 20:37:38 -06:00
Michael Scire
8524f284fd Loader: Implement ldr:ro->LoadNRR(). NOTE: No sigchecks, at the moment. 2018-04-26 20:27:52 -06:00
Michael Scire
789afe7929 Loader: fix missing reassignment in AutoCloseMap 2018-04-26 19:43:26 -06:00
Michael Scire
1d73bd0a12 Loader: Start work on LoadNRR, Add AutoCloseMap 2018-04-26 19:13:55 -06:00
Michael Scire
b34b9ba0e4 Loader: Greatly simplify mapping logic, add CodeMemory mapper. 2018-04-26 18:04:30 -06:00
Michael Scire
991357f309 Loader: Add NRRInfo to RegisteredProcess, refactor Registration:: 2018-04-26 17:03:10 -06:00
Michael Scire
977a51edb0 Loader: Service ldr:ro on <= 2.3.0 2018-04-26 16:50:43 -06:00
Michael Scire
fe2f227dfc Loader: Implement ldr:ro->Initialize() 2018-04-26 16:49:01 -06:00
Michael Scire
4f09c61bfa Loader: Push ldr:ro stub. 2018-04-26 16:45:09 -06:00
Michael Scire
1ec3eb1ace Loader: is_64_bit -> is_64_bit_addspace 2018-04-26 14:53:33 -06:00
Michael Scire
82d9728372 Loader: Save process->is_64_bit as prep for ldr:ro 2018-04-26 14:51:07 -06:00
Michael Scire
ea609e68d3 Change read_sd_file semantics to return size read. 2018-04-26 04:47:22 -06:00
Michael Scire
222ec1cd7f Boot: Fix JSON mappings to be RW (instead of RO) 2018-04-25 17:41:07 -06:00
hexkyz
c70e0edc18 Boot: Initial skeleton and 1.0.0 GPIO voltage switch. 2018-04-25 21:35:02 +01:00
Rajko Stojadinovic
4e1c12a659 Fusee: Fix BisPartition enum to correctly identify partitions. 
* BisPartition_t was missing SAFE, meaning User and System were using wrong key_source

* Normalize tabs to spaces

* Merge User and System BisPartition_t because they are the same key anyway

* Remove extra newline
 2018-04-25 09:47:39 -07:00
Resaec
b6b8ca0eac ENUMs for APB Slave Security Enable registers (#67) 
Exosphere: add enums for the APB_MISC_SECURE registers.
 2018-04-25 09:46:17 -07:00
Michael Scire
dba0d62ef7 Stratosphere: Add .jsons for loader, sm 2018-04-25 02:07:47 -06:00
Michael Scire
678bf5914a Loader: Properly map BSS as rw. 2018-04-25 01:50:23 -06:00
Michael Scire
3e36e81e80 Loader: Fix bugs in CreateProcess(), which now succeeds on hardware (1.0.0) 2018-04-24 17:56:32 -06:00
Michael Scire
195528adc6 Loader: Fix type definitions in picosha2.hpp 2018-04-24 06:55:54 -06:00
Michael Scire
e443b625ec Loader: Finish Loader::CreateProcess(). 2018-04-24 06:52:13 -06:00
Michael Scire
ba90d0f250 Loader: Include picosha2 as a SHA256 generator. 2018-04-24 06:28:57 -06:00
Michael Scire
80fedc51c1 Loader: Implement all remaining parts of CreateProcess except LoadNsoSegment. 2018-04-24 06:25:31 -06:00
Michael Scire
ee9bfd514c Loader: Implement argument passing. 2018-04-24 06:14:04 -06:00