TuxSH
|
6b8a843ffb
|
thermosphere: trap set/way dcache access
note: qemu does not implement the trap
|
2021-02-19 21:51:47 +00:00 |
|
TuxSH
|
b9d07fccd6
|
thermosphere: rewrite sysreg trapping code, add skeleton code for timer val trap handling; support A32 EL1 once again
|
2021-02-19 21:51:42 +00:00 |
|
TuxSH
|
d42d9e60b9
|
thermosphere: don't trap memory register writes/don't migrate sw breakpoints
Makes no sense on a system with ASLR
|
2021-02-19 21:51:41 +00:00 |
|
TuxSH
|
6289d2e398
|
thermosphere: sw breakpoint code, etc.
|
2021-02-19 21:51:32 +00:00 |
|
TuxSH
|
9bc0ed2f70
|
thermosphere: refactor crt0 + watchpoint init
|
2021-02-19 21:51:31 +00:00 |
|
TuxSH
|
eb27c36709
|
thermosphere: impl stage2 translation
|
2021-02-19 21:51:29 +00:00 |
|
TuxSH
|
e6c5eb3928
|
thermosphere: add shadow page table hooks
note: HCR.TVM not supported by qemu yet
|
2021-02-19 21:51:28 +00:00 |
|
TuxSH
|
a560de8465
|
fml coke spilled all over this laptop's keyboard
|
2021-02-19 21:51:23 +00:00 |
|
TuxSH
|
3009438e54
|
thermosphere: sysreg stuff, continued
|
2021-02-19 21:51:23 +00:00 |
|
TuxSH
|
ffa216c8c7
|
thermosphere: add some basic sysreg trapping code
|
2021-02-19 21:51:22 +00:00 |
|
TuxSH
|
70a9caa7e9
|
thermosphere: add more sysreg stuff & start writing trap stuff
|
2021-02-19 21:51:21 +00:00 |
|