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Use and adapt the UART driver from hekate/hwinit

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This commit is contained in:
TuxSH 2018-03-08 01:02:45 +01:00
parent a409016a88
commit ff9322a468
4 changed files with 99 additions and 49 deletions
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7
exosphere/src/dbg/log_device_uart.c
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@ -4,17 +4,16 @@
static void initialize(debug_log_device_uart_t *this) { static void initialize(debug_log_device_uart_t *this) {
if (!this->is_initialized) { if (!this->is_initialized) {
uart_select(0); /* UART-A */ uart_select(UART_A);
clkrst_enable(CARDEVICE_UARTA); clkrst_enable(CARDEVICE_UARTA);
uart_initialize(0 /* I don't know */); uart_init(UART_A, BAUD_115200); /* is this the correct baud rate for this use-case? */
this->is_initialized = true; this->is_initialized = true;
} }
} }
static void write_string(debug_log_device_uart_t *this, const char *str, size_t len) { static void write_string(debug_log_device_uart_t *this, const char *str, size_t len) {
(void)this; (void)this;
(void)len; uart_send(UART_A, str, len);
uart_transmit_str(str);
} }
static void finalize(debug_log_device_uart_t *this) { static void finalize(debug_log_device_uart_t *this) {

4
exosphere/src/memory_map.h
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@ -15,7 +15,7 @@
/* MMIO (addr, size, is secure) */ /* MMIO (addr, size, is secure) */
#define _MMAPDEV0 ( 0x50041000ull, 0x1000ull, true ) /* ARM Interrupt Distributor */ #define _MMAPDEV0 ( 0x50041000ull, 0x1000ull, true ) /* ARM Interrupt Distributor */
#define _MMAPDEV1 ( 0x50042000ull, 0x2000ull, true ) /* Interrupt Controller Physical CPU interface */ #define _MMAPDEV1 ( 0x50042000ull, 0x2000ull, true ) /* Interrupt Controller Physical CPU interface */
#define _MMAPDEV2 ( 0x70006000ull, 0x1000ull, false ) /* UART-A */ #define _MMAPDEV2 ( 0x70006000ull, 0x1000ull, false ) /* UART */
#define _MMAPDEV3 ( 0x60006000ull, 0x1000ull, false ) /* Clock and Reset */ #define _MMAPDEV3 ( 0x60006000ull, 0x1000ull, false ) /* Clock and Reset */
#define _MMAPDEV4 ( 0x7000E000ull, 0x1000ull, true ) /* RTC, PMC */ #define _MMAPDEV4 ( 0x7000E000ull, 0x1000ull, true ) /* RTC, PMC */
#define _MMAPDEV5 ( 0x60005000ull, 0x1000ull, true ) /* TMRs, WDTs */ #define _MMAPDEV5 ( 0x60005000ull, 0x1000ull, true ) /* TMRs, WDTs */
@ -64,7 +64,7 @@
#define MMIO_DEVID_GICD 0 #define MMIO_DEVID_GICD 0
#define MMIO_DEVID_GICC 1 #define MMIO_DEVID_GICC 1
#define MMIO_DEVID_UART_A 2 #define MMIO_DEVID_UART 2
#define MMIO_DEVID_CLKRST 3 #define MMIO_DEVID_CLKRST 3
#define MMIO_DEVID_RTC_PMC 4 #define MMIO_DEVID_RTC_PMC 4
#define MMIO_DEVID_TMRs_WDTs 5 #define MMIO_DEVID_TMRs_WDTs 5

76
exosphere/src/uart.c
View file

@ -1,46 +1,66 @@
#include "timers.h"
#include "uart.h" #include "uart.h"
#include "misc.h" #include "misc.h"
void uart_select(unsigned int id) { /* Adapted from https://github.com/nwert/hekate/blob/master/hwinit/uart.c */
/* This confirmation is valid for UART-A, I don't know about the other UARTs. */
/* Official Nintendo code (for UART-A, at least) */ void uart_select(UartDevice dev) {
unsigned int id = (unsigned int)dev;
PINMUX_AUX_UARTn_TX_0(id) = 0; /* UART */ PINMUX_AUX_UARTn_TX_0(id) = 0; /* UART */
PINMUX_AUX_UARTn_RX_0(id) = 0x48; /* UART, enable, pull up */ PINMUX_AUX_UARTn_RX_0(id) = 0x48; /* UART, enable, pull up */
PINMUX_AUX_UARTn_RTS_0(id) = 0; /* UART */ PINMUX_AUX_UARTn_RTS_0(id) = 0; /* UART */
PINMUX_AUX_UARTn_CTS_0(id) = 0x44; /* UART, enable, pull down */ PINMUX_AUX_UARTn_CTS_0(id) = 0x44; /* UART, enable, pull down */
} }
void uart_initialize(uint16_t divider) { void uart_init(UartDevice dev, uint32_t baud) {
/* Setup UART in 16450 mode. We assume the relevant UART clock has been enabled. */ volatile uart_t *uart = get_uart_device(dev);
/* Disable FIFO */ /* Set baud rate. */
UART_IIR_FCR_0 = 0x00; uint32_t rate = (8 * baud + 408000000) / (16 * baud);
uart->UART_LCR = 0x80; /* Enable DLAB. */
uart->UART_THR_DLAB = (uint8_t)rate; /* Divisor latch LSB. */
uart->UART_IER_DLAB = (uint8_t)(rate >> 8); /* Divisor latch MSB. */
uart->UART_LCR = 0; /* Diable DLAB. */
/* Set DLAB */ /* Setup UART in fifo mode. */
UART_LCR_0 = 0x80; uart->UART_IER_DLAB = 0;
UART_THR_DLAB_0_0 = (uint8_t)divider; uart->UART_IIR_FCR = 7; /* Enable and clear TX and RX FIFOs. */
UART_IER_DLAB_0_0 = (uint8_t)(divider >> 8); uart->UART_LSR;
wait(3 * ((baud + 999999) / baud));
/* 8N1 mode */ uart->UART_LCR = 3; /* Set word length 8. */
UART_LCR_0 = 0x03; uart->UART_MCR = 0;
uart->UART_MSR = 0;
uart->UART_IRDA_CSR = 0;
uart->UART_RX_FIFO_CFG = 1;
uart->UART_MIE = 0;
uart->UART_ASR = 0;
} }
void uart_transmit_char(char ch) { void uart_wait_idle(UartDevice dev, uint32_t which) {
/* Wait for THR to be empty */ while (!(get_uart_device(dev)->UART_VENDOR_STATUS & which)) {
while (!(UART_LSR_0 & 0x20)) {} /* Wait */
UART_THR_DLAB_0_0 = ch;
}
void uart_transmit_str(const char *str) {
while (*str) {
uart_transmit_char(*str++);
} }
} }
void uart_transmit_hex(uint32_t value) { void uart_send(UartDevice dev, const void *buf, size_t len)
for (unsigned int i = 0; i < 8; i++) { {
uint32_t nibble = (value >> (28 - i * 4)) & 0xF; volatile uart_t *uart = get_uart_device(dev);
uart_transmit_char("0123456789ABCDEF"[nibble]);
for (size_t i = 0; i < len; i++) {
while (uart->UART_LSR & UART_TX_FIFO_FULL) {
/* Wait until the TX FIFO isn't full */
}
uart->UART_THR_DLAB = *((const uint8_t *)buf + i);
}
}
void uart_recv(UartDevice dev, void *buf, size_t len) {
volatile uart_t *uart = get_uart_device(dev);
for (size_t i = 0; i < len; i++) {
while (uart->UART_LSR & UART_RX_FIFO_EMPTY) {
/* Wait until the RX FIFO isn't empty */
}
*((uint8_t *)buf + i) = uart->UART_THR_DLAB;
} }
} }

61
exosphere/src/uart.h
View file

@ -5,25 +5,56 @@
#include "memory_map.h" #include "memory_map.h"
/* Exosphere driver for the Tegra X1 UARTs. */ /* Exosphere driver for the Tegra X1 UARTs. */
/* Mostly copied from https://github.com/nwert/hekate/blob/master/hwinit/uart.h and https://github.com/nwert/hekate/blob/master/hwinit/uart.c */
/* TODO: Should we bother with support UARTB-D? */ static inline uintptr_t get_uart_base(void) {
return MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_UART);
static inline uintptr_t get_uarta_base(void) {
return MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_UART_A);
} }
#define UARTA_BASE (get_uarta_base()) #define UART_BASE (get_uart_base())
#define UART_THR_DLAB_0_0 MAKE_REG32(UARTA_BASE + 0x0) /* Exosphère: add the clkreset values for UART C,D,E */
#define UART_IER_DLAB_0_0 MAKE_REG32(UARTA_BASE + 0x4) typedef enum {
#define UART_IIR_FCR_0 MAKE_REG32(UARTA_BASE+ 0x8) UART_A = 0,
#define UART_LCR_0 MAKE_REG32(UARTA_BASE + 0xC) UART_B = 1,
#define UART_LSR_0 MAKE_REG32(UARTA_BASE + 0x14) UART_C = 2,
UART_D = 3,
UART_E = 4,
} UartDevice;
void uart_select(unsigned int id); #define BAUD_115200 115200
void uart_initialize(uint16_t divider);
void uart_transmit_char(char ch); #define UART_TX_IDLE 0x00000001
void uart_transmit_str(const char *str); #define UART_RX_IDLE 0x00000002
void uart_transmit_hex(uint32_t value); #define UART_TX_FIFO_FULL 0x100
#define UART_RX_FIFO_EMPTY 0x200
typedef struct {
/* 0x00 */ uint32_t UART_THR_DLAB;
/* 0x04 */ uint32_t UART_IER_DLAB;
/* 0x08 */ uint32_t UART_IIR_FCR;
/* 0x0C */ uint32_t UART_LCR;
/* 0x10 */ uint32_t UART_MCR;
/* 0x14 */ uint32_t UART_LSR;
/* 0x18 */ uint32_t UART_MSR;
/* 0x1C */ uint32_t UART_SPR;
/* 0x20 */ uint32_t UART_IRDA_CSR;
/* 0x24 */ uint32_t UART_RX_FIFO_CFG;
/* 0x28 */ uint32_t UART_MIE;
/* 0x2C */ uint32_t UART_VENDOR_STATUS;
/* 0x30 */ uint8_t _pad_30[0x0C];
/* 0x3C */ uint32_t UART_ASR;
} uart_t;
void uart_select(UartDevice dev);
void uart_init(UartDevice dev, uint32_t baud);
void uart_wait_idle(UartDevice dev, uint32_t which);
void uart_send(UartDevice dev, const void *buf, size_t len);
void uart_recv(UartDevice dev, void *buf, size_t len);
static inline volatile uart_t *get_uart_device(UartDevice dev) {
static const size_t offsets[] = {0, 0x40, 0x200, 0x300, 0x400};
return (volatile uart_t *)(UART_BASE + offsets[dev]);
}
#endif #endif