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thermosphere: handle stage2 data aborts, trap gicd accesses
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1775d59977
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f9ec21e99e
6 changed files with 116 additions and 3 deletions
61
thermosphere/src/data_abort.c
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61
thermosphere/src/data_abort.c
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/*
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* Copyright (c) 2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include "data_abort.h"
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#include "sysreg.h"
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#include "debug_log.h"
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#include "irq.h"
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// Lower el
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void dumpUnhandledDataAbort(DataAbortIss dabtIss, u64 far, const char *msg)
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{
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DEBUG("Unhandled");
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DEBUG(" %s ", msg);
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DEBUG("%s at ", dabtIss.wnr ? "write" : "read");
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if (dabtIss.fnv) {
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DEBUG("<unk>");
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} else {
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DEBUG("%016llx", far);
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}
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if (dabtIss.isv) {
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DEBUG(" size %u Rt=%u", BIT(dabtIss.sas), dabtIss.srt);
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}
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DEBUG("\n");
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}
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void handleLowerElDataAbortException(ExceptionStackFrame *frame, ExceptionSyndromeRegister esr)
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{
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DataAbortIss dabtIss;
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memcpy(&dabtIss, &esr, 4);
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u64 far = GET_SYSREG(far_el2);
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if (!dabtIss.isv || dabtIss.fnv) {
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dumpUnhandledDataAbort(dabtIss, far, "");
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}
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// TODO
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if ((far & ~0xFFFull) == (uintptr_t)g_irqManager.gic.gicd) {
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// TODO
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}
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dumpUnhandledDataAbort(dabtIss, far, "(fallback)");
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}
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42
thermosphere/src/data_abort.h
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42
thermosphere/src/data_abort.h
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@ -0,0 +1,42 @@
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/*
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* Copyright (c) 2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include "exceptions.h"
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typedef struct DataAbortIss {
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u32 dfsc : 6; // Fault status code
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u32 wnr : 1; // Write, not Read
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u32 s1ptw : 1; // Stage1 page table walk fault
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u32 cm : 1; // Cache maintenance
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u32 ea : 1; // External abort
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u32 fnv : 1; // FAR not Valid
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u32 set : 2; // Synchronous error type
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u32 vncr : 1; // vncr_el2 trap
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u32 ar : 1; // Acquire/release. Bit 14
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u32 sf : 1; // 64-bit register used
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u32 srt : 1; // Syndrome register transfer (register used)
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u32 sse : 1; // Syndrome sign extend
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u32 sas : 2; // Syndrome access size. Bit 23
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u32 isv : 1; // Instruction syndrome valid (ISS[23:14] valid)
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} DataAbortIss;
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void dumpUnhandledDataAbort(DataAbortIss dabtIss, u64 far, const char *msg);
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void handleLowerElDataAbortException(ExceptionStackFrame *frame, ExceptionSyndromeRegister esr);
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@ -20,6 +20,7 @@
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#include "smc.h"
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#include "core_ctx.h"
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#include "single_step.h"
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#include "data_abort.h"
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#include "debug_log.h"
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@ -110,7 +111,10 @@ void handleLowerElSyncException(ExceptionStackFrame *frame, ExceptionSyndromeReg
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case Exception_SystemRegisterTrap:
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handleMsrMrsTrap(frame, esr);
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break;
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case Exception_DataAbortLowerEl:
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// Basically, stage2 translation faults
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handleLowerElDataAbortException(frame, esr);
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break;
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case Exception_SoftwareStepLowerEl:
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handleSingleStep(frame, esr);
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break;
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@ -105,3 +105,7 @@ static inline void spsrSetT32ItFlags(u64 *spsr, u32 itFlags)
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bool spsrEvaluateConditionCode(u64 spsr, u32 conditionCode);
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void skipFaultingInstruction(ExceptionStackFrame *frame, u32 size);
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void dumpStackFrame(const ExceptionStackFrame *frame, bool sameEl);
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void handleLowerElSyncException(ExceptionStackFrame *frame, ExceptionSyndromeRegister esr);
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void handleSameElSyncException(ExceptionStackFrame *frame, ExceptionSyndromeRegister esr);
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void handleUnknownException(u32 offset);
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@ -72,7 +72,8 @@ uintptr_t configureStage2MemoryMap(u32 *addrSpaceSize)
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identityMapL3(g_vttbl_l3_0, 0x08000000ull, BITL(21), unchanged);
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// GICv2 CPU -> vCPU interface
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// GICD -> trapped, GICv2 CPU -> vCPU interface
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mmu_unmap_range(3, g_vttbl_l3_0, 0x08000000, 0x10000ull);
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mmu_map_page_range(g_vttbl_l3_0, 0x08010000ull, 0x08040000ull, 0x10000ull, devattrs);
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}
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@ -71,7 +71,8 @@ uintptr_t configureStage2MemoryMap(u32 *addrSpaceSize)
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identityMapL3(g_vttbl_l3_0, 0x00000000ull, BITL(21), unchanged);
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// GICv2 CPU -> vCPU interface
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// GICD -> trapped, GICv2 CPU -> vCPU interface
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mmu_unmap_page(g_vttbl_l3_0, 0x50401000ull);
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mmu_map_page_range(g_vttbl_l3_0, 0x50042000ull, 0x50046000ull, 0x2000ull, devattrs);
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}
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