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Update cheat docs with latest opcodes (#479)
* Update cheat docs with latest opcodes This covers changes made to Opcode 10 as well as the new 0xC0 opcode * Corrected Opcode 10 documentation
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@ -283,22 +283,24 @@ Code type 10 allows writing a register to memory.
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#### Encoding
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#### Encoding
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`ATSRIOra (aaaaaaaa)`
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`ATSRIOxa (aaaaaaaa)`
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+ T: width of memory write (1, 2, 4, or 8 bytes)
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+ T: width of memory write (1, 2, 4, or 8 bytes)
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+ S: Register to write to memory.
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+ S: Register to write to memory.
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+ R: Register to use as base address.
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+ R: Register to use as base address.
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+ I: Increment register flag (0 = do not increment R, 1 = increment R by T).
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+ I: Increment register flag (0 = do not increment R, 1 = increment R by T).
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+ O: Offset type, see below.
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+ O: Offset type, see below.
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+ r: Register used as offset when O is 1.
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+ x: Register used as offset when O is 1, Memory type when O is 3, 4 or 5.
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+ a: Value used as offset when O is 2.
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+ a: Value used as offset when O is 2, 4 or 5.
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#### Offset Types
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#### Offset Types
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+ 0: No Offset
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+ 0: No Offset
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+ 1: Use Offset Register
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+ 1: Use Offset Register
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+ 2: Use Fixed Offset
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+ 2: Use Fixed Offset
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+ 3: Memory Region + Base Register
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+ 4: Memory Region + Relative Address (ignore address register)
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+ 5: Memory Region + Relative Address + Offset Register
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---
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---
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### Code Type 11: Reserved
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### Code Type 11: Reserved
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@ -314,3 +316,50 @@ Code Types 12-15 signal to the VM to treat the upper two nybbles of the first dw
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This reserves an additional 64 opcodes for future use.
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This reserves an additional 64 opcodes for future use.
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---
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---
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### Code Type 0xC0: Begin Register Conditional Block
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Code type 0xC0 performs a comparison of the contents of a register and another value. This code support multiple operand types, see below.
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If the condition is not met, all instructions until the appropriate conditional block terminator are skipped.
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#### Encoding
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```
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C0TcSX##
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C0TcS0Ma aaaaaaaa
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C0TcS1Mr
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C0TcS2Ra aaaaaaaa
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C0TcS3Rr
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C0TcS400 VVVVVVVV (VVVVVVVV)
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C0TcS5X0
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```
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+ T: width of memory write (1, 2, 4, or 8 bytes)
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+ c: Condition to use, see below.
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+ S: Source Register
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+ X: Operand Type, see below.
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+ M: Memory Type (operand types 0 and 1)
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+ R: Address Register (operand types 2 and 3)
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+ a: Relative Address (operand types 0 and 2)
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+ r: Offset Register (operand types 1 and 3)
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+ X: Other Register (used for operand type 5)
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+ V: Value to compare to (operand type 4)
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#### Operand Type
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+ 0: Memory Base + Relative Offset
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+ 1: Memory Base + Offset Register
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+ 2: Register + Relative Offset
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+ 3: Register + Offset Register
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+ 4: Static Value
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+ 5: Other Register
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#### Conditions
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+ 1: >
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+ 2: >=
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+ 3: <
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+ 4: <=
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+ 5: ==
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+ 6: !=
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