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https://github.com/Atmosphere-NX/Atmosphere
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kern: lps driver fixes, sleep confirmed working on 1.0.0
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870b589379
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7 changed files with 59 additions and 1 deletions
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@ -16,3 +16,5 @@
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#pragma once
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#define CLK_RST_CONTROLLER_CLK_SOURCE_CSITE 0x1D4
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#define CLK_RST_CONTROLLER_RST_DEV_L_SET 0x300
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#define CLK_RST_CONTROLLER_RST_DEV_L_CLR 0x304
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@ -0,0 +1,18 @@
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/*
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* Copyright (c) 2018-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#define EVP_COP_RESET_VECTOR 0x200
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@ -15,6 +15,7 @@
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*/
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#pragma once
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#define FLOW_CTLR_HALT_COP_EVENTS 0x004
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#define FLOW_CTLR_CC4_HVC_CONTROL 0x060
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#define FLOW_CTLR_CC4_RETENTION_CONTROL 0x064
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#define FLOW_CTLR_CC4_HVC_RETRY 0x08C
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@ -605,6 +605,11 @@ namespace ams::kern::board::nintendo::nx {
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/* If on core 0, wake up the device page tables. */
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if (core_id == 0) {
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KDevicePageTable::Wakeup();
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/* If we're using the legacy driver, resume the bpmp firmware. */
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if (use_legacy_lps_driver) {
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lps::ResumeBpmpFirmware();
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}
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}
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/* Ensure that all cores get to this point before continuing. */
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@ -20,6 +20,7 @@
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#include "kern_bpmp_api.hpp"
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#include "kern_atomics_registers.hpp"
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#include "kern_clkrst_registers.hpp"
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#include "kern_evp_registers.hpp"
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#include "kern_flow_registers.hpp"
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#include "kern_ictlr_registers.hpp"
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#include "kern_pmc_registers.hpp"
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@ -31,7 +32,7 @@ namespace ams::kern::board::nintendo::nx::lps {
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constexpr inline int ChannelCount = 12;
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constexpr inline TimeSpan ChannelTimeout = TimeSpan::FromMicroSeconds(1);
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constexpr inline TimeSpan ChannelTimeout = TimeSpan::FromSeconds(1);
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constinit bool g_lps_init_done = false;
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constinit bool g_bpmp_connected = false;
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@ -434,4 +435,33 @@ namespace ams::kern::board::nintendo::nx::lps {
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ConfigureCc3AndCc4();
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}
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void ResumeBpmpFirmware() {
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/* Halt the bpmp. */
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Write(g_flow_address + FLOW_CTLR_HALT_COP_EVENTS, (0x2 << 29));
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/* Hold the bpmp in reset. */
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Write(g_clkrst_address + CLK_RST_CONTROLLER_RST_DEV_L_SET, 0x2);
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/* Read the saved bpmp entrypoint, and write it to the relevant exception vector. */
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const u32 bpmp_entry = Read(g_pmc_address + APBDEV_PMC_SCRATCH39);
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Write(g_evp_address + EVP_COP_RESET_VECTOR, bpmp_entry);
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/* Verify that we can read back the address we wrote. */
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while (Read(g_evp_address + EVP_COP_RESET_VECTOR) != bpmp_entry) {
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/* ... */
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}
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/* Spin for 40 ticks, to give enough time for the bpmp to be reset. */
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const auto start_tick = KHardwareTimer::GetTick();
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do {
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__asm__ __volatile__("" ::: "memory");
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} while ((KHardwareTimer::GetTick() - start_tick) < 40);
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/* Take the bpmp out of reset. */
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Write(g_clkrst_address + CLK_RST_CONTROLLER_RST_DEV_L_CLR, 0x2);
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/* Resume the bpmp. */
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Write(g_flow_address + FLOW_CTLR_HALT_COP_EVENTS, (0x0 << 29));
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}
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}
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@ -23,6 +23,7 @@ namespace ams::kern::board::nintendo::nx {
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void Initialize();
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Result EnableSuspend(bool enable);
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void InvokeCpuSleepHandler(uintptr_t arg, uintptr_t entry);
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void ResumeBpmpFirmware();
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}
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@ -18,3 +18,4 @@
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#define APBDEV_PMC_DPD_ENABLE 0x024
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#define APBDEV_PMC_SCRATCH0 0x050
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#define APBDEV_PMC_SCRATCH4 0x060
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#define APBDEV_PMC_SCRATCH39 0x138
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