mirror of
https://github.com/Atmosphere-NX/Atmosphere
synced 2024-11-09 22:56:35 +00:00
exo: implement mariko fuse driver
This commit is contained in:
parent
2a5d1572e1
commit
e16b87c843
2 changed files with 395 additions and 45 deletions
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@ -20,6 +20,10 @@ namespace ams::fuse {
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namespace {
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static constexpr SocType SocType_CommonInternal = static_cast<SocType>(-1);
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static_assert(SocType_CommonInternal != SocType_Erista);
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static_assert(SocType_CommonInternal != SocType_Mariko);
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struct BypassEntry {
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u32 offset;
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u32 value;
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@ -42,6 +46,11 @@ namespace ams::fuse {
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using HardwareType3 = util::BitPack32::Field<Reserved::Next, 4, int>;
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};
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struct OdmWord28 {
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using Regulator = util::BitPack32::Field<0, 1, int>;
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using Reserved = util::BitPack32::Field<1, 31, int>;
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};
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constexpr ALWAYS_INLINE int GetHardwareStateValue(const util::BitPack32 odm_word4) {
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constexpr auto HardwareState1Shift = 0;
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constexpr auto HardwareState2Shift = OdmWord4::HardwareState1::Count + HardwareState1Shift;
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@ -73,8 +82,16 @@ namespace ams::fuse {
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return GetRegisterRegion()->fuse;
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}
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ALWAYS_INLINE volatile FuseChipRegisters &GetChipRegisters() {
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return GetRegisterRegion()->chip;
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ALWAYS_INLINE volatile FuseChipRegistersCommon &GetChipRegistersCommon() {
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return GetRegisterRegion()->chip_common;
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}
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ALWAYS_INLINE volatile FuseChipRegistersErista &GetChipRegistersErista() {
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return GetRegisterRegion()->chip_erista;
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}
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ALWAYS_INLINE volatile FuseChipRegistersMariko &GetChipRegistersMariko() {
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return GetRegisterRegion()->chip_mariko;
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}
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bool IsIdle() {
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@ -85,6 +102,31 @@ namespace ams::fuse {
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while (!IsIdle()) { /* ... */ }
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}
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u32 GetOdmWordImpl(int index, fuse::SocType soc_type) {
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if (index < 8) {
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volatile auto &chip = GetChipRegistersCommon();
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return chip.FUSE_RESERVED_ODM_0[index - 0];
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} else if (soc_type == SocType_Mariko) {
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volatile auto &chip = GetChipRegistersMariko();
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if (index < 22) {
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return chip.FUSE_RESERVED_ODM_8[index - 8];
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} else if (index < 25) {
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return chip.FUSE_RESERVED_ODM_22[index - 22];
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} else if (index < 26) {
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return chip.FUSE_RESERVED_ODM_25[index - 25];
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} else if (index < 29) {
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return chip.FUSE_RESERVED_ODM_26[index - 26];
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} else if (index < 30) {
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return chip.FUSE_RESERVED_ODM_29[index - 29];
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}
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}
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AMS_ABORT("Invalid ODM fuse read");
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}
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u32 GetCommonOdmWord(int index) {
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return GetOdmWordImpl(index, SocType_CommonInternal);
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}
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bool IsNewFuseFormat() {
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/* On mariko, this should always be true. */
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if (GetSocType() != SocType_Erista) {
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@ -92,7 +134,7 @@ namespace ams::fuse {
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}
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/* Require that the format version be non-zero in odm4. */
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if (util::BitPack32{GetOdmWord(4)}.Get<OdmWord4::FormatVersion>() == 0) {
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if (util::BitPack32{GetCommonOdmWord(4)}.Get<OdmWord4::FormatVersion>() == 0) {
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return false;
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}
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@ -100,8 +142,8 @@ namespace ams::fuse {
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constexpr u32 NewFuseFormatMagic0 = 0x8E61ECAE;
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constexpr u32 NewFuseFormatMagic1 = 0xF2BA3BB2;
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const u32 w0 = GetOdmWord(0);
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const u32 w1 = GetOdmWord(1);
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const u32 w0 = GetCommonOdmWord(0);
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const u32 w1 = GetCommonOdmWord(1);
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return w0 == NewFuseFormatMagic0 && w1 == NewFuseFormatMagic1;
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}
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@ -206,12 +248,12 @@ namespace ams::fuse {
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}
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u32 GetOdmWord(int index) {
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return GetChipRegisters().FUSE_RESERVED_ODM[index];
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return GetOdmWordImpl(index, GetSocType());
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}
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void GetEcid(br::BootEcid *out) {
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/* Get the registers. */
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volatile auto &chip = GetChipRegisters();
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volatile auto &chip = GetChipRegistersCommon();
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/* Read the ecid components. */
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const u32 vendor = reg::Read(chip.FUSE_OPT_VENDOR_CODE) & ((1u << 4) - 1);
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@ -235,7 +277,7 @@ namespace ams::fuse {
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u64 GetDeviceId() {
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/* Get the registers. */
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volatile auto &chip = GetChipRegisters();
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volatile auto &chip = GetChipRegistersCommon();
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/* Read the device id components. */
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/* NOTE: Device ID is "basically" just an alternate encoding of Ecid. */
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@ -258,12 +300,12 @@ namespace ams::fuse {
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}
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DramId GetDramId() {
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return static_cast<DramId>(util::BitPack32{GetOdmWord(4)}.Get<OdmWord4::DramId>());
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return static_cast<DramId>(util::BitPack32{GetCommonOdmWord(4)}.Get<OdmWord4::DramId>());
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}
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HardwareType GetHardwareType() {
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/* Read the odm word. */
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const util::BitPack32 odm_word4 = { GetOdmWord(4) };
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const util::BitPack32 odm_word4 = { GetCommonOdmWord(4) };
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/* Get the value. */
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const auto value = GetHardwareTypeValue(odm_word4);
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@ -280,7 +322,7 @@ namespace ams::fuse {
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HardwareState GetHardwareState() {
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/* Read the odm word. */
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const util::BitPack32 odm_word4 = { GetOdmWord(4) };
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const util::BitPack32 odm_word4 = { GetCommonOdmWord(4) };
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/* Get the value. */
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const auto value = GetHardwareStateValue(odm_word4);
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@ -293,22 +335,28 @@ namespace ams::fuse {
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}
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PatchVersion GetPatchVersion() {
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const auto patch_version = reg::Read(GetChipRegisters().FUSE_SOC_SPEEDO_1_CALIB);
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const auto patch_version = reg::Read(GetChipRegistersCommon().FUSE_SOC_SPEEDO_1_CALIB);
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return static_cast<PatchVersion>(static_cast<int>(GetSocType() << 12) | patch_version);
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}
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QuestState GetQuestState() {
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return static_cast<QuestState>(util::BitPack32{GetOdmWord(4)}.Get<OdmWord4::QuestState>());
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return static_cast<QuestState>(util::BitPack32{GetCommonOdmWord(4)}.Get<OdmWord4::QuestState>());
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}
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pmic::Regulator GetRegulator() {
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/* TODO: How should mariko be handled? This reads from ODM word 28 in fuses (not present in erista...). */
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return pmic::Regulator_Erista_Max77621;
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if (GetSocType() == SocType_Mariko) {
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/* Read the odm word. */
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const util::BitPack32 odm_word28 = { GetOdmWordImpl(28, SocType_Mariko) };
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return static_cast<pmic::Regulator>(odm_word28.Get<OdmWord28::Regulator>() + 1);
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} else /* if (GetSocType() == SocType_Erista) */ {
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return pmic::Regulator_Erista_Max77621;
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}
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}
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int GetDeviceUniqueKeyGeneration() {
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if (IsNewFuseFormat()) {
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return util::BitPack32{GetOdmWord(2)}.Get<OdmWord2::DeviceUniqueKeyGeneration>();
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return util::BitPack32{GetCommonOdmWord(2)}.Get<OdmWord2::DeviceUniqueKeyGeneration>();
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} else {
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return 0;
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}
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@ -344,13 +392,13 @@ namespace ams::fuse {
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}
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/* Some patched units use XUSB in RCM. */
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if (reg::Read(GetChipRegisters().FUSE_RESERVED_SW) & 0x80) {
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if (reg::Read(GetChipRegistersCommon().FUSE_RESERVED_SW) & 0x80) {
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g_has_rcm_bug_patch = true;
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break;
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}
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/* Other units have a proper ipatch instead. */
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u32 word_count = reg::Read(GetChipRegisters().FUSE_FIRST_BOOTROM_PATCH_SIZE) & 0x7F;
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u32 word_count = reg::Read(GetChipRegistersCommon().FUSE_FIRST_BOOTROM_PATCH_SIZE) & 0x7F;
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u32 word_addr = 191;
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while (word_count && !g_has_rcm_bug_patch) {
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@ -379,7 +427,7 @@ namespace ams::fuse {
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}
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bool IsOdmProductionMode() {
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return reg::HasValue(GetChipRegisters().FUSE_SECURITY_MODE, FUSE_REG_BITS_ENUM(SECURITY_MODE_SECURITY_MODE, ENABLED));
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return reg::HasValue(GetChipRegistersCommon().FUSE_SECURITY_MODE, FUSE_REG_BITS_ENUM(SECURITY_MODE_SECURITY_MODE, ENABLED));
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}
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void ConfigureFuseBypass() {
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@ -42,12 +42,162 @@ namespace ams::fuse {
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u32 FUSE_PRIVATE_KEY2_NONZERO;
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u32 FUSE_PRIVATE_KEY3_NONZERO;
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u32 FUSE_PRIVATE_KEY4_NONZERO;
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u32 _0x94[0x1B];
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u32 _0x94;
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};
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static_assert(util::is_pod<FuseRegisters>::value);
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static_assert(sizeof(FuseRegisters) == 0x100);
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static_assert(sizeof(FuseRegisters) == 0x98);
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struct FuseChipRegisters {
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struct FuseChipRegistersCommon {
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u32 _0x98[0x1A];
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u32 FUSE_PRODUCTION_MODE;
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u32 FUSE_JTAG_SECUREID_VALID;
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u32 FUSE_ODM_LOCK;
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u32 FUSE_OPT_OPENGL_EN;
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u32 FUSE_SKU_INFO;
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u32 FUSE_CPU_SPEEDO_0_CALIB;
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u32 FUSE_CPU_IDDQ_CALIB;
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u32 _0x11C;
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u32 _0x120;
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u32 _0x124;
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u32 FUSE_OPT_FT_REV;
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u32 FUSE_CPU_SPEEDO_1_CALIB;
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u32 FUSE_CPU_SPEEDO_2_CALIB;
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u32 FUSE_SOC_SPEEDO_0_CALIB;
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u32 FUSE_SOC_SPEEDO_1_CALIB;
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u32 FUSE_SOC_SPEEDO_2_CALIB;
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u32 FUSE_SOC_IDDQ_CALIB;
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u32 _0x144;
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u32 FUSE_FA;
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u32 FUSE_RESERVED_PRODUCTION;
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u32 FUSE_HDMI_LANE0_CALIB;
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u32 FUSE_HDMI_LANE1_CALIB;
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u32 FUSE_HDMI_LANE2_CALIB;
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u32 FUSE_HDMI_LANE3_CALIB;
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u32 FUSE_ENCRYPTION_RATE;
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u32 FUSE_PUBLIC_KEY[0x8];
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u32 FUSE_TSENSOR1_CALIB;
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u32 FUSE_TSENSOR2_CALIB;
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u32 _0x18C;
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u32 FUSE_OPT_CP_REV;
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u32 FUSE_OPT_PFG;
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u32 FUSE_TSENSOR0_CALIB;
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u32 FUSE_FIRST_BOOTROM_PATCH_SIZE;
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u32 FUSE_SECURITY_MODE;
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u32 FUSE_PRIVATE_KEY[0x5];
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u32 FUSE_ARM_JTAG_DIS;
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u32 FUSE_BOOT_DEVICE_INFO;
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u32 FUSE_RESERVED_SW;
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u32 FUSE_OPT_VP9_DISABLE;
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u32 FUSE_RESERVED_ODM_0[8 - 0];
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u32 FUSE_OBS_DIS;
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u32 _0x1EC;
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u32 FUSE_USB_CALIB;
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u32 FUSE_SKU_DIRECT_CONFIG;
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u32 FUSE_KFUSE_PRIVKEY_CTRL;
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u32 FUSE_PACKAGE_INFO;
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u32 FUSE_OPT_VENDOR_CODE;
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u32 FUSE_OPT_FAB_CODE;
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u32 FUSE_OPT_LOT_CODE_0;
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u32 FUSE_OPT_LOT_CODE_1;
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u32 FUSE_OPT_WAFER_ID;
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u32 FUSE_OPT_X_COORDINATE;
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u32 FUSE_OPT_Y_COORDINATE;
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u32 FUSE_OPT_SEC_DEBUG_EN;
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u32 FUSE_OPT_OPS_RESERVED;
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u32 _0x224;
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u32 FUSE_GPU_IDDQ_CALIB;
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u32 FUSE_TSENSOR3_CALIB;
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u32 _0x234;
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u32 _0x238;
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u32 _0x23C;
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u32 _0x240;
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u32 _0x244;
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u32 FUSE_OPT_SAMPLE_TYPE;
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u32 FUSE_OPT_SUBREVISION;
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u32 FUSE_OPT_SW_RESERVED_0;
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u32 FUSE_OPT_SW_RESERVED_1;
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u32 FUSE_TSENSOR4_CALIB;
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u32 FUSE_TSENSOR5_CALIB;
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u32 FUSE_TSENSOR6_CALIB;
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u32 FUSE_TSENSOR7_CALIB;
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u32 FUSE_OPT_PRIV_SEC_EN;
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u32 _0x268;
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u32 _0x26C;
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u32 _0x270;
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u32 _0x274;
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u32 _0x278;
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u32 FUSE_FUSE2TSEC_DEBUG_DISABLE;
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u32 FUSE_TSENSOR_COMMON;
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u32 FUSE_OPT_CP_BIN;
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u32 FUSE_OPT_GPU_DISABLE;
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u32 FUSE_OPT_FT_BIN;
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u32 FUSE_OPT_DONE_MAP;
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u32 _0x294;
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u32 FUSE_APB2JTAG_DISABLE;
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u32 FUSE_ODM_INFO;
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u32 _0x2A0;
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u32 _0x2A4;
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u32 FUSE_ARM_CRYPT_DE_FEATURE;
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u32 _0x2AC;
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u32 _0x2B0;
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u32 _0x2B4;
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u32 _0x2B8;
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u32 _0x2BC;
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u32 FUSE_WOA_SKU_FLAG;
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u32 FUSE_ECO_RESERVE_1;
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u32 FUSE_GCPLEX_CONFIG_FUSE;
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u32 FUSE_PRODUCTION_MONTH;
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u32 FUSE_RAM_REPAIR_INDICATOR;
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u32 FUSE_TSENSOR9_CALIB;
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u32 _0x2D8;
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u32 FUSE_VMIN_CALIBRATION;
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u32 FUSE_AGING_SENSOR_CALIBRATION;
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u32 FUSE_DEBUG_AUTHENTICATION;
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u32 FUSE_SECURE_PROVISION_INDEX;
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u32 FUSE_SECURE_PROVISION_INFO;
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u32 FUSE_OPT_GPU_DISABLE_CP1;
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u32 FUSE_SPARE_ENDIS;
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u32 FUSE_ECO_RESERVE_0;
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u32 _0x2FC;
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u32 _0x300;
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u32 FUSE_RESERVED_CALIB0;
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u32 FUSE_RESERVED_CALIB1;
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u32 FUSE_OPT_GPU_TPC0_DISABLE;
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u32 FUSE_OPT_GPU_TPC0_DISABLE_CP1;
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u32 FUSE_OPT_CPU_DISABLE;
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u32 FUSE_OPT_CPU_DISABLE_CP1;
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u32 FUSE_TSENSOR10_CALIB;
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u32 FUSE_TSENSOR10_CALIB_AUX;
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u32 _0x324;
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u32 _0x328;
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u32 _0x32C;
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u32 _0x330;
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u32 _0x334;
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u32 FUSE_OPT_GPU_TPC0_DISABLE_CP2;
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u32 FUSE_OPT_GPU_TPC1_DISABLE;
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u32 FUSE_OPT_GPU_TPC1_DISABLE_CP1;
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u32 FUSE_OPT_GPU_TPC1_DISABLE_CP2;
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u32 FUSE_OPT_CPU_DISABLE_CP2;
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u32 FUSE_OPT_GPU_DISABLE_CP2;
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u32 FUSE_USB_CALIB_EXT;
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u32 FUSE_RESERVED_FIELD;
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u32 _0x358;
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u32 _0x35C;
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u32 _0x360;
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u32 _0x364;
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u32 _0x368;
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u32 _0x36C;
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u32 _0x370;
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u32 _0x374;
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u32 _0x378;
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u32 FUSE_SPARE_REALIGNMENT_REG;
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u32 FUSE_SPARE_BIT[0x20];
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};
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static_assert(util::is_pod<FuseChipRegistersCommon>::value);
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static_assert(sizeof(FuseChipRegistersCommon) == 0x400 - 0x98);
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struct FuseChipRegistersErista {
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u32 _0x98[0x1A];
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u32 FUSE_PRODUCTION_MODE;
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u32 FUSE_JTAG_SECUREID_VALID;
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u32 FUSE_ODM_LOCK;
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@ -87,7 +237,7 @@ namespace ams::fuse {
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u32 FUSE_BOOT_DEVICE_INFO;
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u32 FUSE_RESERVED_SW;
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u32 FUSE_OPT_VP9_DISABLE;
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u32 FUSE_RESERVED_ODM[0x8];
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u32 FUSE_RESERVED_ODM_0[8 - 0];
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u32 FUSE_OBS_DIS;
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u32 FUSE_NOR_INFO;
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u32 FUSE_USB_CALIB;
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@ -121,34 +271,34 @@ namespace ams::fuse {
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u32 FUSE_TSENSOR7_CALIB;
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u32 FUSE_OPT_PRIV_SEC_EN;
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u32 FUSE_PKC_DISABLE;
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u32 _0x16C;
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u32 _0x170;
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u32 _0x174;
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u32 _0x178;
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u32 _0x26C;
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u32 _0x270;
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u32 _0x274;
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u32 _0x278;
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u32 FUSE_FUSE2TSEC_DEBUG_DISABLE;
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u32 FUSE_TSENSOR_COMMON;
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u32 FUSE_OPT_CP_BIN;
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u32 FUSE_OPT_GPU_DISABLE;
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u32 FUSE_OPT_FT_BIN;
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u32 FUSE_OPT_DONE_MAP;
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u32 _0x194;
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u32 _0x294;
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u32 FUSE_APB2JTAG_DISABLE;
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u32 FUSE_ODM_INFO;
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u32 _0x1A0;
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u32 _0x1A4;
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u32 _0x2A0;
|
||||
u32 _0x2A4;
|
||||
u32 FUSE_ARM_CRYPT_DE_FEATURE;
|
||||
u32 _0x1AC;
|
||||
u32 _0x1B0;
|
||||
u32 _0x1B4;
|
||||
u32 _0x1B8;
|
||||
u32 _0x1BC;
|
||||
u32 _0x2AC;
|
||||
u32 _0x2B0;
|
||||
u32 _0x2B4;
|
||||
u32 _0x2B8;
|
||||
u32 _0x2BC;
|
||||
u32 FUSE_WOA_SKU_FLAG;
|
||||
u32 FUSE_ECO_RESERVE_1;
|
||||
u32 FUSE_GCPLEX_CONFIG_FUSE;
|
||||
u32 FUSE_PRODUCTION_MONTH;
|
||||
u32 FUSE_RAM_REPAIR_INDICATOR;
|
||||
u32 FUSE_TSENSOR9_CALIB;
|
||||
u32 _0x1D8;
|
||||
u32 _0x2D8;
|
||||
u32 FUSE_VMIN_CALIBRATION;
|
||||
u32 FUSE_AGING_SENSOR_CALIBRATION;
|
||||
u32 FUSE_DEBUG_AUTHENTICATION;
|
||||
|
@ -157,8 +307,8 @@ namespace ams::fuse {
|
|||
u32 FUSE_OPT_GPU_DISABLE_CP1;
|
||||
u32 FUSE_SPARE_ENDIS;
|
||||
u32 FUSE_ECO_RESERVE_0;
|
||||
u32 _0x1FC;
|
||||
u32 _0x200;
|
||||
u32 _0x2FC;
|
||||
u32 _0x300;
|
||||
u32 FUSE_RESERVED_CALIB0;
|
||||
u32 FUSE_RESERVED_CALIB1;
|
||||
u32 FUSE_OPT_GPU_TPC0_DISABLE;
|
||||
|
@ -181,23 +331,175 @@ namespace ams::fuse {
|
|||
u32 FUSE_USB_CALIB_EXT;
|
||||
u32 FUSE_RESERVED_FIELD;
|
||||
u32 FUSE_OPT_ECC_EN;
|
||||
u32 _0x25C;
|
||||
u32 _0x260;
|
||||
u32 _0x264;
|
||||
u32 _0x268;
|
||||
u32 _0x35C;
|
||||
u32 _0x360;
|
||||
u32 _0x364;
|
||||
u32 _0x368;
|
||||
u32 _0x36C;
|
||||
u32 _0x370;
|
||||
u32 _0x374;
|
||||
u32 _0x378;
|
||||
u32 FUSE_SPARE_REALIGNMENT_REG;
|
||||
u32 FUSE_SPARE_BIT[0x20];
|
||||
};
|
||||
static_assert(util::is_pod<FuseChipRegistersErista>::value);
|
||||
static_assert(sizeof(FuseChipRegistersErista) == 0x400 - 0x98);
|
||||
|
||||
struct FuseChipRegistersMariko {
|
||||
u32 FUSE_RESERVED_ODM_8[22 - 8];
|
||||
u32 FUSE_KEK[4];
|
||||
u32 FUSE_BEK[4];
|
||||
u32 _0xF0[4];
|
||||
u32 FUSE_PRODUCTION_MODE;
|
||||
u32 FUSE_JTAG_SECUREID_VALID;
|
||||
u32 FUSE_ODM_LOCK;
|
||||
u32 FUSE_OPT_OPENGL_EN;
|
||||
u32 FUSE_SKU_INFO;
|
||||
u32 FUSE_CPU_SPEEDO_0_CALIB;
|
||||
u32 FUSE_CPU_IDDQ_CALIB;
|
||||
u32 FUSE_RESERVED_ODM_22[25 - 22];
|
||||
u32 FUSE_OPT_FT_REV;
|
||||
u32 FUSE_CPU_SPEEDO_1_CALIB;
|
||||
u32 FUSE_CPU_SPEEDO_2_CALIB;
|
||||
u32 FUSE_SOC_SPEEDO_0_CALIB;
|
||||
u32 FUSE_SOC_SPEEDO_1_CALIB;
|
||||
u32 FUSE_SOC_SPEEDO_2_CALIB;
|
||||
u32 FUSE_SOC_IDDQ_CALIB;
|
||||
u32 FUSE_RESERVED_ODM_25[26 - 25];
|
||||
u32 FUSE_FA;
|
||||
u32 FUSE_RESERVED_PRODUCTION;
|
||||
u32 FUSE_HDMI_LANE0_CALIB;
|
||||
u32 FUSE_HDMI_LANE1_CALIB;
|
||||
u32 FUSE_HDMI_LANE2_CALIB;
|
||||
u32 FUSE_HDMI_LANE3_CALIB;
|
||||
u32 FUSE_ENCRYPTION_RATE;
|
||||
u32 FUSE_PUBLIC_KEY[0x8];
|
||||
u32 FUSE_TSENSOR1_CALIB;
|
||||
u32 FUSE_TSENSOR2_CALIB;
|
||||
u32 FUSE_OPT_SECURE_SCC_DIS;
|
||||
u32 FUSE_OPT_CP_REV;
|
||||
u32 FUSE_OPT_PFG;
|
||||
u32 FUSE_TSENSOR0_CALIB;
|
||||
u32 FUSE_FIRST_BOOTROM_PATCH_SIZE;
|
||||
u32 FUSE_SECURITY_MODE;
|
||||
u32 FUSE_PRIVATE_KEY[0x5];
|
||||
u32 FUSE_ARM_JTAG_DIS;
|
||||
u32 FUSE_BOOT_DEVICE_INFO;
|
||||
u32 FUSE_RESERVED_SW;
|
||||
u32 FUSE_OPT_VP9_DISABLE;
|
||||
u32 FUSE_RESERVED_ODM_0[8 - 0];
|
||||
u32 FUSE_OBS_DIS;
|
||||
u32 _0x1EC;
|
||||
u32 FUSE_USB_CALIB;
|
||||
u32 FUSE_SKU_DIRECT_CONFIG;
|
||||
u32 FUSE_KFUSE_PRIVKEY_CTRL;
|
||||
u32 FUSE_PACKAGE_INFO;
|
||||
u32 FUSE_OPT_VENDOR_CODE;
|
||||
u32 FUSE_OPT_FAB_CODE;
|
||||
u32 FUSE_OPT_LOT_CODE_0;
|
||||
u32 FUSE_OPT_LOT_CODE_1;
|
||||
u32 FUSE_OPT_WAFER_ID;
|
||||
u32 FUSE_OPT_X_COORDINATE;
|
||||
u32 FUSE_OPT_Y_COORDINATE;
|
||||
u32 FUSE_OPT_SEC_DEBUG_EN;
|
||||
u32 FUSE_OPT_OPS_RESERVED;
|
||||
u32 _0x224;
|
||||
u32 FUSE_GPU_IDDQ_CALIB;
|
||||
u32 FUSE_TSENSOR3_CALIB;
|
||||
u32 FUSE_CLOCK_BONDOUT0;
|
||||
u32 FUSE_CLOCK_BONDOUT1;
|
||||
u32 FUSE_RESERVED_ODM_26[29 - 26];
|
||||
u32 FUSE_OPT_SAMPLE_TYPE;
|
||||
u32 FUSE_OPT_SUBREVISION;
|
||||
u32 FUSE_OPT_SW_RESERVED_0;
|
||||
u32 FUSE_OPT_SW_RESERVED_1;
|
||||
u32 FUSE_TSENSOR4_CALIB;
|
||||
u32 FUSE_TSENSOR5_CALIB;
|
||||
u32 FUSE_TSENSOR6_CALIB;
|
||||
u32 FUSE_TSENSOR7_CALIB;
|
||||
u32 FUSE_OPT_PRIV_SEC_EN;
|
||||
u32 FUSE_BOOT_SECURITY_INFO;
|
||||
u32 _0x26C;
|
||||
u32 _0x270;
|
||||
u32 _0x274;
|
||||
u32 _0x278;
|
||||
u32 FUSE_FUSE2TSEC_DEBUG_DISABLE;
|
||||
u32 FUSE_TSENSOR_COMMON;
|
||||
u32 FUSE_OPT_CP_BIN;
|
||||
u32 FUSE_OPT_GPU_DISABLE;
|
||||
u32 FUSE_OPT_FT_BIN;
|
||||
u32 FUSE_OPT_DONE_MAP;
|
||||
u32 FUSE_RESERVED_ODM_29[30 - 29];
|
||||
u32 FUSE_APB2JTAG_DISABLE;
|
||||
u32 FUSE_ODM_INFO;
|
||||
u32 _0x2A0;
|
||||
u32 _0x2A4;
|
||||
u32 FUSE_ARM_CRYPT_DE_FEATURE;
|
||||
u32 _0x2AC;
|
||||
u32 _0x2B0;
|
||||
u32 _0x2B4;
|
||||
u32 _0x2B8;
|
||||
u32 _0x2BC;
|
||||
u32 FUSE_WOA_SKU_FLAG;
|
||||
u32 FUSE_ECO_RESERVE_1;
|
||||
u32 FUSE_GCPLEX_CONFIG_FUSE;
|
||||
u32 FUSE_PRODUCTION_MONTH;
|
||||
u32 FUSE_RAM_REPAIR_INDICATOR;
|
||||
u32 FUSE_TSENSOR9_CALIB;
|
||||
u32 _0x2D8;
|
||||
u32 FUSE_VMIN_CALIBRATION;
|
||||
u32 FUSE_AGING_SENSOR_CALIBRATION;
|
||||
u32 FUSE_DEBUG_AUTHENTICATION;
|
||||
u32 FUSE_SECURE_PROVISION_INDEX;
|
||||
u32 FUSE_SECURE_PROVISION_INFO;
|
||||
u32 FUSE_OPT_GPU_DISABLE_CP1;
|
||||
u32 FUSE_SPARE_ENDIS;
|
||||
u32 FUSE_ECO_RESERVE_0;
|
||||
u32 _0x2FC;
|
||||
u32 _0x300;
|
||||
u32 FUSE_RESERVED_CALIB0;
|
||||
u32 FUSE_RESERVED_CALIB1;
|
||||
u32 FUSE_OPT_GPU_TPC0_DISABLE;
|
||||
u32 FUSE_OPT_GPU_TPC0_DISABLE_CP1;
|
||||
u32 FUSE_OPT_CPU_DISABLE;
|
||||
u32 FUSE_OPT_CPU_DISABLE_CP1;
|
||||
u32 FUSE_TSENSOR10_CALIB;
|
||||
u32 FUSE_TSENSOR10_CALIB_AUX;
|
||||
u32 _0x324;
|
||||
u32 _0x328;
|
||||
u32 _0x32C;
|
||||
u32 _0x330;
|
||||
u32 _0x334;
|
||||
u32 FUSE_OPT_GPU_TPC0_DISABLE_CP2;
|
||||
u32 FUSE_OPT_GPU_TPC1_DISABLE;
|
||||
u32 FUSE_OPT_GPU_TPC1_DISABLE_CP1;
|
||||
u32 FUSE_OPT_GPU_TPC1_DISABLE_CP2;
|
||||
u32 FUSE_OPT_CPU_DISABLE_CP2;
|
||||
u32 FUSE_OPT_GPU_DISABLE_CP2;
|
||||
u32 FUSE_USB_CALIB_EXT;
|
||||
u32 FUSE_RESERVED_FIELD;
|
||||
u32 _0x358;
|
||||
u32 _0x35C;
|
||||
u32 _0x360;
|
||||
u32 _0x364;
|
||||
u32 _0x368;
|
||||
u32 _0x36C;
|
||||
u32 _0x370;
|
||||
u32 _0x374;
|
||||
u32 _0x378;
|
||||
u32 FUSE_SPARE_REALIGNMENT_REG;
|
||||
u32 FUSE_SPARE_BIT[0x20];
|
||||
};
|
||||
static_assert(util::is_pod<FuseChipRegisters>::value);
|
||||
static_assert(sizeof(FuseChipRegisters) == 0x300);
|
||||
static_assert(util::is_pod<FuseChipRegistersMariko>::value);
|
||||
static_assert(sizeof(FuseChipRegistersMariko) == 0x400 - 0x98);
|
||||
|
||||
struct FuseRegisterRegion {
|
||||
FuseRegisters fuse;
|
||||
FuseChipRegisters chip;
|
||||
union {
|
||||
FuseChipRegistersCommon chip_common;
|
||||
FuseChipRegistersErista chip_erista;
|
||||
FuseChipRegistersMariko chip_mariko;
|
||||
};
|
||||
};
|
||||
static_assert(util::is_pod<FuseRegisterRegion>::value);
|
||||
static_assert(sizeof(FuseRegisterRegion) == secmon::MemoryRegionPhysicalDeviceFuses.GetSize());
|
||||
|
|
Loading…
Reference in a new issue