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dmnt: explicitly reserve double-extended width opcodes
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2 changed files with 8 additions and 0 deletions
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@ -260,6 +260,9 @@ bool DmntCheatVm::DecodeNextOpcode(CheatVmOpcode *out) {
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if (opcode.opcode >= CheatVmOpcodeType_ExtendedWidth) {
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if (opcode.opcode >= CheatVmOpcodeType_ExtendedWidth) {
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opcode.opcode = (CheatVmOpcodeType)((((u32)opcode.opcode) << 4) | ((first_dword >> 24) & 0xF));
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opcode.opcode = (CheatVmOpcodeType)((((u32)opcode.opcode) << 4) | ((first_dword >> 24) & 0xF));
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}
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}
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if (opcode.opcode >= CheatVmOpcodeType_DoubleExtendedWidth) {
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opcode.opcode = (CheatVmOpcodeType)((((u32)opcode.opcode) << 4) | ((first_dword >> 20) & 0xF));
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}
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/* detect condition start. */
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/* detect condition start. */
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switch (opcode.opcode) {
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switch (opcode.opcode) {
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@ -501,6 +504,7 @@ bool DmntCheatVm::DecodeNextOpcode(CheatVmOpcode *out) {
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}
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}
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break;
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break;
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case CheatVmOpcodeType_ExtendedWidth:
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case CheatVmOpcodeType_ExtendedWidth:
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case CheatVmOpcodeType_DoubleExtendedWidth:
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default:
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default:
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/* Unrecognized instruction cannot be decoded. */
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/* Unrecognized instruction cannot be decoded. */
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valid = false;
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valid = false;
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@ -45,6 +45,10 @@ enum CheatVmOpcodeType : u32 {
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CheatVmOpcodeType_BeginRegisterConditionalBlock = 0xC0,
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CheatVmOpcodeType_BeginRegisterConditionalBlock = 0xC0,
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CheatVmOpcodeType_SaveRestoreRegister = 0xC1,
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CheatVmOpcodeType_SaveRestoreRegister = 0xC1,
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CheatVmOpcodeType_SaveRestoreRegisterMask = 0xC2,
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CheatVmOpcodeType_SaveRestoreRegisterMask = 0xC2,
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/* This is a meta entry, and not a real opcode. */
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/* This is to facilitate multi-nybble instruction decoding. */
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CheatVmOpcodeType_DoubleExtendedWidth = 0xF0,
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};
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};
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enum MemoryAccessType : u32 {
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enum MemoryAccessType : u32 {
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