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https://github.com/Atmosphere-NX/Atmosphere
synced 2024-12-22 12:21:18 +00:00
kern: swap tpidr_el1/cntv_cval_el0 as scratch vs exception stack
This commit is contained in:
parent
2f930c2d5f
commit
c216f92a91
7 changed files with 34 additions and 28 deletions
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@ -232,7 +232,7 @@ namespace ams::kern::arch::arm64::cpu {
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}
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}
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ALWAYS_INLINE void SetExceptionThreadStackTop(uintptr_t top) {
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ALWAYS_INLINE void SetExceptionThreadStackTop(uintptr_t top) {
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SetTpidrEl1(top);
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cpu::SetCntvCvalEl0(top);
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}
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}
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ALWAYS_INLINE void SwitchThreadLocalRegion(uintptr_t tlr) {
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ALWAYS_INLINE void SwitchThreadLocalRegion(uintptr_t tlr) {
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@ -74,6 +74,7 @@ namespace ams::kern::arch::arm64::cpu {
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MESOSPHERE_CPU_DEFINE_SYSREG_ACCESSORS(CntkCtlEl1, cntkctl_el1)
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MESOSPHERE_CPU_DEFINE_SYSREG_ACCESSORS(CntkCtlEl1, cntkctl_el1)
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MESOSPHERE_CPU_DEFINE_SYSREG_ACCESSORS(CntpCtlEl0, cntp_ctl_el0)
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MESOSPHERE_CPU_DEFINE_SYSREG_ACCESSORS(CntpCtlEl0, cntp_ctl_el0)
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MESOSPHERE_CPU_DEFINE_SYSREG_ACCESSORS(CntpCvalEl0, cntp_cval_el0)
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MESOSPHERE_CPU_DEFINE_SYSREG_ACCESSORS(CntpCvalEl0, cntp_cval_el0)
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MESOSPHERE_CPU_DEFINE_SYSREG_ACCESSORS(CntvCvalEl0, cntv_cval_el0)
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MESOSPHERE_CPU_DEFINE_SYSREG_ACCESSORS(Daif, daif)
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MESOSPHERE_CPU_DEFINE_SYSREG_ACCESSORS(Daif, daif)
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@ -95,9 +95,10 @@ _ZN3ams4kern5board8nintendo2nx13KSleepManager15CpuSleepHandlerEmm:
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mrs x2, tpidr_el1
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mrs x2, tpidr_el1
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stp x1, x2, [x0], #0x10
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stp x1, x2, [x0], #0x10
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/* Save the virtual resumption entrypoint. */
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/* Save the virtual resumption entrypoint and cntv_cval_el0. */
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adr x1, 77f
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adr x1, 77f
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stp x1, xzr, [x0], #0x10
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mrs x2, cntv_cval_el0
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stp x1, x2, [x0], #0x10
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/* Get the current core id. */
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/* Get the current core id. */
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mrs x0, mpidr_el1
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mrs x0, mpidr_el1
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@ -245,12 +246,13 @@ _ZN3ams4kern5board8nintendo2nx13KSleepManager11ResumeEntryEm:
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msr tcr_el1, x1
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msr tcr_el1, x1
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msr mair_el1, x2
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msr mair_el1, x2
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/* Get sctlr, tpidr, and the entrypoint. */
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/* Get sctlr, tpidr, the entrypoint, and cntv_cval_el0. */
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ldp x1, x2, [x0], #0x10
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ldp x1, x2, [x0], #0x10
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ldp x3, xzr, [x0], #0x10
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ldp x3, x4, [x0], #0x10
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/* Set the global context back into x18/tpidr. */
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/* Set the global context back into x18/tpidr. */
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msr tpidr_el1, x2
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msr tpidr_el1, x2
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msr cntv_cval_el0, x4
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dsb sy
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dsb sy
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isb
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isb
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@ -125,9 +125,6 @@ namespace ams::kern::init {
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/* Ensure our first argument is page aligned (as we will map it if it is non-zero). */
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/* Ensure our first argument is page aligned (as we will map it if it is non-zero). */
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MESOSPHERE_INIT_ABORT_UNLESS(util::IsAligned(misc_unk_debug_phys_addr, PageSize));
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MESOSPHERE_INIT_ABORT_UNLESS(util::IsAligned(misc_unk_debug_phys_addr, PageSize));
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/* Clear TPIDR_EL1 to zero. */
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cpu::ThreadIdRegisterAccessor(0).Store();
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/* Restore the page allocator state setup by kernel loader. */
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/* Restore the page allocator state setup by kernel loader. */
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g_initial_page_allocator.InitializeFromState(initial_page_allocator_state);
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g_initial_page_allocator.InitializeFromState(initial_page_allocator_state);
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@ -476,6 +473,7 @@ namespace ams::kern::init {
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void InitializeExceptionVectors() {
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void InitializeExceptionVectors() {
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cpu::SetVbarEl1(reinterpret_cast<uintptr_t>(::ams::kern::ExceptionVectors));
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cpu::SetVbarEl1(reinterpret_cast<uintptr_t>(::ams::kern::ExceptionVectors));
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cpu::SetTpidrEl1(0);
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cpu::SetExceptionThreadStackTop(0);
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cpu::SetExceptionThreadStackTop(0);
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cpu::EnsureInstructionConsistency();
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cpu::EnsureInstructionConsistency();
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}
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}
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@ -227,9 +227,9 @@ _ZN3ams4kern4init16InvokeEntrypointEPKNS1_14KInitArgumentsE:
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/* Ensure that the exception vectors are setup. */
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/* Ensure that the exception vectors are setup. */
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bl _ZN3ams4kern4init26InitializeExceptionVectorsEv
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bl _ZN3ams4kern4init26InitializeExceptionVectorsEv
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/* Setup the exception stack in tpidr_el1. */
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/* Setup the exception stack in cntv_cval_el0. */
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ldr x1, [x20, #0x58]
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ldr x1, [x20, #0x58]
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msr tpidr_el1, x1
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msr cntv_cval_el0, x1
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/* Jump to the entrypoint. */
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/* Jump to the entrypoint. */
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ldr x1, [x20, #0x40]
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ldr x1, [x20, #0x40]
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@ -281,8 +281,8 @@ _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv:
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.global _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv
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.global _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv
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.type _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv, %function
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.type _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv, %function
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_ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv:
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_ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv:
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/* Nintendo uses the "unused" virtual timer compare value as a scratch register. */
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/* Nintendo uses tpidr_el1 as a scratch register. */
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msr cntv_cval_el0, x0
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msr tpidr_el1, x0
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/* Get and parse the exception syndrome register. */
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/* Get and parse the exception syndrome register. */
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mrs x0, esr_el1
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mrs x0, esr_el1
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@ -297,18 +297,21 @@ _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv:
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b.eq 5f
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b.eq 5f
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1: /* The exception is not a data abort or instruction abort caused by a TLB conflict. */
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1: /* The exception is not a data abort or instruction abort caused by a TLB conflict. */
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/* Load the exception stack top from tpidr_el1. */
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/* Load the exception stack top from otherwise "unused" virtual timer compare value. */
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mrs x0, tpidr_el1
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mrs x0, cntv_cval_el0
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/* Setup the stack for a generic exception handle */
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/* Setup the stack for a generic exception handle */
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lsl x0, x0, #8
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asr x0, x0, #8
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sub x0, x0, #0x20
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sub x0, x0, #0x20
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str x1, [x0, #16]
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str x1, [x0, #8]
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mov x1, sp
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mov x1, sp
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str x1, [x0]
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str x1, [x0]
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mov sp, x0
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mov sp, x0
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ldr x1, [x0, #16]
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ldr x1, [x0, #8]
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mrs x0, cntv_cval_el0
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mrs x0, tpidr_el1
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str x0, [sp, #8]
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str x0, [sp, #8]
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str x1, [sp, #16]
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/* Check again if this is a data abort from EL1. */
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/* Check again if this is a data abort from EL1. */
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mrs x0, esr_el1
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mrs x0, esr_el1
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@ -406,7 +409,7 @@ _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv:
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isb
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isb
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/* Restore x0 from scratch. */
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/* Restore x0 from scratch. */
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mrs x0, cntv_cval_el0
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mrs x0, tpidr_el1
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/* Return from the exception. */
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/* Return from the exception. */
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eret
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eret
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@ -474,21 +477,22 @@ _ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv:
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.global _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv
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.global _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv
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.type _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv, %function
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.type _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv, %function
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_ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv:
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_ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv:
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/* Nintendo uses the "unused" virtual timer compare value as a scratch register. */
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/* Nintendo uses tpidr_el1 as a scratch register. */
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msr cntv_cval_el0, x0
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msr tpidr_el1, x0
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/* Load the exception stack top from tpidr_el1. */
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/* Load the exception stack top from otherwise "unused" virtual timer compare value. */
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mrs x0, tpidr_el1
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mrs x0, cntv_cval_el0
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/* Setup the stack for a generic exception handle */
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/* Setup the stack for a generic exception handle */
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lsl x0, x0, #8
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asr x0, x0, #8
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sub x0, x0, #0x20
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sub x0, x0, #0x20
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str x1, [x0, #16]
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str x1, [x0, #8]
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mov x1, sp
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mov x1, sp
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str x1, [x0]
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str x1, [x0]
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mov sp, x0
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mov sp, x0
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ldr x1, [x0, #16]
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ldr x1, [x0, #8]
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mrs x0, cntv_cval_el0
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mrs x0, tpidr_el1
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str x0, [sp, #8]
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/* Create a KExceptionContext to pass to HandleException. */
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/* Create a KExceptionContext to pass to HandleException. */
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sub sp, sp, #0x120
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sub sp, sp, #0x120
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@ -89,7 +89,8 @@ _main:
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bl _ZN3ams4kern4init3Elf18CallInitArrayFuncsEmm
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bl _ZN3ams4kern4init3Elf18CallInitArrayFuncsEmm
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/* Setup system registers, for detection of errors during init later. */
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/* Setup system registers, for detection of errors during init later. */
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msr tpidr_el1, xzr /* Clear TPIDR_EL1 */
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msr tpidr_el1, xzr
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msr cntv_cval_el0, xzr
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adr x0, __external_references
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adr x0, __external_references
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adr x1, _start
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adr x1, _start
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ldr x0, [x0, #0x30]
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ldr x0, [x0, #0x30]
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