diff --git a/libraries/libmesosphere/include/mesosphere/arch/arm64/kern_cpu_system_registers.hpp b/libraries/libmesosphere/include/mesosphere/arch/arm64/kern_cpu_system_registers.hpp index 3889b264f..61e066fee 100644 --- a/libraries/libmesosphere/include/mesosphere/arch/arm64/kern_cpu_system_registers.hpp +++ b/libraries/libmesosphere/include/mesosphere/arch/arm64/kern_cpu_system_registers.hpp @@ -372,6 +372,10 @@ namespace ams::kern::arch::arm64::cpu { this->SetBit(19, en); return *this; } + + constexpr ALWAYS_INLINE bool GetWxn() const { + return this->GetBits(19, 1) != 0; + } }; /* Accessors for timer registers. */ diff --git a/libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_supervisor_page_table.hpp b/libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_supervisor_page_table.hpp index c8ccca33d..73d886d84 100644 --- a/libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_supervisor_page_table.hpp +++ b/libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_supervisor_page_table.hpp @@ -23,9 +23,8 @@ namespace ams::kern::arch::arm64 { class KSupervisorPageTable { private: KPageTable m_page_table; - u64 m_ttbr0_identity[cpu::NumCores]; public: - constexpr KSupervisorPageTable() : m_page_table(util::ConstantInitialize), m_ttbr0_identity() { /* ... */ } + constexpr KSupervisorPageTable() : m_page_table(util::ConstantInitialize) { /* ... */ } NOINLINE void Initialize(s32 core_id); @@ -61,8 +60,6 @@ namespace ams::kern::arch::arm64 { return m_page_table.GetPhysicalAddress(out, address); } - constexpr u64 GetIdentityMapTtbr0(s32 core_id) const { return m_ttbr0_identity[core_id]; } - void DumpMemoryBlocks() const { return m_page_table.DumpMemoryBlocks(); } diff --git a/libraries/libmesosphere/source/arch/arm64/kern_k_supervisor_page_table.cpp b/libraries/libmesosphere/source/arch/arm64/kern_k_supervisor_page_table.cpp index 23e3541de..5f5112f8d 100644 --- a/libraries/libmesosphere/source/arch/arm64/kern_k_supervisor_page_table.cpp +++ b/libraries/libmesosphere/source/arch/arm64/kern_k_supervisor_page_table.cpp @@ -18,12 +18,8 @@ namespace ams::kern::arch::arm64 { void KSupervisorPageTable::Initialize(s32 core_id) { - /* Get the identity mapping ttbr0. */ - m_ttbr0_identity[core_id] = cpu::GetTtbr0El1(); - - /* Set sctlr_el1 */ - cpu::SystemControlRegisterAccessor().SetWxn(true).Store(); - cpu::EnsureInstructionConsistency(); + /* Verify that sctlr_el1 has the wxn bit set. */ + MESOSPHERE_ABORT_UNLESS(cpu::SystemControlRegisterAccessor().GetWxn()); /* Invalidate the entire TLB. */ cpu::InvalidateEntireTlb();