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warmboot: more code, through power on i2c5

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This commit is contained in:
Michael Scire 2018-12-17 16:34:41 -08:00
parent a4ce50ffd5
commit b419c0df29
3 changed files with 32 additions and 0 deletions
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5
exosphere/lp0fw/src/car.h
View file

@ -33,6 +33,9 @@
#define CLK_RST_CONTROLLER_SUPER_CCLKG_DIVIDER_0 MAKE_CAR_REG(0x36C) #define CLK_RST_CONTROLLER_SUPER_CCLKG_DIVIDER_0 MAKE_CAR_REG(0x36C)
#define CLK_RST_CONTROLLER_SUPER_CCLKP_DIVIDER_0 MAKE_CAR_REG(0x374) #define CLK_RST_CONTROLLER_SUPER_CCLKP_DIVIDER_0 MAKE_CAR_REG(0x374)
#define CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_REF_0 MAKE_CAR_REG(0x62C)
#define CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_SOC_0 MAKE_CAR_REG(0x630)
#define CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2_0 MAKE_CAR_REG(0x388) #define CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2_0 MAKE_CAR_REG(0x388)
#define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT_0 MAKE_CAR_REG(0x3B4) #define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT_0 MAKE_CAR_REG(0x3B4)
@ -46,11 +49,13 @@
#define CLK_RST_CONTROLLER_SPARE_REG0_0 MAKE_CAR_REG(0x55C) #define CLK_RST_CONTROLLER_SPARE_REG0_0 MAKE_CAR_REG(0x55C)
#define CLK_RST_CONTROLLER_RST_DEV_H_SET_0 MAKE_CAR_REG(0x308)
#define CLK_RST_CONTROLLER_RST_DEV_U_SET_0 MAKE_CAR_REG(0x310) #define CLK_RST_CONTROLLER_RST_DEV_U_SET_0 MAKE_CAR_REG(0x310)
#define CLK_RST_CONTROLLER_RST_DEV_U_CLR_0 MAKE_CAR_REG(0x314) #define CLK_RST_CONTROLLER_RST_DEV_U_CLR_0 MAKE_CAR_REG(0x314)
#define CLK_RST_CONTROLLER_RST_DEV_V_CLR_0 MAKE_CAR_REG(0x434) #define CLK_RST_CONTROLLER_RST_DEV_V_CLR_0 MAKE_CAR_REG(0x434)
#define CLK_RST_CONTROLLER_CLK_ENB_H_SET_0 MAKE_CAR_REG(0x328)
#define CLK_RST_CONTROLLER_CLK_ENB_U_SET_0 MAKE_CAR_REG(0x330) #define CLK_RST_CONTROLLER_CLK_ENB_U_SET_0 MAKE_CAR_REG(0x330)
#define CLK_RST_CONTROLLER_CLK_ENB_V_SET_0 MAKE_CAR_REG(0x440) #define CLK_RST_CONTROLLER_CLK_ENB_V_SET_0 MAKE_CAR_REG(0x440)
#define CLK_RST_CONTROLLER_CLK_ENB_W_SET_0 MAKE_CAR_REG(0x448) #define CLK_RST_CONTROLLER_CLK_ENB_W_SET_0 MAKE_CAR_REG(0x448)

23
exosphere/lp0fw/src/cluster.c
View file

@ -61,6 +61,29 @@ void cluster_initialize_cpu(void) {
APBDEV_PMC_DPD_SAMPLE_0 = 0; APBDEV_PMC_DPD_SAMPLE_0 = 0;
timer_wait(10); timer_wait(10);
/* Configure UART2 via GPIO controller 2 G. */
MAKE_REG32(0x6000D108) |= 4; /* GPIO_CNF */
MAKE_REG32(0x6000D118) |= 4; /* GPIO_OE */
MAKE_REG32(0x6000D128) &= ~4; /* GPIO_OUT */
/* Set CL_DVFS RSVD0 + TRISTATE, read register to make it stick. */
PINMUX_AUX_DVFS_PWM_0 = 0x11;
(void)PINMUX_AUX_DVFS_PWM_0;
/* Configure I2C. */
PINMUX_AUX_PWR_I2C_SCL_0 = 0x40;
PINMUX_AUX_PWR_I2C_SDA_0 = 0x40;
/* Enable clock to CL_DVFS, and set its source/divider. */
CLK_RST_CONTROLLER_CLK_ENB_W_SET_0 = 0x08000000;
CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_REF_0 = 0xE;
CLK_RST_CONTROLLER_CLK_SOURCE_DVFS_SOC_0 = 0xE;
/* Power on I2C5, wait 5 us. */
CLK_RST_CONTROLLER_CLK_ENB_H_SET_0 = 0x8000;
CLK_RST_CONTROLLER_RST_DEV_H_SET_0 = 0x8000;
timer_wait(5);
/* TODO: This function is enormous */ /* TODO: This function is enormous */
} }

4
exosphere/lp0fw/src/misc.h
View file

@ -29,6 +29,10 @@
#define APB_MISC_GP_ASDBGREG_0 MAKE_MISC_REG(0x810) #define APB_MISC_GP_ASDBGREG_0 MAKE_MISC_REG(0x810)
#define PINMUX_AUX_PWR_I2C_SCL_0 MAKE_MISC_REG(0x30DC)
#define PINMUX_AUX_PWR_I2C_SDA_0 MAKE_MISC_REG(0x30E0)
#define PINMUX_AUX_DVFS_PWM_0 MAKE_MISC_REG(0x3184)
#define PINMUX_AUX_GPIO_PA6_0 MAKE_MISC_REG(0x3244) #define PINMUX_AUX_GPIO_PA6_0 MAKE_MISC_REG(0x3244)
void misc_configure_device_dbg_settings(void); void misc_configure_device_dbg_settings(void);