mirror of
https://github.com/Atmosphere-NX/Atmosphere
synced 2024-12-22 12:21:18 +00:00
exo: fixes, now tested working on mariko hardware
This commit is contained in:
Michael Scire
parent
0a53c74aad
commit
b08ccd7341
8 changed files with 170 additions and 67 deletions
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@ -48,7 +48,12 @@ namespace ams::secmon::boot {
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const auto pmc = MemoryRegionVirtualDevicePmc.GetAddress();
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/* Set the physical address of the warmboot binary to scratch 1. */
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reg::Write(pmc + APBDEV_PMC_SCRATCH1, static_cast<u32>(MemoryRegionPhysicalDramSecureDataStoreWarmbootFirmware.GetAddress()));
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if (GetSocType() == fuse::SocType_Mariko) {
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reg::Write(pmc + APBDEV_PMC_SECURE_SCRATCH119, static_cast<u32>(MemoryRegionPhysicalDramSecureDataStoreWarmbootFirmware.GetAddress()));
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} else /* if (GetSocType() == fuse::SocType_Erista) */ {
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reg::Write(pmc + APBDEV_PMC_SCRATCH1, static_cast<u32>(MemoryRegionPhysicalDramSecureDataStoreWarmbootFirmware.GetAddress()));
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}
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/* Configure logging by setting bits 18-19 of scratch 20. */
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reg::ReadWrite(pmc + APBDEV_PMC_SCRATCH20, REG_BITS_VALUE(18, 2, 0));
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@ -66,6 +71,7 @@ namespace ams::secmon::boot {
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/* The warmboot key as a parameter. The latter is a better solution, but it would be nice to take */
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/* care of it here. Perhaps we should read the number of anti-downgrade fuses burnt, and translate that */
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/* to the warmboot key? To be decided during the process of implementing ams-on-mariko support. */
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reg::Write(pmc + APBDEV_PMC_SECURE_SCRATCH32, 0x129);
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}
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constinit const u8 DeviceMasterKeySourceKekSource[se::AesBlockSize] = {
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@ -92,6 +98,10 @@ namespace ams::secmon::boot {
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0xF9, 0x37, 0xCF, 0x9A, 0xBD, 0x86, 0xBB, 0xA9, 0x9C, 0x9E, 0x03, 0xC4, 0xFC, 0xBC, 0x3B, 0xCE
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};
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constinit const u8 MasterKeySource[se::AesBlockSize] = {
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0xD8, 0xA2, 0x41, 0x0A, 0xC6, 0xC5, 0x90, 0x01, 0xC6, 0x1D, 0x6A, 0x26, 0x7C, 0x51, 0x3F, 0x3C
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};
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void DeriveMasterKekAndDeviceKeyMariko(bool is_prod) {
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/* Clear all keyslots other than KEK and SBK in SE1. */
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for (int i = 0; i < pkg1::AesKeySlot_Count; ++i) {
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@ -123,6 +133,14 @@ namespace ams::secmon::boot {
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}
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}
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void DeriveMasterKey() {
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if (GetSocType() == fuse::SocType_Mariko) {
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se::SetEncryptedAesKey128(pkg1::AesKeySlot_Master, pkg1::AesKeySlot_MasterKek, MasterKeySource, se::AesBlockSize);
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} else /* if (GetSocType() == fuse::SocType_Erista) */ {
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/* Nothing to do here; erista bootloader will have derived master key already. */
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}
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}
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void SetupRandomKey(int slot, se::KeySlotLockFlags flags) {
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/* Create an aligned buffer to hold the key. */
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constexpr size_t KeySize = se::AesBlockSize;
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@ -312,6 +330,9 @@ namespace ams::secmon::boot {
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/* Derive the master keys. */
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DeriveAllMasterKeys(is_prod, work_block);
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/* Lock the master key as a kek. */
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se::LockAesKeySlot(pkg1::AesKeySlot_Master, se::KeySlotLockFlags_AllLockKek);
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/* Derive the device master keys. */
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DeriveAllDeviceMasterKeys(is_prod, work_block);
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@ -357,7 +378,10 @@ namespace ams::secmon::boot {
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/* Lock the device key as only usable as a kek. */
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se::LockAesKeySlot(pkg1::AesKeySlot_Device, se::KeySlotLockFlags_AllLockKek);
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/* Derive all keys. */
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/* Derive the master key. */
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DeriveMasterKey();
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/* Derive all other keys. */
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DeriveAllKeys(is_prod);
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}
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@ -16,10 +16,24 @@
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#include <exosphere.hpp>
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#include "secmon_error.hpp"
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namespace {
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namespace ams {
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constexpr bool SaveSystemStateForDebug = false;
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namespace {
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constexpr bool SaveSystemStateForDebug = false;
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constexpr bool LogSystemStateForDebug = false;
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void LogU64(u64 value) {
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char buffer[2 * sizeof(value)];
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for (size_t i = 0; i < sizeof(value); ++i) {
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buffer[sizeof(buffer) - 1 - (2 * i) - 0] = "0123456789ABCDEF"[(value >> 0) & 0xF];
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buffer[sizeof(buffer) - 1 - (2 * i) - 1] = "0123456789ABCDEF"[(value >> 4) & 0xF];
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value >>= 8;
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}
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log::SendText(buffer, sizeof(buffer));
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}
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}
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}
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namespace ams::diag {
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@ -98,6 +112,57 @@ namespace ams::secmon {
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util::WaitMicroSeconds(1000);
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}
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ALWAYS_INLINE void LogSystemStateForDebugErrorReboot(u64 lr, u64 sp) {
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log::SendText("*** Error Reboot ***\n", 21);
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log::Flush();
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u64 temp_reg;
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__asm__ __volatile__("mrs %0, esr_el3" : "=r"(temp_reg) :: "memory");
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log::SendText("ESR_EL3: ", 9);
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LogU64(temp_reg);
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log::SendText("\n", 1);
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log::Flush();
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__asm__ __volatile__("mrs %0, elr_el3" : "=r"(temp_reg) :: "memory");
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log::SendText("ELR_EL3: ", 9);
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LogU64(temp_reg);
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log::SendText("\n", 1);
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log::Flush();
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__asm__ __volatile__("mrs %0, far_el3" : "=r"(temp_reg) :: "memory");
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log::SendText("FAR_EL3: ", 9);
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LogU64(temp_reg);
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log::SendText("\n", 1);
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log::Flush();
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log::SendText("LR: ", 9);
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LogU64(lr);
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log::SendText("\n", 1);
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log::Flush();
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log::SendText("SP: ", 9);
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LogU64(sp);
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log::SendText("\n", 1);
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log::Flush();
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log::SendText("Stack:\n", 7);
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log::Flush();
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char buf[2];
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for (int i = 0; i < 0x100; ++i) {
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const u8 byte = *(volatile u8 *)(sp + i);
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buf[0] = "0123456789ABCDEF"[(byte >> 4) & 0xF];
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buf[1] = "0123456789ABCDEF"[(byte >> 0) & 0xF];
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log::SendText(buf, 2);
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log::Flush();
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if (util::IsAligned(i + 1, 0x10)) {
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log::SendText("\n", 1);
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log::Flush();
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}
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}
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}
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}
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void SetError(pkg1::ErrorInfo info) {
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@ -114,6 +179,14 @@ namespace ams::secmon {
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SaveSystemStateForDebugErrorReboot();
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}
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if constexpr (LogSystemStateForDebug) {
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u64 lr, sp;
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__asm__ __volatile__("mov %0, lr" : "=r"(lr) :: "memory");
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__asm__ __volatile__("mov %0, sp" : "=r"(sp) :: "memory");
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LogSystemStateForDebugErrorReboot(lr, sp);
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}
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/* Lockout the security engine. */
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se::Lockout();
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@ -51,27 +51,27 @@ namespace ams::secmon {
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constinit bool g_is_cold_boot = true;
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constinit const se::StickyBits ExpectedSeStickyBits = {
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constinit se::StickyBits ExpectedSeStickyBits = {
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.se_security = (1 << 0), /* SE_HARD_SETTING */
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.tzram_security = 0,
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.crypto_security_perkey = (1 << pkg1::AesKeySlot_UserEnd) - 1,
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.crypto_keytable_access = {
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(1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 0: User keyslot. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 1: User keyslot. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 2: User keyslot. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 3: User keyslot. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 4: User keyslot. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 5: User keyslot. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 6: Unused keyslot. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 7: Unused keyslot. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(0 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 8: Temp keyslot. UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. KEYUSE, UIVREAD, OIVREAD, KEYREAD disabled. */
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(0 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 9: SmcTemp keyslot. UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. KEYUSE, UIVREAD, OIVREAD, KEYREAD disabled. */
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(0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 10: Wrap1 keyslot. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 11: Wrap2 keyslot. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 12: DMaster keyslot. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 13: Master keyslot. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 14: Unused keyslot. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 13: Device keyslot. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(0 << 7) | (1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 0: User keyslot. KEY. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(0 << 7) | (1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 1: User keyslot. KEY. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(0 << 7) | (1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 2: User keyslot. KEY. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(0 << 7) | (1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 3: User keyslot. KEY. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(0 << 7) | (1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 4: User keyslot. KEY. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(0 << 7) | (1 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 5: User keyslot. KEY. KEYUSE, UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. UIVREAD, OIVREAD, KEYREAD disabled. */
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(1 << 7) | (0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 6: Unused keyslot. KEK. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(1 << 7) | (0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 7: Unused keyslot. KEK. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(0 << 7) | (0 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 8: Temp keyslot. KEY. UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. KEYUSE, UIVREAD, OIVREAD, KEYREAD disabled. */
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(0 << 7) | (0 << 6) | (1 << 5) | (0 << 4) | (1 << 3) | (0 << 2) | (1 << 1) | (0 << 0), /* 9: SmcTemp keyslot. KEY. UIVUPDATE, OIVUPDATE, KEYUPDATE enabled. KEYUSE, UIVREAD, OIVREAD, KEYREAD disabled. */
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(1 << 7) | (0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 10: Wrap1 keyslot. KEK. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(0 << 7) | (0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 11: Wrap2 keyslot. KEY. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(1 << 7) | (0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 12: DMaster keyslot. KEK. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(1 << 7) | (0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 13: Master keyslot. KEK. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(1 << 7) | (0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 14: Unused keyslot. KEK. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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(1 << 7) | (0 << 6) | (0 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0 << 0), /* 13: Device keyslot. KEK. KEYUSE, UIVUPDATE, UIVREAD, OIVUPDATE, OIVREAD, KEYUPDATE, KEYREAD disabled. */
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},
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.rsa_security_perkey = 0,
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.rsa_keytable_access = {
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@ -139,6 +139,16 @@ namespace ams::secmon {
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}
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void VerifySecurityEngineStickyBits() {
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/* On mariko, an extra sticky bit is set. */
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if (GetSocType() == fuse::SocType_Mariko) {
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ExpectedSeStickyBits.se_security |= (1 << 5);
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} else /* if (GetSocType() == fuse::SocType_Erista) */ {
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/* Erista does not support DST_KEYTABLE_ONLY, and so all keys will have the bit clear. */
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for (size_t i = 0; i < util::size(ExpectedSeStickyBits.crypto_keytable_access); ++i) {
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ExpectedSeStickyBits.crypto_keytable_access[i] &= ~(1 << 7);
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}
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}
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if (!se::ValidateStickyBits(ExpectedSeStickyBits)) {
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SetError(pkg1::ErrorInfo_InvalidSecurityEngineStickyBits);
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AMS_ABORT("Invalid sticky bits");
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@ -938,12 +948,16 @@ namespace ams::secmon {
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return reg::Read(MC + MC_SECURITY_CFG3) == 0;
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}
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void SetupLogForBoot() {
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log::Initialize();
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log::SendText("OHAYO\n", 6);
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log::Flush();
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}
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void LogExitLp0() {
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/* NOTE: Nintendo only does this on dev, but we will always do it. */
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if (true /* !pkg1::IsProduction() */) {
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log::Initialize();
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log::SendText("OHAYO\n", 6);
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log::Flush();
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SetupLogForBoot();
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}
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}
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@ -969,7 +983,7 @@ namespace ams::secmon {
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InitializeConfigurationContext();
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/* Initialize uart for logging. */
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log::Initialize();
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SetupLogForBoot();
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/* Initialize the security engine. */
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se::Initialize();
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@ -1017,12 +1031,16 @@ namespace ams::secmon {
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/* Overwrite keys that we want to be random with random contents. */
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se::InitializeRandom();
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se::ConfigureAutomaticContextSave();
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se::SetRandomKey(pkg1::AesKeySlot_Temporary);
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se::GenerateSrk();
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se::SetRandomKey(pkg1::AesKeySlot_TzramSaveKek);
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/* Initialize pmc secure scratch. */
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pmc::InitializeRandomScratch();
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if (GetSocType() == fuse::SocType_Erista) {
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pmc::InitializeRandomScratch();
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}
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pmc::LockSecureRegister(pmc::SecureRegister_Srk);
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/* Setup secure registers. */
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SetupSecureRegisters();
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@ -114,6 +114,7 @@
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#define APBDEV_PMC_SECURE_SCRATCH113 (0xB1C)
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#define APBDEV_PMC_SECURE_SCRATCH114 (0xB20)
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#define APBDEV_PMC_SECURE_SCRATCH115 (0xB24)
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#define APBDEV_PMC_SECURE_SCRATCH119 (0xB34)
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#define PMC_REG_BITS_MASK(NAME) REG_NAMED_BITS_MASK (APBDEV_PMC, NAME)
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@ -38,7 +38,7 @@ namespace ams::clkrst {
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reg::ReadWrite(g_register_address + param.clk_enb_offset, REG_BITS_VALUE(param.index, 1, 0));
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/* Set the clock source. */
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if (param.clk_src != 0) {
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if (param.clk_src_offset != 0) {
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reg::Write(g_register_address + param.clk_src_offset, (param.clk_src << 29) | (param.clk_div << 0));
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}
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|
||||
|
|
@ -89,11 +89,11 @@ namespace ams::clkrst {
|
|||
}
|
||||
|
||||
void EnableUartBClock() {
|
||||
EnableClock(UartAClock);
|
||||
EnableClock(UartBClock);
|
||||
}
|
||||
|
||||
void EnableUartCClock() {
|
||||
EnableClock(UartAClock);
|
||||
EnableClock(UartCClock);
|
||||
}
|
||||
|
||||
void EnableActmonClock() {
|
||||
|
|
|
|||
|
|
@ -48,12 +48,14 @@ namespace ams::log {
|
|||
clkrst::EnableUartAClock();
|
||||
} else if constexpr (UartLogPort == uart::Port_LeftJoyCon) {
|
||||
/* Logging to left joy-con (e.g. with Joyless). */
|
||||
pinmux::SetupUartB();
|
||||
clkrst::EnableUartBClock();
|
||||
} else if constexpr (UartLogPort == uart::Port_RightJoyCon) {
|
||||
/* Logging to right joy-con (e.g. with Joyless). */
|
||||
static_assert(uart::Port_LeftJoyCon == uart::Port_C);
|
||||
pinmux::SetupUartC();
|
||||
clkrst::EnableUartCClock();
|
||||
} else if constexpr (UartLogPort == uart::Port_RightJoyCon) {
|
||||
/* Logging to right joy-con (e.g. with Joyless). */
|
||||
static_assert(uart::Port_RightJoyCon == uart::Port_B);
|
||||
pinmux::SetupUartB();
|
||||
clkrst::EnableUartBClock();
|
||||
} else {
|
||||
__builtin_unreachable();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -104,7 +104,7 @@ namespace ams::pinmux {
|
|||
/* Get the registers. */
|
||||
const uintptr_t PINMUX = g_pinmux_address;
|
||||
|
||||
/* Configure Uart-B. */
|
||||
/* Configure Uart-C. */
|
||||
reg::Write(PINMUX + PINMUX_AUX_UART3_TX, PINMUX_REG_BITS_ENUM(AUX_UART3_PM, UARTC),
|
||||
PINMUX_REG_BITS_ENUM(AUX_PUPD, NONE),
|
||||
PINMUX_REG_BITS_ENUM(AUX_TRISTATE, PASSTHROUGH),
|
||||
|
|
@ -114,13 +114,13 @@ namespace ams::pinmux {
|
|||
|
||||
reg::Write(PINMUX + PINMUX_AUX_UART3_RX, PINMUX_REG_BITS_ENUM(AUX_UART3_PM, UARTC),
|
||||
PINMUX_REG_BITS_ENUM(AUX_PUPD, NONE),
|
||||
PINMUX_REG_BITS_ENUM(AUX_TRISTATE, PASSTHROUGH),
|
||||
PINMUX_REG_BITS_ENUM(AUX_TRISTATE, TRISTATE),
|
||||
PINMUX_REG_BITS_ENUM(AUX_E_INPUT, ENABLE),
|
||||
PINMUX_REG_BITS_ENUM(AUX_LOCK, DISABLE),
|
||||
PINMUX_REG_BITS_ENUM(AUX_E_OD, DISABLE));
|
||||
|
||||
reg::Write(PINMUX + PINMUX_AUX_UART3_RTS, PINMUX_REG_BITS_ENUM(AUX_UART3_PM, UARTC),
|
||||
PINMUX_REG_BITS_ENUM(AUX_PUPD, NONE),
|
||||
PINMUX_REG_BITS_ENUM(AUX_PUPD, PULL_DOWN),
|
||||
PINMUX_REG_BITS_ENUM(AUX_TRISTATE, PASSTHROUGH),
|
||||
PINMUX_REG_BITS_ENUM(AUX_E_INPUT, DISABLE),
|
||||
PINMUX_REG_BITS_ENUM(AUX_LOCK, DISABLE),
|
||||
|
|
@ -128,13 +128,16 @@ namespace ams::pinmux {
|
|||
|
||||
reg::Write(PINMUX + PINMUX_AUX_UART3_CTS, PINMUX_REG_BITS_ENUM(AUX_UART3_PM, UARTC),
|
||||
PINMUX_REG_BITS_ENUM(AUX_PUPD, NONE),
|
||||
PINMUX_REG_BITS_ENUM(AUX_TRISTATE, PASSTHROUGH),
|
||||
PINMUX_REG_BITS_ENUM(AUX_TRISTATE, TRISTATE),
|
||||
PINMUX_REG_BITS_ENUM(AUX_E_INPUT, ENABLE),
|
||||
PINMUX_REG_BITS_ENUM(AUX_LOCK, DISABLE),
|
||||
PINMUX_REG_BITS_ENUM(AUX_E_OD, DISABLE));
|
||||
|
||||
/* Configure GPIO for Uart-C. */
|
||||
reg::ReadWrite(g_gpio_address + 0x00C, REG_BITS_VALUE(1, 4, 0));
|
||||
reg::ReadWrite(g_gpio_address + 0x118, REG_BITS_VALUE(0, 1, 1));
|
||||
reg::Read(g_gpio_address + 0x118);
|
||||
reg::ReadWrite(g_gpio_address + 0x00C, REG_BITS_VALUE(1, 1, 0));
|
||||
reg::Read(g_gpio_address + 0x00C);
|
||||
}
|
||||
|
||||
void SetupI2c1() {
|
||||
|
|
|
|||
|
|
@ -33,11 +33,11 @@ namespace ams::uart {
|
|||
}
|
||||
|
||||
void WaitSymbols(int baud, u32 num) {
|
||||
util::WaitMicroSeconds(util::DivideUp(1'000'000, baud) * num);
|
||||
util::WaitMicroSeconds(util::DivideUp(num * 1'000'000, baud));
|
||||
}
|
||||
|
||||
void WaitCycles(int baud, u32 num) {
|
||||
util::WaitMicroSeconds(util::DivideUp(1'000'000, 16 * baud) * num);
|
||||
util::WaitMicroSeconds(util::DivideUp(num * 1'000'000, 16 * baud));
|
||||
}
|
||||
|
||||
ALWAYS_INLINE void WaitFifoNotFull(volatile UartRegisters *uart) {
|
||||
|
|
@ -60,26 +60,6 @@ namespace ams::uart {
|
|||
|
||||
constexpr inline u32 LockBit = (1 << 6);
|
||||
|
||||
void Lock(volatile UartRegisters *reg) {
|
||||
while (true) {
|
||||
if (reg->mie != 0) {
|
||||
continue;
|
||||
}
|
||||
|
||||
reg->irda_csr = LockBit;
|
||||
|
||||
if (reg->mie == 0) {
|
||||
break;
|
||||
}
|
||||
|
||||
reg->irda_csr = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void Unlock(volatile UartRegisters *reg) {
|
||||
reg->irda_csr = 0;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void SetRegisterAddress(uintptr_t address) {
|
||||
|
|
@ -97,7 +77,13 @@ namespace ams::uart {
|
|||
constexpr u32 UartClock = 408000000;
|
||||
const u32 divisor = (UartClock + (baud_rate * 16) / 2) / (baud_rate * 16);
|
||||
|
||||
/* Disable DLAB and all interrupts. */
|
||||
/* Wait for idle state. */
|
||||
WaitIdle(uart, UART_VENDOR_STATE_TX_IDLE);
|
||||
|
||||
/* Wait 100 us. */
|
||||
util::WaitMicroSeconds(100);
|
||||
|
||||
/* Disable interrupts. */
|
||||
uart->lcr = uart->lcr & ~UART_LCR_DLAB;
|
||||
uart->ier = 0;
|
||||
uart->mcr = 0;
|
||||
|
|
@ -128,8 +114,8 @@ namespace ams::uart {
|
|||
/* Wait for idle state. */
|
||||
WaitIdle(uart, UART_VENDOR_STATE_TX_IDLE | UART_VENDOR_STATE_RX_IDLE);
|
||||
|
||||
/* Set scratch register to 0. */
|
||||
uart->spr = 0;
|
||||
/* Wait 100 us. */
|
||||
util::WaitMicroSeconds(100);
|
||||
}
|
||||
|
||||
void SendText(Port port, const void *data, size_t size) {
|
||||
|
|
@ -139,10 +125,6 @@ namespace ams::uart {
|
|||
/* Get pointer to data. */
|
||||
const u8 *p = static_cast<const u8 *>(data);
|
||||
|
||||
/* Lock the uart registers. */
|
||||
Lock(uart);
|
||||
ON_SCOPE_EXIT { Unlock(uart); };
|
||||
|
||||
/* Send each byte. */
|
||||
for (size_t i = 0; i < size; ++i) {
|
||||
WaitFifoNotFull(uart);
|
||||
|
|
|
|||
Loading…
Reference in a new issue