From a6c7a2c57e949ef2408892cc3193ac973f554081 Mon Sep 17 00:00:00 2001 From: TuxSH Date: Sat, 3 Mar 2018 20:23:13 +0100 Subject: [PATCH] Refactor 32-bit register definitions --- exosphere/bpmpfw/src/emc.c | 3 +-- exosphere/bpmpfw/src/emc.h | 12 +++++------ exosphere/bpmpfw/src/i2c.h | 6 +++--- exosphere/bpmpfw/src/lp0.c | 18 ++++++++--------- exosphere/bpmpfw/src/lp0.h | 4 +++- exosphere/bpmpfw/src/pmc.h | 6 +++--- exosphere/bpmpfw/src/timer.h | 6 ++++-- exosphere/bpmpfw/src/utils.h | 22 ++++++++++++++++++++ exosphere/src/actmon.h | 4 ++-- exosphere/src/bpmp.h | 18 ++++++++--------- exosphere/src/car.h | 4 ++-- exosphere/src/flow.h | 2 +- exosphere/src/interrupt.h | 12 +++++------ exosphere/src/lp0.c | 2 +- exosphere/src/mc.h | 2 +- exosphere/src/misc.h | 4 ++-- exosphere/src/package2.h | 4 ++-- exosphere/src/pmc.h | 36 ++++++++++++++++----------------- exosphere/src/se.c | 5 +++-- exosphere/src/synchronization.h | 4 ++++ exosphere/src/syscrt0.h | 4 ++-- exosphere/src/sysreg.h | 6 +++--- exosphere/src/timers.h | 6 +++--- exosphere/src/uart.h | 10 ++++----- exosphere/src/utils.h | 2 ++ exosphere/src/warmboot_init.c | 22 ++++++++++---------- 26 files changed, 126 insertions(+), 98 deletions(-) create mode 100644 exosphere/bpmpfw/src/utils.h diff --git a/exosphere/bpmpfw/src/emc.c b/exosphere/bpmpfw/src/emc.c index d1893fe93..e8eb293cf 100644 --- a/exosphere/bpmpfw/src/emc.c +++ b/exosphere/bpmpfw/src/emc.c @@ -1,5 +1,4 @@ -#include - +#include "utils.h" #include "lp0.h" #include "emc.h" #include "pmc.h" diff --git a/exosphere/bpmpfw/src/emc.h b/exosphere/bpmpfw/src/emc.h index 5cd5f07b7..d92cf7b4b 100644 --- a/exosphere/bpmpfw/src/emc.h +++ b/exosphere/bpmpfw/src/emc.h @@ -1,7 +1,7 @@ #ifndef EXOSPHERE_BPMPFW_EMC_H #define EXOSPHERE_BPMPFW_EMC_H -#include +#include "utils.h" #define EMC_BASE (0x7001B000) @@ -9,10 +9,10 @@ #define EMC1_BASE (0x7001F000) -#define MAKE_EMC_REG(ofs) ((*((volatile uint32_t *)(EMC_BASE + ofs)))) +#define MAKE_EMC_REG(ofs) (MAKE_REG32(EMC_BASE + ofs)) -#define MAKE_EMC0_REG(ofs) ((*((volatile uint32_t *)(EMC0_BASE + ofs)))) -#define MAKE_EMC1_REG(ofs) ((*((volatile uint32_t *)(EMC1_BASE + ofs)))) +#define MAKE_EMC0_REG(ofs) (MAKE_REG32(EMC0_BASE + ofs)) +#define MAKE_EMC1_REG(ofs) (MAKE_REG32(EMC1_BASE + ofs)) #define EMC_CFG_0 MAKE_EMC_REG(0x00C) @@ -46,8 +46,6 @@ #define EMC_FBIO_CFG7_0 MAKE_EMC_REG(0x584) - - void emc_put_dram_in_self_refresh_mode(void); -#endif \ No newline at end of file +#endif diff --git a/exosphere/bpmpfw/src/i2c.h b/exosphere/bpmpfw/src/i2c.h index be656ee1e..f66cee1ce 100644 --- a/exosphere/bpmpfw/src/i2c.h +++ b/exosphere/bpmpfw/src/i2c.h @@ -1,12 +1,12 @@ #ifndef EXOSPHERE_BPMPFW_I2C_H #define EXOSPHERE_BPMPFW_I2C_H -#include +#include "utils.h" /* I2C_BASE = I2C4. */ #define I2C_BASE (0x7000D000) -#define MAKE_I2C_REG(ofs) ((*((volatile uint32_t *)(I2C_BASE + ofs)))) +#define MAKE_I2C_REG(ofs) (MAKE_REG32(I2C_BASE + ofs)) #define I2C_I2C_CNFG_0 MAKE_I2C_REG(0x000) @@ -31,4 +31,4 @@ void i2c_init(void); int i2c_send_reset_cmd(void); -#endif \ No newline at end of file +#endif diff --git a/exosphere/bpmpfw/src/lp0.c b/exosphere/bpmpfw/src/lp0.c index 7a3c0a91d..3fe5586de 100644 --- a/exosphere/bpmpfw/src/lp0.c +++ b/exosphere/bpmpfw/src/lp0.c @@ -1,20 +1,18 @@ -#include -#include - +#include "utils.h" #include "lp0.h" #include "i2c.h" #include "pmc.h" #include "emc.h" #include "timer.h" -#define CACHE_CTRL (*((volatile uint32_t *)0x50040000)) +#define CACHE_CTRL MAKE_REG32(0x50040000) -#define PRI_ICTLR_COP_IER_CLR_0 (*((volatile uint32_t *)0x60004038)) -#define SEC_ICTLR_COP_IER_CLR_0 (*((volatile uint32_t *)0x60004138)) -#define TRI_ICTLR_COP_IER_CLR_0 (*((volatile uint32_t *)0x60004238)) -#define QUAD_ICTLR_COP_IER_CLR_0 (*((volatile uint32_t *)0x60004338)) -#define PENTA_ICTLR_COP_IER_CLR_0 (*((volatile uint32_t *)0x60004438)) -#define HEXA_ICTLR_COP_IER_CLR_0 (*((volatile uint32_t *)0x60004538)) +#define PRI_ICTLR_COP_IER_CLR_0 MAKE_REG32(0x60004038) +#define SEC_ICTLR_COP_IER_CLR_0 MAKE_REG32(0x60004138) +#define TRI_ICTLR_COP_IER_CLR_0 MAKE_REG32(0x60004238) +#define QUAD_ICTLR_COP_IER_CLR_0 MAKE_REG32(0x60004338) +#define PENTA_ICTLR_COP_IER_CLR_0 MAKE_REG32(0x60004438) +#define HEXA_ICTLR_COP_IER_CLR_0 MAKE_REG32(0x60004538) void reboot(void) { /* Write MAIN_RST */ diff --git a/exosphere/bpmpfw/src/lp0.h b/exosphere/bpmpfw/src/lp0.h index 66018d217..81049933b 100644 --- a/exosphere/bpmpfw/src/lp0.h +++ b/exosphere/bpmpfw/src/lp0.h @@ -1,8 +1,10 @@ #ifndef EXOSPHERE_BPMPFW_LP0_H #define EXOSPHERE_BPMPFW_LP0_H +#include "utils.h" + void lp0_entry_main(void); void reboot(void); -#endif \ No newline at end of file +#endif diff --git a/exosphere/bpmpfw/src/pmc.h b/exosphere/bpmpfw/src/pmc.h index efb0a2c69..7af26681f 100644 --- a/exosphere/bpmpfw/src/pmc.h +++ b/exosphere/bpmpfw/src/pmc.h @@ -1,11 +1,11 @@ #ifndef EXOSPHERE_BPMPFW_PMC_H #define EXOSPHERE_BPMPFW_PMC_H -#include +#include "utils.h" #define PMC_BASE (0x7000E400) -#define MAKE_PMC_REG(ofs) ((*((volatile uint32_t *)(PMC_BASE + ofs)))) +#define MAKE_PMC_REG(ofs) (MAKE_REG32(PMC_BASE + ofs)) #define APBDEV_PMC_CNTRL_0 MAKE_PMC_REG(0x000) @@ -34,4 +34,4 @@ #define APBDEV_PMC_DDR_CNTRL_0 MAKE_PMC_REG(0x4E4) -#endif \ No newline at end of file +#endif diff --git a/exosphere/bpmpfw/src/timer.h b/exosphere/bpmpfw/src/timer.h index abb92c434..c2906a3fe 100644 --- a/exosphere/bpmpfw/src/timer.h +++ b/exosphere/bpmpfw/src/timer.h @@ -1,7 +1,9 @@ #ifndef EXOSPHERE_BPMPFW_TIMER_H #define EXOSPHERE_BPMPFW_TIMER_H -#define TIMERUS_CNTR_1US_0 (*((volatile uint32_t *)(0x60005010))) +#include "utils.h" + +#define TIMERUS_CNTR_1US_0 MAKE_REG32(0x60005010) static inline void timer_wait(uint32_t microseconds) { uint32_t old_time = TIMERUS_CNTR_1US_0; @@ -12,4 +14,4 @@ static inline void timer_wait(uint32_t microseconds) { void spinlock_wait(uint32_t count); -#endif \ No newline at end of file +#endif diff --git a/exosphere/bpmpfw/src/utils.h b/exosphere/bpmpfw/src/utils.h new file mode 100644 index 000000000..d3eff9b4c --- /dev/null +++ b/exosphere/bpmpfw/src/utils.h @@ -0,0 +1,22 @@ +#ifndef EXOSPHERE_BPMPFW_UTILS_H +#define EXOSPHERE_BPMPFW_UTILS_H + +#include +#include +#include + +#define BIT(n) (1u << (n)) +#define BITL(n) (1ull << (n)) +#define MASK(n) (BIT(n) - 1) +#define MASKL(n) (BITL(n) - 1) +#define MASK2(a,b) (MASK(a) & ~MASK(b)) +#define MASK2L(a,b) (MASKL(a) & ~MASKL(b)) + +#define MAKE_REG32(a) (*(volatile uint32_t *)(a)) + +#define ALIGN(m) __attribute__((aligned(m))) +#define PACKED __attribute__((packed)) + +#define ALINLINE __attribute__((always_inline)) + +#endif diff --git a/exosphere/src/actmon.h b/exosphere/src/actmon.h index d27493d4e..fa567dbb3 100644 --- a/exosphere/src/actmon.h +++ b/exosphere/src/actmon.h @@ -8,7 +8,7 @@ /* NOTE: ACTMON registers lie in the SYSREG region! */ #define ACTMON_BASE (SYSREG_BASE + 0x800) -#define MAKE_ACTMON_REG(n) (*((volatile uint32_t *)(ACTMON_BASE + n))) +#define MAKE_ACTMON_REG(n) MAKE_REG32(ACTMON_BASE + n) #define ACTMON_GLB_STATUS_0 MAKE_ACTMON_REG(0x000) #define ACTMON_COP_CTRL_0 MAKE_ACTMON_REG(0x0C0) @@ -20,4 +20,4 @@ void actmon_on_bpmp_wakeup(void); void actmon_set_callback(void (*callback)(void)); -#endif \ No newline at end of file +#endif diff --git a/exosphere/src/bpmp.h b/exosphere/src/bpmp.h index 0c74a8b94..50328a893 100644 --- a/exosphere/src/bpmp.h +++ b/exosphere/src/bpmp.h @@ -12,15 +12,15 @@ static inline uintptr_t get_bpmp_vector_base(void) { #define BPMP_VECTOR_BASE (get_bpmp_vector_base()) -#define EVP_CPU_RESET_VECTOR_0 (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x100))) +#define EVP_CPU_RESET_VECTOR_0 MAKE_REG32(BPMP_VECTOR_BASE + 0x100) -#define BPMP_VECTOR_RESET (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x200))) -#define BPMP_VECTOR_UNDEF (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x204))) -#define BPMP_VECTOR_SWI (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x208))) -#define BPMP_VECTOR_PREFETCH_ABORT (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x20C))) -#define BPMP_VECTOR_DATA_ABORT (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x210))) -#define BPMP_VECTOR_UNK (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x214))) -#define BPMP_VECTOR_IRQ (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x218))) -#define BPMP_VECTOR_FIQ (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x21C))) +#define BPMP_VECTOR_RESET MAKE_REG32(BPMP_VECTOR_BASE + 0x200) +#define BPMP_VECTOR_UNDEF MAKE_REG32(BPMP_VECTOR_BASE + 0x204) +#define BPMP_VECTOR_SWI MAKE_REG32(BPMP_VECTOR_BASE + 0x208) +#define BPMP_VECTOR_PREFETCH_ABORT MAKE_REG32(BPMP_VECTOR_BASE + 0x20C) +#define BPMP_VECTOR_DATA_ABORT MAKE_REG32(BPMP_VECTOR_BASE + 0x210) +#define BPMP_VECTOR_UNK MAKE_REG32(BPMP_VECTOR_BASE + 0x214) +#define BPMP_VECTOR_IRQ MAKE_REG32(BPMP_VECTOR_BASE + 0x218) +#define BPMP_VECTOR_FIQ MAKE_REG32(BPMP_VECTOR_BASE + 0x21C) #endif diff --git a/exosphere/src/car.h b/exosphere/src/car.h index 1ba4ccfde..76e26af82 100644 --- a/exosphere/src/car.h +++ b/exosphere/src/car.h @@ -9,7 +9,7 @@ #define CAR_BASE (MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_CLKRST)) -#define MAKE_CAR_REG(n) (*((volatile uint32_t *)(CAR_BASE + n))) +#define MAKE_CAR_REG(n) MAKE_REG32(CAR_BASE + n) #define CLK_RST_CONTROLLER_MISC_CLK_ENB_0 MAKE_CAR_REG(0x048) #define CLK_RST_CONTROLLER_RST_DEVICES_H_0 MAKE_CAR_REG(0x008) @@ -35,4 +35,4 @@ void clkrst_disable(car_device_t dev); void clkrst_reboot(car_device_t dev); -#endif \ No newline at end of file +#endif diff --git a/exosphere/src/flow.h b/exosphere/src/flow.h index 4d7066c69..91f3e4698 100644 --- a/exosphere/src/flow.h +++ b/exosphere/src/flow.h @@ -13,7 +13,7 @@ static inline uintptr_t get_flow_base(void) { #define FLOW_BASE (get_flow_base()) -#define MAKE_FLOW_REG(ofs) (*((volatile uint32_t *)(FLOW_BASE + ofs))) +#define MAKE_FLOW_REG(ofs) MAKE_REG32(FLOW_BASE + ofs) #define FLOW_CTLR_HALT_COP_EVENTS_0 MAKE_FLOW_REG(0x004) #define FLOW_CTLR_FLOW_DBG_QUAL_0 MAKE_FLOW_REG(0x050) diff --git a/exosphere/src/interrupt.h b/exosphere/src/interrupt.h index 30ab578a6..2968e4708 100644 --- a/exosphere/src/interrupt.h +++ b/exosphere/src/interrupt.h @@ -24,7 +24,7 @@ static inline uintptr_t get_gicc_base(void) { #define GICD_BASE (get_gicd_base()) #define GICC_BASE (get_gicc_base()) -#define GICD_CTLR (*((volatile uint32_t *)(GICD_BASE + 0x000ull))) +#define GICD_CTLR MAKE_REG32(GICD_BASE + 0x000ull) #define GICD_IGROUPR ((volatile uint32_t *)(GICD_BASE + 0x080ull)) #define GICD_ISENABLER ((volatile uint32_t *)(GICD_BASE + 0x100ull)) #define GICD_ISPENDR ((volatile uint32_t *)(GICD_BASE + 0x200ull)) @@ -32,11 +32,11 @@ static inline uintptr_t get_gicc_base(void) { #define GICD_ITARGETSR ((volatile uint8_t *)(GICD_BASE + 0x800ull)) #define GICD_ICFGR ((volatile uint32_t *)(GICD_BASE + 0xC00ull)) -#define GICC_CTLR (*((volatile uint32_t *)(GICC_BASE + 0x0000ull))) -#define GICC_PMR (*((volatile uint32_t *)(GICC_BASE + 0x0004ull))) -#define GICC_BPR (*((volatile uint32_t *)(GICC_BASE + 0x0008ull))) -#define GICC_IAR (*((volatile uint32_t *)(GICC_BASE + 0x000CULL))) -#define GICC_EOIR (*((volatile uint32_t *)(GICC_BASE + 0x0010ull))) +#define GICC_CTLR MAKE_REG32(GICC_BASE + 0x0000ull) +#define GICC_PMR MAKE_REG32(GICC_BASE + 0x0004ull) +#define GICC_BPR MAKE_REG32(GICC_BASE + 0x0008ull) +#define GICC_IAR MAKE_REG32(GICC_BASE + 0x000CULL) +#define GICC_EOIR MAKE_REG32(GICC_BASE + 0x0010ull) #define GIC_PRI_HIGHEST_SECURE 0x00 #define GIC_PRI_HIGHEST_NONSECURE 0x80 diff --git a/exosphere/src/lp0.c b/exosphere/src/lp0.c index b59e9425b..4c93f7c7e 100644 --- a/exosphere/src/lp0.c +++ b/exosphere/src/lp0.c @@ -90,7 +90,7 @@ uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argumen uint32_t start_time = get_time(); bool should_wait = true; /* TODO: This is GPIO-6 GPIO_IN_1 */ - while ((*((volatile uint32_t *)(MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_GPIO) + 0x634))) & 1) { + while (MAKE_REG32(MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_GPIO) + 0x634) & 1) { if (get_time() - start_time > 50000) { should_wait = false; break; diff --git a/exosphere/src/mc.h b/exosphere/src/mc.h index f7291f2f4..5a52e6c6b 100644 --- a/exosphere/src/mc.h +++ b/exosphere/src/mc.h @@ -12,7 +12,7 @@ static inline uintptr_t get_mc_base(void) { #define MC_BASE (get_mc_base()) -#define MAKE_MC_REG(n) (*((volatile uint32_t *)(MC_BASE + n))) +#define MAKE_MC_REG(n) MAKE_REG32(MC_BASE + n) #define MC_SECURITY_CFG0_0 MAKE_MC_REG(0x070) #define MC_SECURITY_CFG1_0 MAKE_MC_REG(0x074) diff --git a/exosphere/src/misc.h b/exosphere/src/misc.h index 68016ea76..de19c152b 100644 --- a/exosphere/src/misc.h +++ b/exosphere/src/misc.h @@ -9,11 +9,11 @@ #define MISC_BASE (MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_MISC)) -#define MAKE_MISC_REG(n) (*((volatile uint32_t *)(MISC_BASE + n))) +#define MAKE_MISC_REG(n) MAKE_REG32(MISC_BASE + n) #define APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG0_0 MAKE_MISC_REG(0x0C00) #define APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG1_0 MAKE_MISC_REG(0x0C04) #define APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG2_0 MAKE_MISC_REG(0x0C08) -#endif \ No newline at end of file +#endif diff --git a/exosphere/src/package2.h b/exosphere/src/package2.h index 0f257c00d..fad333b79 100644 --- a/exosphere/src/package2.h +++ b/exosphere/src/package2.h @@ -14,7 +14,7 @@ static inline uintptr_t get_nx_bootloader_mailbox_base(void) { #define MAILBOX_NX_BOOTLOADER_BASE (get_nx_bootloader_mailbox_base()) -#define MAILBOX_NX_BOOTLOADER_SETUP_STATE (*((volatile uint32_t *)(MAILBOX_NX_BOOTLOADER_BASE + 0xEF8ull))) +#define MAILBOX_NX_BOOTLOADER_SETUP_STATE MAKE_REG32(MAILBOX_NX_BOOTLOADER_BASE + 0xEF8ull) #define NX_BOOTLOADER_STATE_INIT 0 #define NX_BOOTLOADER_STATE_MOVED_BOOTCONFIG 1 @@ -27,7 +27,7 @@ static inline uintptr_t get_nx_bootloader_mailbox_base(void) { #define NX_BOOTLOADER_STATE_FINISHED_4X 4 /* Physaddr 0x40002EFC */ -#define MAILBOX_NX_BOOTLOADER_IS_SECMON_AWAKE (*((volatile uint32_t *)(MAILBOX_NX_BOOTLOADER_BASE + 0xEFCULL))) +#define MAILBOX_NX_BOOTLOADER_IS_SECMON_AWAKE MAKE_REG32(MAILBOX_NX_BOOTLOADER_BASE + 0xEFCULL) #define NX_BOOTLOADER_BOOTCONFIG_POINTER ((void *)(0x4003D000ull)) diff --git a/exosphere/src/pmc.h b/exosphere/src/pmc.h index fd9d4b487..300e6893e 100644 --- a/exosphere/src/pmc.h +++ b/exosphere/src/pmc.h @@ -12,32 +12,32 @@ static inline uintptr_t get_pmc_base(void) { #define PMC_BASE (get_pmc_base()) -#define APBDEV_PMC_DPD_ENABLE_0 (*((volatile uint32_t *)(PMC_BASE + 0x24))) +#define APBDEV_PMC_DPD_ENABLE_0 MAKE_REG32(PMC_BASE + 0x24) -#define APBDEV_PMC_PWRGATE_TOGGLE_0 (*((volatile uint32_t *)(PMC_BASE + 0x30))) -#define APBDEV_PMC_PWRGATE_STATUS_0 (*((volatile uint32_t *)(PMC_BASE + 0x38))) +#define APBDEV_PMC_PWRGATE_TOGGLE_0 MAKE_REG32(PMC_BASE + 0x30) +#define APBDEV_PMC_PWRGATE_STATUS_0 MAKE_REG32(PMC_BASE + 0x38) -#define APBDEV_PMC_SCRATCH0_0 (*((volatile uint32_t *)(PMC_BASE + 0x50))) +#define APBDEV_PMC_SCRATCH0_0 MAKE_REG32(PMC_BASE + 0x50) -#define APBDEV_PMC_CRYPTO_OP_0 (*((volatile uint32_t *)(PMC_BASE + 0xF4))) +#define APBDEV_PMC_CRYPTO_OP_0 MAKE_REG32(PMC_BASE + 0xF4) -#define APBDEV_PM_0 (*((volatile uint32_t *)(PMC_BASE + 0x14))) -#define APBDEV_PMC_WAKE2_STATUS_0 (*((volatile uint32_t *)(PMC_BASE + 0x168))) -#define APBDEV_PMC_CNTRL2_0 (*((volatile uint32_t *)(PMC_BASE + 0x440))) +#define APBDEV_PM_0 MAKE_REG32(PMC_BASE + 0x14) +#define APBDEV_PMC_WAKE2_STATUS_0 MAKE_REG32(PMC_BASE + 0x168) +#define APBDEV_PMC_CNTRL2_0 MAKE_REG32(PMC_BASE + 0x440) -#define APBDEV_PMC_SCRATCH43_0 (*((volatile uint32_t *)(PMC_BASE + 0x22C))) -#define APBDEV_PMC_SEC_DISABLE8_0 (*((volatile uint32_t *)(PMC_BASE + 0x5C0))) -#define APBDEV_PMC_SECURE_SCRATCH112_0 (*((volatile uint32_t *)(PMC_BASE + 0xB18))) -#define APBDEV_PMC_SECURE_SCRATCH113_0 (*((volatile uint32_t *)(PMC_BASE + 0xB1C))) -#define APBDEV_PMC_SECURE_SCRATCH114_0 (*((volatile uint32_t *)(PMC_BASE + 0xB20))) -#define APBDEV_PMC_SECURE_SCRATCH115_0 (*((volatile uint32_t *)(PMC_BASE + 0xB24))) +#define APBDEV_PMC_SCRATCH43_0 MAKE_REG32(PMC_BASE + 0x22C) +#define APBDEV_PMC_SEC_DISABLE8_0 MAKE_REG32(PMC_BASE + 0x5C0) +#define APBDEV_PMC_SECURE_SCRATCH112_0 MAKE_REG32(PMC_BASE + 0xB18) +#define APBDEV_PMC_SECURE_SCRATCH113_0 MAKE_REG32(PMC_BASE + 0xB1C) +#define APBDEV_PMC_SECURE_SCRATCH114_0 MAKE_REG32(PMC_BASE + 0xB20) +#define APBDEV_PMC_SECURE_SCRATCH115_0 MAKE_REG32(PMC_BASE + 0xB24) -#define APBDEV_PMC_SCRATCH200_0 (*((volatile uint32_t *)(PMC_BASE + 0x840))) +#define APBDEV_PMC_SCRATCH200_0 MAKE_REG32(PMC_BASE + 0x840) -#define APBDEV_PMC_SEC_DISABLE3_0 (*((volatile uint32_t *)(PMC_BASE + 0x2D8))) -#define APBDEV_PMC_SECURE_SCRATCH34_0 (*((volatile uint32_t *)(PMC_BASE + 0x368))) -#define APBDEV_PMC_SECURE_SCRATCH35_0 (*((volatile uint32_t *)(PMC_BASE + 0x36C))) +#define APBDEV_PMC_SEC_DISABLE3_0 MAKE_REG32(PMC_BASE + 0x2D8) +#define APBDEV_PMC_SECURE_SCRATCH34_0 MAKE_REG32(PMC_BASE + 0x368) +#define APBDEV_PMC_SECURE_SCRATCH35_0 MAKE_REG32(PMC_BASE + 0x36C) diff --git a/exosphere/src/se.c b/exosphere/src/se.c index b912e7f9d..a64d6d45d 100644 --- a/exosphere/src/se.c +++ b/exosphere/src/se.c @@ -1,6 +1,7 @@ #include #include "utils.h" +#include "synchronization.h" #include "interrupt.h" #include "se.h" #include "memory_map.h" @@ -281,7 +282,7 @@ void se_aes_crypt_insecure_internal(unsigned int keyslot, uint32_t out_ll_paddr, SECURITY_ENGINE->OPERATION_REG = 1; /* Ensure writes go through. */ - __asm__ __volatile__ ("dsb ish" : : : "memory"); + __dsb_ish(); } void se_aes_ctr_crypt_insecure(unsigned int keyslot, uint32_t out_ll_paddr, uint32_t in_ll_paddr, size_t size, const void *ctr, unsigned int (*callback)(void)) { @@ -442,7 +443,7 @@ void trigger_se_rsa_op(void *buf, size_t size) { SECURITY_ENGINE->OPERATION_REG = 1; /* Ensure writes go through. */ - __asm__ __volatile__ ("dsb ish" : : : "memory"); + __dsb_ish(); } void trigger_se_blocking_op(unsigned int op, void *dst, size_t dst_size, const void *src, size_t src_size) { diff --git a/exosphere/src/synchronization.h b/exosphere/src/synchronization.h index 141713d96..caa8c1c72 100644 --- a/exosphere/src/synchronization.h +++ b/exosphere/src/synchronization.h @@ -17,6 +17,10 @@ static inline void __dsb_sy(void) { __asm__ __volatile__ ("dsb sy" ::: "memory"); } +static inline void __dsb_ish(void) { + __asm__ __volatile__ ("dsb ish" ::: "memory"); +} + static inline void __dmb_sy(void) { __asm__ __volatile__ ("dmb sy" ::: "memory"); } diff --git a/exosphere/src/syscrt0.h b/exosphere/src/syscrt0.h index 4167981b3..52280a082 100644 --- a/exosphere/src/syscrt0.h +++ b/exosphere/src/syscrt0.h @@ -10,8 +10,8 @@ #define SYSCRT0_BASE (MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_SYSCTR0)) -#define MAKE_SYSCRT0_REG(n) (*((volatile uint32_t *)(SYSCRT0_BASE + n))) +#define MAKE_SYSCRT0_REG(n) MAKE_REG32(SYSCRT0_BASE + n) -#endif \ No newline at end of file +#endif diff --git a/exosphere/src/sysreg.h b/exosphere/src/sysreg.h index 4329b5765..a592a64d9 100644 --- a/exosphere/src/sysreg.h +++ b/exosphere/src/sysreg.h @@ -11,8 +11,8 @@ #define SB_BASE (SYSREG_BASE + 0x200) -#define MAKE_SYSREG(n) (*((volatile uint32_t *)(SYSREG_BASE + n))) -#define MAKE_SB_REG(n) (*((volatile uint32_t *)(SB_BASE + n))) +#define MAKE_SYSREG(n) MAKE_REG32(SYSREG_BASE + n) +#define MAKE_SB_REG(n) MAKE_REG32(SB_BASE + n) #define SB_CSR_0 MAKE_SB_REG(0x00) #define SB_PIROM_START_0 MAKE_SB_REG(0x04) @@ -28,4 +28,4 @@ #define SB_AA64_RESET_LOW_0 MAKE_SB_REG(0x30) #define SB_AA64_RESET_HIGH_0 MAKE_SB_REG(0x34) -#endif \ No newline at end of file +#endif diff --git a/exosphere/src/timers.h b/exosphere/src/timers.h index b70feffee..8c48fe6a2 100644 --- a/exosphere/src/timers.h +++ b/exosphere/src/timers.h @@ -12,9 +12,9 @@ static inline uintptr_t get_timers_base(void) { #define TIMERS_BASE (get_timers_base()) -#define MAKE_TIMERS_REG(n) (*((volatile uint32_t *)(TIMERS_BASE + n))) +#define MAKE_TIMERS_REG(n) MAKE_REG32(TIMERS_BASE + n) -#define TIMERUS_CNTR_1US_0 (*((volatile uint32_t *)(TIMERS_BASE + 0x10))) +#define TIMERUS_CNTR_1US_0 MAKE_REG32(TIMERS_BASE + 0x10) typedef struct { uint32_t CONFIG; @@ -25,7 +25,7 @@ typedef struct { #define GET_WDT(n) ((volatile watchdog_timers_t *)(TIMERS_BASE + 0x100 + 0x20 * n)) #define WDT_REBOOT_PATTERN 0xC45A -#define GET_WDT_REBOOT_CFG_REG(n) (*((volatile uint32_t *)(TIMERS_BASE + 0x60 + 0x8*n))) +#define GET_WDT_REBOOT_CFG_REG(n) MAKE_REG32(TIMERS_BASE + 0x60 + 0x8*n) void wait(uint32_t microseconds); diff --git a/exosphere/src/uart.h b/exosphere/src/uart.h index a1852cf0d..54dec7e96 100644 --- a/exosphere/src/uart.h +++ b/exosphere/src/uart.h @@ -14,11 +14,11 @@ static inline uintptr_t get_uarta_base(void) { #define UARTA_BASE (get_uarta_base()) -#define UART_THR_DLAB_0_0 (*((volatile uint32_t *)(UARTA_BASE + 0x0))) -#define UART_IER_DLAB_0_0 (*((volatile uint32_t *)(UARTA_BASE + 0x4))) -#define UART_IIR_FCR_0 (*((volatile uint32_t *)(UARTA_BASE+ 0x8))) -#define UART_LCR_0 (*((volatile uint32_t *)(UARTA_BASE + 0xC))) -#define UART_LSR_0 (*((volatile uint32_t *)(UARTA_BASE + 0x14))) +#define UART_THR_DLAB_0_0 MAKE_REG32(UARTA_BASE + 0x0) +#define UART_IER_DLAB_0_0 MAKE_REG32(UARTA_BASE + 0x4) +#define UART_IIR_FCR_0 MAKE_REG32(UARTA_BASE+ 0x8) +#define UART_LCR_0 MAKE_REG32(UARTA_BASE + 0xC) +#define UART_LSR_0 MAKE_REG32(UARTA_BASE + 0x14) void uart_initialize(uint16_t divider); void uart_transmit_char(char ch); diff --git a/exosphere/src/utils.h b/exosphere/src/utils.h index ce5c290f6..2919c88c9 100644 --- a/exosphere/src/utils.h +++ b/exosphere/src/utils.h @@ -12,6 +12,8 @@ #define MASK2(a,b) (MASK(a) & ~MASK(b)) #define MASK2L(a,b) (MASKL(a) & ~MASKL(b)) +#define MAKE_REG32(a) (*(volatile uint32_t *)(a)) + #define ALIGN(m) __attribute__((aligned(m))) #define PACKED __attribute__((packed)) diff --git a/exosphere/src/warmboot_init.c b/exosphere/src/warmboot_init.c index 4fdc3fc04..dea4165dc 100644 --- a/exosphere/src/warmboot_init.c +++ b/exosphere/src/warmboot_init.c @@ -33,35 +33,35 @@ void init_dma_controllers(void) { /* TODO: 4.x does slightly different init. How should we handle this? We can't detect master key revision yet. */ /* SYSCTR0_CNTCR_0 = ENABLE | HALT_ON_DEBUG (write-once init) */ - (*((volatile uint32_t *)(0x700F0000))) = 3; + MAKE_REG32(0x700F0000) = 3; /* Set some unknown registers in HOST1X. */ - (*((volatile uint32_t *)(0x500038F8))) &= 0xFFFFFFFE; - (*((volatile uint32_t *)(0x50003300))) = 0; + MAKE_REG32(0x500038F8) &= 0xFFFFFFFE; + MAKE_REG32(0x50003300) = 0; /* AHB_MASTER_SWID_0 */ - (*((volatile uint32_t *)(0x6000C018))) = 0; + MAKE_REG32(0x6000C018) = 0; /* AHB_MASTER_SWID_1 - Makes USB1/USB2 use SWID[1] */ - (*((volatile uint32_t *)(0x6000C038))) = 0x40040; + MAKE_REG32(0x6000C038) = 0x40040; /* APBDMA_CHANNEL_SWID_0 = ~0 (SWID = 1 for all APB-DMA channels) */ - (*((volatile uint32_t *)(0x6002003C))) = 0xFFFFFFFF; + MAKE_REG32(0x6002003C) = 0xFFFFFFFF; /* APBDMA_CHANNEL_SWID1_0 = 0 (See above) */ - (*((volatile uint32_t *)(0x60020054))) = 0; + MAKE_REG32(0x60020054) = 0; /* APBDMA_SECURITY_REG_0 = 0 (All APB-DMA channels non-secure) */ - (*((volatile uint32_t *)(0x60020038))) = 0; + MAKE_REG32(0x60020038) = 0; /* MSELECT_CONFIG_0 |= WRAP_TO_INCR_SLAVE0(APC) | WRAP_TO_INCR_SLAVE1(PCIe) | WRAP_TO_INCR_SLAVE2(GPU) */ - (*((volatile uint32_t *)(0x50060000))) |= 0x38000000; + MAKE_REG32(0x50060000) |= 0x38000000; /* AHB_ARBITRATION_PRIORITY_CTRL_0 - Select high prio group with prio 7 */ - (*((volatile uint32_t *)(0x6000C008))) = 0xE0000001; + MAKE_REG32(0x6000C008) = 0xE0000001; /* AHB_GIZMO_TZRAM_0 |= DONT_SPLIT_AHB_WR */ - (*((volatile uint32_t *)(0x6000C054))) = 0x80; + MAKE_REG32(0x6000C054) = 0x80; } void set_memory_registers_enable_mmu(void) {