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https://github.com/Atmosphere-NX/Atmosphere
synced 2024-11-09 22:56:35 +00:00
Adapt code to match last commit, link in bpmpfw_bin(_size)
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parent
984ade3ede
commit
9384546753
4 changed files with 22 additions and 11 deletions
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@ -62,7 +62,8 @@ $(dir_build)/bpmpfw.bin: $(dir_bpmpfw)/out/bpmpfw.bin
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$(dir_build)/%.bin.o: $(dir_build)/%.bin
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@$(bin2o)
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$(dir_build)/%.o: $(dir_source)/%.c $(dir_build)/bpmpfw.bin.o
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$(dir_build)/lpo.o: $(dir_build)/bpmpfw.bin.o
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$(dir_build)/%.o: $(dir_source)/%.c
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@mkdir -p "$(@D)"
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$(COMPILE.c) $(OUTPUT_OPTION) $<
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@ -6,7 +6,11 @@
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/* Exosphere register definitions for the Tegra X1 BPMP vectors. */
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#define BPMP_VECTOR_BASE (mmio_get_device_address(MMIO_DEVID_EXCEPTION_VECTORS))
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static inline uintptr_t get_bpmp_vector_base(void) {
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return MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_EXCEPTION_VECTORS);
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}
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#define BPMP_VECTOR_BASE (get_bpmp_vector_base())
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#define BPMP_VECTOR_RESET (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x200)))
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@ -18,5 +22,4 @@
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#define BPMP_VECTOR_IRQ (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x218)))
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#define BPMP_VECTOR_FIQ (*((volatile uint32_t *)(BPMP_VECTOR_BASE + 0x21C)))
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#endif
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#endif
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@ -7,7 +7,11 @@
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/* Exosphere register definitions for the Tegra X1 Flow Controller. */
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#define FLOW_BASE (mmio_get_device_address(MMIO_DEVID_FLOWCTRL))
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static inline uintptr_t get_flow_base(void) {
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return MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_FLOWCTRL);
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}
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#define FLOW_BASE (get_flow_base())
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#define MAKE_FLOW_REG(ofs) (*((volatile uint32_t *)(FLOW_BASE + ofs)))
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@ -43,4 +47,4 @@ static inline void flow_clear_csr0_and_events(uint32_t core) {
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MAKE_FLOW_REG(g_flow_core_offsets[core].HALT_CPUN_EVENTS_OFS) = 0;
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}
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#endif
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#endif
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@ -15,6 +15,9 @@
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#include "smc_api.h"
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#include "timers.h"
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extern const uint8_t bpmpfw_bin[];
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extern const uint32_t bpmpfw_bin_size;
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/* Save security engine, and go to sleep. */
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void save_se_and_power_down_cpu(void) {
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clear_priv_smc_in_progress();
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@ -36,7 +39,7 @@ uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argumen
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uint32_t start_time = get_time();
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bool should_wait = true;
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/* TODO: This is GPIO-6 GPIO_IN_1 */
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while ((*((volatile uint32_t *)(mmio_get_device_address(MMIO_DEVID_GPIO) + 0x634))) & 1) {
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while ((*((volatile uint32_t *)(MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_GPIO) + 0x634))) & 1) {
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if (get_time() - start_time > 50000) {
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should_wait = false;
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break;
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@ -89,7 +92,7 @@ uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argumen
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/* Prepare to boot the BPMP running our deep sleep firmware. */
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/* Mark PMC registers as not secure-world only, so BPMP can access them. */
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(*((volatile uint32_t *)(mmio_get_device_address(MMIO_DEVID_MISC) + 0xC00))) &= 0xFFFFDFFF; /* TODO: macro */
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(*((volatile uint32_t *)(MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_MISC) + 0xC00))) &= 0xFFFFDFFF; /* TODO: macro */
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/* Setup BPMP vectors. */
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BPMP_VECTOR_RESET = 0x40003000; /* lp0_entry_firmware_crt0 */
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@ -102,7 +105,7 @@ uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argumen
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BPMP_VECTOR_FIQ = 0x40003004; /* Reboot. */
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/* TODO: Hold the BPMP in reset. */
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uint8_t *lp0_entry_code = (uint8_t *)(lp0_get_plaintext_ram_segment_address(LP0_ENTRY_RAM_SEGMENT_ID_LP0_ENTRY_CODE));
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uint8_t *lp0_entry_code = (uint8_t *)(LP0_ENTRY_GET_RAM_SEGMENT_ADDRESS(LP0_ENTRY_RAM_SEGMENT_ID_LP0_ENTRY_CODE));
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(void)(lp0_entry_code);
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/* TODO: memcpy(lp0_entry_code, BPMP_FIRMWARE_ADDRESS, sizeof(BPMP_FIRMWARE)); */
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/* TODO: flush_dcache_range(lp0_entry_code, lp0_entry_code + sizeof(BPMP_FIRMWARE)); */
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@ -121,8 +124,8 @@ uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argumen
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/* TODO: save_current_core_context(); */
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/* TODO: set_current_core_inacctive(); */
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/* TODO: set_current_core_saved(true); */
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/* TODO: call_with_stack_pointer(tzram_get_segment_address(TZRAM_SEGMENT_ID_CORE012_STACK) + 0x1000ULL, save_se_and_power_down_cpu); */
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/* TODO: call_with_stack_pointer(TZRAM_GET_SEGMENT_ADDR(TZRAM_SEGMENT_ID_CORE012_STACK) + 0x1000ULL, save_se_and_power_down_cpu); */
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/* NOTE: This return never actually occurs. */
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return 0;
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}
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}
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