mirror of
https://github.com/Atmosphere-NX/Atmosphere
synced 2024-12-23 04:41:12 +00:00
thermosphere: add qemu support
This commit is contained in:
parent
02c27a482a
commit
8e73bdef4c
19 changed files with 343 additions and 26 deletions
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@ -17,6 +17,22 @@ ifneq (, $(strip $(shell git status --porcelain 2>/dev/null)))
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AMSREV := $(AMSREV)-dirty
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endif
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ifeq ($(PLATFORM), qemu)
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export PLATFORM := qemu
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PLATFORM_SOURCES := src/platform/qemu
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PLATFORM_DEFINES := -DPLATFORM_QEMU
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else
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export PLATFORM := tegra
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PLATFORM_SOURCES := src/platform/tegra
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PLATFORM_DEFINES := -DPLATFORM_TEGRA
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endif
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#---------------------------------------------------------------------------------
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# TARGET is the name of the output
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# BUILD is the directory where object files & intermediate files will be placed
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@ -26,7 +42,7 @@ endif
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#---------------------------------------------------------------------------------
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TARGET := $(notdir $(CURDIR))
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BUILD := build
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SOURCES := src
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SOURCES := src $(PLATFORM_SOURCES)
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DATA := data
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INCLUDES := include ../common/include
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@ -34,7 +50,8 @@ INCLUDES := include ../common/include
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# options for code generation
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#---------------------------------------------------------------------------------
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ARCH := -march=armv8-a -mtune=cortex-a57 -mgeneral-regs-only #<- important
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DEFINES := -D__CCPLEX__ -DATMOSPHERE_GIT_BRANCH=\"$(AMSBRANCH)\" -DATMOSPHERE_GIT_REV=\"$(AMSREV)\" -DATMOSPHERE_RELEASE_VERSION_HASH="0x$(AMSHASH)"
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DEFINES := -D__CCPLEX__ -DATMOSPHERE_GIT_BRANCH=\"$(AMSBRANCH)\" -DATMOSPHERE_GIT_REV=\"$(AMSREV)\"\
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-DATMOSPHERE_RELEASE_VERSION_HASH="0x$(AMSHASH)" $(PLATFORM_DEFINES)
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CFLAGS := \
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-g \
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-Os \
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@ -109,11 +126,27 @@ export INCLUDE := $(foreach dir,$(INCLUDES),-I$(CURDIR)/$(dir)) \
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export LIBPATHS := $(foreach dir,$(LIBDIRS),-L$(dir)/lib)
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.PHONY: $(BUILD) clean all
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.PHONY: $(BUILD) clean all qemu qemudbg
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#---------------------------------------------------------------------------------
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all: $(BUILD)
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ifeq ($(PLATFORM), qemu)
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QEMUFLAGS := -nographic -machine virt,secure=on,virtualization=on -cpu cortex-a57 -smp 2 -m 1024\
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-bios bl1.bin -d unimp -semihosting-config enable,target=native -serial mon:stdio
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# NOTE: copy bl1.bin, bl2.bin, bl31.bin from your own build of Arm Trusted Firmware!
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qemu: all
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@cp thermosphere.bin bl33.bin
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@qemu-system-aarch64 $(QEMUFLAGS)
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qemudbg: all
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@cp thermosphere.bin bl33.bin
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@qemu-system-aarch64 $(QEMUFLAGS) -s -S
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endif
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$(BUILD):
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@[ -d $@ ] || mkdir -p $@
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@$(MAKE) --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile
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@ -121,7 +154,7 @@ $(BUILD):
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#---------------------------------------------------------------------------------
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clean:
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@echo clean ...
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@rm -fr $(BUILD) $(TARGET).bin $(TARGET).elf
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@rm -fr $(BUILD) $(TARGET).bin bl33.bin $(TARGET).elf
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#---------------------------------------------------------------------------------
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@ -1,15 +1,9 @@
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OUTPUT_ARCH(aarch64)
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ENTRY(_start)
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MEMORY
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{
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NULL : ORIGIN = 0, LENGTH = 0x1000
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main : ORIGIN = 0x80000000, LENGTH = 0xD000 - 0x1000 /* 0x1000 for stacks. */
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}
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SECTIONS
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{
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PROVIDE(__start__ = 0x80000000);
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PROVIDE(__start__ = ORIGIN(main));
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. = __start__;
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.text :
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@ -1,4 +1,4 @@
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%rename link old_link
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*link:
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%(old_link) -T %:getenv(TOPDIR /linker.ld) --nmagic --gc-sections
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%(old_link) -T %:getenv(TOPDIR /%:getenv(PLATFORM .mem)) -T %:getenv(TOPDIR /linker.ld) --nmagic --gc-sections
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5
thermosphere/qemu.mem
Normal file
5
thermosphere/qemu.mem
Normal file
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@ -0,0 +1,5 @@
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MEMORY
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{
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NULL : ORIGIN = 0, LENGTH = 0x1000
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main : ORIGIN = 0x60000000, LENGTH = 128M /* QEMU's memory map changes dynamically? */
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}
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@ -16,7 +16,7 @@
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#include <stdio.h>
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#include "log.h"
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#include "uart.h"
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#include "platform/uart.h"
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#include "utils.h"
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// NOTE: UNSAFE!
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@ -28,6 +28,6 @@ int serialLog(const char *fmt, ...)
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int res = vsprintf(buf, fmt, args);
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va_end(args);
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uart_send(UART_C, buf, res);
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uartWriteData(buf, (size_t)res);
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return res;
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}
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@ -1,12 +1,10 @@
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#include "utils.h"
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#include "uart.h"
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#include "log.h"
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#include "platform/uart.h"
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int main(void)
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{
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uart_config(UART_C);
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uart_reset(UART_C);
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uart_init(UART_C, 115200, true);
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uartInit(115200);
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//uart_send(UART_C, "0123\n", 3);
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serialLog("Hello from Thermosphere!\r\n");
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79
thermosphere/src/platform/qemu/uart.c
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79
thermosphere/src/platform/qemu/uart.c
Normal file
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@ -0,0 +1,79 @@
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/*
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* Copyright (c) 2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "uart.h"
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#include "../../utils.h"
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// Adapted from ARM TF asm code
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// AMBA PL101 driver
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/*
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* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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//115200
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void uartInit(u32 baudRate)
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{
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// First, disable UART
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g_uartRegs->CR &= ~PL011_UARTCR_UARTEN;
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// Set baudrate, Divisor = (Uart clock * 4) / baudrate; stored in IBRD|FBRD
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u32 divisor = (4 * UART0_CLK_IN_HZ) / baudRate;
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g_uartRegs->IBRD = divisor >> 6;
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g_uartRegs->FBRD = divisor & 0x3F;
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g_uartRegs->LCR_H = PL011_LINE_CONTROL;
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// Clear any pending errors
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g_uartRegs->ECR = 0;
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// Enable tx, rx, and uart overall
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g_uartRegs->CR = PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN;
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}
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void uartWriteData(const void *buffer, size_t size)
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{
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const u8 *buf8 = (const u8 *)buffer;
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for (size_t i = 0; i < size; i++) {
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while (g_uartRegs->FR & PL011_UARTFR_TXFF); // while TX FIFO full
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g_uartRegs->DR = buf8[i];
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}
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}
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void uartReadData(void *buffer, size_t size)
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{
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u8 *buf8 = (u8 *)buffer;
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size_t i;
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for (i = 0; i < size; i++) {
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while (g_uartRegs->FR & PL011_UARTFR_RXFE);
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buf8[i] = g_uartRegs->DR;
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}
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}
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size_t uartReadDataMax(void *buffer, size_t maxSize)
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{
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u8 *buf8 = (u8 *)buffer;
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size_t i;
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for (i = 0; i < maxSize && !(g_uartRegs->FR & PL011_UARTFR_RXFE); i++) {
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buf8[i] = g_uartRegs->DR;
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}
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return 1 + i;
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}
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135
thermosphere/src/platform/qemu/uart.h
Normal file
135
thermosphere/src/platform/qemu/uart.h
Normal file
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@ -0,0 +1,135 @@
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/*
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* Copyright (c) 2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include "../../types.h"
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// AMBA PL011 driver
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/*
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#if 0
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/* PL011 Registers */
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#define UARTDR 0x000
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#define UARTRSR 0x004
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#define UARTECR 0x004
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#define UARTFR 0x018
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#define UARTIMSC 0x038
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#define UARTRIS 0x03C
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#define UARTICR 0x044
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/* PL011 registers (out of the SBSA specification) */
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#if !PL011_GENERIC_UART
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#define UARTILPR 0x020
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#define UARTIBRD 0x024
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#define UARTFBRD 0x028
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#define UARTLCR_H 0x02C
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#define UARTCR 0x030
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#define UARTIFLS 0x034
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#define UARTMIS 0x040
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#define UARTDMACR 0x048
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#endif /* !PL011_GENERIC_UART */
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#endif
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typedef struct PL011UartRegisters {
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u32 DR;
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union {
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u32 SR;
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u32 ECR;
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};
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u32 _0x08, _0x0C, _0x10;
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u32 FR;
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u32 _0x1C;
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u32 ILPR;
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u32 IBRD;
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u32 FBRD;
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u32 LCR_H;
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u32 CR;
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u32 IFLS;
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u32 IMSC;
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u32 TRIS;
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u32 TMIS;
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u32 TICR;
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u32 TDMACR;
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} PL011UartRegisters;
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/* Data status bits */
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#define UART_DATA_ERROR_MASK 0x0F00
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/* Status reg bits */
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#define UART_STATUS_ERROR_MASK 0x0F
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/* Flag reg bits */
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#define PL011_UARTFR_RI (1 << 8) /* Ring indicator */
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#define PL011_UARTFR_TXFE (1 << 7) /* Transmit FIFO empty */
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#define PL011_UARTFR_RXFF (1 << 6) /* Receive FIFO full */
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#define PL011_UARTFR_TXFF (1 << 5) /* Transmit FIFO full */
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#define PL011_UARTFR_RXFE (1 << 4) /* Receive FIFO empty */
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#define PL011_UARTFR_BUSY (1 << 3) /* UART busy */
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#define PL011_UARTFR_DCD (1 << 2) /* Data carrier detect */
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#define PL011_UARTFR_DSR (1 << 1) /* Data set ready */
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#define PL011_UARTFR_CTS (1 << 0) /* Clear to send */
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#define PL011_UARTFR_TXFF_BIT 5 /* Transmit FIFO full bit in UARTFR register */
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#define PL011_UARTFR_RXFE_BIT 4 /* Receive FIFO empty bit in UARTFR register */
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#define PL011_UARTFR_BUSY_BIT 3 /* UART busy bit in UARTFR register */
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/* Control reg bits */
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#if !PL011_GENERIC_UART
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#define PL011_UARTCR_CTSEN (1 << 15) /* CTS hardware flow control enable */
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#define PL011_UARTCR_RTSEN (1 << 14) /* RTS hardware flow control enable */
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#define PL011_UARTCR_RTS (1 << 11) /* Request to send */
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#define PL011_UARTCR_DTR (1 << 10) /* Data transmit ready. */
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#define PL011_UARTCR_RXE (1 << 9) /* Receive enable */
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#define PL011_UARTCR_TXE (1 << 8) /* Transmit enable */
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#define PL011_UARTCR_LBE (1 << 7) /* Loopback enable */
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#define PL011_UARTCR_UARTEN (1 << 0) /* UART Enable */
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#if !defined(PL011_LINE_CONTROL)
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/* FIFO Enabled / No Parity / 8 Data bit / One Stop Bit */
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#define PL011_LINE_CONTROL (PL011_UARTLCR_H_FEN | PL011_UARTLCR_H_WLEN_8)
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#endif
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/* Line Control Register Bits */
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#define PL011_UARTLCR_H_SPS (1 << 7) /* Stick parity select */
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#define PL011_UARTLCR_H_WLEN_8 (3 << 5)
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#define PL011_UARTLCR_H_WLEN_7 (2 << 5)
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#define PL011_UARTLCR_H_WLEN_6 (1 << 5)
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#define PL011_UARTLCR_H_WLEN_5 (0 << 5)
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#define PL011_UARTLCR_H_FEN (1 << 4) /* FIFOs Enable */
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#define PL011_UARTLCR_H_STP2 (1 << 3) /* Two stop bits select */
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#define PL011_UARTLCR_H_EPS (1 << 2) /* Even parity select */
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#define PL011_UARTLCR_H_PEN (1 << 1) /* Parity Enable */
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#define PL011_UARTLCR_H_BRK (1 << 0) /* Send break */
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#endif /* !PL011_GENERIC_UART */
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#define UART0_BASE 0x09000000
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#define UART1_BASE 0x09040000
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#define UART0_CLK_IN_HZ 1
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#define UART1_CLK_IN_HZ 1
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static volatile PL011UartRegisters *const g_uartRegs = (volatile PL011UartRegisters *)UART0_BASE;
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void uartInit(u32 baudRate);
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void uartWriteData(const void *buffer, size_t size);
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void uartReadData(void *buffer, size_t size);
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size_t uartReadDataMax(void *buffer, size_t maxSize);
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@ -16,7 +16,7 @@
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#include "car.h"
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#include "timers.h"
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#include "utils.h"
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#include "../../utils.h"
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static inline uint32_t get_clk_source_reg(CarDevice dev) {
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switch (dev) {
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@ -15,7 +15,7 @@
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*/
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#pragma once
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#include "utils.h"
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#include "../../utils.h"
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#define CAR_BASE 0x60006000
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#define MAKE_CAR_REG(n) MAKE_REG32(CAR_BASE + n)
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@ -18,7 +18,7 @@
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#include <stdint.h>
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#include "gpio.h"
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#include "utils.h"
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#include "../../utils.h"
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/**
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* Returns a GPIO bank object that corresponds to the given GPIO pin,
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@ -16,7 +16,7 @@
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#pragma once
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#include "utils.h"
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#include "../../utils.h"
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#define MISC_BASE 0x70000000ull
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@ -16,6 +16,8 @@
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#pragma once
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#include <stdint.h>
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#define PINMUX_BASE 0x70003000
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#define MAKE_PINMUX_REG(n) MAKE_REG32(PINMUX_BASE + n)
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@ -15,7 +15,7 @@
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*/
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#pragma once
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#include "utils.h"
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#include "../../utils.h"
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#define TIMERS_BASE 0x60005000
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#define MAKE_TIMERS_REG(n) MAKE_REG32(TIMERS_BASE + n)
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@ -130,3 +130,14 @@ void uart_recv(UartDevice dev, void *buf, size_t len) {
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*((uint8_t *)buf + i) = uart->UART_THR_DLAB;
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}
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}
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size_t uart_recv_max(UartDevice dev, void *buf, size_t max_len) {
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volatile tegra_uart_t *uart = uart_get_regs(dev);
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size_t i;
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for (i = 0; i < max_len && (uart->UART_LSR & UART_LSR_RDR); i++) {
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*((uint8_t *)buf + i) = uart->UART_THR_DLAB;
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}
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return 1 + i;
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}
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@ -17,7 +17,7 @@
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#pragma once
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#include "types.h"
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#include "../../utils.h"
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#define UART_BASE 0x70006000
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@ -162,6 +162,7 @@ void uart_init(UartDevice dev, uint32_t baud, bool inverted);
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void uart_wait_idle(UartDevice dev, UartVendorStatus status);
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void uart_send(UartDevice dev, const void *buf, size_t len);
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void uart_recv(UartDevice dev, void *buf, size_t len);
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size_t uart_recv_max(UartDevice dev, void *buf, size_t max_len);
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static inline volatile tegra_uart_t *uart_get_regs(UartDevice dev) {
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static const size_t offsets[] = {0, 0x40, 0x200, 0x300, 0x400};
|
54
thermosphere/src/platform/uart.h
Normal file
54
thermosphere/src/platform/uart.h
Normal file
|
@ -0,0 +1,54 @@
|
|||
/*
|
||||
* Copyright (c) 2019 Atmosphère-NX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef PLATFORM_TEGRA
|
||||
#include "tegra/uart.h"
|
||||
|
||||
#define DEFAULT_UART UART_C
|
||||
#define DEFAULT_UARTINV_STATUS true
|
||||
|
||||
static inline void uartInit(u32 baudRate)
|
||||
{
|
||||
uart_reset(DEFAULT_UART);
|
||||
uart_init(DEFAULT_UART, baudRate, DEFAULT_UARTINV_STATUS);
|
||||
}
|
||||
|
||||
static inline void uartWriteData(const void *buffer, size_t size)
|
||||
{
|
||||
uart_send(DEFAULT_UART, buffer, size);
|
||||
}
|
||||
|
||||
static inline void uartReadData(void *buffer, size_t size)
|
||||
{
|
||||
uart_recv(DEFAULT_UART, buffer, size);
|
||||
}
|
||||
|
||||
static inline size_t uartReadDataMax(void *buffer, size_t maxSize)
|
||||
{
|
||||
return uart_recv_max(DEFAULT_UART, buffer, maxSize);
|
||||
}
|
||||
|
||||
#elif defined(PLATFORM_QEMU)
|
||||
|
||||
#include "qemu/uart.h"
|
||||
|
||||
#else
|
||||
|
||||
#error "Error: platform not defined"
|
||||
|
||||
#endif
|
5
thermosphere/tegra.mem
Normal file
5
thermosphere/tegra.mem
Normal file
|
@ -0,0 +1,5 @@
|
|||
MEMORY
|
||||
{
|
||||
NULL : ORIGIN = 0, LENGTH = 0x1000
|
||||
main : ORIGIN = 0x80000000, LENGTH = 0xD000 - 0x1000 /* 0x1000 for stacks. */
|
||||
}
|
Loading…
Reference in a new issue