mirror of
https://github.com/Atmosphere-NX/Atmosphere
synced 2024-12-22 20:31:14 +00:00
Merge pull request #134 from desowin/sdmmc-stage2
Fix race conditions and misconfiguration in sdmmc
This commit is contained in:
commit
80be253c1e
2 changed files with 82 additions and 48 deletions
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@ -910,32 +910,38 @@ static int sdmmc_set_up_clocking_parameters(struct mmc *mmc, enum sdmmc_bus_volt
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{
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{
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// Clear the I/O conditioning constants.
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// Clear the I/O conditioning constants.
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mmc->regs->vendor_clock_cntrl &= ~(MMC_CLOCK_TRIM_MASK | MMC_CLOCK_TAP_MASK);
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mmc->regs->vendor_clock_cntrl &= ~(MMC_CLOCK_TRIM_MASK | MMC_CLOCK_TAP_MASK);
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mmc->regs->auto_cal_config &= ~MMC_AUTOCAL_PDPU_CONFIG_MASK;
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// Per the TRM, set the PADPIPE clock enable.
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// Per the TRM, set the PADPIPE clock enable.
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mmc->regs->vendor_clock_cntrl |= MMC_CLOCK_PADPIPE_CLKEN_OVERRIDE;
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mmc->regs->vendor_clock_cntrl |= MMC_CLOCK_PADPIPE_CLKEN_OVERRIDE;
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switch (operating_voltage) {
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case MMC_VOLTAGE_1V8:
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mmc->regs->auto_cal_config |= MMC_AUTOCAL_PDPU_SDMMC4_1V8;
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break;
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case MMC_VOLTAGE_3V3:
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mmc->regs->auto_cal_config |= MMC_AUTOCAL_PDPU_SDMMC1_3V3;
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break;
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default:
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printk("ERROR: currently no controllers support voltage %d", mmc->operating_voltage);
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return EINVAL;
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}
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// Set up the I/O conditioning constants used to ensure we have a reliable clock.
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// Set up the I/O conditioning constants used to ensure we have a reliable clock.
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// Constants above and procedure below from the TRM.
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// Constants above and procedure below from the TRM.
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switch (mmc->controller) {
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switch (mmc->controller) {
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case SWITCH_EMMC:
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case SWITCH_EMMC:
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if (operating_voltage != MMC_VOLTAGE_1V8) {
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mmc_print(mmc, "ERROR: eMMC can only run at 1V8, but mmc struct claims voltage %d", operating_voltage);
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return EINVAL;
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}
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mmc->regs->auto_cal_config &= ~MMC_AUTOCAL_PDPU_CONFIG_MASK;
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mmc->regs->auto_cal_config |= MMC_AUTOCAL_PDPU_SDMMC4_1V8;
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mmc->regs->vendor_clock_cntrl |= (MMC_CLOCK_TRIM_SDMMC4 | MMC_CLOCK_TAP_SDMMC4);
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mmc->regs->vendor_clock_cntrl |= (MMC_CLOCK_TRIM_SDMMC4 | MMC_CLOCK_TAP_SDMMC4);
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break;
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break;
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case SWITCH_MICROSD:
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case SWITCH_MICROSD:
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switch (operating_voltage) {
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case MMC_VOLTAGE_1V8:
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mmc->regs->auto_cal_config &= ~MMC_AUTOCAL_PDPU_CONFIG_MASK;
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mmc->regs->auto_cal_config |= MMC_AUTOCAL_PDPU_SDMMC1_1V8;
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break;
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case MMC_VOLTAGE_3V3:
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mmc->regs->auto_cal_config &= ~MMC_AUTOCAL_PDPU_CONFIG_MASK;
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mmc->regs->auto_cal_config |= MMC_AUTOCAL_PDPU_SDMMC1_3V3;
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break;
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default:
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mmc_print(mmc, "ERROR: microsd does not support voltage %d", operating_voltage);
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return EINVAL;
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}
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mmc->regs->vendor_clock_cntrl |= (MMC_CLOCK_TRIM_SDMMC1 | MMC_CLOCK_TAP_SDMMC1);
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mmc->regs->vendor_clock_cntrl |= (MMC_CLOCK_TRIM_SDMMC1 | MMC_CLOCK_TAP_SDMMC1);
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break;
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break;
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@ -1756,6 +1762,7 @@ static int sdmmc_wait_for_event(struct mmc *mmc,
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uint32_t fault_conditions, fault_handler_t fault_handler)
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uint32_t fault_conditions, fault_handler_t fault_handler)
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{
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{
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uint32_t timebase = get_time();
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uint32_t timebase = get_time();
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uint32_t intstatus;
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int rc;
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int rc;
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// Wait until we either wind up ready, or until we've timed out.
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// Wait until we either wind up ready, or until we've timed out.
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@ -1763,7 +1770,13 @@ static int sdmmc_wait_for_event(struct mmc *mmc,
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if (get_time_since(timebase) > mmc->timeout)
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if (get_time_since(timebase) > mmc->timeout)
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return ETIMEDOUT;
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return ETIMEDOUT;
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if (mmc->regs->int_status & fault_conditions) {
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// Read intstatus into temporary variable to make sure that the
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// priorities are: fault conditions, target irq, errors
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// This makes sure that if fault conditions and target irq
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// comes nearly at the same time that the fault handler will
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// always be called
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intstatus = mmc->regs->int_status;
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if (intstatus & fault_conditions) {
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// If we don't have a handler, fault.
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// If we don't have a handler, fault.
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if (!fault_handler) {
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if (!fault_handler) {
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@ -1779,22 +1792,23 @@ static int sdmmc_wait_for_event(struct mmc *mmc,
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}
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}
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// Finally, EOI the relevant interrupt.
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// Finally, EOI the relevant interrupt.
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mmc->regs->int_status |= fault_conditions;
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mmc->regs->int_status = fault_conditions;
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intstatus &= ~(fault_conditions);
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// Reset the timebase, so it applies to the next
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// Reset the timebase, so it applies to the next
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// DMA interval.
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// DMA interval.
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timebase = get_time();
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timebase = get_time();
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}
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}
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if (mmc->regs->int_status & target_irq)
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if (intstatus & target_irq)
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return 0;
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return 0;
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if (state_conditions && !(mmc->regs->present_state & state_conditions))
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if (state_conditions && !(mmc->regs->present_state & state_conditions))
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return 0;
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return 0;
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// If an error occurs, return it.
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// If an error occurs, return it.
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if (mmc->regs->int_status & MMC_STATUS_ERROR_MASK)
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if (intstatus & MMC_STATUS_ERROR_MASK)
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return (mmc->regs->int_status & MMC_STATUS_ERROR_MASK);
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return (intstatus & MMC_STATUS_ERROR_MASK);
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}
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}
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}
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}
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@ -2042,7 +2056,7 @@ static void sdmmc_enable_interrupts(struct mmc *mmc, bool enabled)
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MMC_STATUS_DMA_INTERRUPT | MMC_STATUS_ERROR_MASK;
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MMC_STATUS_DMA_INTERRUPT | MMC_STATUS_ERROR_MASK;
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// Clear any pending interrupts.
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// Clear any pending interrupts.
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mmc->regs->int_status |= all_interrupts;
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mmc->regs->int_status = all_interrupts;
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// And enable or disable the pseudo-interrupts.
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// And enable or disable the pseudo-interrupts.
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if (enabled) {
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if (enabled) {
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@ -2160,6 +2174,8 @@ static int sdmmc_send_command(struct mmc *mmc, enum sdmmc_command command,
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}
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}
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}
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}
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sdmmc_run_autocal(mmc, true);
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// If we have data to send, prepare it.
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// If we have data to send, prepare it.
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sdmmc_prepare_command_data(mmc, blocks_to_transfer, is_write, auto_terminate, mmc->use_dma, argument);
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sdmmc_prepare_command_data(mmc, blocks_to_transfer, is_write, auto_terminate, mmc->use_dma, argument);
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@ -2168,12 +2184,12 @@ static int sdmmc_send_command(struct mmc *mmc, enum sdmmc_command command,
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if (blocks_to_transfer && is_write && mmc->use_dma && data_buffer)
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if (blocks_to_transfer && is_write && mmc->use_dma && data_buffer)
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memcpy(sdmmc_bounce_buffer, (void *)mmc->active_data_buffer, total_data_to_xfer);
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memcpy(sdmmc_bounce_buffer, (void *)mmc->active_data_buffer, total_data_to_xfer);
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// Configure the controller to send the command.
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sdmmc_prepare_command_registers(mmc, blocks_to_transfer, command, response_type, checks);
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// Ensure we get the status response we want.
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// Ensure we get the status response we want.
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sdmmc_enable_interrupts(mmc, true);
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sdmmc_enable_interrupts(mmc, true);
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// Configure the controller to send the command.
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sdmmc_prepare_command_registers(mmc, blocks_to_transfer, command, response_type, checks);
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// Wait for the command to be completed.
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// Wait for the command to be completed.
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rc = sdmmc_wait_for_command_completion(mmc);
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rc = sdmmc_wait_for_command_completion(mmc);
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if (rc) {
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if (rc) {
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@ -650,8 +650,10 @@ int sdmmc_set_loglevel(int loglevel)
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static void mmc_vprint(struct mmc *mmc, char *fmt, int required_loglevel, va_list list)
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static void mmc_vprint(struct mmc *mmc, char *fmt, int required_loglevel, va_list list)
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{
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{
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// Allow debug prints to be silenced by a negative loglevel.
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// Allow debug prints to be silenced by a negative loglevel.
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if (sdmmc_loglevel < required_loglevel)
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//TODO: respect the log level, most likely there are still some timing problems
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return;
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//which make it not working when the logging is supressed
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//if (sdmmc_loglevel < required_loglevel)
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// return;
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printk("%s: ", mmc->name);
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printk("%s: ", mmc->name);
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vprintk(fmt, list);
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vprintk(fmt, list);
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@ -910,32 +912,38 @@ static int sdmmc_set_up_clocking_parameters(struct mmc *mmc, enum sdmmc_bus_volt
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{
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{
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// Clear the I/O conditioning constants.
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// Clear the I/O conditioning constants.
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mmc->regs->vendor_clock_cntrl &= ~(MMC_CLOCK_TRIM_MASK | MMC_CLOCK_TAP_MASK);
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mmc->regs->vendor_clock_cntrl &= ~(MMC_CLOCK_TRIM_MASK | MMC_CLOCK_TAP_MASK);
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mmc->regs->auto_cal_config &= ~MMC_AUTOCAL_PDPU_CONFIG_MASK;
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// Per the TRM, set the PADPIPE clock enable.
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// Per the TRM, set the PADPIPE clock enable.
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mmc->regs->vendor_clock_cntrl |= MMC_CLOCK_PADPIPE_CLKEN_OVERRIDE;
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mmc->regs->vendor_clock_cntrl |= MMC_CLOCK_PADPIPE_CLKEN_OVERRIDE;
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switch (operating_voltage) {
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case MMC_VOLTAGE_1V8:
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mmc->regs->auto_cal_config |= MMC_AUTOCAL_PDPU_SDMMC4_1V8;
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break;
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case MMC_VOLTAGE_3V3:
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mmc->regs->auto_cal_config |= MMC_AUTOCAL_PDPU_SDMMC1_3V3;
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break;
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default:
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printk("ERROR: currently no controllers support voltage %d", mmc->operating_voltage);
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return EINVAL;
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}
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// Set up the I/O conditioning constants used to ensure we have a reliable clock.
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// Set up the I/O conditioning constants used to ensure we have a reliable clock.
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// Constants above and procedure below from the TRM.
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// Constants above and procedure below from the TRM.
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switch (mmc->controller) {
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switch (mmc->controller) {
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case SWITCH_EMMC:
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case SWITCH_EMMC:
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if (operating_voltage != MMC_VOLTAGE_1V8) {
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mmc_print(mmc, "ERROR: eMMC can only run at 1V8, but mmc struct claims voltage %d", operating_voltage);
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return EINVAL;
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}
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mmc->regs->auto_cal_config &= ~MMC_AUTOCAL_PDPU_CONFIG_MASK;
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mmc->regs->auto_cal_config |= MMC_AUTOCAL_PDPU_SDMMC4_1V8;
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mmc->regs->vendor_clock_cntrl |= (MMC_CLOCK_TRIM_SDMMC4 | MMC_CLOCK_TAP_SDMMC4);
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mmc->regs->vendor_clock_cntrl |= (MMC_CLOCK_TRIM_SDMMC4 | MMC_CLOCK_TAP_SDMMC4);
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break;
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break;
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case SWITCH_MICROSD:
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case SWITCH_MICROSD:
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switch (operating_voltage) {
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case MMC_VOLTAGE_1V8:
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mmc->regs->auto_cal_config &= ~MMC_AUTOCAL_PDPU_CONFIG_MASK;
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mmc->regs->auto_cal_config |= MMC_AUTOCAL_PDPU_SDMMC1_1V8;
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break;
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case MMC_VOLTAGE_3V3:
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mmc->regs->auto_cal_config &= ~MMC_AUTOCAL_PDPU_CONFIG_MASK;
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mmc->regs->auto_cal_config |= MMC_AUTOCAL_PDPU_SDMMC1_3V3;
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break;
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default:
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mmc_print(mmc, "ERROR: microsd does not support voltage %d", operating_voltage);
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return EINVAL;
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}
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mmc->regs->vendor_clock_cntrl |= (MMC_CLOCK_TRIM_SDMMC1 | MMC_CLOCK_TAP_SDMMC1);
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mmc->regs->vendor_clock_cntrl |= (MMC_CLOCK_TRIM_SDMMC1 | MMC_CLOCK_TAP_SDMMC1);
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break;
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break;
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@ -1756,6 +1764,7 @@ static int sdmmc_wait_for_event(struct mmc *mmc,
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uint32_t fault_conditions, fault_handler_t fault_handler)
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uint32_t fault_conditions, fault_handler_t fault_handler)
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{
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{
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uint32_t timebase = get_time();
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uint32_t timebase = get_time();
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uint32_t intstatus;
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int rc;
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int rc;
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// Wait until we either wind up ready, or until we've timed out.
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// Wait until we either wind up ready, or until we've timed out.
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@ -1763,7 +1772,13 @@ static int sdmmc_wait_for_event(struct mmc *mmc,
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if (get_time_since(timebase) > mmc->timeout)
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if (get_time_since(timebase) > mmc->timeout)
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return ETIMEDOUT;
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return ETIMEDOUT;
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if (mmc->regs->int_status & fault_conditions) {
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// Read intstatus into temporary variable to make sure that the
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// priorities are: fault conditions, target irq, errors
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// This makes sure that if fault conditions and target irq
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// comes nearly at the same time that the fault handler will
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// always be called
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intstatus = mmc->regs->int_status;
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if (intstatus & fault_conditions) {
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// If we don't have a handler, fault.
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// If we don't have a handler, fault.
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if (!fault_handler) {
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if (!fault_handler) {
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@ -1779,22 +1794,23 @@ static int sdmmc_wait_for_event(struct mmc *mmc,
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}
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}
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// Finally, EOI the relevant interrupt.
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// Finally, EOI the relevant interrupt.
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mmc->regs->int_status |= fault_conditions;
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mmc->regs->int_status = fault_conditions;
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intstatus &= ~(fault_conditions);
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// Reset the timebase, so it applies to the next
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// Reset the timebase, so it applies to the next
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// DMA interval.
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// DMA interval.
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timebase = get_time();
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timebase = get_time();
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}
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}
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if (mmc->regs->int_status & target_irq)
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if (intstatus & target_irq)
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return 0;
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return 0;
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if (state_conditions && !(mmc->regs->present_state & state_conditions))
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if (state_conditions && !(mmc->regs->present_state & state_conditions))
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return 0;
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return 0;
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// If an error occurs, return it.
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// If an error occurs, return it.
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if (mmc->regs->int_status & MMC_STATUS_ERROR_MASK)
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if (intstatus & MMC_STATUS_ERROR_MASK)
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return (mmc->regs->int_status & MMC_STATUS_ERROR_MASK);
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return (intstatus & MMC_STATUS_ERROR_MASK);
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}
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}
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}
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}
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@ -2042,7 +2058,7 @@ static void sdmmc_enable_interrupts(struct mmc *mmc, bool enabled)
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MMC_STATUS_DMA_INTERRUPT | MMC_STATUS_ERROR_MASK;
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MMC_STATUS_DMA_INTERRUPT | MMC_STATUS_ERROR_MASK;
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|
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// Clear any pending interrupts.
|
// Clear any pending interrupts.
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mmc->regs->int_status |= all_interrupts;
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mmc->regs->int_status = all_interrupts;
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|
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// And enable or disable the pseudo-interrupts.
|
// And enable or disable the pseudo-interrupts.
|
||||||
if (enabled) {
|
if (enabled) {
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|
@ -2160,6 +2176,8 @@ static int sdmmc_send_command(struct mmc *mmc, enum sdmmc_command command,
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}
|
}
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}
|
}
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|
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sdmmc_run_autocal(mmc, true);
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|
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// If we have data to send, prepare it.
|
// If we have data to send, prepare it.
|
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sdmmc_prepare_command_data(mmc, blocks_to_transfer, is_write, auto_terminate, mmc->use_dma, argument);
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sdmmc_prepare_command_data(mmc, blocks_to_transfer, is_write, auto_terminate, mmc->use_dma, argument);
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|
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@ -2168,12 +2186,12 @@ static int sdmmc_send_command(struct mmc *mmc, enum sdmmc_command command,
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if (blocks_to_transfer && is_write && mmc->use_dma && data_buffer)
|
if (blocks_to_transfer && is_write && mmc->use_dma && data_buffer)
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memcpy(sdmmc_bounce_buffer, (void *)mmc->active_data_buffer, total_data_to_xfer);
|
memcpy(sdmmc_bounce_buffer, (void *)mmc->active_data_buffer, total_data_to_xfer);
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// Configure the controller to send the command.
|
|
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sdmmc_prepare_command_registers(mmc, blocks_to_transfer, command, response_type, checks);
|
|
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|
|
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// Ensure we get the status response we want.
|
// Ensure we get the status response we want.
|
||||||
sdmmc_enable_interrupts(mmc, true);
|
sdmmc_enable_interrupts(mmc, true);
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||||||
|
|
||||||
|
// Configure the controller to send the command.
|
||||||
|
sdmmc_prepare_command_registers(mmc, blocks_to_transfer, command, response_type, checks);
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|
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// Wait for the command to be completed.
|
// Wait for the command to be completed.
|
||||||
rc = sdmmc_wait_for_command_completion(mmc);
|
rc = sdmmc_wait_for_command_completion(mmc);
|
||||||
if (rc) {
|
if (rc) {
|
||||||
|
|
Loading…
Reference in a new issue