warmboot: start cluster_init, skeleton all remaining code

This commit is contained in:
Michael Scire 2018-12-17 16:04:50 -08:00
parent 83941f8647
commit 802830d8d4
7 changed files with 164 additions and 10 deletions

View file

@ -30,6 +30,12 @@
#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET_0 MAKE_CAR_REG(0x450)
#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR_0 MAKE_CAR_REG(0x454)
#define CLK_RST_CONTROLLER_SUPER_CCLKG_DIVIDER_0 MAKE_CAR_REG(0x36C)
#define CLK_RST_CONTROLLER_SUPER_CCLKP_DIVIDER_0 MAKE_CAR_REG(0x374)
#define CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2_0 MAKE_CAR_REG(0x388)
#define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT_0 MAKE_CAR_REG(0x3B4)
#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRA_0 MAKE_CAR_REG(0x0F8)
#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRB_0 MAKE_CAR_REG(0x0FC)
#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRC_0 MAKE_CAR_REG(0x3A0)
@ -38,17 +44,35 @@
#define CLK_RST_CONTROLLER_SPARE_REG0_0 MAKE_CAR_REG(0x55C)
#define CLK_RST_CONTROLLER_RST_DEV_U_SET_0 MAKE_CAR_REG(0x310)
#define CLK_RST_CONTROLLER_RST_DEV_U_CLR_0 MAKE_CAR_REG(0x314)
#define CLK_RST_CONTROLLER_RST_DEV_V_CLR_0 MAKE_CAR_REG(0x434)
#define CLK_RST_CONTROLLER_CLK_ENB_U_SET_0 MAKE_CAR_REG(0x330)
#define CLK_RST_CONTROLLER_CLK_ENB_V_SET_0 MAKE_CAR_REG(0x440)
#define CLK_RST_CONTROLLER_CLK_ENB_W_SET_0 MAKE_CAR_REG(0x448)
#define NUM_CAR_BANKS 7
typedef enum {
CARDEVICE_UARTA = 6,
CARDEVICE_UARTB = 7,
CARDEVICE_I2C1 = 12,
CARDEVICE_I2C5 = 47,
CARDEVICE_ACTMON = 119,
CARDEVICE_BPMP = 1
CARDEVICE_UARTA = ((0 << 5) | 0x6),
CARDEVICE_UARTB = ((0 << 5) | 0x7),
CARDEVICE_UARTC = ((1 << 5) | 0x17),
CARDEVICE_I2C1 = ((0 << 5) | 0xC),
CARDEVICE_I2C5 = ((1 << 5) | 0xF),
CARDEVICE_UNK = ((3 << 5) | 0x1E),
CARDEVICE_SE = ((3 << 5) | 0x1F),
CARDEVICE_HOST1X = ((0 << 5) | 0x1C),
CARDEVICE_TSEC = ((2 << 5) | 0x13),
CARDEVICE_SOR_SAFE = ((6 << 5) | 0x1E),
CARDEVICE_SOR0 = ((5 << 5) | 0x16),
CARDEVICE_SOR1 = ((5 << 5) | 0x17),
CARDEVICE_KFUSE = ((1 << 5) | 0x8),
CARDEVICE_CL_DVFS = ((4 << 5) | 0x1B),
CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
CARDEVICE_ACTMON = ((3 << 5) | 0x17),
CARDEVICE_BPMP = ((0 << 5) | 0x1)
} CarDevice;
void car_configure_oscillators(void);

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@ -0,0 +1,58 @@
/*
* Copyright (c) 2018 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdint.h>
#include "utils.h"
#include "cluster.h"
#include "car.h"
#include "timer.h"
#include "pmc.h"
#include "sysreg.h"
void cluster_initialize_cpu(void) {
/* Hold CoreSight in reset. */
CLK_RST_CONTROLLER_RST_DEV_U_SET_0 = 0x200;
/* CAR2PMC_CPU_ACK_WIDTH should be set to 0. */
CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2_0 &= 0xFFFFF000;
/* Restore SB_AA64_RESET values from PMC scratch. */
SB_AA64_RESET_LOW_0 = APBDEV_PMC_SECURE_SCRATCH34_0 | 1;
SB_AA64_RESET_HIGH_0 = APBDEV_PMC_SECURE_SCRATCH35_0;
/* Set CDIV_ENB for CCLKG/CCLKP. */
CLK_RST_CONTROLLER_SUPER_CCLKG_DIVIDER_0 = 0x80000000;
CLK_RST_CONTROLLER_SUPER_CCLKP_DIVIDER_0 = 0x80000000;
/* Enable CoreSight clock, take CoreSight out of reset. */
CLK_RST_CONTROLLER_CLK_ENB_U_SET_0 = 0x200;
CLK_RST_CONTROLLER_RST_DEV_U_CLR_0 = 0x200;
/* Configure MSELECT to divide by 4, enable MSELECT clock. */
CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT_0 = 6; /* (6/2) + 1 = 4. */
CLK_RST_CONTROLLER_CLK_ENB_V_SET_0 = 0x8;
/* Wait 2 us, then take MSELECT out of reset. */
timer_wait(2);
CLK_RST_CONTROLLER_RST_DEV_V_CLR_0 = 0x8;
/* TODO: This function is enormous */
}
void cluster_power_on_cpu(void) {
/* TODO */
}

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@ -0,0 +1,24 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef EXOSPHERE_WARMBOOT_BIN_CLUSTER_H
#define EXOSPHERE_WARMBOOT_BIN_CLUSTER_H
void cluster_initialize_cpu(void);
void cluster_power_on_cpu(void);
#endif

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@ -0,0 +1,31 @@
/*
* Copyright (c) 2018 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef EXOSPHERE_WARMBOOT_BIN_FLOW_CTLR_H
#define EXOSPHERE_WARMBOOT_BIN_FLOW_CTLR_H
#include <stdint.h>
#include <stdbool.h>
#include "utils.h"
#define FLOW_BASE (0x60007000)
#define MAKE_FLOW_REG(ofs) MAKE_REG32(FLOW_BASE + ofs)
#define FLOW_CTLR_HALT_COP_EVENTS_0 MAKE_FLOW_REG(0x004)
#endif

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@ -22,6 +22,8 @@
#include "fuse.h"
#include "car.h"
#include "emc.h"
#include "cluster.h"
#include "flow.h"
#include "timer.h"
void reboot(void) {
@ -76,9 +78,22 @@ void lp0_entry_main(warmboot_metadata_t *meta) {
/* Setup clock output for all devices, working around mbist bug. */
car_mbist_workaround();
/* TODO: stuff */
/* Initialize the CPU cluster. */
cluster_initialize_cpu();
while (true) { /* TODO: Halt BPMP */ }
/* TODO: decrypt_restore_secmon_to_tzram(); */
/* Power on the CPU cluster. */
cluster_power_on_cpu();
/* Nintendo clears most of warmboot.bin out of IRAM here. We're not gonna bother. */
/* memset( ... ); */
const uint32_t halt_val = (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_400) ? 0x40000000 : 0x50000000;
while (true) {
/* Halt the BPMP. */
FLOW_CTLR_HALT_COP_EVENTS_0 = halt_val;
}
}

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@ -45,6 +45,8 @@
#define APBDEV_PMC_SECURE_SCRATCH21_0 MAKE_PMC_REG(0x334)
#define APBDEV_PMC_SECURE_SCRATCH32_0 MAKE_PMC_REG(0x360)
#define APBDEV_PMC_SECURE_SCRATCH34_0 MAKE_PMC_REG(0x368)
#define APBDEV_PMC_SECURE_SCRATCH35_0 MAKE_PMC_REG(0x36C)
#define APBDEV_PMC_IO_DPD3_REQ_0 MAKE_PMC_REG(0x45C)
#define APBDEV_PMC_IO_DPD3_STATUS_0 MAKE_PMC_REG(0x460)

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@ -23,7 +23,7 @@
#define TIMERUS_USEC_CFG_0 MAKE_REG32(0x60005014)
static inline void timer_wait(uint32_t microseconds) {
uint32_t old_time = TIMERUS_CNTR_1US_0;
const uint32_t old_time = TIMERUS_CNTR_1US_0;
while (TIMERUS_CNTR_1US_0 - old_time <= microseconds) {
/* Spin-lock. */
}