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https://github.com/Atmosphere-NX/Atmosphere
synced 2024-12-22 20:31:14 +00:00
warmboot: start cluster_init, skeleton all remaining code
This commit is contained in:
parent
83941f8647
commit
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7 changed files with 164 additions and 10 deletions
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@ -30,6 +30,12 @@
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#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET_0 MAKE_CAR_REG(0x450)
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#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET_0 MAKE_CAR_REG(0x450)
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#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR_0 MAKE_CAR_REG(0x454)
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#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR_0 MAKE_CAR_REG(0x454)
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#define CLK_RST_CONTROLLER_SUPER_CCLKG_DIVIDER_0 MAKE_CAR_REG(0x36C)
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#define CLK_RST_CONTROLLER_SUPER_CCLKP_DIVIDER_0 MAKE_CAR_REG(0x374)
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#define CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2_0 MAKE_CAR_REG(0x388)
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#define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT_0 MAKE_CAR_REG(0x3B4)
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#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRA_0 MAKE_CAR_REG(0x0F8)
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#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRA_0 MAKE_CAR_REG(0x0F8)
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#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRB_0 MAKE_CAR_REG(0x0FC)
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#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRB_0 MAKE_CAR_REG(0x0FC)
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#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRC_0 MAKE_CAR_REG(0x3A0)
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#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRC_0 MAKE_CAR_REG(0x3A0)
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@ -38,17 +44,35 @@
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#define CLK_RST_CONTROLLER_SPARE_REG0_0 MAKE_CAR_REG(0x55C)
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#define CLK_RST_CONTROLLER_SPARE_REG0_0 MAKE_CAR_REG(0x55C)
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#define CLK_RST_CONTROLLER_RST_DEV_U_SET_0 MAKE_CAR_REG(0x310)
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#define CLK_RST_CONTROLLER_RST_DEV_U_CLR_0 MAKE_CAR_REG(0x314)
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#define CLK_RST_CONTROLLER_RST_DEV_V_CLR_0 MAKE_CAR_REG(0x434)
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#define CLK_RST_CONTROLLER_CLK_ENB_U_SET_0 MAKE_CAR_REG(0x330)
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#define CLK_RST_CONTROLLER_CLK_ENB_V_SET_0 MAKE_CAR_REG(0x440)
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#define CLK_RST_CONTROLLER_CLK_ENB_W_SET_0 MAKE_CAR_REG(0x448)
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#define CLK_RST_CONTROLLER_CLK_ENB_W_SET_0 MAKE_CAR_REG(0x448)
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#define NUM_CAR_BANKS 7
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#define NUM_CAR_BANKS 7
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typedef enum {
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typedef enum {
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CARDEVICE_UARTA = 6,
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CARDEVICE_UARTA = ((0 << 5) | 0x6),
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CARDEVICE_UARTB = 7,
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CARDEVICE_UARTB = ((0 << 5) | 0x7),
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CARDEVICE_I2C1 = 12,
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CARDEVICE_UARTC = ((1 << 5) | 0x17),
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CARDEVICE_I2C5 = 47,
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CARDEVICE_I2C1 = ((0 << 5) | 0xC),
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CARDEVICE_ACTMON = 119,
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CARDEVICE_I2C5 = ((1 << 5) | 0xF),
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CARDEVICE_BPMP = 1
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CARDEVICE_UNK = ((3 << 5) | 0x1E),
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CARDEVICE_SE = ((3 << 5) | 0x1F),
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CARDEVICE_HOST1X = ((0 << 5) | 0x1C),
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CARDEVICE_TSEC = ((2 << 5) | 0x13),
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CARDEVICE_SOR_SAFE = ((6 << 5) | 0x1E),
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CARDEVICE_SOR0 = ((5 << 5) | 0x16),
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CARDEVICE_SOR1 = ((5 << 5) | 0x17),
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CARDEVICE_KFUSE = ((1 << 5) | 0x8),
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CARDEVICE_CL_DVFS = ((4 << 5) | 0x1B),
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CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
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CARDEVICE_ACTMON = ((3 << 5) | 0x17),
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CARDEVICE_BPMP = ((0 << 5) | 0x1)
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} CarDevice;
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} CarDevice;
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void car_configure_oscillators(void);
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void car_configure_oscillators(void);
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58
exosphere/lp0fw/src/cluster.c
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58
exosphere/lp0fw/src/cluster.c
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@ -0,0 +1,58 @@
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/*
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* Copyright (c) 2018 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdint.h>
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#include "utils.h"
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#include "cluster.h"
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#include "car.h"
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#include "timer.h"
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#include "pmc.h"
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#include "sysreg.h"
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void cluster_initialize_cpu(void) {
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/* Hold CoreSight in reset. */
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CLK_RST_CONTROLLER_RST_DEV_U_SET_0 = 0x200;
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/* CAR2PMC_CPU_ACK_WIDTH should be set to 0. */
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CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2_0 &= 0xFFFFF000;
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/* Restore SB_AA64_RESET values from PMC scratch. */
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SB_AA64_RESET_LOW_0 = APBDEV_PMC_SECURE_SCRATCH34_0 | 1;
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SB_AA64_RESET_HIGH_0 = APBDEV_PMC_SECURE_SCRATCH35_0;
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/* Set CDIV_ENB for CCLKG/CCLKP. */
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CLK_RST_CONTROLLER_SUPER_CCLKG_DIVIDER_0 = 0x80000000;
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CLK_RST_CONTROLLER_SUPER_CCLKP_DIVIDER_0 = 0x80000000;
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/* Enable CoreSight clock, take CoreSight out of reset. */
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CLK_RST_CONTROLLER_CLK_ENB_U_SET_0 = 0x200;
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CLK_RST_CONTROLLER_RST_DEV_U_CLR_0 = 0x200;
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/* Configure MSELECT to divide by 4, enable MSELECT clock. */
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CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT_0 = 6; /* (6/2) + 1 = 4. */
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CLK_RST_CONTROLLER_CLK_ENB_V_SET_0 = 0x8;
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/* Wait 2 us, then take MSELECT out of reset. */
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timer_wait(2);
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CLK_RST_CONTROLLER_RST_DEV_V_CLR_0 = 0x8;
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/* TODO: This function is enormous */
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}
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void cluster_power_on_cpu(void) {
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/* TODO */
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}
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24
exosphere/lp0fw/src/cluster.h
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24
exosphere/lp0fw/src/cluster.h
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@ -0,0 +1,24 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef EXOSPHERE_WARMBOOT_BIN_CLUSTER_H
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#define EXOSPHERE_WARMBOOT_BIN_CLUSTER_H
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void cluster_initialize_cpu(void);
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void cluster_power_on_cpu(void);
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#endif
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31
exosphere/lp0fw/src/flow.h
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31
exosphere/lp0fw/src/flow.h
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@ -0,0 +1,31 @@
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/*
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* Copyright (c) 2018 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef EXOSPHERE_WARMBOOT_BIN_FLOW_CTLR_H
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#define EXOSPHERE_WARMBOOT_BIN_FLOW_CTLR_H
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#include <stdint.h>
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#include <stdbool.h>
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#include "utils.h"
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#define FLOW_BASE (0x60007000)
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#define MAKE_FLOW_REG(ofs) MAKE_REG32(FLOW_BASE + ofs)
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#define FLOW_CTLR_HALT_COP_EVENTS_0 MAKE_FLOW_REG(0x004)
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#endif
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@ -22,6 +22,8 @@
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#include "fuse.h"
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#include "fuse.h"
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#include "car.h"
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#include "car.h"
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#include "emc.h"
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#include "emc.h"
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#include "cluster.h"
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#include "flow.h"
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#include "timer.h"
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#include "timer.h"
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void reboot(void) {
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void reboot(void) {
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@ -76,9 +78,22 @@ void lp0_entry_main(warmboot_metadata_t *meta) {
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/* Setup clock output for all devices, working around mbist bug. */
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/* Setup clock output for all devices, working around mbist bug. */
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car_mbist_workaround();
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car_mbist_workaround();
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/* TODO: stuff */
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/* Initialize the CPU cluster. */
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cluster_initialize_cpu();
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while (true) { /* TODO: Halt BPMP */ }
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/* TODO: decrypt_restore_secmon_to_tzram(); */
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/* Power on the CPU cluster. */
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cluster_power_on_cpu();
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/* Nintendo clears most of warmboot.bin out of IRAM here. We're not gonna bother. */
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/* memset( ... ); */
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const uint32_t halt_val = (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_400) ? 0x40000000 : 0x50000000;
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while (true) {
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/* Halt the BPMP. */
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FLOW_CTLR_HALT_COP_EVENTS_0 = halt_val;
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}
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}
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}
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#define APBDEV_PMC_SECURE_SCRATCH21_0 MAKE_PMC_REG(0x334)
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#define APBDEV_PMC_SECURE_SCRATCH21_0 MAKE_PMC_REG(0x334)
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#define APBDEV_PMC_SECURE_SCRATCH32_0 MAKE_PMC_REG(0x360)
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#define APBDEV_PMC_SECURE_SCRATCH32_0 MAKE_PMC_REG(0x360)
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#define APBDEV_PMC_SECURE_SCRATCH34_0 MAKE_PMC_REG(0x368)
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#define APBDEV_PMC_SECURE_SCRATCH35_0 MAKE_PMC_REG(0x36C)
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#define APBDEV_PMC_IO_DPD3_REQ_0 MAKE_PMC_REG(0x45C)
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#define APBDEV_PMC_IO_DPD3_REQ_0 MAKE_PMC_REG(0x45C)
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#define APBDEV_PMC_IO_DPD3_STATUS_0 MAKE_PMC_REG(0x460)
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#define APBDEV_PMC_IO_DPD3_STATUS_0 MAKE_PMC_REG(0x460)
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#define TIMERUS_USEC_CFG_0 MAKE_REG32(0x60005014)
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#define TIMERUS_USEC_CFG_0 MAKE_REG32(0x60005014)
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static inline void timer_wait(uint32_t microseconds) {
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static inline void timer_wait(uint32_t microseconds) {
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uint32_t old_time = TIMERUS_CNTR_1US_0;
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const uint32_t old_time = TIMERUS_CNTR_1US_0;
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while (TIMERUS_CNTR_1US_0 - old_time <= microseconds) {
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while (TIMERUS_CNTR_1US_0 - old_time <= microseconds) {
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/* Spin-lock. */
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/* Spin-lock. */
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}
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}
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