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https://github.com/Atmosphere-NX/Atmosphere
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exosphere: Fix virtual mapping of MC_SECURITY_CFG3.
Allow DRAM magic test value to be written on < 4.0.0.
This commit is contained in:
parent
e5e9968d22
commit
7c61e935ee
4 changed files with 13 additions and 12 deletions
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@ -49,7 +49,6 @@ static bool g_has_booted_up = false;
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void setup_dram_magic_numbers(void) {
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void setup_dram_magic_numbers(void) {
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/* These DRAM writes test and set values for the GPU UCODE carveout. */
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/* These DRAM writes test and set values for the GPU UCODE carveout. */
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unsigned int target_fw = exosphere_get_target_firmware();
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unsigned int target_fw = exosphere_get_target_firmware();
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if (EXOSPHERE_TARGET_FIRMWARE_400 <= target_fw) {
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(*(volatile uint32_t *)(0x8005FFFC)) = 0xC0EDBBCC; /* Access test value. */
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(*(volatile uint32_t *)(0x8005FFFC)) = 0xC0EDBBCC; /* Access test value. */
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flush_dcache_range((void *)0x8005FFFC, (void *)0x80060000);
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flush_dcache_range((void *)0x8005FFFC, (void *)0x80060000);
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if (EXOSPHERE_TARGET_FIRMWARE_600 <= target_fw) {
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if (EXOSPHERE_TARGET_FIRMWARE_600 <= target_fw) {
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@ -58,7 +57,6 @@ void setup_dram_magic_numbers(void) {
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(*(volatile uint32_t *)(0x8005FF08)) = 0x00000210; /* Tegra210 code. */
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(*(volatile uint32_t *)(0x8005FF08)) = 0x00000210; /* Tegra210 code. */
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flush_dcache_range((void *)0x8005FF00, (void *)0x8005FF0C);
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flush_dcache_range((void *)0x8005FF00, (void *)0x8005FF0C);
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}
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}
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}
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__dsb_sy();
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__dsb_sy();
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}
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}
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@ -82,7 +80,7 @@ void bootup_misc_mmio(void) {
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se_generate_random_key(KEYSLOT_SWITCH_SRKGENKEY, KEYSLOT_SWITCH_RNGKEY);
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se_generate_random_key(KEYSLOT_SWITCH_SRKGENKEY, KEYSLOT_SWITCH_RNGKEY);
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se_generate_srk(KEYSLOT_SWITCH_SRKGENKEY);
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se_generate_srk(KEYSLOT_SWITCH_SRKGENKEY);
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if (!g_has_booted_up && EXOSPHERE_TARGET_FIRMWARE_600 > exosphere_get_target_firmware() && exosphere_get_target_firmware() >= EXOSPHERE_TARGET_FIRMWARE_400) {
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if (!g_has_booted_up && (EXOSPHERE_TARGET_FIRMWARE_600 > exosphere_get_target_firmware())) {
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setup_dram_magic_numbers();
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setup_dram_magic_numbers();
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}
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}
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@ -493,6 +493,9 @@ static inline uintptr_t get_mc_base(void) {
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#define MC_ERR_APB_ASID_UPDATE_STATUS 0x9d0
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#define MC_ERR_APB_ASID_UPDATE_STATUS 0x9d0
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#define MC_DA_CONFIG0 0x9dc
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#define MC_DA_CONFIG0 0x9dc
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/* Virtual aliases */
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#define VIRT_MC_SECURITY_CFG3 MAKE_MC_REG(MC_SECURITY_CFG3)
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/* Memory Controller clients */
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/* Memory Controller clients */
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#define CLIENT_ACCESS_NUM_CLIENTS 32
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#define CLIENT_ACCESS_NUM_CLIENTS 32
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typedef enum {
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typedef enum {
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@ -199,7 +199,7 @@ void warmboot_init(void) {
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invalidate_icache_all();
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invalidate_icache_all();
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/* On warmboot (not cpu_on) only */
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/* On warmboot (not cpu_on) only */
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if (MC_SECURITY_CFG3 == 0) {
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if (VIRT_MC_SECURITY_CFG3 == 0) {
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init_dma_controllers(g_exosphere_target_firmware_for_init);
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init_dma_controllers(g_exosphere_target_firmware_for_init);
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}
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}
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@ -54,7 +54,7 @@ void __attribute__((noreturn)) warmboot_main(void) {
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identity_unmap_iram_cd_tzram();
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identity_unmap_iram_cd_tzram();
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/* On warmboot (not cpu_on) only */
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/* On warmboot (not cpu_on) only */
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if (MC_SECURITY_CFG3 == 0) {
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if (VIRT_MC_SECURITY_CFG3 == 0) {
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if (!configitem_is_retail()) {
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if (!configitem_is_retail()) {
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/* TODO: uart_log("OHAYO"); */
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/* TODO: uart_log("OHAYO"); */
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}
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}
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