dmnt: revise per WerWolv's feedback.

This commit is contained in:
Michael Scire 2020-04-16 23:16:33 -07:00
parent 11b8a92458
commit 79d7e9197c
2 changed files with 26 additions and 14 deletions

View file

@ -237,10 +237,15 @@ namespace ams::dmnt::cheat::impl {
this->LogToDebugFile("Act[%02x]: %d\n", i, opcode->save_restore_regmask.should_operate[i]);
}
break;
case CheatVmOpcodeType_LoadStaticRegister:
this->LogToDebugFile("Opcode: Load Static Register\n");
this->LogToDebugFile("Reg Idx: %x\n", opcode->load_static_reg.idx);
this->LogToDebugFile("Stc Idx: %x\n", opcode->load_static_reg.static_idx);
case CheatVmOpcodeType_ReadWriteStaticRegister:
this->LogToDebugFile("Opcode: Read/Write Static Register\n");
if (opcode->rw_static_reg.static_idx < NumReadableStaticRegisters) {
this->LogToDebugFile("Op Type: ReadStaticRegister\n");
} else {
this->LogToDebugFile("Op Type: WriteStaticRegister\n");
}
this->LogToDebugFile("Reg Idx: %x\n", opcode->rw_static_reg.idx);
this->LogToDebugFile("Stc Idx: %x\n", opcode->rw_static_reg.static_idx);
break;
case CheatVmOpcodeType_BreakProcess:
this->LogToDebugFile("Opcode: Break Cheat Process\n");
@ -581,14 +586,14 @@ namespace ams::dmnt::cheat::impl {
}
}
break;
case CheatVmOpcodeType_LoadStaticRegister:
case CheatVmOpcodeType_ReadWriteStaticRegister:
{
/* C3000XXx */
/* C3 = opcode 0xC3. */
/* XX = static register index. */
/* x = register index. */
opcode.load_static_reg.static_idx = ((first_dword >> 4) & 0xFF);
opcode.load_static_reg.idx = (first_dword & 0xF);
opcode.rw_static_reg.static_idx = ((first_dword >> 4) & 0xFF);
opcode.rw_static_reg.idx = (first_dword & 0xF);
}
break;
case CheatVmOpcodeType_BreakProcess:
@ -1209,9 +1214,14 @@ namespace ams::dmnt::cheat::impl {
}
}
break;
case CheatVmOpcodeType_LoadStaticRegister:
case CheatVmOpcodeType_ReadWriteStaticRegister:
if (cur_opcode.rw_static_reg.static_idx < NumReadableStaticRegisters) {
/* Load a register with a static register. */
this->registers[cur_opcode.load_static_reg.idx] = this->static_registers[cur_opcode.load_static_reg.static_idx];
this->registers[cur_opcode.rw_static_reg.idx] = this->static_registers[cur_opcode.rw_static_reg.static_idx];
} else {
/* Store a register to a static register. */
this->static_registers[cur_opcode.rw_static_reg.static_idx] = this->registers[cur_opcode.rw_static_reg.idx];
}
break;
case CheatVmOpcodeType_BreakProcess:
dmnt::cheat::impl::BreakCheatProcessUnsafe();

View file

@ -42,7 +42,7 @@ namespace ams::dmnt::cheat::impl {
CheatVmOpcodeType_BeginRegisterConditionalBlock = 0xC0,
CheatVmOpcodeType_SaveRestoreRegister = 0xC1,
CheatVmOpcodeType_SaveRestoreRegisterMask = 0xC2,
CheatVmOpcodeType_LoadStaticRegister = 0xC3,
CheatVmOpcodeType_ReadWriteStaticRegister = 0xC3,
/* This is a meta entry, and not a real opcode. */
/* This is to facilitate multi-nybble instruction decoding. */
@ -226,7 +226,7 @@ namespace ams::dmnt::cheat::impl {
bool should_operate[0x10];
};
struct LoadStaticRegisterOpcode {
struct ReadWriteStaticRegisterOpcode {
u32 static_idx;
u32 idx;
};
@ -260,7 +260,7 @@ namespace ams::dmnt::cheat::impl {
BeginRegisterConditionalOpcode begin_reg_cond;
SaveRestoreRegisterOpcode save_restore_reg;
SaveRestoreRegisterMaskOpcode save_restore_regmask;
LoadStaticRegisterOpcode load_static_reg;
ReadWriteStaticRegisterOpcode rw_static_reg;
DebugLogOpcode debug_log;
};
};
@ -269,7 +269,9 @@ namespace ams::dmnt::cheat::impl {
public:
constexpr static size_t MaximumProgramOpcodeCount = 0x400;
constexpr static size_t NumRegisters = 0x10;
constexpr static size_t NumStaticRegisters = 0x100;
constexpr static size_t NumReadableStaticRegisters = 0x80;
constexpr static size_t NumWritableStaticRegisters = 0x80;
constexpr static size_t NumStaticRegisters = NumReadableStaticRegisters + NumWritableStaticRegisters;
private:
size_t num_opcodes = 0;
size_t instruction_ptr = 0;