mirror of
https://github.com/Atmosphere-NX/Atmosphere
synced 2024-11-09 22:56:35 +00:00
fusee: move dsi register write to the proper configuration list
This commit is contained in:
hexkyz
SciresM
parent
3e8688e19e
commit
7480b6bb80
6 changed files with 21 additions and 21 deletions
|
|
@ -120,9 +120,9 @@ void display_init_erista(void) {
|
|||
do_register_writes(DI_BASE, display_config_dc_01, 94);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_01, 8);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_02_erista, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 13);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 14);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_04_erista, 0);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 11);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 10);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_06, 12);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1);
|
||||
|
|
@ -276,9 +276,9 @@ void display_init_mariko(void) {
|
|||
do_register_writes(DI_BASE, display_config_dc_01, 94);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_01, 8);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_02_mariko, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 13);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 14);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_04_mariko, 7);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 11);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 10);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_06, 12);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1);
|
||||
|
|
|
|||
|
|
@ -159,7 +159,7 @@ static const register_write_t display_config_dsi_01_init_02_mariko[1] = {
|
|||
{sizeof(uint32_t) * DSI_INIT_SEQ_DATA_15_MARIKO, 0x0},
|
||||
};
|
||||
|
||||
static const register_write_t display_config_dsi_01_init_03[13] = {
|
||||
static const register_write_t display_config_dsi_01_init_03[14] = {
|
||||
{sizeof(uint32_t) * DSI_DCS_CMDS, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_0_LO, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_1_LO, 0},
|
||||
|
|
@ -173,6 +173,7 @@ static const register_write_t display_config_dsi_01_init_03[13] = {
|
|||
{sizeof(uint32_t) * DSI_PKT_SEQ_3_HI, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_4_HI, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_5_HI, 0},
|
||||
{sizeof(uint32_t) * DSI_CONTROL, 0},
|
||||
};
|
||||
|
||||
static const register_write_t display_config_dsi_01_init_04_erista[0] = {
|
||||
|
|
@ -189,8 +190,7 @@ static const register_write_t display_config_dsi_01_init_04_mariko[7] = {
|
|||
{sizeof(uint32_t) * DSI_PAD_CONTROL_7_MARIKO, 0},
|
||||
};
|
||||
|
||||
static const register_write_t display_config_dsi_01_init_05[11] = {
|
||||
{sizeof(uint32_t) * DSI_CONTROL, 0},
|
||||
static const register_write_t display_config_dsi_01_init_05[10] = {
|
||||
{sizeof(uint32_t) * DSI_PAD_CONTROL_CD, 0},
|
||||
{sizeof(uint32_t) * DSI_SOL_DELAY, 0x18},
|
||||
{sizeof(uint32_t) * DSI_MAX_THRESHOLD, 0x1E0},
|
||||
|
|
|
|||
|
|
@ -120,9 +120,9 @@ void display_init_erista(void) {
|
|||
do_register_writes(DI_BASE, display_config_dc_01, 94);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_01, 8);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_02_erista, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 13);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 14);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_04_erista, 0);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 11);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 10);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_06, 12);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1);
|
||||
|
|
@ -276,9 +276,9 @@ void display_init_mariko(void) {
|
|||
do_register_writes(DI_BASE, display_config_dc_01, 94);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_01, 8);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_02_mariko, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 13);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 14);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_04_mariko, 7);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 11);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 10);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_06, 12);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1);
|
||||
|
|
|
|||
|
|
@ -159,7 +159,7 @@ static const register_write_t display_config_dsi_01_init_02_mariko[1] = {
|
|||
{sizeof(uint32_t) * DSI_INIT_SEQ_DATA_15_MARIKO, 0x0},
|
||||
};
|
||||
|
||||
static const register_write_t display_config_dsi_01_init_03[13] = {
|
||||
static const register_write_t display_config_dsi_01_init_03[14] = {
|
||||
{sizeof(uint32_t) * DSI_DCS_CMDS, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_0_LO, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_1_LO, 0},
|
||||
|
|
@ -173,6 +173,7 @@ static const register_write_t display_config_dsi_01_init_03[13] = {
|
|||
{sizeof(uint32_t) * DSI_PKT_SEQ_3_HI, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_4_HI, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_5_HI, 0},
|
||||
{sizeof(uint32_t) * DSI_CONTROL, 0},
|
||||
};
|
||||
|
||||
static const register_write_t display_config_dsi_01_init_04_erista[0] = {
|
||||
|
|
@ -189,8 +190,7 @@ static const register_write_t display_config_dsi_01_init_04_mariko[7] = {
|
|||
{sizeof(uint32_t) * DSI_PAD_CONTROL_7_MARIKO, 0},
|
||||
};
|
||||
|
||||
static const register_write_t display_config_dsi_01_init_05[11] = {
|
||||
{sizeof(uint32_t) * DSI_CONTROL, 0},
|
||||
static const register_write_t display_config_dsi_01_init_05[10] = {
|
||||
{sizeof(uint32_t) * DSI_PAD_CONTROL_CD, 0},
|
||||
{sizeof(uint32_t) * DSI_SOL_DELAY, 0x18},
|
||||
{sizeof(uint32_t) * DSI_MAX_THRESHOLD, 0x1E0},
|
||||
|
|
|
|||
|
|
@ -120,9 +120,9 @@ void display_init_erista(void) {
|
|||
do_register_writes(DI_BASE, display_config_dc_01, 94);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_01, 8);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_02_erista, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 13);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 14);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_04_erista, 0);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 11);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 10);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_06, 12);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1);
|
||||
|
|
@ -276,9 +276,9 @@ void display_init_mariko(void) {
|
|||
do_register_writes(DI_BASE, display_config_dc_01, 94);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_01, 8);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_02_mariko, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 13);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 14);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_04_mariko, 7);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 11);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 10);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_01_init_06, 12);
|
||||
do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1);
|
||||
|
|
|
|||
|
|
@ -159,7 +159,7 @@ static const register_write_t display_config_dsi_01_init_02_mariko[1] = {
|
|||
{sizeof(uint32_t) * DSI_INIT_SEQ_DATA_15_MARIKO, 0x0},
|
||||
};
|
||||
|
||||
static const register_write_t display_config_dsi_01_init_03[13] = {
|
||||
static const register_write_t display_config_dsi_01_init_03[14] = {
|
||||
{sizeof(uint32_t) * DSI_DCS_CMDS, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_0_LO, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_1_LO, 0},
|
||||
|
|
@ -173,6 +173,7 @@ static const register_write_t display_config_dsi_01_init_03[13] = {
|
|||
{sizeof(uint32_t) * DSI_PKT_SEQ_3_HI, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_4_HI, 0},
|
||||
{sizeof(uint32_t) * DSI_PKT_SEQ_5_HI, 0},
|
||||
{sizeof(uint32_t) * DSI_CONTROL, 0},
|
||||
};
|
||||
|
||||
static const register_write_t display_config_dsi_01_init_04_erista[0] = {
|
||||
|
|
@ -189,8 +190,7 @@ static const register_write_t display_config_dsi_01_init_04_mariko[7] = {
|
|||
{sizeof(uint32_t) * DSI_PAD_CONTROL_7_MARIKO, 0},
|
||||
};
|
||||
|
||||
static const register_write_t display_config_dsi_01_init_05[11] = {
|
||||
{sizeof(uint32_t) * DSI_CONTROL, 0},
|
||||
static const register_write_t display_config_dsi_01_init_05[10] = {
|
||||
{sizeof(uint32_t) * DSI_PAD_CONTROL_CD, 0},
|
||||
{sizeof(uint32_t) * DSI_SOL_DELAY, 0x18},
|
||||
{sizeof(uint32_t) * DSI_MAX_THRESHOLD, 0x1E0},
|
||||
|
|
|
|||
Loading…
Reference in a new issue