Fix freudian slip

This commit is contained in:
TuxSH 2018-03-07 14:34:47 +01:00
parent 6592744b3b
commit 71f01aaa43
3 changed files with 21 additions and 21 deletions

View file

@ -19,7 +19,7 @@
#include "interrupt.h" #include "interrupt.h"
#include "cpu_context.h" #include "cpu_context.h"
#include "actmon.h" #include "actmon.h"
#include "syscrt0.h" #include "sysctr0.h"
#include "mmu.h" #include "mmu.h"
#include "arm.h" #include "arm.h"
@ -136,7 +136,7 @@ void bootup_misc_mmio(void) {
/* Lock Non-Secure writes to Secure Boot RESET Vector. */ /* Lock Non-Secure writes to Secure Boot RESET Vector. */
SB_CSR_0 = 2; SB_CSR_0 = 2;
/* Setup PMC Secure Scratch RESET Vector for warmboot. */ /* Setup PMC Secure Scratch RESET Vector for warmboot. */
APBDEV_PMC_SECURE_SCRATCH34_0 = reset_vec; APBDEV_PMC_SECURE_SCRATCH34_0 = reset_vec;
APBDEV_PMC_SECURE_SCRATCH35_0 = 0; APBDEV_PMC_SECURE_SCRATCH35_0 = 0;
@ -181,7 +181,7 @@ void setup_4x_mmio(void) {
void setup_current_core_state(void) { void setup_current_core_state(void) {
uint64_t temp_reg; uint64_t temp_reg;
/* Setup system registers. */ /* Setup system registers. */
SET_SYSREG(actlr_el3, 0x73ull); SET_SYSREG(actlr_el3, 0x73ull);
SET_SYSREG(actlr_el2, 0x73ull); SET_SYSREG(actlr_el2, 0x73ull);
@ -192,7 +192,7 @@ void setup_current_core_state(void) {
__isb(); __isb();
SET_SYSREG(cntfrq_el0, MAKE_SYSCRT0_REG(0x20)); /* TODO: Reg name. */ SET_SYSREG(cntfrq_el0, MAKE_SYSCTR0_REG(0x20)); /* TODO: Reg name. */
SET_SYSREG(cnthctl_el2, 3ull); SET_SYSREG(cnthctl_el2, 3ull);
__isb(); __isb();

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@ -1,17 +0,0 @@
#ifndef EXOSPHERE_SYSCRT0_H
#define EXOSPHERE_SYSCRT0_H
#include <stdint.h>
#include "memory_map.h"
/* Exosphere driver for the Tegra X1 SYSCRT0 Registers. */
#define SYSCRT0_BASE (MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_SYSCTR0))
#define MAKE_SYSCRT0_REG(n) MAKE_REG32(SYSCRT0_BASE + n)
#endif

17
exosphere/src/sysctr0.h Normal file
View file

@ -0,0 +1,17 @@
#ifndef EXOSPHERE_SYSCTR0_H
#define EXOSPHERE_SYSCTR0_H
#include <stdint.h>
#include "memory_map.h"
/* Exosphere driver for the Tegra X1 SYSCRT0 Registers. */
#define SYSCTR0_BASE (MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_SYSCTR0))
#define MAKE_SYSCTR0_REG(n) MAKE_REG32(SYSCTR0_BASE + n)
#endif