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exo2: address volca review commentary

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Michael Scire 2020-06-11 19:28:38 -07:00 committed by SciresM
parent da4107996a
commit 6780b096ca
5 changed files with 8 additions and 6 deletions
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2
exosphere/loader_stub/source/secmon_loader_uncompress.cpp
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@ -36,7 +36,7 @@ namespace ams::secmon::loader {
void Uncompress() { void Uncompress() {
while (true) { while (true) {
/* Read a control byte. */ /* Read a control byte. */
u8 control = this->ReadByte(); const u8 control = this->ReadByte();
/* Copy what it specifies we should copy. */ /* Copy what it specifies we should copy. */
this->Copy(this->GetCopySize(control >> 4)); this->Copy(this->GetCopySize(control >> 4));

4
exosphere/program/source/secmon_setup.cpp
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@ -791,8 +791,8 @@ namespace ams::secmon {
void DisableArc() { void DisableArc() {
/* Configure IRAM top/bottom to point to memory ends (disabling redirection). */ /* Configure IRAM top/bottom to point to memory ends (disabling redirection). */
reg::Write(MC + MC_IRAM_BOM, (~0u) & MC_IRAM_BOM_WRITE_MASK); reg::Write(MC + MC_IRAM_BOM, MC_REG_BITS_VALUE(IRAM_BOM_IRAM_BOM, (~0u)));
reg::Write(MC + MC_IRAM_TOM, ( 0u) & MC_IRAM_TOM_WRITE_MASK); reg::Write(MC + MC_IRAM_TOM, MC_REG_BITS_VALUE(IRAM_TOM_IRAM_TOM, ( 0u)));
/* Lock the IRAM aperture. */ /* Lock the IRAM aperture. */
reg::ReadWrite(MC + MC_IRAM_REG_CTRL, MC_REG_BITS_ENUM(IRAM_REG_CTRL_IRAM_CFG_WRITE_ACCESS, DISABLED)); reg::ReadWrite(MC + MC_IRAM_REG_CTRL, MC_REG_BITS_ENUM(IRAM_REG_CTRL_IRAM_CFG_WRITE_ACCESS, DISABLED));

2
libraries/libexosphere/include/exosphere/se/se_hash.hpp
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@ -21,7 +21,7 @@ namespace ams::se {
constexpr inline int Sha256HashSize = crypto::Sha256Generator::HashSize; constexpr inline int Sha256HashSize = crypto::Sha256Generator::HashSize;
union Sha256Hash { union Sha256Hash {
u8 bytes[Sha256HashSize / sizeof( u8)]; u8 bytes[Sha256HashSize / sizeof(u8) ];
u32 words[Sha256HashSize / sizeof(u32)]; u32 words[Sha256HashSize / sizeof(u32)];
}; };

5
libraries/libexosphere/include/exosphere/tegra/tegra_mc.hpp
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@ -544,7 +544,8 @@ DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_TSECWRB, (135 - (MC_CLIENT_ACCESS_N
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_GPUSRD2, (136 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE); DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_GPUSRD2, (136 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_GPUSWR2, (137 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE); DEFINE_MC_REG_BIT_ENUM(CLIENT_ACCESS4_GPUSWR2, (137 - (MC_CLIENT_ACCESS_NUM_CLIENTS * 4)), DISABLE, ENABLE);
constexpr inline u32 MC_IRAM_BOM_WRITE_MASK = 0xFFFFF000u; DEFINE_MC_REG(IRAM_BOM_IRAM_BOM, 12, BITSIZEOF(u32) - 12);
constexpr inline u32 MC_IRAM_TOM_WRITE_MASK = 0xFFFFF000u; DEFINE_MC_REG(IRAM_TOM_IRAM_TOM, 12, BITSIZEOF(u32) - 12);
DEFINE_MC_REG_BIT_ENUM(IRAM_REG_CTRL_IRAM_CFG_WRITE_ACCESS, 0, ENABLED, DISABLED); DEFINE_MC_REG_BIT_ENUM(IRAM_REG_CTRL_IRAM_CFG_WRITE_ACCESS, 0, ENABLED, DISABLED);

1
libraries/libexosphere/source/se/se_execute.cpp
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@ -26,6 +26,7 @@ namespace ams::se {
u32 size; u32 size;
}; };
static_assert(util::is_pod<LinkedListEntry>::value); static_assert(util::is_pod<LinkedListEntry>::value);
static_assert(sizeof(LinkedListEntry) == 0xC);
uintptr_t GetPhysicalAddress(const void *ptr) { uintptr_t GetPhysicalAddress(const void *ptr) {
const uintptr_t virt_address = reinterpret_cast<uintptr_t>(ptr); const uintptr_t virt_address = reinterpret_cast<uintptr_t>(ptr);