mirror of
https://github.com/Atmosphere-NX/Atmosphere
synced 2024-11-09 22:56:35 +00:00
Rewrite relocation stuff
This commit is contained in:
TuxSH
parent
6903b20579
commit
63d0b08ac4
7 changed files with 122 additions and 126 deletions
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@ -40,25 +40,6 @@ SECTIONS
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. = ALIGN(64);
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} >fake AT>fake
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.warm_crt0 :
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{
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. = ALIGN(64);
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__warmboot_crt0_lma__ = LOADADDR(.warm_crt0);
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__warmboot_crt0_start__ = ABSOLUTE(.);
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KEEP (*(.warm_crt0.text.start)) /* Should be first */
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KEEP (*(.warm_crt0.text*))
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KEEP (build/warmboot_init.o(.text*))
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*(.warm_crt0.rodata*)
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build/warmboot_init.o(.rodata*)
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*(.warm_crt0.data*)
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build/warmboot_init.o(.data*)
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. = ALIGN(8);
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*(.warm_crt0.bss*)
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build/warmboot_init.o(.bss*)
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. = ALIGN(64);
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__warmboot_crt0_end__ = ABSOLUTE(.);
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} >warmboot_crt0 AT>fake
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.pk2ldr :
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{
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. = ALIGN(4096);
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@ -89,6 +70,25 @@ SECTIONS
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__vectors_end__ = ABSOLUTE(.);
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} >evt AT>fake
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.warm_crt0 :
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{
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. = ALIGN(64);
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__warmboot_crt0_lma__ = LOADADDR(.warm_crt0);
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__warmboot_crt0_start__ = ABSOLUTE(.);
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KEEP (*(.warm_crt0.text.start)) /* Should be first */
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KEEP (*(.warm_crt0.text*))
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KEEP (build/warmboot_init.o(.text*))
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*(.warm_crt0.rodata*)
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build/warmboot_init.o(.rodata*)
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*(.warm_crt0.data*)
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build/warmboot_init.o(.data*)
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. = ALIGN(8);
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*(.warm_crt0.bss*)
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build/warmboot_init.o(.bss*)
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. = ALIGN(64);
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__warmboot_crt0_end__ = ABSOLUTE(.);
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} >warmboot_crt0 AT>fake
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.text :
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{
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. = ALIGN(256);
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@ -209,12 +209,12 @@ SECTIONS
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{
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. = ALIGN(8);
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__main_bss_start__ = ABSOLUTE(.);
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__loaded_end_lma__ = LOADADDR(.bss);
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*(.dynbss)
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*(.bss .bss.* .gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(8);
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__main_end__ = ABSOLUTE(.);
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__end_lma__ = LOADADDR(.bss) + __main_end__ - __main_bss_start__;
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} >main AT>fake
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__end__ = ABSOLUTE(.) ;
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@ -6,13 +6,6 @@
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extern const uint8_t __start_cold[];
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extern const uint8_t __warmboot_crt0_start__[], __warmboot_crt0_end__[];
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extern const uint8_t __main_start__[], __main_bss_start__[], __main_end__[];
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extern const uint8_t __pk2ldr_start__[], __pk2ldr_bss_start__[], __pk2ldr_end__[];
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extern const uint8_t __vectors_start__[], __vectors_end__[];
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extern const size_t __warmboot_crt0_offset, __main_offset, __pk2ldr_offset, __vectors_offset;
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/* warmboot_init.c */
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void set_memory_registers_enable_mmu(void);
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@ -100,68 +93,57 @@ static void configure_ttbls(void) {
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tzram_map_all_segments(mmu_l3_tbl);
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}
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__attribute__((noinline)) static void copy_lma_to_vma(const void *vma, size_t offset, size_t size) {
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uint64_t *p_vma = (uint64_t *)vma;
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const uint64_t *p_lma = (const uint64_t *)(__start_cold + offset);
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static void translate_warmboot_func_list(coldboot_crt0_reloc_list_t *reloc_list) {
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coldboot_crt0_reloc_t *warmboot_crt0_reloc = &reloc_list->relocs[0];
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coldboot_crt0_reloc_t *main_reloc = &reloc_list->relocs[reloc_list->nb_relocs_pre_mmu_init];
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/* The main segment immediately follows the warmboot crt0 in TZRAM, in the same page. */
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uintptr_t main_pa = (uintptr_t)warmboot_crt0_reloc->vma | ((uintptr_t)main_reloc->vma & ~0xFFF);
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for(size_t i = 0; i < reloc_list->func_list->nb_funcs; i++) {
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if(reloc_list->func_list->addrs[i] >= 0x1F0000000ull) {
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reloc_list->func_list->addrs[i] = main_pa + reloc_list->func_list->addrs[i] - (uintptr_t)main_reloc->vma;
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}
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}
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}
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static void do_relocation(const coldboot_crt0_reloc_list_t *reloc_list, size_t index) {
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uint64_t *p_vma = (uint64_t *)reloc_list->relocs[index].vma;
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const uint64_t *p_lma = (const uint64_t *)(reloc_list->reloc_base + reloc_list->relocs[index].reloc_offset);
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size_t size = reloc_list->relocs[index].end_vma - reloc_list->relocs[index].vma;
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for(size_t i = 0; i < size / 8; i++) {
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p_vma[i] = p_lma[i];
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p_vma[i] = reloc_list->relocs[index].reloc_offset != 0 ? p_lma[i] : 0;
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}
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}
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FAR_REACHING static void copy_warmboot_crt0(void) {
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copy_lma_to_vma(__warmboot_crt0_start__, __warmboot_crt0_offset, __warmboot_crt0_end__ - __warmboot_crt0_start__);
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}
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FAR_REACHING static void copy_other_sections(void) {
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copy_lma_to_vma(__main_start__, __main_offset, __main_end__ - __main_start__);
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copy_lma_to_vma(__pk2ldr_start__, __pk2ldr_offset, __pk2ldr_end__ - __pk2ldr_start__);
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copy_lma_to_vma(__vectors_start__, __vectors_offset, __vectors_end__ - __vectors_start__);
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}
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FAR_REACHING static void set_memory_registers_enable_mmu_tzram_pa(void) {
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volatile uintptr_t v = (uintptr_t)set_memory_registers_enable_mmu;
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((void (*)(void))v)();
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}
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FAR_REACHING static void flush_dcache_all_tzram_pa(void) {
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uintptr_t pa = TZRAM_GET_SEGMENT_PA(TZRAM_SEGMENT_ID_WARMBOOT_CRT0_AND_MAIN);
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uintptr_t main_pa = pa | ((uintptr_t)__main_start__ & 0xFFF);
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uintptr_t v = (uintptr_t)flush_dcache_all - (uintptr_t)__main_start__ + (uintptr_t)main_pa;
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((void (*)(void))v)();
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}
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FAR_REACHING static void invalidate_icache_all_tzram_pa(void) {
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uintptr_t pa = TZRAM_GET_SEGMENT_PA(TZRAM_SEGMENT_ID_WARMBOOT_CRT0_AND_MAIN);
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uintptr_t main_pa = pa | ((uintptr_t)__main_start__ & 0xFFF);
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uintptr_t v = (uintptr_t)invalidate_icache_all - (uintptr_t)__main_start__ + (uintptr_t)main_pa;
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((void (*)(void))v)();
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}
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FAR_REACHING static void clear_bss(void) {
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volatile uintptr_t v = (uintptr_t)memset;
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((void (*)(void *, int, size_t))v)((void *)__pk2ldr_bss_start__, 0, __pk2ldr_end__ - __pk2ldr_bss_start__);
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((void (*)(void *, int, size_t))v)((void *)__main_bss_start__, 0, __main_end__ - __main_bss_start__);
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}
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uintptr_t get_coldboot_crt0_stack_address(void) {
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return TZRAM_GET_SEGMENT_PA(TZRAM_SEGMENT_ID_CORE3_STACK) + 0x800;
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}
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void coldboot_init(void) {
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void coldboot_init(coldboot_crt0_reloc_list_t *reloc_list) {
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/* Custom approach */
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reloc_list->reloc_base = (uintptr_t)__start_cold;
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/* TODO: Set NX BOOTLOADER clock time field */
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copy_warmboot_crt0();
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/* This at least copies .warm_crt0 to its VMA. */
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for(size_t i = 0; i < reloc_list->nb_relocs_pre_mmu_init; i++) {
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do_relocation(reloc_list, i);
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}
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/* At this point, we can (and will) access functions located in .warm_crt0 */
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translate_warmboot_func_list(reloc_list);
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/* TODO: initialize DMA controllers, etc. */
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configure_ttbls();
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set_memory_registers_enable_mmu_tzram_pa();
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reloc_list->func_list->funcs.set_memory_registers_enable_mmu();
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copy_other_sections();
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flush_dcache_all_tzram_pa();
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invalidate_icache_all_tzram_pa();
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/* At this point we can access all the mapped segments (all other functions, data...) normally */
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clear_bss();
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/* Copy or clear the remaining sections */
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for(size_t i = 0; i < reloc_list->nb_relocs_post_mmu_init; i++) {
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do_relocation(reloc_list, reloc_list->nb_relocs_pre_mmu_init + i);
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}
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reloc_list->func_list->funcs.flush_dcache_all();
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reloc_list->func_list->funcs.invalidate_icache_all();
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/* At this point we can access all the mapped segments (all other functions, data...) normally */
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}
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@ -372,7 +372,7 @@ uintptr_t get_pk2ldr_stack_address(void) {
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/* This function is called during coldboot init, and validates a package2. */
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/* This package2 is read into memory by a concurrent BPMP bootloader. */
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void load_package2(void) {
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void load_package2(coldboot_crt0_reloc_list_t *reloc_list) {
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/* Setup the Security Engine. */
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setup_se();
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@ -393,7 +393,7 @@ void load_package2(void) {
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randomcache_init();
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/* memclear the initial copy of Exosphere running in IRAM (relocated to TZRAM by earlier code). */
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memset(__start_cold_addr, 0, __bin_size);
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memset((void *)reloc_list->reloc_base, 0, reloc_list->loaded_bin_size);
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/* Let NX Bootloader know that we're running. */
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MAILBOX_NX_BOOTLOADER_IS_SECMON_AWAKE = 1;
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@ -3,7 +3,7 @@
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/* This is code responsible for validating a package2. Actual file reading is done by bootloader. */
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#include <stdint.h>
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#include "utils.h"
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#include "bootconfig.h"
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#include "memory_map.h"
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@ -77,6 +77,6 @@ typedef struct {
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} package2_header_t;
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#pragma pack(pop)
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void load_package2(void);
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void load_package2(coldboot_crt0_reloc_list_t *reloc_list);
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#endif
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@ -80,11 +80,11 @@ __start_cold:
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bl get_coldboot_crt0_stack_address
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mov sp, x0
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mov fp, #0
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bl coldboot_init
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adr x0, __start_cold
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ldr x1, =__start_cold_addr
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str x0, [x1]
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adrp x19, g_coldboot_crt0_relocation_list
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add x19, x19, #:lo12:g_coldboot_crt0_relocation_list
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mov x0, x19
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bl coldboot_init
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ldr x16, =__jump_to_main_cold
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br x16
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@ -100,6 +100,9 @@ __start_warm:
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bl get_warmboot_crt0_stack_address
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mov sp, x0
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mov fp, #0
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adrp x0, g_warmboot_crt0_main_func_list
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add x0, x0, #:lo12:g_warmboot_crt0_main_func_list
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bl warmboot_init
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ldr x16, =__jump_to_main_warm
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br x16
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@ -202,32 +205,29 @@ __jump_to_lower_el:
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isb
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eret
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/* Custom stuff */
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.align 3
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.section .cold_crt0.rodata.reloc_constants, "a", %progbits
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.global __warmboot_crt0_offset
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__warmboot_crt0_offset:
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.quad __warmboot_crt0_lma__
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.global __main_offset
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__main_offset:
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.quad __main_lma__
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.global __pk2ldr_offset
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__pk2ldr_offset:
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.quad __pk2ldr_lma__
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.global __vectors_offset
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__vectors_offset:
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.quad __vectors_lma__
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.section .cold_crt0.data.g_coldboot_crt0_relocation_list, "aw", %progbits
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.global g_coldboot_crt0_relocation_list
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g_coldboot_crt0_relocation_list:
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.quad 0, __loaded_end_lma__ /* __start_cold, to be set & loaded size */
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.quad 1, 5 /* number of sections to relocate/clear before & after mmu init */
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.quad g_warmboot_crt0_main_func_list
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/* Relocations */
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.quad __warmboot_crt0_start__, __warmboot_crt0_end__, __warmboot_crt0_lma__
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.quad __main_start__, __main_bss_start__, __main_lma__
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.quad __pk2ldr_start__, __pk2ldr_bss_start__, __pk2ldr_lma__
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.quad __vectors_start__, __vectors_end__, __vectors_lma__
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/* BSS clears */
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.quad __main_bss_start__, __main_end__, 0
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.quad __pk2ldr_bss_start__, __pk2ldr_end__, 0
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.align 3
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.section .rodata.__bin_size, "a", %progbits
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.global __bin_size
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__bin_size:
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.quad __end_lma__
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.align 3
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.section .bss.__start_cold_addr, "w", %nobits
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.global __start_cold_addr
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__start_cold_addr:
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.space 8
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.section .warm_crt0.data.g_warmboot_crt0_main_func_list, "aw", %progbits
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.global g_warmboot_crt0_main_func_list
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g_warmboot_crt0_main_func_list:
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.quad 3 /* Number of functions */
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/* Functions */
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.quad set_memory_registers_enable_mmu
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.quad flush_dcache_all
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.quad invalidate_icache_all
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@ -18,6 +18,37 @@
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#define ALINLINE __attribute__((always_inline))
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#define FAR_REACHING __attribute__((target("cmodel=large"), noinline))
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/* Custom stuff below */
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/* For warmboot (and coldboot crt0) */
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typedef struct {
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size_t nb_funcs;
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union {
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struct {
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void (*set_memory_registers_enable_mmu)(void);
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void (*flush_dcache_all)(void);
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void (*invalidate_icache_all)(void);
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} funcs;
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uintptr_t addrs[3];
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};
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} warmboot_func_list_t;
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/* For coldboot */
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typedef struct {
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uint8_t *vma;
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uint8_t *end_vma;
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uintptr_t reloc_offset;
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} coldboot_crt0_reloc_t;
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typedef struct {
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uintptr_t reloc_base;
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size_t loaded_bin_size;
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size_t nb_relocs_pre_mmu_init; /* first is always warmboot_crt0 */
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size_t nb_relocs_post_mmu_init; /* first is always main segment excl. .bss */
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warmboot_func_list_t *func_list;
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coldboot_crt0_reloc_t relocs[];
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} coldboot_crt0_reloc_list_t;
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__attribute__ ((noreturn)) void panic(uint32_t code);
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__attribute__ ((noreturn)) void generic_panic(void);
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bool overlaps(uint64_t as, uint64_t ae, uint64_t bs, uint64_t be);
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@ -2,27 +2,10 @@
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#include "memory_map.h"
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#include "arm.h"
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extern const uint8_t __main_start__[];
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/* start.s */
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void __set_memory_registers(uintptr_t ttbr0, uintptr_t vbar, uint64_t cpuectlr, uint32_t scr,
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uint32_t tcr, uint32_t cptr, uint64_t mair, uint32_t sctlr);
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/*
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FAR_REACHING static void flush_dcache_all_tzram_pa(void) {
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uintptr_t pa = TZRAM_GET_SEGMENT_PA(TZRAM_SEGMENT_ID_WARMBOOT_CRT0_AND_MAIN);
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uintptr_t main_pa = pa | ((uintptr_t)__main_start__ & 0xFFF);
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uintptr_t v = (uintptr_t)flush_dcache_all - (uintptr_t)__main_start__ + (uintptr_t)main_pa;
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((void (*)(void))v)();
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}
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FAR_REACHING static void invalidate_icache_all_inner_shareable_tzram_pa(void) {
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uintptr_t pa = TZRAM_GET_SEGMENT_PA(TZRAM_SEGMENT_ID_WARMBOOT_CRT0_AND_MAIN);
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uintptr_t main_pa = pa | ((uintptr_t)__main_start__ & 0xFFF);
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uintptr_t v = (uintptr_t)invalidate_icache_all_inner_shareable - (uintptr_t)__main_start__ + (uintptr_t)main_pa;
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((void (*)(void))v)();
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}*/
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uintptr_t get_warmboot_crt0_stack_address(void) {
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return TZRAM_GET_SEGMENT_PA(TZRAM_SEGMENT_ID_CORE012_STACK) + 0x800;
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}
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@ -80,6 +63,6 @@ void set_memory_registers_enable_mmu(void) {
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__set_memory_registers(ttbr0, vbar, cpuectlr, scr, tcr, cptr, mair, sctlr);
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}
|
||||
|
||||
void warmboot_init(void) {
|
||||
/* TODO: Implement. */
|
||||
void warmboot_init(warmboot_func_list_t *func_list) {
|
||||
(void)func_list;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue