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kern: first round of page table refactor bug fixes

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Michael Scire 2024-10-10 16:10:18 -07:00 committed by SciresM
parent 4c81432e94
commit 570989384b
2 changed files with 5 additions and 4 deletions
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4
libraries/libmesosphere/source/arch/arm64/kern_k_page_table.cpp
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@ -540,7 +540,7 @@ namespace ams::kern::arch::arm64 {
const size_t num_ptes = cur_pages / (block_size / PageSize); const size_t num_ptes = cur_pages / (block_size / PageSize);
auto *pte = context.level_entries[context.level]; auto *pte = context.level_entries[context.level];
for (size_t i = 0; i < num_ptes; ++i) { for (size_t i = 0; i < num_ptes; ++i) {
*pte = PageTableEntry(PageTableEntry::BlockTag{}, phys_addr + i * block_size, entry_template, sw_reserved_bits, contig, context.level == KPageTableImpl::EntryLevel_L3); pte[i] = PageTableEntry(PageTableEntry::BlockTag{}, phys_addr + i * block_size, entry_template, sw_reserved_bits, contig, context.level == KPageTableImpl::EntryLevel_L3);
sw_reserved_bits &= ~(PageTableEntry::SoftwareReservedBit_DisableMergeHead); sw_reserved_bits &= ~(PageTableEntry::SoftwareReservedBit_DisableMergeHead);
} }
@ -803,7 +803,7 @@ namespace ams::kern::arch::arm64 {
} }
/* Separate. */ /* Separate. */
impl.SeparatePages(entry, context, virt_addr, nullptr); impl.SeparatePages(entry, context, virt_addr, GetPointer<PageTableEntry>(table));
this->NoteUpdated(); this->NoteUpdated();
} }

5
libraries/libmesosphere/source/arch/arm64/kern_k_page_table_impl.cpp
View file

@ -261,7 +261,7 @@ namespace ams::kern::arch::arm64 {
auto * const first = context->level_entries[context->level]; auto * const first = context->level_entries[context->level];
const KPhysicalAddress block = this->GetBlock(first, context->level); const KPhysicalAddress block = this->GetBlock(first, context->level);
for (size_t i = 0; i < BlocksPerTable; ++i) { for (size_t i = 0; i < BlocksPerTable; ++i) {
pte[i] = PageTableEntry(PageTableEntry::BlockTag{}, block + (i << (PageBits + LevelBits * (context->level - 1))), PageTableEntry(first->GetEntryTemplateForSeparate(i)), PageTableEntry::SoftwareReservedBit_None, true, context->level == EntryLevel_L3); pte[i] = PageTableEntry(PageTableEntry::BlockTag{}, block + (i << (PageBits + LevelBits * (context->level - 1))), PageTableEntry(first->GetEntryTemplateForSeparate(i)), PageTableEntry::SoftwareReservedBit_None, true, context->level - 1 == EntryLevel_L3);
} }
context->is_contiguous = true; context->is_contiguous = true;
@ -271,7 +271,8 @@ namespace ams::kern::arch::arm64 {
cpu::DataSynchronizationBarrierInnerShareableStore(); cpu::DataSynchronizationBarrierInnerShareableStore();
/* Update the block entry to be a table entry. */ /* Update the block entry to be a table entry. */
*context->level_entries[context->level + 1] = PageTableEntry(PageTableEntry::TableTag{}, KPageTable::GetPageTablePhysicalAddress(KVirtualAddress(first)), m_is_kernel, true, BlocksPerTable); *context->level_entries[context->level + 1] = PageTableEntry(PageTableEntry::TableTag{}, KPageTable::GetPageTablePhysicalAddress(KVirtualAddress(pte)), m_is_kernel, true, BlocksPerTable);
context->level_entries[context->level] = pte + this->GetLevelIndex(address, context->level); context->level_entries[context->level] = pte + this->GetLevelIndex(address, context->level);
} }