From 559d254a79e93a0326e94611f06b444070f9353e Mon Sep 17 00:00:00 2001
From: TuxSH <tuxsh@sfr.fr>
Date: Mon, 3 Feb 2020 01:57:11 +0000
Subject: [PATCH] thermosphere: the fpu cache is only being really modified by
 gdb anyway

---
 thermosphere/src/fpu.c         | 13 +++++++------
 thermosphere/src/fpu.h         | 13 +++++++------
 thermosphere/src/gdb/context.c |  2 ++
 3 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/thermosphere/src/fpu.c b/thermosphere/src/fpu.c
index 7721342d4..6ee66cabf 100644
--- a/thermosphere/src/fpu.c
+++ b/thermosphere/src/fpu.c
@@ -17,7 +17,7 @@
 #include "fpu.h"
 #include "core_ctx.h"
 
-static FpuRegisterCache TEMPORARY g_fpuRegisterCache[4] = { 0 };
+static FpuRegisterCache TEMPORARY g_fpuRegisterCache = { 0 };
 
 // fpu_regs_load_store.s
 void fpuLoadRegistersFromCache(const FpuRegisterCache *cache);
@@ -25,12 +25,13 @@ void fpuStoreRegistersToCache(FpuRegisterCache *cache);
 
 FpuRegisterCache *fpuGetRegisterCache(void)
 {
-    return &g_fpuRegisterCache[currentCoreCtx->coreId];
+    g_fpuRegisterCache.coreId = currentCoreCtx->coreId;
+    return &g_fpuRegisterCache;
 }
 
 FpuRegisterCache *fpuReadRegisters(void)
 {
-    FpuRegisterCache *cache = &g_fpuRegisterCache[currentCoreCtx->coreId];
+    FpuRegisterCache *cache = &g_fpuRegisterCache;
     if (!cache->valid) {
         fpuStoreRegistersToCache(cache);
         cache->valid = true;
@@ -40,7 +41,7 @@ FpuRegisterCache *fpuReadRegisters(void)
 
 void fpuCommitRegisters(void)
 {
-    FpuRegisterCache *cache = &g_fpuRegisterCache[currentCoreCtx->coreId];
+    FpuRegisterCache *cache = &g_fpuRegisterCache;
     cache->dirty = true;
 
     // Because the caller rewrote the entire cache in the event it didn't read it before:
@@ -49,8 +50,8 @@ void fpuCommitRegisters(void)
 
 void fpuCleanInvalidateRegisterCache(void)
 {
-    FpuRegisterCache *cache = &g_fpuRegisterCache[currentCoreCtx->coreId];
-    if (cache->dirty) {
+    FpuRegisterCache *cache = &g_fpuRegisterCache;
+    if (cache->dirty && cache->coreId == currentCoreCtx->coreId) {
         fpuLoadRegistersFromCache(cache);
         cache->dirty = false;
     }
diff --git a/thermosphere/src/fpu.h b/thermosphere/src/fpu.h
index 18769d265..eea5ec0a8 100644
--- a/thermosphere/src/fpu.h
+++ b/thermosphere/src/fpu.h
@@ -17,13 +17,14 @@
 #pragma once
 
 #include "utils.h"
-
+#include "spinlock.h"
 typedef struct FpuRegisterCache {
-    u128    q[32];
-    u64     fpsr;
-    u64     fpcr;
-    bool    valid;
-    bool    dirty;
+    u128                q[32];
+    u64                 fpsr;
+    u64                 fpcr;
+    u32                 coreId;
+    bool                valid;
+    bool                dirty;
 } FpuRegisterCache;
 
 // Only for the current core:
diff --git a/thermosphere/src/gdb/context.c b/thermosphere/src/gdb/context.c
index 1e7e935e6..ecb0e66a9 100644
--- a/thermosphere/src/gdb/context.c
+++ b/thermosphere/src/gdb/context.c
@@ -41,6 +41,7 @@
 #include "../breakpoints.h"
 #include "../software_breakpoints.h"
 #include "../watchpoints.h"
+#include "../fpu.h"
 
 static TEMPORARY char g_gdbWorkBuffer[GDB_WORK_BUF_LEN];
 static TEMPORARY char g_gdbBuffer[GDB_BUF_LEN + 4 + 1];
@@ -236,6 +237,7 @@ void GDB_ReleaseContext(GDBContext *ctx)
 
 void GDB_MigrateRxIrq(GDBContext *ctx, u32 coreId)
 {
+    fpuCleanInvalidateRegisterCache();
     transportInterfaceSetInterruptAffinity(ctx->transportInterface, BIT(coreId));
 }