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https://github.com/Atmosphere-NX/Atmosphere
synced 2024-11-15 09:36:35 +00:00
thermosphere: fix uart pinmuxing. As it's now possible to init all uarts at the same time, do it.
Thanks to @CTCaer
See dumped values from HOS: ccaa47ee04/kernel-dts/icosa-platforms/tegra210-icosa-pinmux.dtsi
This commit is contained in:
parent
6790895487
commit
548367453b
2 changed files with 22 additions and 19 deletions
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@ -193,15 +193,14 @@ namespace ams::hvisor::drivers::tegra::t210 {
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return static_cast<Level>((m_regs->bank[pin.port / portsPerBank].in[pin.port % portsPerBank] >> pin.pos) & 1);
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return static_cast<Level>((m_regs->bank[pin.port / portsPerBank].in[pin.port % portsPerBank] >> pin.pos) & 1);
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}
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}
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void ConfigureUartPins(u32 id)
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void ConfigureUartPins()
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{
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{
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if (id > 3) {
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return;
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}
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constexpr Pin uartPins[] = {uart1Tx, uart2Tx, uart3Tx, uart4Tx};
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constexpr Pin uartPins[] = {uart1Tx, uart2Tx, uart3Tx, uart4Tx};
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// Set SFIO to all the 4 contiguous pins (tx, rx, rts, cts)
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// Set SFIO to all the 4 contiguous pins (tx, rx, rts, cts)
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SetModeContiguous(uartPins[id], 4, Mode::Sfio);
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for (Pin pin : uartPins) {
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SetModeContiguous(pin, 4, Mode::Sfio);
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}
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}
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}
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};
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};
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@ -234,20 +234,24 @@ namespace ams::hvisor::drivers::tegra::t210 {
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volatile Registers *m_regs = nullptr;
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volatile Registers *m_regs = nullptr;
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public:
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public:
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CONFIGURE_UART_DECL(1)
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void ConfigureUartPins() const
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CONFIGURE_UART_DECL(2)
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CONFIGURE_UART_DECL(3)
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CONFIGURE_UART_DECL(4)
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void ConfigureUart(u32 id)
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{
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{
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switch (id) {
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m_regs->uart1_tx = 0 | 0 | PULL_NONE | SELECT_FUNCTION0;
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case 0: ConfigureUart1(); break;
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m_regs->uart1_rx = INPUT | TRISTATE | PULL_UP | SELECT_FUNCTION0;
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case 1: ConfigureUart2(); break;
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m_regs->uart1_rts = 0 | 0 | PULL_NONE | SELECT_FUNCTION0;
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case 2: ConfigureUart3(); break;
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m_regs->uart1_cts = INPUT | TRISTATE | PULL_DOWN | SELECT_FUNCTION0;
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case 3: ConfigureUart4(); break;
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m_regs->uart2_tx = 0 | 0 | PULL_NONE | SELECT_FUNCTION0;
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default: break;
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m_regs->uart2_rx = INPUT | TRISTATE | PULL_NONE | SELECT_FUNCTION0;
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}
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m_regs->uart2_rts = 0 | 0 | PULL_DOWN | SELECT_FUNCTION0;
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m_regs->uart2_cts = INPUT | TRISTATE | PULL_NONE | SELECT_FUNCTION0;
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m_regs->uart3_tx = 0 | 0 | PULL_NONE | SELECT_FUNCTION0;
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m_regs->uart3_rx = INPUT | TRISTATE | PULL_NONE | SELECT_FUNCTION0;
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m_regs->uart3_rts = 0 | 0 | PULL_DOWN | SELECT_FUNCTION0;
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m_regs->uart3_cts = INPUT | TRISTATE | PULL_NONE | SELECT_FUNCTION0;
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m_regs->uart4_tx = 0 | 0 | PULL_DOWN | SELECT_FUNCTION0;
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m_regs->uart4_rx = INPUT | TRISTATE | PULL_DOWN | SELECT_FUNCTION0;
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m_regs->uart4_cts = 0 | 0 | PULL_DOWN | SELECT_FUNCTION0;
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m_regs->uart4_rts = INPUT | TRISTATE | PULL_DOWN | SELECT_FUNCTION0;
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}
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}
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};
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};
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}
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}
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