nold/Atmosphere
1
0
Fork 0
mirror of https://github.com/Atmosphere-NX/Atmosphere synced 2024-12-22 20:31:14 +00:00
Code Issues Projects Releases Packages Wiki Activity

exo: theoretical support for moved MAILBOX page

Browse source
This commit is contained in:
Michael Scire 2019-01-30 23:13:27 -08:00
parent 46f4896992
commit 506ac3f167
4 changed files with 42 additions and 14 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
exosphere/src/coldboot_init.c
View file

@ -26,7 +26,7 @@
#undef MAILBOX_NX_BOOTLOADER_BASE #undef MAILBOX_NX_BOOTLOADER_BASE
#undef TIMERS_BASE #undef TIMERS_BASE
#define MAILBOX_NX_BOOTLOADER_BASE (MMIO_GET_DEVICE_PA(MMIO_DEVID_NXBOOTLOADER_MAILBOX)) #define MAILBOX_NX_BOOTLOADER_BASE(targetfw) (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_700) ? (MMIO_GET_DEVICE_7X_PA(MMIO_DEVID_NXBOOTLOADER_MAILBOX)) : (MMIO_GET_DEVICE_PA(MMIO_DEVID_NXBOOTLOADER_MAILBOX))
#define TIMERS_BASE (MMIO_GET_DEVICE_PA(MMIO_DEVID_TMRs_WDTs)) #define TIMERS_BASE (MMIO_GET_DEVICE_PA(MMIO_DEVID_TMRs_WDTs))
extern const uint8_t __start_cold[]; extern const uint8_t __start_cold[];
@ -48,13 +48,16 @@ static void identity_map_all_mappings(uintptr_t *mmu_l1_tbl, uintptr_t *mmu_l3_t
} }
} }
static void mmio_map_all_devices(uintptr_t *mmu_l3_tbl) { static void mmio_map_all_devices(uintptr_t *mmu_l3_tbl, unsigned int target_firmware) {
static const uintptr_t pas[] = { TUPLE_FOLD_LEFT_0(EVAL(MMIO_DEVID_MAX), _MMAPDEV, COMMA) }; static const uintptr_t pas[] = { TUPLE_FOLD_LEFT_0(EVAL(MMIO_DEVID_MAX), _MMAPDEV, COMMA) };
static const size_t sizes[] = { TUPLE_FOLD_LEFT_1(EVAL(MMIO_DEVID_MAX), _MMAPDEV, COMMA) }; static const size_t sizes[] = { TUPLE_FOLD_LEFT_1(EVAL(MMIO_DEVID_MAX), _MMAPDEV, COMMA) };
static const bool is_secure[] = { TUPLE_FOLD_LEFT_2(EVAL(MMIO_DEVID_MAX), _MMAPDEV, COMMA) }; static const bool is_secure[] = { TUPLE_FOLD_LEFT_2(EVAL(MMIO_DEVID_MAX), _MMAPDEV, COMMA) };
static const uintptr_t pas_7x[] = { TUPLE_FOLD_LEFT_0(EVAL(MMIO_DEVID_MAX), _MMAPDEV7X, COMMA) };
for(size_t i = 0, offset = 0; i < MMIO_DEVID_MAX; i++) { for(size_t i = 0, offset = 0; i < MMIO_DEVID_MAX; i++) {
mmio_map_device(mmu_l3_tbl, MMIO_BASE + offset, pas[i], sizes[i], is_secure[i]); uintptr_t pa = (target_firmware < ATMOSPHERE_TARGET_FIRMWARE_700) ? pas[i] : pas_7x[i];
mmio_map_device(mmu_l3_tbl, MMIO_BASE + offset, pa, sizes[i], is_secure[i]);
offset += sizes[i]; offset += sizes[i];
offset += 0x1000; offset += 0x1000;
} }
@ -127,7 +130,7 @@ static void configure_ttbls(unsigned int target_firmware) {
mmu_map_table(2, mmu_l2_tbl, 0x1F0000000ull, mmu_l3_tbl, 0); mmu_map_table(2, mmu_l2_tbl, 0x1F0000000ull, mmu_l3_tbl, 0);
identity_map_all_mappings(mmu_l1_tbl, mmu_l3_tbl); identity_map_all_mappings(mmu_l1_tbl, mmu_l3_tbl);
mmio_map_all_devices(mmu_l3_tbl); mmio_map_all_devices(mmu_l3_tbl, target_firmware);
lp0_entry_map_all_ram_segments(mmu_l3_tbl); lp0_entry_map_all_ram_segments(mmu_l3_tbl);
warmboot_map_all_ram_segments(mmu_l3_tbl); warmboot_map_all_ram_segments(mmu_l3_tbl);
tzram_map_all_segments(mmu_l3_tbl, target_firmware); tzram_map_all_segments(mmu_l3_tbl, target_firmware);

24
exosphere/src/memory_map.h
View file

@ -52,6 +52,29 @@
#define _MMAPDEV19 ( 0x00000000ull, 0x1000ull, true ) /* AMS userpage, NOT mapped at startup */ #define _MMAPDEV19 ( 0x00000000ull, 0x1000ull, true ) /* AMS userpage, NOT mapped at startup */
#define _MMAPDEV20 ( 0x40038000ull, 0x5000ull, true ) /* DEBUG: IRAM */ #define _MMAPDEV20 ( 0x40038000ull, 0x5000ull, true ) /* DEBUG: IRAM */
/* MMIO 7.0.0+. (addr). */
#define _MMAPDEV7X0 ( 0x50041000ull ) /* ARM Interrupt Distributor */
#define _MMAPDEV7X1 ( 0x50042000ull ) /* Interrupt Controller Physical CPU interface */
#define _MMAPDEV7X2 ( 0x70006000ull ) /* UART */
#define _MMAPDEV7X3 ( 0x60006000ull ) /* Clock and Reset */
#define _MMAPDEV7X4 ( 0x7000E000ull ) /* RTC, PMC */
#define _MMAPDEV7X5 ( 0x60005000ull ) /* TMRs, WDTs */
#define _MMAPDEV7X6 ( 0x6000C000ull ) /* System Registers */
#define _MMAPDEV7X7 ( 0x70012000ull ) /* SE */
#define _MMAPDEV7X8 ( 0x700F0000ull ) /* SYSCTR0 */
#define _MMAPDEV7X9 ( 0x70019000ull ) /* MC */
#define _MMAPDEV7X10 ( 0x7000F000ull ) /* FUSE (0x7000F800) */
#define _MMAPDEV7X11 ( 0x70000000ull ) /* MISC */
#define _MMAPDEV7X12 ( 0x60007000ull ) /* Flow Controller */
#define _MMAPDEV7X13 ( 0x40000000ull ) /* NX bootloader mailbox page */
#define _MMAPDEV7X14 ( 0x7000D000ull ) /* I2C-5,6 - SPI 2B-1 to 4 */
#define _MMAPDEV7X15 ( 0x6000D000ull ) /* GPIO-1 - GPIO-8 */
#define _MMAPDEV7X16 ( 0x7000C000ull ) /* I2C-I2C4 */
#define _MMAPDEV7X17 ( 0x6000F000ull ) /* Exception vectors */
#define _MMAPDEV7X18 ( 0x00000000ull ) /* AMS irampage, NOT mapped at startup */
#define _MMAPDEV7X19 ( 0x00000000ull ) /* AMS userpage, NOT mapped at startup */
#define _MMAPDEV7X20 ( 0x40038000ull ) /* DEBUG: IRAM */
/* LP0 entry ram segments (addr, size, additional attributes) */ /* LP0 entry ram segments (addr, size, additional attributes) */
#define _MMAPLP0ES0 ( 0x40020000ull, 0x10000ull, MMU_PTE_BLOCK_NS | ATTRIB_MEMTYPE_DEVICE ) /* Encrypted TZRAM */ #define _MMAPLP0ES0 ( 0x40020000ull, 0x10000ull, MMU_PTE_BLOCK_NS | ATTRIB_MEMTYPE_DEVICE ) /* Encrypted TZRAM */
#define _MMAPLP0ES1 ( 0x40003000ull, 0x01000ull, MMU_PTE_BLOCK_NS | ATTRIB_MEMTYPE_DEVICE ) /* LP0 entry code */ #define _MMAPLP0ES1 ( 0x40003000ull, 0x01000ull, MMU_PTE_BLOCK_NS | ATTRIB_MEMTYPE_DEVICE ) /* LP0 entry code */
@ -140,6 +163,7 @@
#define IDENTITY_IS_MAPPING_BLOCK_RANGE(mapping_id) (TUPLE_ELEM_3(CAT(_MMAPID, EVAL(mapping_id)))) #define IDENTITY_IS_MAPPING_BLOCK_RANGE(mapping_id) (TUPLE_ELEM_3(CAT(_MMAPID, EVAL(mapping_id))))
#define MMIO_GET_DEVICE_PA(device_id) (TUPLE_ELEM_0(CAT(_MMAPDEV, EVAL(device_id)))) #define MMIO_GET_DEVICE_PA(device_id) (TUPLE_ELEM_0(CAT(_MMAPDEV, EVAL(device_id))))
#define MMIO_GET_DEVICE_7X_PA(device_id) (TUPLE_ELEM_0(CAT(_MMAPDEV, EVAL(device_id))))
#define MMIO_GET_DEVICE_ADDRESS(device_id)\ #define MMIO_GET_DEVICE_ADDRESS(device_id)\
(\ (\
(TUPLE_FOLD_LEFT_1(EVAL(device_id), _MMAPDEV, PLUS) EVAL(MMIO_BASE)) +\ (TUPLE_FOLD_LEFT_1(EVAL(device_id), _MMAPDEV, PLUS) EVAL(MMIO_BASE)) +\

6
exosphere/src/package2.c
View file

@ -508,7 +508,7 @@ static void copy_warmboot_bin_to_dram() {
} }
static void sync_with_nx_bootloader(int state) { static void sync_with_nx_bootloader(int state) {
while (MAILBOX_NX_BOOTLOADER_SETUP_STATE < state) { while (MAILBOX_NX_BOOTLOADER_SETUP_STATE(exosphere_get_target_firmware()) < state) {
wait(100); wait(100);
} }
} }
@ -566,7 +566,7 @@ void load_package2(coldboot_crt0_reloc_list_t *reloc_list) {
setup_current_core_state(); setup_current_core_state();
/* Save boot reason to global. */ /* Save boot reason to global. */
bootconfig_load_boot_reason((volatile boot_reason_t *)(MAILBOX_NX_BOOTLOADER_BOOT_REASON)); bootconfig_load_boot_reason((volatile boot_reason_t *)(MAILBOX_NX_BOOTLOADER_BOOT_REASON(exosphere_get_target_firmware())));
/* Initialize cache'd random bytes for kernel. */ /* Initialize cache'd random bytes for kernel. */
randomcache_init(); randomcache_init();
@ -575,7 +575,7 @@ void load_package2(coldboot_crt0_reloc_list_t *reloc_list) {
/* memset((void *)reloc_list->reloc_base, 0, reloc_list->loaded_bin_size); */ /* memset((void *)reloc_list->reloc_base, 0, reloc_list->loaded_bin_size); */
/* Let NX Bootloader know that we're running. */ /* Let NX Bootloader know that we're running. */
MAILBOX_NX_BOOTLOADER_IS_SECMON_AWAKE = 1; MAILBOX_NX_BOOTLOADER_IS_SECMON_AWAKE(exosphere_get_target_firmware()) = 1;
/* Wait for 1 second, to allow time for NX_BOOTLOADER to draw to the screen. This is useful for debugging. */ /* Wait for 1 second, to allow time for NX_BOOTLOADER to draw to the screen. This is useful for debugging. */
/* wait(1000000); */ /* wait(1000000); */

15
exosphere/src/package2.h
View file

@ -21,18 +21,19 @@
#include "utils.h" #include "utils.h"
#include "bootconfig.h" #include "bootconfig.h"
#include "exocfg.h"
#include "memory_map.h" #include "memory_map.h"
/* Physaddr 0x40002EF8 */ /* Physaddr 0x40002EF8 */
static inline uintptr_t get_nx_bootloader_mailbox_base(void) { static inline uintptr_t get_nx_bootloader_mailbox_base(unsigned int targetfw) {
return MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_NXBOOTLOADER_MAILBOX); return MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_NXBOOTLOADER_MAILBOX) + ((targetfw >= ATMOSPHERE_TARGET_FIRMWARE_700) ? (0x000ull) : (0xE00ull));
} }
#define MAILBOX_NX_BOOTLOADER_BASE (get_nx_bootloader_mailbox_base()) #define MAILBOX_NX_BOOTLOADER_BASE(targetfw) (get_nx_bootloader_mailbox_base(targetfw))
#define MAILBOX_NX_SECMON_BOOT_TIME MAKE_REG32(MAILBOX_NX_BOOTLOADER_BASE + 0xE08ull) #define MAILBOX_NX_SECMON_BOOT_TIME(targetfw) MAKE_REG32(MAILBOX_NX_BOOTLOADER_BASE(targetfw) + 0x08ull)
#define MAILBOX_NX_BOOTLOADER_SETUP_STATE MAKE_REG32(MAILBOX_NX_BOOTLOADER_BASE + 0xEF8ull) #define MAILBOX_NX_BOOTLOADER_SETUP_STATE(targetfw) MAKE_REG32(MAILBOX_NX_BOOTLOADER_BASE(targetfw) + 0xF8ull)
#define NX_BOOTLOADER_STATE_INIT 0 #define NX_BOOTLOADER_STATE_INIT 0
#define NX_BOOTLOADER_STATE_MOVED_BOOTCONFIG 1 #define NX_BOOTLOADER_STATE_MOVED_BOOTCONFIG 1
@ -45,9 +46,9 @@ static inline uintptr_t get_nx_bootloader_mailbox_base(void) {
#define NX_BOOTLOADER_STATE_FINISHED_4X 4 #define NX_BOOTLOADER_STATE_FINISHED_4X 4
/* Physaddr 0x40002EFC */ /* Physaddr 0x40002EFC */
#define MAILBOX_NX_BOOTLOADER_IS_SECMON_AWAKE MAKE_REG32(MAILBOX_NX_BOOTLOADER_BASE + 0xEFCULL) #define MAILBOX_NX_BOOTLOADER_IS_SECMON_AWAKE(targetfw) MAKE_REG32(MAILBOX_NX_BOOTLOADER_BASE(targetfw) + 0xFCULL)
#define MAILBOX_NX_BOOTLOADER_BOOT_REASON (MAILBOX_NX_BOOTLOADER_BASE + 0xE10ULL) #define MAILBOX_NX_BOOTLOADER_BOOT_REASON(targetfw) (MAILBOX_NX_BOOTLOADER_BASE(targetfw) + 0x10ULL)
#define NX_BOOTLOADER_BOOTCONFIG_POINTER ((void *)(0x4003D000ull)) #define NX_BOOTLOADER_BOOTCONFIG_POINTER ((void *)(0x4003D000ull))
#define NX_BOOTLOADER_BOOTCONFIG_POINTER_6X ((void *)(0x4003F800ull)) #define NX_BOOTLOADER_BOOTCONFIG_POINTER_6X ((void *)(0x4003F800ull))