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kern: bump svc limit to 192 from 128

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Michael Scire 2021-04-06 22:26:52 -07:00 committed by SciresM
parent 46612156f4
commit 4b9e7c7d27
10 changed files with 100 additions and 30 deletions
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27
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_assembly_offsets.h Normal file
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@ -0,0 +1,27 @@
/*
* Copyright (c) 2018-2020 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#define THREAD_STACK_PARAMETERS_SIZE 0x30
#define THREAD_STACK_PARAMETERS_SVC_PERMISSION 0x00
#define THREAD_STACK_PARAMETERS_CONTEXT 0x18
#define THREAD_STACK_PARAMETERS_CUR_THREAD 0x20
#define THREAD_STACK_PARAMETERS_DISABLE_COUNT 0x28
#define THREAD_STACK_PARAMETERS_DPC_FLAGS 0x2A
#define THREAD_STACK_PARAMETERS_CURRENT_SVC_ID 0x2B
#define THREAD_STACK_PARAMETERS_IS_CALLING_SVC 0x2C
#define THREAD_STACK_PARAMETERS_IS_IN_EXCEPTION_HANDLER 0x2D
#define THREAD_STACK_PARAMETERS_IS_PINNED 0x2E

1
libraries/libmesosphere/include/mesosphere/kern_common.hpp
View file

@ -17,6 +17,7 @@
#include <vapours.hpp> #include <vapours.hpp>
#include <mesosphere/kern_build_config.hpp> #include <mesosphere/kern_build_config.hpp>
#include <mesosphere/svc/kern_svc_results.hpp> #include <mesosphere/svc/kern_svc_results.hpp>
#include <mesosphere/kern_select_assembly_offsets.h>
namespace ams::kern { namespace ams::kern {

21
libraries/libmesosphere/include/mesosphere/kern_k_thread.hpp
View file

@ -82,17 +82,28 @@ namespace ams::kern {
}; };
struct StackParameters { struct StackParameters {
alignas(0x10) u8 svc_permission[0x10]; alignas(0x10) u8 svc_permission[0x18];
KThreadContext *context;
KThread *cur_thread;
s16 disable_count;
std::atomic<u8> dpc_flags; std::atomic<u8> dpc_flags;
u8 current_svc_id; u8 current_svc_id;
bool is_calling_svc; bool is_calling_svc;
bool is_in_exception_handler; bool is_in_exception_handler;
bool is_pinned; bool is_pinned;
s32 disable_count;
KThreadContext *context;
KThread *cur_thread;
}; };
static_assert(alignof(StackParameters) == 0x10); static_assert(alignof(StackParameters) == 0x10);
static_assert(sizeof(StackParameters) == THREAD_STACK_PARAMETERS_SIZE);
static_assert(__builtin_offsetof(StackParameters, svc_permission) == THREAD_STACK_PARAMETERS_SVC_PERMISSION);
static_assert(__builtin_offsetof(StackParameters, context) == THREAD_STACK_PARAMETERS_CONTEXT);
static_assert(__builtin_offsetof(StackParameters, cur_thread) == THREAD_STACK_PARAMETERS_CUR_THREAD);
static_assert(__builtin_offsetof(StackParameters, disable_count) == THREAD_STACK_PARAMETERS_DISABLE_COUNT);
static_assert(__builtin_offsetof(StackParameters, dpc_flags) == THREAD_STACK_PARAMETERS_DPC_FLAGS);
static_assert(__builtin_offsetof(StackParameters, current_svc_id) == THREAD_STACK_PARAMETERS_CURRENT_SVC_ID);
static_assert(__builtin_offsetof(StackParameters, is_calling_svc) == THREAD_STACK_PARAMETERS_IS_CALLING_SVC);
static_assert(__builtin_offsetof(StackParameters, is_in_exception_handler) == THREAD_STACK_PARAMETERS_IS_IN_EXCEPTION_HANDLER);
static_assert(__builtin_offsetof(StackParameters, is_pinned) == THREAD_STACK_PARAMETERS_IS_PINNED);
struct QueueEntry { struct QueueEntry {
private: private:
@ -251,7 +262,7 @@ namespace ams::kern {
return *(reinterpret_cast<StackParameters *>(m_kernel_stack_top) - 1); return *(reinterpret_cast<StackParameters *>(m_kernel_stack_top) - 1);
} }
public: public:
ALWAYS_INLINE s32 GetDisableDispatchCount() const { ALWAYS_INLINE s16 GetDisableDispatchCount() const {
MESOSPHERE_ASSERT_THIS(); MESOSPHERE_ASSERT_THIS();
return this->GetStackParameters().disable_count; return this->GetStackParameters().disable_count;
} }

26
libraries/libmesosphere/include/mesosphere/kern_select_assembly_offsets.h Normal file
View file

@ -0,0 +1,26 @@
/*
* Copyright (c) 2018-2020 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#ifdef ATMOSPHERE_ARCH_ARM64
#include <mesosphere/arch/arm64/kern_assembly_offsets.h>
#else
#error "Unknown architecture for CPU"
#endif

2
libraries/libmesosphere/include/mesosphere/svc/kern_svc_prototypes.hpp
View file

@ -20,7 +20,7 @@
namespace ams::kern::svc { namespace ams::kern::svc {
static constexpr size_t NumSupervisorCalls = 0x80; static constexpr size_t NumSupervisorCalls = 0xC0;
#define AMS_KERN_SVC_DECLARE_ENUM_ID(ID, RETURN_TYPE, NAME, ...) \ #define AMS_KERN_SVC_DECLARE_ENUM_ID(ID, RETURN_TYPE, NAME, ...) \
SvcId_##NAME = ID, SvcId_##NAME = ID,

5
libraries/libmesosphere/source/arch/arm64/svc/kern_svc_exception_asm.s
View file

@ -13,6 +13,7 @@
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <mesosphere/kern_select_assembly_offsets.h>
/* ams::kern::svc::CallReturnFromException64(Result result) */ /* ams::kern::svc::CallReturnFromException64(Result result) */
.section .text._ZN3ams4kern3svc25CallReturnFromException64Ev, "ax", %progbits .section .text._ZN3ams4kern3svc25CallReturnFromException64Ev, "ax", %progbits
@ -62,7 +63,7 @@ _ZN3ams4kern3svc14RestoreContextEm:
0: /* We should handle DPC. */ 0: /* We should handle DPC. */
/* Check the dpc flags. */ /* Check the dpc flags. */
ldrb w8, [sp, #(0x120 + 0x10)] ldrb w8, [sp, #(0x120 + THREAD_STACK_PARAMETERS_DPC_FLAGS)]
cbz w8, 1f cbz w8, 1f
/* We have DPC to do! */ /* We have DPC to do! */
@ -82,7 +83,7 @@ _ZN3ams4kern3svc14RestoreContextEm:
1: /* We're done with DPC, and should return from the svc. */ 1: /* We're done with DPC, and should return from the svc. */
/* Clear our in-SVC note. */ /* Clear our in-SVC note. */
strb wzr, [sp, #(0x120 + 0x12)] strb wzr, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
/* Restore registers. */ /* Restore registers. */
ldp x30, x8, [sp, #(8 * 30)] ldp x30, x8, [sp, #(8 * 30)]

29
libraries/libmesosphere/source/arch/arm64/svc/kern_svc_handlers_asm.s
View file

@ -14,6 +14,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <mesosphere/kern_build_config.hpp> #include <mesosphere/kern_build_config.hpp>
#include <mesosphere/kern_select_assembly_offsets.h>
/* ams::kern::arch::arm64::SvcHandler64() */ /* ams::kern::arch::arm64::SvcHandler64() */
.section .text._ZN3ams4kern4arch5arm6412SvcHandler64Ev, "ax", %progbits .section .text._ZN3ams4kern4arch5arm6412SvcHandler64Ev, "ax", %progbits
@ -32,7 +33,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
mrs x9, elr_el1 mrs x9, elr_el1
mrs x10, spsr_el1 mrs x10, spsr_el1
mrs x11, tpidr_el0 mrs x11, tpidr_el0
ldr x18, [sp, #(0x120 + 0x28)] ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
/* Save callee-saved registers. */ /* Save callee-saved registers. */
stp x19, x20, [sp, #(8 * 19)] stp x19, x20, [sp, #(8 * 19)]
@ -59,7 +60,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
/* Check the specific SVC permission bit for allowal. */ /* Check the specific SVC permission bit for allowal. */
mov x9, sp mov x9, sp
add x9, x9, x8, lsr#3 add x9, x9, x8, lsr#3
ldrb w9, [x9, #0x120] ldrb w9, [x9, #(0x120 + THREAD_STACK_PARAMETERS_SVC_PERMISSION)]
and x10, x8, #0x7 and x10, x8, #0x7
lsr x10, x9, x10 lsr x10, x9, x10
tst x10, #1 tst x10, #1
@ -71,7 +72,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
cbz w10, 1f cbz w10, 1f
/* It might not, so check the stack params to see if we must not allow the SVC. */ /* It might not, so check the stack params to see if we must not allow the SVC. */
ldrb w10, [sp, #(0x120 + 0x14)] ldrb w10, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_PINNED)]
cbz w10, 3f cbz w10, 3f
1: /* We can call the SVC. */ 1: /* We can call the SVC. */
@ -81,8 +82,8 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
/* Note that we're calling the SVC. */ /* Note that we're calling the SVC. */
mov w10, #1 mov w10, #1
strb w10, [sp, #(0x120 + 0x12)] strb w10, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
strb w8, [sp, #(0x120 + 0x11)] strb w8, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CURRENT_SVC_ID)]
/* If we should, trace the svc entry. */ /* If we should, trace the svc entry. */
#if defined(MESOSPHERE_BUILD_FOR_TRACING) #if defined(MESOSPHERE_BUILD_FOR_TRACING)
@ -109,7 +110,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
2: /* We completed the SVC, and we should handle DPC. */ 2: /* We completed the SVC, and we should handle DPC. */
/* Check the dpc flags. */ /* Check the dpc flags. */
ldrb w8, [sp, #(0x120 + 0x10)] ldrb w8, [sp, #(0x120 + THREAD_STACK_PARAMETERS_DPC_FLAGS)]
cbz w8, 4f cbz w8, 4f
/* We have DPC to do! */ /* We have DPC to do! */
@ -179,7 +180,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
4: /* Return from SVC. */ 4: /* Return from SVC. */
/* Clear our in-SVC note. */ /* Clear our in-SVC note. */
strb wzr, [sp, #(0x120 + 0x12)] strb wzr, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
/* If we should, trace the svc exit. */ /* If we should, trace the svc exit. */
#if defined(MESOSPHERE_BUILD_FOR_TRACING) #if defined(MESOSPHERE_BUILD_FOR_TRACING)
@ -245,7 +246,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
mrs x17, elr_el1 mrs x17, elr_el1
mrs x20, spsr_el1 mrs x20, spsr_el1
mrs x19, tpidr_el0 mrs x19, tpidr_el0
ldr x18, [sp, #(0x120 + 0x28)] ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
stp x17, x20, [sp, #(8 * 32)] stp x17, x20, [sp, #(8 * 32)]
str x19, [sp, #(8 * 34)] str x19, [sp, #(8 * 34)]
@ -268,7 +269,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
/* Check the specific SVC permission bit for allowal. */ /* Check the specific SVC permission bit for allowal. */
mov x20, sp mov x20, sp
add x20, x20, x16, lsr#3 add x20, x20, x16, lsr#3
ldrb w20, [x20, #0x120] ldrb w20, [x20, #(0x120 + THREAD_STACK_PARAMETERS_SVC_PERMISSION)]
and x17, x16, #0x7 and x17, x16, #0x7
lsr x17, x20, x17 lsr x17, x20, x17
tst x17, #1 tst x17, #1
@ -280,7 +281,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
cbz w15, 1f cbz w15, 1f
/* It might not, so check the stack params to see if we must not allow the SVC. */ /* It might not, so check the stack params to see if we must not allow the SVC. */
ldrb w15, [sp, #(0x120 + 0x14)] ldrb w15, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_PINNED)]
cbz w15, 3f cbz w15, 3f
1: /* We can call the SVC. */ 1: /* We can call the SVC. */
@ -290,8 +291,8 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
/* Note that we're calling the SVC. */ /* Note that we're calling the SVC. */
mov w15, #1 mov w15, #1
strb w15, [sp, #(0x120 + 0x12)] strb w15, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
strb w16, [sp, #(0x120 + 0x11)] strb w16, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CURRENT_SVC_ID)]
/* If we should, trace the svc entry. */ /* If we should, trace the svc entry. */
#if defined(MESOSPHERE_BUILD_FOR_TRACING) #if defined(MESOSPHERE_BUILD_FOR_TRACING)
@ -318,7 +319,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
2: /* We completed the SVC, and we should handle DPC. */ 2: /* We completed the SVC, and we should handle DPC. */
/* Check the dpc flags. */ /* Check the dpc flags. */
ldrb w16, [sp, #(0x120 + 0x10)] ldrb w16, [sp, #(0x120 + THREAD_STACK_PARAMETERS_DPC_FLAGS)]
cbz w16, 4f cbz w16, 4f
/* We have DPC to do! */ /* We have DPC to do! */
@ -376,7 +377,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
4: /* Return from SVC. */ 4: /* Return from SVC. */
/* Clear our in-SVC note. */ /* Clear our in-SVC note. */
strb wzr, [sp, #(0x120 + 0x12)] strb wzr, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
/* If we should, trace the svc exit. */ /* If we should, trace the svc exit. */
#if defined(MESOSPHERE_BUILD_FOR_TRACING) #if defined(MESOSPHERE_BUILD_FOR_TRACING)

9
mesosphere/kernel/source/arch/arm64/kern_exception_handlers_asm.s
View file

@ -13,6 +13,7 @@
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <mesosphere/kern_select_assembly_offsets.h>
/* ams::kern::arch::arm64::EL1IrqExceptionHandler() */ /* ams::kern::arch::arm64::EL1IrqExceptionHandler() */
.section .text._ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv, "ax", %progbits .section .text._ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv, "ax", %progbits
@ -99,7 +100,7 @@ _ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv:
str x23, [sp, #(8 * 34)] str x23, [sp, #(8 * 34)]
/* Invoke KInterruptManager::HandleInterrupt(bool user_mode). */ /* Invoke KInterruptManager::HandleInterrupt(bool user_mode). */
ldr x18, [sp, #(0x120 + 0x28)] ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
mov x0, #1 mov x0, #1
bl _ZN3ams4kern4arch5arm6417KInterruptManager15HandleInterruptEb bl _ZN3ams4kern4arch5arm6417KInterruptManager15HandleInterruptEb
@ -196,7 +197,7 @@ _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv:
str x23, [sp, #(8 * 34)] str x23, [sp, #(8 * 34)]
/* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */ /* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */
ldr x18, [sp, #(0x120 + 0x28)] ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
mov x0, sp mov x0, sp
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
@ -440,7 +441,7 @@ _ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv:
stp x20, x21, [sp, #(8 * 32)] stp x20, x21, [sp, #(8 * 32)]
/* Invoke the FPU context switch handler. */ /* Invoke the FPU context switch handler. */
ldr x18, [sp, #(0x120 + 0x28)] ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
bl _ZN3ams4kern4arch5arm6423FpuContextSwitchHandlerEv bl _ZN3ams4kern4arch5arm6423FpuContextSwitchHandlerEv
/* Restore registers that we saved. */ /* Restore registers that we saved. */
@ -554,7 +555,7 @@ _ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv:
str x23, [sp, #(8 * 34)] str x23, [sp, #(8 * 34)]
/* Invoke ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *). */ /* Invoke ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *). */
ldr x18, [sp, #(0x120 + 0x28)] ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
mov x0, sp mov x0, sp
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE

5
mesosphere/kernel/source/arch/arm64/kern_k_scheduler_asm.s
View file

@ -13,6 +13,7 @@
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <mesosphere/kern_select_assembly_offsets.h>
#define SAVE_THREAD_CONTEXT(ctx, tmp0, tmp1, done_label) \ #define SAVE_THREAD_CONTEXT(ctx, tmp0, tmp1, done_label) \
/* Save the callee save registers + SP and cpacr. */ \ /* Save the callee save registers + SP and cpacr. */ \
@ -148,11 +149,11 @@ _ZN3ams4kern10KScheduler12ScheduleImplEv:
and x2, x2, #~(0x1000-1) and x2, x2, #~(0x1000-1)
/* Check if the thread has terminated. We can do this by checking the DPC flags for DpcFlag_Terminated. */ /* Check if the thread has terminated. We can do this by checking the DPC flags for DpcFlag_Terminated. */
ldurb w3, [x2, #-0x20] ldurb w3, [x2, #-(THREAD_STACK_PARAMETERS_SIZE - THREAD_STACK_PARAMETERS_DPC_FLAGS)]
tbnz w3, #1, 3f tbnz w3, #1, 3f
/* The current thread hasn't terminated, so we want to save its context. */ /* The current thread hasn't terminated, so we want to save its context. */
ldur x2, [x2, #-0x10] ldur x2, [x2, #-(THREAD_STACK_PARAMETERS_SIZE - THREAD_STACK_PARAMETERS_CONTEXT)]
SAVE_THREAD_CONTEXT(x2, x4, x5, 2f) SAVE_THREAD_CONTEXT(x2, x4, x5, 2f)
2: /* We're done saving this thread's context, so we need to unlock it. */ 2: /* We're done saving this thread's context, so we need to unlock it. */

5
mesosphere/kernel/source/arch/arm64/kern_k_thread_context_asm.s
View file

@ -13,6 +13,7 @@
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <mesosphere/kern_select_assembly_offsets.h>
/* ams::kern::arch::arm64::UserModeThreadStarter() */ /* ams::kern::arch::arm64::UserModeThreadStarter() */
.section .text._ZN3ams4kern4arch5arm6421UserModeThreadStarterEv, "ax", %progbits .section .text._ZN3ams4kern4arch5arm6421UserModeThreadStarterEv, "ax", %progbits
@ -26,7 +27,7 @@ _ZN3ams4kern4arch5arm6421UserModeThreadStarterEv:
/* | KExceptionContext (size 0x120) | KThread::StackParameters (size 0x30) | */ /* | KExceptionContext (size 0x120) | KThread::StackParameters (size 0x30) | */
/* Clear the disable count for this thread's stack parameters. */ /* Clear the disable count for this thread's stack parameters. */
str wzr, [sp, #(0x120 + 0x18)] strh wzr, [sp, #(0x120 + THREAD_STACK_PARAMETERS_DISABLE_COUNT)]
/* Call ams::kern::arch::arm64::OnThreadStart() */ /* Call ams::kern::arch::arm64::OnThreadStart() */
bl _ZN3ams4kern4arch5arm6413OnThreadStartEv bl _ZN3ams4kern4arch5arm6413OnThreadStartEv
@ -78,7 +79,7 @@ _ZN3ams4kern4arch5arm6427SupervisorModeThreadStarterEv:
ldp x0, x1, [sp], #0x10 ldp x0, x1, [sp], #0x10
/* Clear the disable count for this thread's stack parameters. */ /* Clear the disable count for this thread's stack parameters. */
str wzr, [sp, #(0x18)] strh wzr, [sp, #(THREAD_STACK_PARAMETERS_DISABLE_COUNT)]
/* Mask I bit in DAIF */ /* Mask I bit in DAIF */
msr daifclr, #2 msr daifclr, #2