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exo2: account for sleep/wake enabling jtag

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Michael Scire 2020-06-12 06:16:58 -07:00 committed by SciresM
parent 73c1615cda
commit 43f5a0ef45
4 changed files with 10 additions and 7 deletions
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6
exosphere/Makefile
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@ -21,10 +21,12 @@ program.lz4: build_program
build_program: build_program:
$(MAKE) -C program $(MAKE) -C program
warmboot.bin: warmboot.bin: build_warmboot
$(MAKE) -C warmboot
@cp warmboot/warmboot.bin warmboot.bin @cp warmboot/warmboot.bin warmboot.bin
build_warmboot:
$(MAKE) -C warmboot
boot_code.lz4: program.lz4 boot_code.lz4: program.lz4
exosphere-clean: exosphere-clean:

4
exosphere/program/source/secmon_setup.cpp
View file

@ -949,7 +949,9 @@ namespace ams::secmon {
void SetupForLp0Exit() { void SetupForLp0Exit() {
/* Exit HiZ mode in charger, if we need to. */ /* Exit HiZ mode in charger, if we need to. */
if (smc::IsChargerHiZModeEnabled()) { const auto target_fw = GetTargetFirmware();
const bool force_exit_hiz_mode = (target_fw < TargetFirmware_4_0_0) || (target_fw < TargetFirmware_8_0_0 && fuse::GetHardwareType() == fuse::HardwareType_Icosa);
if (force_exit_hiz_mode || smc::IsChargerHiZModeEnabled()) {
ExitChargerHiZMode(); ExitChargerHiZMode();
} }

5
exosphere/warmboot/source/warmboot_main.cpp
View file

@ -81,10 +81,9 @@ namespace ams::warmboot {
PowerOnCpu(); PowerOnCpu();
/* Halt ourselves. */ /* Halt ourselves. */
const bool disable_jtag = metadata->target_firmware >= TargetFirmware_4_0_0;
while (true) { while (true) {
reg::Write(secmon::MemoryRegionPhysicalDeviceFlowController.GetAddress() + FLOW_CTLR_HALT_COP_EVENTS, FLOW_REG_BITS_ENUM (HALT_COP_EVENTS_MODE, FLOW_MODE_STOP), reg::Write(secmon::MemoryRegionPhysicalDeviceFlowController.GetAddress() + FLOW_CTLR_HALT_COP_EVENTS, FLOW_REG_BITS_ENUM(HALT_COP_EVENTS_MODE, FLOW_MODE_STOP),
FLOW_REG_BITS_ENUM_SEL(HALT_COP_EVENTS_JTAG, disable_jtag, DISABLED, ENABLED)); FLOW_REG_BITS_ENUM(HALT_COP_EVENTS_JTAG, ENABLED));
} }
} }

2
exosphere/warmboot/source/warmboot_misc.cpp
View file

@ -39,8 +39,8 @@ namespace ams::warmboot {
const bool jtag_sts = reg::HasValue(PMC + APBDEV_PMC_STICKY_BITS, PMC_REG_BITS_ENUM(STICKY_BITS_JTAG_STS, ENABLE)); const bool jtag_sts = reg::HasValue(PMC + APBDEV_PMC_STICKY_BITS, PMC_REG_BITS_ENUM(STICKY_BITS_JTAG_STS, ENABLE));
reg::ReadWrite(SYSTEM + SB_PFCFG, SB_REG_BITS_ENUM_SEL(PFCFG_DBGEN, jtag_sts, ENABLE, DISABLE), reg::ReadWrite(SYSTEM + SB_PFCFG, SB_REG_BITS_ENUM_SEL(PFCFG_DBGEN, jtag_sts, ENABLE, DISABLE),
SB_REG_BITS_ENUM_SEL(PFCFG_NIDEN, jtag_sts, ENABLE, DISABLE),
SB_REG_BITS_ENUM_SEL(PFCFG_SPNIDEN, jtag_sts, ENABLE, DISABLE), SB_REG_BITS_ENUM_SEL(PFCFG_SPNIDEN, jtag_sts, ENABLE, DISABLE),
SB_REG_BITS_ENUM (PFCFG_NIDEN, ENABLE),
SB_REG_BITS_ENUM (PFCFG_SPIDEN, DISABLE)); SB_REG_BITS_ENUM (PFCFG_SPIDEN, DISABLE));
reg::ReadWrite(APB_MISC + APB_MISC_PP_CONFIG_CTL, APB_MISC_REG_BITS_ENUM_SEL(PP_CONFIG_CTL_JTAG, jtag_sts, ENABLE, DISABLE)); reg::ReadWrite(APB_MISC + APB_MISC_PP_CONFIG_CTL, APB_MISC_REG_BITS_ENUM_SEL(PP_CONFIG_CTL_JTAG, jtag_sts, ENABLE, DISABLE));